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authorRalf Baechle <ralf@linux-mips.org>2000-03-07 15:45:24 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-03-07 15:45:24 +0000
commit9f9f3e6e8548a596697778337110a423c384b6f3 (patch)
tree5dd4b290ef532cf5ecb058e1a92cd3435afeac8c /include/asm-alpha/pci.h
parentd5c9a365ee7d2fded249aa5abfc5e89587583029 (diff)
Merge with Linux 2.3.49.
Diffstat (limited to 'include/asm-alpha/pci.h')
-rw-r--r--include/asm-alpha/pci.h17
1 files changed, 1 insertions, 16 deletions
diff --git a/include/asm-alpha/pci.h b/include/asm-alpha/pci.h
index 4695112ce..1a68d43a3 100644
--- a/include/asm-alpha/pci.h
+++ b/include/asm-alpha/pci.h
@@ -12,22 +12,7 @@
struct pci_dev;
struct pci_bus;
struct resource;
-
-/* A PCI IOMMU allocation arena. There are typically two of these
- regions per bus. */
-/* ??? The 8400 has a 32-byte pte entry, and the entire table apparently
- lives directly on the host bridge (no tlb?). We don't support this
- machine, but if we ever did, we'd need to parameterize all this quite
- a bit further. Probably with per-bus operation tables. */
-
-struct pci_iommu_arena
-{
- spinlock_t lock;
- unsigned long *ptes;
- dma_addr_t dma_base;
- unsigned int size;
- unsigned int alloc_hint;
-};
+struct pci_iommu_arena;
/* A controler. Used to manage multiple PCI busses. */