diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2000-02-24 00:12:35 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2000-02-24 00:12:35 +0000 |
commit | 482368b1a8e45430672c58c9a42e7d2004367126 (patch) | |
tree | ce2a1a567d4d62dee7c2e71a46a99cf72cf1d606 /include/asm-alpha/pgalloc.h | |
parent | e4d0251c6f56ab2e191afb70f80f382793e23f74 (diff) |
Merge with 2.3.47. Guys, this is buggy as shit. You've been warned.
Diffstat (limited to 'include/asm-alpha/pgalloc.h')
-rw-r--r-- | include/asm-alpha/pgalloc.h | 37 |
1 files changed, 24 insertions, 13 deletions
diff --git a/include/asm-alpha/pgalloc.h b/include/asm-alpha/pgalloc.h index ae10466b8..e4689c758 100644 --- a/include/asm-alpha/pgalloc.h +++ b/include/asm-alpha/pgalloc.h @@ -9,7 +9,18 @@ #define flush_cache_range(mm, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr) do { } while (0) #define flush_page_to_ram(page) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) +/* + * The icache is not coherent with the dcache on alpha, thus before + * running self modified code like kernel modules we must always run + * an imb(). + */ +#ifndef __SMP__ +#define flush_icache_range(start, end) imb() +#else +#define flush_icache_range(start, end) smp_imb() +extern void smp_imb(void); +#endif +#define flush_icache_page(vma, page) do { } while (0) /* * Use a few helper functions to hide the ugly broken ASN @@ -95,6 +106,18 @@ static inline void flush_tlb(void) flush_tlb_current(current->mm); } +/* + * Flush a specified range of user mapping page tables + * from TLB. + * Although Alpha uses VPTE caches, this can be a nop, as Alpha does + * not have finegrained tlb flushing, so it will flush VPTE stuff + * during next flush_tlb_range. + */ +static inline void flush_tlb_pgtables(struct mm_struct *mm, + unsigned long start, unsigned long end) +{ +} + #ifndef __SMP__ /* * Flush everything (kernel mapping may also have @@ -145,18 +168,6 @@ static inline void flush_tlb_range(struct mm_struct *mm, flush_tlb_mm(mm); } -/* - * Flush a specified range of user mapping page tables - * from TLB. - * Although Alpha uses VPTE caches, this can be a nop, as Alpha does - * not have finegrained tlb flushing, so it will flush VPTE stuff - * during next flush_tlb_range. - */ -static inline void flush_tlb_pgtables(struct mm_struct *mm, - unsigned long start, unsigned long end) -{ -} - #else /* __SMP__ */ extern void flush_tlb_all(void); |