Merge with Linux 2.3.99-pre3.

6 files changed, 86 insertions, 11 deletions

diff --git a/include/asm-alpha/fpu.h b/include/asm-alpha/fpu.h
index 118941b3c..b9d8faa61 100644
--- a/include/asm-alpha/fpu.h
+++ b/include/asm-alpha/fpu.h
@@ -27,7 +27,7 @@
 #define FPCR_DYN_PLUS	 (0x3UL << FPCR_DYN_SHIFT)	/* towards +INF */
 #define FPCR_DYN_MASK	 (0x3UL << FPCR_DYN_SHIFT)
 
-#define FPCR_MASK	0xfffe000000000000
+#define FPCR_MASK	0xffff800000000000
 
 /*
  * IEEE trap enables are implemented in software.  These per-thread
@@ -67,7 +67,8 @@
 				 IEEE_STATUS_OVF | IEEE_STATUS_UNF |	\
 				 IEEE_STATUS_INE | IEEE_STATUS_DNO)
 
-#define IEEE_SW_MASK		(IEEE_TRAP_ENABLE_MASK | IEEE_STATUS_MASK | IEEE_MAP_MASK)
+#define IEEE_SW_MASK		(IEEE_TRAP_ENABLE_MASK |		\
+				 IEEE_STATUS_MASK | IEEE_MAP_MASK)
 
 #define IEEE_CURRENT_RM_SHIFT	32
 #define IEEE_CURRENT_RM_MASK	(3UL<<IEEE_CURRENT_RM_SHIFT)
@@ -78,7 +79,12 @@
 
 /*
  * Convert the software IEEE trap enable and status bits into the
- * hardware fpcr format.
+ * hardware fpcr format. 
+ *
+ * Digital Unix engineers receive my thanks for not defining the
+ * software bits identical to the hardware bits.  The chip designers
+ * receive my thanks for making all the not-implemented fpcr bits
+ * RAZ forcing us to use system calls to read/write this value.
  */
 
 static inline unsigned long
@@ -86,11 +92,13 @@ ieee_swcr_to_fpcr(unsigned long sw)
 {
 	unsigned long fp;
 	fp = (sw & IEEE_STATUS_MASK) << 35;
-	fp |= sw & IEEE_STATUS_MASK ? FPCR_SUM : 0;
+	fp |= (sw & IEEE_MAP_DMZ) << 36;
+	fp |= (sw & IEEE_STATUS_MASK ? FPCR_SUM : 0);
 	fp |= (~sw & (IEEE_TRAP_ENABLE_INV
 		      | IEEE_TRAP_ENABLE_DZE
 		      | IEEE_TRAP_ENABLE_OVF)) << 48;
 	fp |= (~sw & (IEEE_TRAP_ENABLE_UNF | IEEE_TRAP_ENABLE_INE)) << 57;
+	fp |= (sw & IEEE_MAP_UMZ ? FPCR_UNDZ | FPCR_UNFD : 0);
 	fp |= (~sw & IEEE_TRAP_ENABLE_DNO) << 41;
 	return fp;
 }
@@ -100,10 +108,12 @@ ieee_fpcr_to_swcr(unsigned long fp)
 {
 	unsigned long sw;
 	sw = (fp >> 35) & IEEE_STATUS_MASK;
+	sw |= (fp >> 36) & IEEE_MAP_DMZ;
 	sw |= (~fp >> 48) & (IEEE_TRAP_ENABLE_INV
 			     | IEEE_TRAP_ENABLE_DZE
 			     | IEEE_TRAP_ENABLE_OVF);
 	sw |= (~fp >> 57) & (IEEE_TRAP_ENABLE_UNF | IEEE_TRAP_ENABLE_INE);
+	sw |= (fp >> 47) & IEEE_MAP_UMZ;
 	sw |= (~fp >> 41) & IEEE_TRAP_ENABLE_DNO;
 	return sw;
 }
@@ -115,26 +125,59 @@ ieee_fpcr_to_swcr(unsigned long fp)
    never generates arithmetic faults and (b) call_pal instructions
    are implied trap barriers.  */
 
-static inline unsigned long rdfpcr(void)
+static inline unsigned long
+rdfpcr(void)
 {
 	unsigned long tmp, ret;
+
+#if defined(__alpha_cix__) || defined(__alpha_fix__)
+	__asm__ ("ftoit $f0,%0\n\t"
+		 "mf_fpcr $f0\n\t"
+		 "ftoit $f0,%1\n\t"
+		 "itoft %0,$f0"
+		 : "=r"(tmp), "=r"(ret));
+#else
 	__asm__ ("stt $f0,%0\n\t"
 		 "mf_fpcr $f0\n\t"
 		 "stt $f0,%1\n\t"
 		 "ldt $f0,%0"
-		: "=m"(tmp), "=m"(ret));
+		 : "=m"(tmp), "=m"(ret));
+#endif
+
 	return ret;
 }
 
-static inline void wrfpcr(unsigned long val)
+static inline void
+wrfpcr(unsigned long val)
 {
 	unsigned long tmp;
+
+#if defined(__alpha_cix__) || defined(__alpha_fix__)
+	__asm__ ("ftoit $f0,%0\n\t"
+		 "itoft %1,$f0\n\t"
+		 "mt_fpcr $f0\n\t"
+		 "itoft %0,$f0"
+		 : "=&r"(tmp) : "r"(val));
+#else
 	__asm__ __volatile__ (
 		"stt $f0,%0\n\t"
 		"ldt $f0,%1\n\t"
 		"mt_fpcr $f0\n\t"
 		"ldt $f0,%0"
 		: "=m"(tmp) : "m"(val));
+#endif
+}
+
+static inline unsigned long
+swcr_update_status(unsigned long swcr, unsigned long fpcr)
+{
+	/* EV6 implements most of the bits in hardware.  Collect
+	   the acrued exception bits from the real fpcr.  */
+	if (implver() == IMPLVER_EV6) {
+		swcr &= ~IEEE_STATUS_MASK;
+		swcr |= (fpcr >> 35) & IEEE_STATUS_MASK;
+	}
+	return swcr;
 }
 
 extern unsigned long alpha_read_fp_reg (unsigned long reg);
diff --git a/include/asm-alpha/pci.h b/include/asm-alpha/pci.h
index 8f89479b5..27e06783a 100644
--- a/include/asm-alpha/pci.h
+++ b/include/asm-alpha/pci.h
@@ -1,6 +1,8 @@
 #ifndef __ALPHA_PCI_H
 #define __ALPHA_PCI_H
 
+#ifdef __KERNEL__
+
 #include <linux/spinlock.h>
 #include <asm/scatterlist.h>
 #include <asm/machvec.h>
@@ -22,7 +24,17 @@ struct pci_controler {
 	struct resource *io_space;
 	struct resource *mem_space;
 
-	unsigned long config_space;
+	/* The following are for reporting to userland.  The invariant is
+	   that if we report a BWX-capable dense memory, we do not report
+	   a sparse memory at all, even if it exists.  */
+	unsigned long sparse_mem_base;
+	unsigned long dense_mem_base;
+	unsigned long sparse_io_base;
+	unsigned long dense_io_base;
+
+	/* This one's for the kernel only.  It's in KSEG somewhere.  */
+	unsigned long config_space_base;
+
 	unsigned int index;
 	unsigned int first_busno;
 	unsigned int last_busno;
@@ -132,4 +144,13 @@ pci_dma_sync_sg(struct pci_dev *dev, struct scatterlist *sg, int nents,
 
 extern int pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask);
 
+#endif /* __KERNEL__ */
+
+/* Values for the `which' argument to sys_pciconfig_iobase.  */
+#define IOBASE_HOSE		0
+#define IOBASE_SPARSE_MEM	1
+#define IOBASE_DENSE_MEM	2
+#define IOBASE_SPARSE_IO	3
+#define IOBASE_DENSE_IO		4
+
 #endif /* __ALPHA_PCI_H */
diff --git a/include/asm-alpha/pgtable.h b/include/asm-alpha/pgtable.h
index 0c5052788..ef04b09ba 100644
--- a/include/asm-alpha/pgtable.h
+++ b/include/asm-alpha/pgtable.h
@@ -159,6 +159,16 @@ extern unsigned long __zero_page(void);
  * On certain platforms whose physical address space can overlap KSEG,
  * namely EV6 and above, we must re-twiddle the physaddr to restore the
  * correct high-order bits.
+ *
+ * This is extremely confusing until you realize that this is actually
+ * just working around a userspace bug.  The X server was intending to
+ * provide the physical address but instead provided the KSEG address.
+ * Or tried to, except it's not representable.
+ * 
+ * On Tsunami there's nothing meaningful at 0x40000000000, so this is
+ * a safe thing to do.  Come the first core logic that does put something
+ * in this area -- memory or whathaveyou -- then this hack will have
+ * to go away.  So be prepared!
  */
 
 #if defined(CONFIG_ALPHA_GENERIC) && defined(USE_48_BIT_KSEG)
diff --git a/include/asm-alpha/sfp-machine.h b/include/asm-alpha/sfp-machine.h
index 8adc0e74c..5fe63afbd 100644
--- a/include/asm-alpha/sfp-machine.h
+++ b/include/asm-alpha/sfp-machine.h
@@ -74,9 +74,7 @@
 #define FP_EX_INEXACT		IEEE_TRAP_ENABLE_INE
 #define FP_EX_DENORM		IEEE_TRAP_ENABLE_DNO
 
-#define FP_DENORM_ZERO		(fpcw & IEEE_MAP_DMZ)
-
-#define FP_HANDLE_EXCEPTIONS return _fex
+#define FP_DENORM_ZERO		(swcr & IEEE_MAP_DMZ)
 
 /* We write the results always */
 #define FP_INHIBIT_RESULTS 0
diff --git a/include/asm-alpha/smplock.h b/include/asm-alpha/smplock.h
index 2a5c62700..911a06573 100644
--- a/include/asm-alpha/smplock.h
+++ b/include/asm-alpha/smplock.h
@@ -10,6 +10,8 @@
 
 extern spinlock_t kernel_flag;
 
+#define kernel_locked()		spin_is_locked(&kernel_flag)
+
 /*
  * Release global kernel lock and global interrupt lock
  */
diff --git a/include/asm-alpha/unistd.h b/include/asm-alpha/unistd.h
index 93ed9ed85..b71c3a708 100644
--- a/include/asm-alpha/unistd.h
+++ b/include/asm-alpha/unistd.h
@@ -313,6 +313,7 @@
 #define __NR_dipc			373
 #define __NR_pivot_root			374
 #define __NR_mincore			375
+#define __NR_pciconfig_iobase		376
 
 #if defined(__LIBRARY__) && defined(__GNUC__)