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authorRalf Baechle <ralf@linux-mips.org>2000-08-28 22:00:09 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-08-28 22:00:09 +0000
commit1a1d77dd589de5a567fa95e36aa6999c704ceca4 (patch)
tree141e31f89f18b9fe0831f31852e0435ceaccafc5 /include/asm-arm/arch-cl7500
parentfb9c690a18b3d66925a65b17441c37fa14d4370b (diff)
Merge with 2.4.0-test7.
Diffstat (limited to 'include/asm-arm/arch-cl7500')
-rw-r--r--include/asm-arm/arch-cl7500/dma.h4
-rw-r--r--include/asm-arm/arch-cl7500/hardware.h4
-rw-r--r--include/asm-arm/arch-cl7500/ide.h17
-rw-r--r--include/asm-arm/arch-cl7500/serial.h9
-rw-r--r--include/asm-arm/arch-cl7500/time.h3
-rw-r--r--include/asm-arm/arch-cl7500/uncompress.h17
6 files changed, 34 insertions, 20 deletions
diff --git a/include/asm-arm/arch-cl7500/dma.h b/include/asm-arm/arch-cl7500/dma.h
index 7bab998b9..1d6a8829d 100644
--- a/include/asm-arm/arch-cl7500/dma.h
+++ b/include/asm-arm/arch-cl7500/dma.h
@@ -7,13 +7,15 @@
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
+/* DMA is not yet implemented! It should be the same as acorn, copy over.. */
+
/*
* This is the maximum DMA address that can be DMAd to.
* There should not be more than (0xd0000000 - 0xc0000000)
* bytes of RAM.
*/
#define MAX_DMA_ADDRESS 0xd0000000
-#define MAX_DMA_CHANNELS 1
+#define MAX_DMA_CHANNELS 0
#define DMA_S0 0
diff --git a/include/asm-arm/arch-cl7500/hardware.h b/include/asm-arm/arch-cl7500/hardware.h
index 76978f79b..938389b20 100644
--- a/include/asm-arm/arch-cl7500/hardware.h
+++ b/include/asm-arm/arch-cl7500/hardware.h
@@ -67,6 +67,8 @@
#define IOEB_BASE ((volatile unsigned char *)0xe0350050)
#define PCIO_FLOPPYDMABASE ((volatile unsigned char *)0xe002a000)
#define PCIO_BASE 0xe0010000
+/* in/out bias for the ISA slot region */
+#define ISASLOT_IO 0x80400000
/*
* RAM definitions
@@ -77,8 +79,6 @@
p->u1.s.pages_in_bank[2] + \
p->u1.s.pages_in_bank[3]))
-#define PARAMS_BASE 0
-
#define FLUSH_BASE_PHYS 0x00000000 /* ROM */
#else
diff --git a/include/asm-arm/arch-cl7500/ide.h b/include/asm-arm/arch-cl7500/ide.h
index 53daa0969..d928d8596 100644
--- a/include/asm-arm/arch-cl7500/ide.h
+++ b/include/asm-arm/arch-cl7500/ide.h
@@ -7,6 +7,7 @@
* 29-07-1998 RMK Major re-work of IDE architecture specific code
*/
#include <asm/irq.h>
+#include <asm/arch/hardware.h>
/*
* Set up a hw structure for a specified data port, control port and IRQ.
@@ -15,7 +16,7 @@
static __inline__ void
ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
{
- ide_ioreg_t reg = (ide_ioreg_t) data_port;
+ ide_ioreg_t reg = data_port;
int i;
memset(hw, 0, sizeof(*hw));
@@ -24,9 +25,14 @@ ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
hw->io_ports[i] = reg;
reg += 1;
}
- hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
- if (irq)
+ if (ctrl_port) {
+ hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
+ } else {
+ hw->io_ports[IDE_CONTROL_OFFSET] = data_port + 0x206;
+ }
+ if (irq != NULL)
*irq = 0;
+ hw->io_ports[IDE_IRQ_OFFSET] = 0;
}
/*
@@ -36,4 +42,9 @@ ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
static __inline__ void
ide_init_default_hwifs(void)
{
+ hw_regs_t hw;
+
+ ide_init_hwif_ports(&hw, ISASLOT_IO + 0x1f0, ISASLOT_IO + 0x3f6, NULL);
+ hw.irq = IRQ_ISA_14;
+ ide_register_hw(&hw, NULL);
}
diff --git a/include/asm-arm/arch-cl7500/serial.h b/include/asm-arm/arch-cl7500/serial.h
index 256b2a34e..4611f7975 100644
--- a/include/asm-arm/arch-cl7500/serial.h
+++ b/include/asm-arm/arch-cl7500/serial.h
@@ -11,6 +11,8 @@
#ifndef __ASM_ARCH_SERIAL_H
#define __ASM_ARCH_SERIAL_H
+#include <asm/arch/hardware.h>
+
/*
* This assumes you have a 1.8432 MHz clock for your UART.
*
@@ -27,9 +29,10 @@
/* UART CLK PORT IRQ FLAGS */
#define STD_SERIAL_PORT_DEFNS \
{ 0, BASE_BAUD, 0x3F8, 10, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0x2F8, 10, STD_COM_FLAGS }, /* ttyS1 */ \
- { 0, BASE_BAUD, 0x804002e8, 41, STD_COM_FLAGS }, /* ttyS2 */ \
- { 0, BASE_BAUD, 0x804003e8, 40, STD_COM_FLAGS }, /* ttyS3 */ \
+ { 0, BASE_BAUD, 0x2F8, 0, STD_COM_FLAGS }, /* ttyS1 */ \
+ /* ISA Slot Serial ports */ \
+ { 0, BASE_BAUD, ISASLOT_IO + 0x2e8, 41, STD_COM_FLAGS }, /* ttyS2 */ \
+ { 0, BASE_BAUD, ISASLOT_IO + 0x3e8, 40, STD_COM_FLAGS }, /* ttyS3 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS4 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS5 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS6 */ \
diff --git a/include/asm-arm/arch-cl7500/time.h b/include/asm-arm/arch-cl7500/time.h
index e2c927605..7851607fc 100644
--- a/include/asm-arm/arch-cl7500/time.h
+++ b/include/asm-arm/arch-cl7500/time.h
@@ -8,7 +8,6 @@
* 10-Oct-1996 RMK Brought up to date with arch-sa110eval
* 04-Dec-1997 RMK Updated for new arch/arm/time.c
*/
-extern void ioctime_init(void);
static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
@@ -33,8 +32,6 @@ static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
*/
extern __inline__ void setup_timer(void)
{
- ioctime_init();
-
timer_irq.handler = timer_interrupt;
setup_arm_irq(IRQ_TIMER, &timer_irq);
diff --git a/include/asm-arm/arch-cl7500/uncompress.h b/include/asm-arm/arch-cl7500/uncompress.h
index 0585c8318..12ffdc98d 100644
--- a/include/asm-arm/arch-cl7500/uncompress.h
+++ b/include/asm-arm/arch-cl7500/uncompress.h
@@ -5,11 +5,12 @@
*/
#define BASE 0x03010000
+#define SERBASE (BASE + (0x3f8 << 2))
static __inline__ void putc(char c)
{
- while (!(*((volatile unsigned int *)(BASE + 0xbf4)) & 0x20));
- *((volatile unsigned int *)(BASE + 0xbe0)) = c;
+ while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20));
+ *((volatile unsigned int *)(SERBASE)) = c;
}
/*
@@ -27,13 +28,13 @@ static void puts(const char *s)
static __inline__ void arch_decomp_setup(void)
{
- int baud = 3686400 / (9600 * 16);
+ int baud = 3686400 / (9600 * 32);
- *((volatile unsigned int *)(BASE + 0xBEC)) = 0x80;
- *((volatile unsigned int *)(BASE + 0xBE0)) = baud & 0xff;
- *((volatile unsigned int *)(BASE + 0xBE4)) = (baud & 0xff00) >> 8;
- *((volatile unsigned int *)(BASE + 0xBEC)) = 3; /* 8 bits */
- *((volatile unsigned int *)(BASE + 0xBF0)) = 3; /* DTR, RTS */
+ *((volatile unsigned int *)(SERBASE + 0xC)) = 0x80;
+ *((volatile unsigned int *)(SERBASE + 0x0)) = baud & 0xff;
+ *((volatile unsigned int *)(SERBASE + 0x4)) = (baud & 0xff00) >> 8;
+ *((volatile unsigned int *)(SERBASE + 0xC)) = 3; /* 8 bits */
+ *((volatile unsigned int *)(SERBASE + 0x10)) = 3; /* DTR, RTS */
}
/*