diff options
author | Ralf Baechle <ralf@linux-mips.org> | 1999-06-13 16:29:25 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 1999-06-13 16:29:25 +0000 |
commit | db7d4daea91e105e3859cf461d7e53b9b77454b2 (patch) | |
tree | 9bb65b95440af09e8aca63abe56970dd3360cc57 /include/asm-arm/arch-ebsa285/system.h | |
parent | 9c1c01ead627bdda9211c9abd5b758d6c687d8ac (diff) |
Merge with Linux 2.2.8.
Diffstat (limited to 'include/asm-arm/arch-ebsa285/system.h')
-rw-r--r-- | include/asm-arm/arch-ebsa285/system.h | 39 |
1 files changed, 32 insertions, 7 deletions
diff --git a/include/asm-arm/arch-ebsa285/system.h b/include/asm-arm/arch-ebsa285/system.h index 40d540dba..a8f94c198 100644 --- a/include/asm-arm/arch-ebsa285/system.h +++ b/include/asm-arm/arch-ebsa285/system.h @@ -3,6 +3,8 @@ * * Copyright (c) 1996,1997,1998 Russell King. */ +#include <asm/dec21285.h> +#include <asm/io.h> #include <asm/hardware.h> #include <asm/leds.h> @@ -16,14 +18,37 @@ extern __inline__ void arch_reset(char mode) mov r0, #0x130 mcr p15, 0, r0, c1, c0 @ MMU off mcr p15, 0, ip, c7, c7 @ flush caches - mov pc, lr"); + mov pc, lr" : : : "cc"); } else { - /* To reboot, we set up the 21285 watchdog and enable it. - * We then wait for it to timeout. - */ - *CSR_TIMER4_LOAD = 0x8000; - *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16; - *CSR_SA110_CNTL |= 1 << 13; + if (machine_is_ebsa285() || machine_is_co285()) { + /* To reboot, we set up the 21285 watchdog and + * enable it. We then wait for it to timeout. + */ + *CSR_TIMER4_LOAD = 0x8000; + *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | + TIMER_CNTL_AUTORELOAD | + TIMER_CNTL_DIV16; + *CSR_SA110_CNTL |= 1 << 13; + } else if (machine_is_netwinder()) { + /* open up the SuperIO chip + */ + outb(0x87, 0x370); + outb(0x87, 0x370); + + /* aux function group 1 (logical device 7) + */ + outb(0x07, 0x370); + outb(0x07, 0x371); + + /* set GP16 for WD-TIMER output + */ + outb(0xe6, 0x370); + outb(0x00, 0x371); + + /* set a RED LED and toggle WD_TIMER for rebooting + */ + outb(0xc4, 0x338); + } } } |