diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2000-08-28 22:00:09 +0000 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2000-08-28 22:00:09 +0000 |
commit | 1a1d77dd589de5a567fa95e36aa6999c704ceca4 (patch) | |
tree | 141e31f89f18b9fe0831f31852e0435ceaccafc5 /include/asm-arm/arch-l7200 | |
parent | fb9c690a18b3d66925a65b17441c37fa14d4370b (diff) |
Merge with 2.4.0-test7.
Diffstat (limited to 'include/asm-arm/arch-l7200')
-rw-r--r-- | include/asm-arm/arch-l7200/hardware.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-l7200/ide.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-l7200/io.h | 200 | ||||
-rw-r--r-- | include/asm-arm/arch-l7200/memory.h | 6 | ||||
-rw-r--r-- | include/asm-arm/arch-l7200/system.h | 9 | ||||
-rw-r--r-- | include/asm-arm/arch-l7200/time.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-l7200/uncompress.h | 25 |
7 files changed, 51 insertions, 195 deletions
diff --git a/include/asm-arm/arch-l7200/hardware.h b/include/asm-arm/arch-l7200/hardware.h index d800cbc8d..a9209af7b 100644 --- a/include/asm-arm/arch-l7200/hardware.h +++ b/include/asm-arm/arch-l7200/hardware.h @@ -41,7 +41,7 @@ #define FLUSH_BASE_PHYS 0x40000000 /* ROM */ #define FLUSH_BASE 0xdf000000 -#define PARAMS_BASE (PAGE_OFFSET + 0x0100) +#define PARAMS_OFFSET (0x0100) #define Z_PARAMS_BASE (RAM_START + PARAMS_OFFSET) #define PCIO_BASE IO_BASE diff --git a/include/asm-arm/arch-l7200/ide.h b/include/asm-arm/arch-l7200/ide.h index aff8aaf9c..61cec831a 100644 --- a/include/asm-arm/arch-l7200/ide.h +++ b/include/asm-arm/arch-l7200/ide.h @@ -4,7 +4,7 @@ * Copyright (c) 2000 Steve Hill (sjhill@cotw.com) * * Changelog: - * 29-03-2000 SJH Created file placeholder + * 03-29-2000 SJH Created file placeholder */ #include <asm/irq.h> diff --git a/include/asm-arm/arch-l7200/io.h b/include/asm-arm/arch-l7200/io.h index 787b62108..720282bbe 100644 --- a/include/asm-arm/arch-l7200/io.h +++ b/include/asm-arm/arch-l7200/io.h @@ -1,10 +1,10 @@ /* * linux/include/asm-arm/arch-l7200/io.h * - * Copyright (C) 2000 Steven Hill (sjhill@cotw.com) + * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) * * Modifications: - * 21-03-2000 SJH Created from linux/include/asm-arm/arch-nexuspci/io.h + * 03-21-2000 SJH Created from linux/include/asm-arm/arch-nexuspci/io.h */ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H @@ -14,188 +14,6 @@ #define IO_SPACE_LIMIT 0xffffffff /* - * We use two different types of addressing - PC style addresses, and ARM - * addresses. PC style accesses the PC hardware with the normal PC IO - * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ - * and are translated to the start of IO. Note that all addresses are - * shifted left! - */ -#define __PORT_PCIO(x) (!((x) & 0x80000000)) - -/* - * Dynamic IO functions. - */ - -extern __inline__ void __outb (unsigned int value, unsigned int port) -{ - unsigned long temp; - __asm__ __volatile__( - "tst %2, #0x80000000\n\t" - "mov %0, %4\n\t" - "addeq %0, %0, %3\n\t" - "strb %1, [%0, %2, lsl #2] @ outb" - : "=&r" (temp) - : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) - : "cc"); -} - -extern __inline__ void __outw (unsigned int value, unsigned int port) -{ - unsigned long temp; - __asm__ __volatile__( - "tst %2, #0x80000000\n\t" - "mov %0, %4\n\t" - "addeq %0, %0, %3\n\t" - "str %1, [%0, %2, lsl #2] @ outw" - : "=&r" (temp) - : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) - : "cc"); -} - -extern __inline__ void __outl (unsigned int value, unsigned int port) -{ - unsigned long temp; - __asm__ __volatile__( - "tst %2, #0x80000000\n\t" - "mov %0, %4\n\t" - "addeq %0, %0, %3\n\t" - "str %1, [%0, %2, lsl #2] @ outl" - : "=&r" (temp) - : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) - : "cc"); -} - -#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ -{ \ - unsigned long temp, value; \ - __asm__ __volatile__( \ - "tst %2, #0x80000000\n\t" \ - "mov %0, %4\n\t" \ - "addeq %0, %0, %3\n\t" \ - "ldr" ##instr## " %1, [%0, %2, lsl #2] @ in"###fnsuffix \ - : "=&r" (temp), "=r" (value) \ - : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ - : "cc"); \ - return (unsigned sz)value; \ -} - -extern __inline__ unsigned int __ioaddr (unsigned int port) \ -{ \ - if (__PORT_PCIO(port)) \ - return (unsigned int)(PCIO_BASE + (port << 2)); \ - else \ - return (unsigned int)(IO_BASE + (port << 2)); \ -} - -#define DECLARE_IO(sz,fnsuffix,instr) \ - DECLARE_DYN_IN(sz,fnsuffix,instr) - -DECLARE_IO(char,b,"b") -DECLARE_IO(short,w,"") -DECLARE_IO(int,l,"") - -#undef DECLARE_IO -#undef DECLARE_DYN_IN - -/* - * Constant address IO functions - * - * These have to be macros for the 'J' constraint to work - - * +/-4096 immediate operand. - */ -#define __outbc(value,port) \ -({ \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inbc(port) \ -({ \ - unsigned char result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result; \ -}) - -#define __outwc(value,port) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outwc" \ - : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outwc" \ - : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inwc(port) \ -({ \ - unsigned short result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result & 0xffff; \ -}) - -#define __outlc(value,port) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inlc(port) \ -({ \ - unsigned long result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result; \ -}) - -#define __ioaddrc(port) \ - (__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2)) - -#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) -#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) -#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) -#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) -#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) -#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) -#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) - -/* * Translated address IO functions * * IO address has already been translated to a virtual address @@ -207,4 +25,18 @@ DECLARE_IO(int,l,"") #define outl_t(v,p) (*(volatile unsigned long *)(p) = (v)) #define inl_t(p) (*(volatile unsigned long *)(p)) +/* + * FIXME - These are to allow for linking. On all the other + * ARM platforms, the entire IO space is contiguous. + * The 7200 has three separate IO spaces. The below + * macros will eventually become more involved. Use + * with caution and don't be surprised by kernel oopses!!! + */ +#define inb(p) inb_t(p) +#define inw(p) inw_t(p) +#define inl(p) inl_t(p) +#define outb(v,p) outb_t(v,p) +#define outw(v,p) outw_t(v,p) +#define outl(v,p) outl_t(v,p) + #endif diff --git a/include/asm-arm/arch-l7200/memory.h b/include/asm-arm/arch-l7200/memory.h index f2aaabd5c..d07a1ddc1 100644 --- a/include/asm-arm/arch-l7200/memory.h +++ b/include/asm-arm/arch-l7200/memory.h @@ -1,7 +1,7 @@ /* * linux/include/asm-arm/arch-l7200/memory.h * - * Copyright (c) 2000 Steven Hill (sjhill@cotw.com) + * Copyright (c) 2000 Steve Hill (sjhill@cotw.com) * Copyright (c) 2000 Rob Scott (rscott@mtrob.fdns.net) * * Changelog: @@ -9,8 +9,8 @@ * 04-13-2000 RS Changed bus macros for new addr * 05-03-2000 SJH Removed bus macros and fixed virt_to_phys macro */ -#ifndef __ASM_ARCH_MMU_H -#define __ASM_ARCH_MMU_H +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H /* * Task size: 3GB diff --git a/include/asm-arm/arch-l7200/system.h b/include/asm-arm/arch-l7200/system.h index c299629dd..0f5ecbab0 100644 --- a/include/asm-arm/arch-l7200/system.h +++ b/include/asm-arm/arch-l7200/system.h @@ -1,21 +1,22 @@ /* * linux/include/asm-arm/arch-l7200/system.h * - * Copyright (c) 2000 Steven Hill (sjhill@cotw.com) + * Copyright (c) 2000 Steve Hill (sjhill@cotw.com) * * Changelog * 03-21-2000 SJH Created * 04-26-2000 SJH Fixed functions * 05-03-2000 SJH Removed usage of obsolete 'iomd.h' + * 05-31-2000 SJH Properly implemented 'arch_idle' */ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H static void arch_idle(void) { - while (!current->need_resched && !hlt_counter) - { }; -/* outb(0, IOMD_SUSMODE);*/ + while (!current->need_resched && !hlt_counter) { + cpu_do_idle(IDLE_WAIT_SLOW); + } } extern inline void arch_reset(char mode) diff --git a/include/asm-arm/arch-l7200/time.h b/include/asm-arm/arch-l7200/time.h index 077735e21..1d4ef492b 100644 --- a/include/asm-arm/arch-l7200/time.h +++ b/include/asm-arm/arch-l7200/time.h @@ -54,8 +54,6 @@ static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) */ extern __inline__ void setup_timer(void) { - xtime.tv_sec = RTC_RTCDR; - RTC_RTCC = 0; /* Clear interrupt */ timer_irq.handler = timer_interrupt; diff --git a/include/asm-arm/arch-l7200/uncompress.h b/include/asm-arm/arch-l7200/uncompress.h index d2e56455b..d7ac5f65e 100644 --- a/include/asm-arm/arch-l7200/uncompress.h +++ b/include/asm-arm/arch-l7200/uncompress.h @@ -2,18 +2,43 @@ * linux/include/asm-arm/arch-l7200/uncompress.h * * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) + * + * Changelog: + * 05-01-2000 SJH Created + * 05-13-2000 SJH Filled in function bodies + * 07-26-2000 SJH Removed hard coded buad rate */ +#include <asm/hardware.h> + +#define IO_UART IO_START + 0x00044000 + +#define __raw_writeb(v,p) (*(volatile unsigned char *)(p) = (v)) +#define __raw_readb(p) (*(volatile unsigned char *)(p)) + static __inline__ void putc(char c) { + while(__raw_readb(IO_UART + 0x18) & 0x20 || + __raw_readb(IO_UART + 0x18) & 0x08); + __raw_writeb(c, IO_UART + 0x00); } static void puts(const char *s) { + while (*s) { + if (*s == 10) { /* If a LF, add CR */ + putc(10); + putc(13); + } + putc(*(s++)); + } } static __inline__ void arch_decomp_setup(void) { + __raw_writeb(0x00, IO_UART + 0x08); /* Set HSB */ + __raw_writeb(0x00, IO_UART + 0x20); /* Disable IRQs */ + __raw_writeb(0x01, IO_UART + 0x14); /* Enable UART */ } #define arch_decomp_wdog() |