diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2000-08-28 22:00:09 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2000-08-28 22:00:09 +0000 |
| commit | 1a1d77dd589de5a567fa95e36aa6999c704ceca4 (patch) | |
| tree | 141e31f89f18b9fe0831f31852e0435ceaccafc5 /include/asm-arm/proc-armv/assembler.h | |
| parent | fb9c690a18b3d66925a65b17441c37fa14d4370b (diff) | |
Merge with 2.4.0-test7.
Diffstat (limited to 'include/asm-arm/proc-armv/assembler.h')
| -rw-r--r-- | include/asm-arm/proc-armv/assembler.h | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/include/asm-arm/proc-armv/assembler.h b/include/asm-arm/proc-armv/assembler.h index 788a22b87..aaec7f9c7 100644 --- a/include/asm-arm/proc-armv/assembler.h +++ b/include/asm-arm/proc-armv/assembler.h @@ -6,10 +6,6 @@ * This file contains ARM processor specifics for * the ARM6 and better processors. */ -#ifndef __ASSEMBLY__ -#error "Only include this from assembly code" -#endif - #define MODE_USR USR_MODE #define MODE_FIQ FIQ_MODE #define MODE_IRQ IRQ_MODE @@ -35,9 +31,8 @@ instr regs /* - * Save the current IRQ state and disable IRQs - * Note that this macro assumes FIQs are enabled, and - * that the processor is in SVC mode. + * Save the current IRQ state and disable IRQs. Note that this macro + * assumes FIQs are enabled, and that the processor is in SVC mode. */ .macro save_and_disable_irqs, oldcpsr, temp mrs \oldcpsr, cpsr @@ -46,8 +41,8 @@ .endm /* - * Restore interrupt state previously stored in - * a register + * Restore interrupt state previously stored in a register. We don't + * guarantee that this will preserve the flags. */ .macro restore_irqs, oldcpsr msr cpsr_c, \oldcpsr |