diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2000-02-23 00:40:54 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2000-02-23 00:40:54 +0000 |
commit | 529c593ece216e4aaffd36bd940cb94f1fa63129 (patch) | |
tree | 78f1c0b805f5656aa7b0417a043c5346f700a2cf /include/asm-ia64/mca.h | |
parent | 0bd079751d25808d1972baee5c4eaa1db2227257 (diff) |
Merge with 2.3.43. I did ignore all modifications to the qlogicisp.c
driver due to the Origin A64 hacks.
Diffstat (limited to 'include/asm-ia64/mca.h')
-rw-r--r-- | include/asm-ia64/mca.h | 143 |
1 files changed, 143 insertions, 0 deletions
diff --git a/include/asm-ia64/mca.h b/include/asm-ia64/mca.h new file mode 100644 index 000000000..0b9df0dcd --- /dev/null +++ b/include/asm-ia64/mca.h @@ -0,0 +1,143 @@ +/* + * File: mca.h + * Purpose: Machine check handling specific defines + * + * Copyright (C) 1999 Silicon Graphics, Inc. + * Copyright (C) Vijay Chander (vijay@engr.sgi.com) + * Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com) + */ +#ifndef _ASM_IA64_MCA_H +#define _ASM_IA64_MCA_H + +#include <linux/types.h> +#include <asm/param.h> +#include <asm/sal.h> +#include <asm/processor.h> + +/* These are the return codes from all the IA64_MCA specific interfaces */ +typedef int ia64_mca_return_code_t; + +enum { + IA64_MCA_SUCCESS = 0, + IA64_MCA_FAILURE = 1 +}; + +#define IA64_MCA_RENDEZ_TIMEOUT (100 * HZ) /* 1000 milliseconds */ + +/* Interrupt vectors reserved for MC handling. */ +#define IA64_MCA_RENDEZ_INT_VECTOR 0xF3 /* Rendez interrupt */ +#define IA64_MCA_WAKEUP_INT_VECTOR 0x12 /* Wakeup interrupt */ +#define IA64_MCA_CMC_INT_VECTOR 0xF2 /* Correctable machine check interrupt */ + +#define IA64_CMC_INT_DISABLE 0 +#define IA64_CMC_INT_ENABLE 1 + + +typedef u32 int_vector_t; +typedef u64 millisec_t; + +typedef union cmcv_reg_u { + u64 cmcv_regval; + struct { + u64 cmcr_vector : 8; + u64 cmcr_ignored1 : 47; + u64 cmcr_mask : 1; + u64 cmcr_reserved1 : 3; + u64 cmcr_ignored2 : 1; + u64 cmcr_reserved2 : 4; + } cmcv_reg_s; + +} cmcv_reg_t; + +#define cmcv_mask cmcv_reg_s.cmcr_mask +#define cmcv_vector cmcv_reg_s.cmcr_vector + + +#define IA64_MCA_UCMC_HANDLER_SIZE 0x10 +#define IA64_INIT_HANDLER_SIZE 0x10 + +enum { + IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0, + IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1 +}; + +#define IA64_MAXCPUS 64 /* Need to do something about this */ + +/* Information maintained by the MC infrastructure */ +typedef struct ia64_mc_info_s { + u64 imi_mca_handler; + size_t imi_mca_handler_size; + u64 imi_monarch_init_handler; + size_t imi_monarch_init_handler_size; + u64 imi_slave_init_handler; + size_t imi_slave_init_handler_size; + u8 imi_rendez_checkin[IA64_MAXCPUS]; + +} ia64_mc_info_t; + +/* Possible rendez states passed from SAL to OS during MCA + * handoff + */ +enum { + IA64_MCA_RENDEZ_NOT_RQD = 0x0, + IA64_MCA_RENDEZ_DONE_WITHOUT_INIT = 0x1, + IA64_MCA_RENDEZ_DONE_WITH_INIT = 0x2, + IA64_MCA_RENDEZ_FAILURE = -1 +}; + +typedef struct ia64_mca_sal_to_os_state_s { + u64 imsto_os_gp; /* GP of the os registered with the SAL */ + u64 imsto_pal_proc; /* PAL_PROC entry point - physical addr */ + u64 imsto_sal_proc; /* SAL_PROC entry point - physical addr */ + u64 imsto_sal_gp; /* GP of the SAL - physical */ + u64 imsto_rendez_state; /* Rendez state information */ + u64 imsto_sal_check_ra; /* Return address in SAL_CHECK while going + * back to SAL from OS after MCA handling. + */ +} ia64_mca_sal_to_os_state_t; + +enum { + IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */ + IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */ + IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */ + IA64_MCA_HALT = -3 /* System to be halted by SAL */ +}; + +typedef struct ia64_mca_os_to_sal_state_s { + u64 imots_os_status; /* OS status to SAL as to what happened + * with the MCA handling. + */ + u64 imots_sal_gp; /* GP of the SAL - physical */ + u64 imots_new_min_state; /* Pointer to structure containing + * new values of registers in the min state + * save area. + */ + u64 imots_sal_check_ra; /* Return address in SAL_CHECK while going + * back to SAL from OS after MCA handling. + */ +} ia64_mca_os_to_sal_state_t; + +typedef int (*prfunc_t)(const char * fmt, ...); + +extern void mca_init(void); +extern void ia64_os_mca_dispatch(void); +extern void ia64_os_mca_dispatch_end(void); +extern void ia64_mca_ucmc_handler(void); +extern void ia64_monarch_init_handler(void); +extern void ia64_slave_init_handler(void); +extern void ia64_mca_rendez_int_handler(int,void *,struct pt_regs *); +extern void ia64_mca_wakeup_int_handler(int,void *,struct pt_regs *); +extern void ia64_mca_cmc_int_handler(int,void *,struct pt_regs *); +extern void ia64_log_print(int,int,prfunc_t); + +#define PLATFORM_CALL(fn, args) printk("Platform call TBD\n") + +#undef MCA_TEST + +#if defined(MCA_TEST) +# define MCA_DEBUG printk +#else +# define MCA_DEBUG +#endif + +#endif /* _ASM_IA64_MCA_H */ |