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authorRalf Baechle <ralf@linux-mips.org>2000-04-28 01:09:25 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-04-28 01:09:25 +0000
commitb9ba7aeb165cffecdffb60aec8c3fa8d590d9ca9 (patch)
tree42d07b0c7246ae2536a702e7c5de9e2732341116 /include/asm-ia64/pgtable.h
parent7406b0a326f2d70ade2671c37d1beef62249db97 (diff)
Merge with 2.3.99-pre6.
Diffstat (limited to 'include/asm-ia64/pgtable.h')
-rw-r--r--include/asm-ia64/pgtable.h20
1 files changed, 12 insertions, 8 deletions
diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h
index 7c3fbdd95..a7f5ceb56 100644
--- a/include/asm-ia64/pgtable.h
+++ b/include/asm-ia64/pgtable.h
@@ -8,16 +8,24 @@
* This hopefully works with any (fixed) ia-64 page-size, as defined
* in <asm/page.h> (currently 8192).
*
- * Copyright (C) 1998, 1999 Hewlett-Packard Co
- * Copyright (C) 1998, 1999 David Mosberger-Tang <davidm@hpl.hp.com>
+ * Copyright (C) 1998-2000 Hewlett-Packard Co
+ * Copyright (C) 1998-2000 David Mosberger-Tang <davidm@hpl.hp.com>
*/
+#include <linux/config.h>
+
#include <asm/mman.h>
#include <asm/page.h>
#include <asm/types.h>
-/* Size of physical address space: */
-#define IA64_PHYS_BITS 50 /* EAS2.5 defines 50 bits of ppn */
+/* Size of virtuaql and physical address spaces: */
+#ifdef CONFIG_ITANIUM
+# define IA64_IMPL_VA_MSB 50
+# define IA64_PHYS_BITS 44 /* Itanium PRM defines 44 bits of ppn */
+#else
+# define IA64_IMPL_VA_MSB 60 /* maximum value (bits 61-63 are region bits) */
+# define IA64_PHYS_BITS 50 /* EAS2.6 allows up to 50 bits of ppn */
+#endif
#define IA64_PHYS_SIZE (__IA64_UL(1) << IA64_PHYS_BITS)
/* Is ADDR a valid kernel address? */
@@ -338,10 +346,6 @@ pgd_offset (struct mm_struct *mm, unsigned long address)
((pte_t *) pmd_page(*(dir)) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
-extern void __handle_bad_pgd (pgd_t *pgd);
-extern void __handle_bad_pmd (pmd_t *pmd);
-
-
extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
extern void paging_init (void);