More DEC and Baget stuff.

3 files changed, 470 insertions, 0 deletions

diff --git a/include/asm-mips/baget/baget.h b/include/asm-mips/baget/baget.h
new file mode 100644
index 000000000..774493965
--- /dev/null
+++ b/include/asm-mips/baget/baget.h
@@ -0,0 +1,69 @@
+/* $Id$
+ * baget.h: Definitions specific to Baget/MIPS machines.
+ *
+ * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
+ */
+#ifndef _MIPS_BAGET_H
+#define _MIPS_BAGET_H
+
+#include "vic.h"
+#include "vac.h"
+
+#define VIC_BASE         0xBFFC0000 
+#define VAC_BASE         0xBFFD0000
+
+
+/* Baget interrupt registers and their sizes */
+
+struct  baget_int_reg { 
+	unsigned long address;
+	int size;  /* in bytes */
+};
+#define BAGET_INT_NONE   {0,0}
+
+#define BAGET_INT0_ACK   {0xbffa0003,1}
+#define BAGET_INT1_ACK   {0xbffa0008,4}
+#define BAGET_INT5_ACK   {0xbff00000,1}
+
+#define BAGET_WRERR_ACK  ((volatile char*)0xbff00000)
+
+
+/* Baget address spaces */
+
+#define BAGET_A24M_BASE       0xFC000000      /* VME-master A24 base address  */
+#define BAGET_A24S_BASE       0x00000000      /* VME-slave A24 base address   */
+#define BAGET_A24S_MASK       0x00c00000      /* VME-slave A24 address mask   */
+#define BAGET_GSW_BASE        0xf000          /* global switches address base */
+#define BAGET_MSW_BASE(P) (0xe000+(P)*0x100)  /* module switches address base */
+
+#define BAGET_LED_BASE  ((volatile short *)(0xbffd0000 + 0x00001800))
+
+#define BAGET_PIL_NR            8
+#define BAGET_IRQ_NR            NR_IRQS /* 64 */
+#define BAGET_IRQ_MASK(x)       ((NR_IRQS-1) & (x))
+
+#define BAGET_FPU_IRQ           0x26
+#define BAGET_VIC_TIMER_IRQ     0x32 
+#define BAGET_VAC_TIMER_IRQ     0x37 
+#define BAGET_BSM_IRQ           0x3C
+
+#define BAGET_LANCE_MEM_BASE    0xfcf10000
+#define BAGET_LANCE_MEM_SIZE    0x10000
+#define BAGET_LANCE_IO_BASE     0xbffeff00
+
+#define BALO_OFFSET     0x400000 /* sync with ld.script.balo  */
+#define BALO_SIZE       0x200000 /* sync with image segs size */
+
+/* move it to the right place, somehere in include/asm */
+#define CAUSE_DBE       0x1C
+#define CAUSE_MASK      0x7C
+
+/* Simple debug fascilities */
+extern void outc(char);
+extern void outs(char *);
+extern void baget_write(char *s, int l);
+extern int  baget_printk(const char *, ...);
+extern void balo_printf( char *f, ... );
+extern void balo_hungup(void);
+
+#endif /* !(_MIPS_BAGET_H) */
diff --git a/include/asm-mips/baget/vac.h b/include/asm-mips/baget/vac.h
new file mode 100644
index 000000000..4d1614773
--- /dev/null
+++ b/include/asm-mips/baget/vac.h
@@ -0,0 +1,208 @@
+/* $Id$
+ *
+ * vac.h: Various VIC controller defines.  The VIC is a VME controller
+ *        used in Baget/MIPS series.
+ *
+ * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
+ */
+#ifndef _MIPS_VAC_H
+#define _MIPS_VAC_H
+
+#define VAC_SLSEL1_MASK      0x000
+#define VAC_SLSEL1_BASE      0x100
+#define VAC_SLSEL0_MASK      0x200
+#define VAC_SLSEL0_BASE      0x300
+#define VAC_ICFSEL_BASE      0x400
+#define VAC_ICFSEL_GLOBAL_VAL(x) (((x)>>8)&0xff)
+#define VAC_ICFSEL_MODULE_VAL(x) ((x)&0xff)
+#define VAC_DRAM_MASK        0x500
+#define VAC_BNDR2            0x600
+#define VAC_BNDR3            0x700
+#define VAC_A24_BASE         0x800
+#define    VAC_A24_MASK          (0x3f<<9)
+#define    VAC_A24_D32_ENABLE    (1<<8)
+#define    VAC_A24_A24_CACHINH   (1<<7)
+#define    VAC_A24_A16D32_ENABLE (1<<6)  
+#define    VAC_A24_A16D32        (1<<5)  
+#define    VAC_A24_DATAPATH      (1<<4)
+#define    VAC_A24_IO_CACHINH    (1<<3)
+#define VAC_REG1             0x900
+#define VAC_REG2             0xA00
+#define VAC_REG3             0xB00
+#define    VAC_REG_WORD      (1<<15)
+#define    VAC_REG_ASIZ1     (1<<14)
+#define    VAC_REG_ASIZ0     (1<<13)
+#define    VAC_REG_ASIZ_VAL(x) (((x)>>13)&3)
+#define    VAC_REG_CACHINH   (1<<12)
+#define    VAC_REG_INACTIVE  (0<<10)
+#define    VAC_REG_SHARED    (1<<10)
+#define    VAC_REG_VSB       (2<<10)
+#define    VAC_REG_MWB       (3<<10)
+#define    VAC_REG_MASK      (3<<10)
+#define    VAC_REG_MODE(x)   (((x)>>10)&3)
+#define VAC_IOSEL4_CTRL      0xC00
+#define VAC_IOSEL5_CTRL      0xD00
+#define VAC_SHRCS_CTRL       0xE00
+#define VAC_EPROMCS_CTRL     0xF00
+#define VAC_IOSEL0_CTRL      0x1000
+#define VAC_IOSEL1_CTRL      0x1100
+#define VAC_IOSEL2_CTRL      0x1200
+#define VAC_IOSEL3_CTRL      0x1300
+#define    VAC_CTRL_IOWR               (1<<0)
+#define    VAC_CTRL_IORD               (1<<1)
+#define    VAC_CTRL_DELAY_IOSELI(x)    (((x)&3)<<2)
+#define    VAC_CTRL_DELAY_IOSELI_VAL(x) (((x)>>2)&3)
+#define    VAC_CTRL_DELAY_IOWR(x)      (((x)&3)<<4)
+#define    VAC_CTRL_DELAY_IOWR_VAL(x)  (((x)>>4)&3)
+#define    VAC_CTRL_DELAY_IORD(x)      (((x)&3)<<6)
+#define    VAC_CTRL_DELAY_IORD_VAL(x)  (((x)>>6)&3)
+#define    VAC_CTRL_RECOVERY_IOSELI(x) ((((x)-1)&7)<<8)
+#define    VAC_CTRL_RECOVERY_IOSELI_VAL(x) ((((x)>>8)&7)+1)
+#define    VAC_CTRL_DSACK0             (1<<11)
+#define    VAC_CTRL_DSACK1             (1<<12)
+#define    VAC_CTRL_DELAY_DSACKI(x)    ((((x)-1)&7)<<13)
+#define    VAC_CTRL_DELAY_DSACKI_VAL(x) ((((x)>>13)&7)+1)
+#define VAC_DECODE_CTRL      0x1400
+#define    VAC_DECODE_FPUCS   (1<<0)
+#define    VAC_DECODE_CPUCLK(x)  (((x)&3)<<1)
+#define    VAC_DECODE_CPUCLK_VAL(x) (((x)>>1)&3)
+#define    VAC_DECODE_RDR_SLSEL0 (1<<3)
+#define    VAC_DECODE_RDR_SLSEL1 (1<<4)
+#define    VAC_DECODE_DSACK   (1<<5)
+#define    VAC_DECODE_QFY_BNDR    (1<<6)
+#define    VAC_DECODE_QFY_ICFSEL  (1<<7)
+#define    VAC_DECODE_QFY_SLSEL1  (1<<8)
+#define    VAC_DECODE_QFY_SLSEL0  (1<<9)
+#define    VAC_DECODE_CMP_SLSEL1_LO  (1<<10)
+#define    VAC_DECODE_CMP_SLSEL1_HI  (1<<11)
+#define    VAC_DECODE_CMP_SLSEL1_VAL(x) (((x)>>10)&3)
+#define    VAC_DECODE_DRAMCS  (3<<12)
+#define    VAC_DECODE_SHRCS   (2<<12)
+#define    VAC_DECODE_VSBSEL  (1<<12)
+#define    VAC_DECODE_EPROMCS (0<<12)
+#define    VAC_DECODE_MODE_VAL(x) (((x)>>12)&3)
+#define    VAC_DECODE_QFY_DRAMCS  (1<<14)
+#define    VAC_DECODE_DSACKI  (1<<15)
+#define VAC_INT_STATUS       0x1500
+#define VAC_INT_CTRL         0x1600
+#define    VAC_INT_CTRL_TIMER_PIO11    (3<<0)
+#define    VAC_INT_CTRL_TIMER_PIO10    (2<<0)
+#define    VAC_INT_CTRL_TIMER_PIO7     (1<<0)
+#define    VAC_INT_CTRL_TIMER_DISABLE  (0<<0)
+#define    VAC_INT_CTRL_UART_B_PIO11   (3<<2)
+#define    VAC_INT_CTRL_UART_B_PIO10   (2<<2)
+#define    VAC_INT_CTRL_UART_B_PIO7    (1<<2)
+#define    VAC_INT_CTRL_UART_B_DISABLE (0<<2)
+#define    VAC_INT_CTRL_UART_A_PIO11   (3<<4)
+#define    VAC_INT_CTRL_UART_A_PIO10   (2<<4)
+#define    VAC_INT_CTRL_UART_A_PIO7    (1<<4)
+#define    VAC_INT_CTRL_UART_A_DISABLE (0<<4)
+#define    VAC_INT_CTRL_MBOX_PIO11     (3<<6)
+#define    VAC_INT_CTRL_MBOX_PIO10     (2<<6)
+#define    VAC_INT_CTRL_MBOX_PIO7      (1<<6)
+#define    VAC_INT_CTRL_MBOX_DISABLE   (0<<6)
+#define    VAC_INT_CTRL_PIO4_PIO11     (3<<8)
+#define    VAC_INT_CTRL_PIO4_PIO10     (2<<8)
+#define    VAC_INT_CTRL_PIO4_PIO7      (1<<8)
+#define    VAC_INT_CTRL_PIO4_DISABLE   (0<<8)
+#define    VAC_INT_CTRL_PIO7_PIO11     (3<<10)
+#define    VAC_INT_CTRL_PIO7_PIO10     (2<<10)
+#define    VAC_INT_CTRL_PIO7_PIO7      (1<<10)
+#define    VAC_INT_CTRL_PIO7_DISABLE   (0<<10)
+#define    VAC_INT_CTRL_PIO8_PIO11     (3<<12)
+#define    VAC_INT_CTRL_PIO8_PIO10     (2<<12)
+#define    VAC_INT_CTRL_PIO8_PIO7      (1<<12)
+#define    VAC_INT_CTRL_PIO8_DISABLE   (0<<12)
+#define    VAC_INT_CTRL_PIO9_PIO11     (3<<14)
+#define    VAC_INT_CTRL_PIO9_PIO10     (2<<14)
+#define    VAC_INT_CTRL_PIO9_PIO7      (1<<14)
+#define    VAC_INT_CTRL_PIO9_DISABLE   (0<<14)
+#define VAC_DEV_LOC          0x1700
+#define    VAC_DEV_LOC_IOSEL(x)   (1<<(x))
+#define VAC_PIO_DATA_OUT     0x1800
+#define VAC_PIO_PIN          0x1900
+#define VAC_PIO_DIRECTION    0x1A00
+#define    VAC_PIO_DIR_OUT(x)     (1<<(x))
+#define    VAC_PIO_DIR_IN(x)      (0<<(x))
+#define    VAC_PIO_DIR_FCIACK     (1<<14)
+#define VAC_PIO_FUNC         0x1B00
+#define    VAC_PIO_FUNC_UART_A_TX (1<<0)
+#define    VAC_PIO_FUNC_UART_A_RX (1<<1)
+#define    VAC_PIO_FUNC_UART_B_TX (1<<2)
+#define    VAC_PIO_FUNC_UART_B_RX (1<<3)
+#define    VAC_PIO_FUNC_IORD      (1<<4)
+#define    VAC_PIO_FUNC_IOWR      (1<<5)
+#define    VAC_PIO_FUNC_IOSEL3    (1<<6)
+#define    VAC_PIO_FUNC_IRQ7      (1<<7)
+#define    VAC_PIO_FUNC_IOSEL4    (1<<8)
+#define    VAC_PIO_FUNC_IOSEL5    (1<<9)
+#define    VAC_PIO_FUNC_IRQ10     (1<<10)
+#define    VAC_PIO_FUNC_IRQ11     (1<<11)
+#define    VAC_PIO_FUNC_OUT       (1<<12)
+#define    VAC_PIO_FUNC_IOSEL2    (1<<13)
+#define    VAC_PIO_FUNC_DELAY     (1<<14)
+#define    VAC_PIO_FUNC_FCIACK    (1<<15)
+#define VAC_CPU_CLK_DIV      0x1C00
+#define VAC_UART_A_MODE      0x1D00
+#define    VAC_UART_MODE_PARITY_ENABLE  (1<<15) /* Inversed in manual ? */
+#define    VAC_UART_MODE_PARITY_ODD     (1<<14) /* Inversed in manual ? */
+#define    VAC_UART_MODE_8BIT_CHAR      (1<<13)
+#define    VAC_UART_MODE_BAUD(x)        (((x)&7)<<10)
+#define    VAC_UART_MODE_CHAR_RX_ENABLE (1<<9)
+#define    VAC_UART_MODE_CHAR_TX_ENABLE (1<<8)
+#define    VAC_UART_MODE_TX_ENABLE      (1<<7)
+#define    VAC_UART_MODE_RX_ENABLE      (1<<6)
+#define    VAC_UART_MODE_SEND_BREAK     (1<<5)
+#define    VAC_UART_MODE_LOOPBACK       (1<<4)
+#define    VAC_UART_MODE_INITIAL        (VAC_UART_MODE_8BIT_CHAR | \
+                                         VAC_UART_MODE_TX_ENABLE | \
+                                         VAC_UART_MODE_RX_ENABLE | \
+                                         VAC_UART_MODE_CHAR_TX_ENABLE | \
+                                         VAC_UART_MODE_CHAR_RX_ENABLE | \
+                                         VAC_UART_MODE_BAUD(5)) /* 9600/4 */
+#define VAC_UART_A_TX        0x1E00
+#define VAC_UART_B_MODE      0x1F00
+#define VAC_UART_A_RX        0x2000
+#define    VAC_UART_RX_ERR_BREAK        (1<<10)
+#define    VAC_UART_RX_ERR_FRAME        (1<<9)
+#define    VAC_UART_RX_ERR_PARITY       (1<<8)
+#define    VAC_UART_RX_DATA_MASK        (0xff)
+#define VAC_UART_B_RX        0x2100
+#define VAC_UART_B_TX        0x2200
+#define VAC_UART_A_INT_MASK  0x2300
+#define    VAC_UART_INT_RX_READY        (1<<15)
+#define    VAC_UART_INT_RX_FULL         (1<<14)
+#define    VAC_UART_INT_RX_BREAK_CHANGE (1<<13)
+#define    VAC_UART_INT_RX_ERRS         (1<<12)
+#define    VAC_UART_INT_TX_READY        (1<<11)
+#define    VAC_UART_INT_TX_EMPTY        (1<<10)
+#define VAC_UART_B_INT_MASK  0x2400
+#define VAC_UART_A_INT_STATUS  0x2500
+#define    VAC_UART_STATUS_RX_READY        (1<<15)
+#define    VAC_UART_STATUS_RX_FULL         (1<<14)
+#define    VAC_UART_STATUS_RX_BREAK_CHANGE (1<<13)
+#define    VAC_UART_STATUS_RX_ERR_PARITY   (1<<12)
+#define    VAC_UART_STATUS_RX_ERR_FRAME    (1<<11)
+#define    VAC_UART_STATUS_RX_ERR_OVERRUN  (1<<10)
+#define    VAC_UART_STATUS_TX_READY        (1<<9)
+#define    VAC_UART_STATUS_TX_EMPTY        (1<<8)
+#define    VAC_UART_STATUS_INTS            (0xff<<8)
+#define VAC_UART_B_INT_STATUS  0x2600
+#define VAC_TIMER_DATA       0x2700
+#define VAC_TIMER_CTRL       0x2800
+#define    VAC_TIMER_ONCE      (1<<15)
+#define    VAC_TIMER_ENABLE    (1<<14)
+#define    VAC_TIMER_PRESCALE(x) (((x)&0x3F)<<8)
+#define VAC_ID               0x2900
+
+
+#ifndef __LANGUAGE_ASSEMBLY__
+
+#define vac_inb(p)    (*(volatile unsigned char *)(VAC_BASE + (p)))
+#define vac_outb(v,p) (*((volatile unsigned char *)(VAC_BASE + (p))) = v)
+#define vac_inw(p)    (*(volatile unsigned short*)(VAC_BASE + (p)))
+#define vac_outw(v,p) (*((volatile unsigned short*)(VAC_BASE + (p))) = v)
+
+#endif /* __LANGUAGE_ASSEMBLY__ */
+
+#endif /* !(_MIPS_VAC_H) */
diff --git a/include/asm-mips/baget/vic.h b/include/asm-mips/baget/vic.h
new file mode 100644
index 000000000..f995066ab
--- /dev/null
+++ b/include/asm-mips/baget/vic.h
@@ -0,0 +1,193 @@
+/* $Id$
+ *
+ * vic.h: Various VIC controller defines.  The VIC is an interrupt controller
+ *        used in Baget/MIPS series.
+ *
+ * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
+ */
+#ifndef _MIPS_VIC_H
+#define _MIPS_VIC_H
+
+#define VIC_VME_II       0x3
+#define VIC_VME_INT1     0x7
+#define VIC_VME_INT2     0xB
+#define VIC_VME_INT3     0xF
+#define VIC_VME_INT4     0x13
+#define VIC_VME_INT5     0x17
+#define VIC_VME_INT6     0x1B
+#define VIC_VME_INT7     0x1F
+#define VIC_DMA_INT      0x23
+#define VIC_LINT1        0x27
+#define VIC_LINT2        0x2B
+#define VIC_LINT3        0x2F
+#define VIC_LINT4        0x33
+#define VIC_LINT5        0x37
+#define VIC_LINT6        0x3B
+#define VIC_LINT7        0x3F
+#define VIC_ICGS_INT     0x43
+#define VIC_ICMS_INT     0x47
+#define    VIC_INT_IPL(lev)  ((~(lev))&0x7)
+#define    VIC_INT_ACTIVE    (1<<3)
+#define    VIC_INT_AUTO      (0<<4)
+#define    VIC_INT_NOAUTO    (1<<4)
+#define    VIC_INT_LEVEL     (0<<5)
+#define    VIC_INT_EDGE      (1<<5)
+#define    VIC_INT_LOW       (0<<6)
+#define    VIC_INT_HIGH      (1<<6)
+#define    VIC_INT_ENABLE    (0<<7)
+#define    VIC_INT_DISABLE   (1<<7)
+#define    VIC_INT_SWITCH(x) (1<<(((x)&0x3)+4))
+#define VIC_ERR_INT      0x4B
+#define    VIC_ERR_INT_SYSFAIL_ACTIVE  (1<<3)
+#define    VIC_ERR_INT_SYSFAIL  (1<<4)
+#define    VIC_ERR_INT_TIMO     (1<<5)
+#define    VIC_ERR_INT_WRPOST   (1<<6)
+#define    VIC_ERR_INT_ACFAIL   (1<<7)
+#define VIC_ICGS_BASE    0x4F
+#define VIC_ICMS_BASE    0x53
+#define    VIC_ICxS_BASE_GSWITCH_MASK 0x3
+#define    VIC_ICxS_BASE_ID(x)  (((x)&0x3f)<<2)
+#define VIC_LOCAL_BASE   0x57
+#define    VIC_LOCAL_BASE_LINT_MASK 0x7
+#define    VIC_LOCAL_BASE_ID(x)  (((x)&0x1f)<<3)
+#define VIC_ERR_BASE     0x5B
+#define    VIC_ERR_BASE_ACFAIL   0
+#define    VIC_ERR_BASE_WRPOST   1
+#define    VIC_ERR_BASE_TIMO     2
+#define    VIC_ERR_BASE_SYSFAIL  3
+#define    VIC_ERR_BASE_VMEACK   4
+#define    VIC_ERR_BASE_DMA      5
+#define    VIC_ERR_BASE_ID(x)  (((x)&0x1f)<<3)
+#define VIC_ICS          0x5F
+#define VIC_IC0          0x63
+#define VIC_IC1          0x67
+#define VIC_IC2          0x6B
+#define VIC_IC3          0x6F
+#define VIC_IC4          0x73
+#define VIC_ID           0x77
+#define VIC_IC6          0x7B
+#define    VIC_IC6_IRESET_STATUS (1<<7)
+#define    VIC_IC6_HALT_STATUS   (1<<6)
+#define    VIC_IC6_SYSRESET   (3<<0)
+#define    VIC_IC6_RESET      (2<<0)
+#define    VIC_IC6_HALT       (1<<0)
+#define    VIC_IC6_RUN        (0<<0)
+#define VIC_IC7          0x7F
+#define    VIC_IC7_SYSFAIL     (1<<7)
+#define    VIC_IC7_RESET       (1<<6)
+#define    VIC_IC7_VME_MASTER  (1<<5)
+#define    VIC_IC7_SEMSET(x)   ((1<<(x))&0x1f)
+#define VIC_VME_REQ      0x83
+#define VIC_VME_BASE1    0x87
+#define VIC_VME_BASE2    0x8B
+#define VIC_VME_BASE3    0x8F
+#define VIC_VME_BASE4    0x93
+#define VIC_VME_BASE5    0x97
+#define VIC_VME_BASE6    0x9B
+#define VIC_VME_BASE7    0x9F
+#define VIC_XFER_TIMO    0xA3
+#define    VIC_XFER_TIMO_VME_PERIOD_INF (7<<5)
+#define    VIC_XFER_TIMO_VME_PERIOD_512 (6<<5)
+#define    VIC_XFER_TIMO_VME_PERIOD_256 (5<<5)
+#define    VIC_XFER_TIMO_VME_PERIOD_128 (4<<5)
+#define    VIC_XFER_TIMO_VME_PERIOD_64 (3<<5)
+#define    VIC_XFER_TIMO_VME_PERIOD_32 (2<<5)
+#define    VIC_XFER_TIMO_VME_PERIOD_16 (1<<5)
+#define    VIC_XFER_TIMO_VME_PERIOD_4  (0<<5)
+#define    VIC_XFER_TIMO_VME_PERIOD_VAL(x) (((x)>>5)&7)
+#define    VIC_XFER_TIMO_LOCAL_PERIOD_INF (7<<2)
+#define    VIC_XFER_TIMO_LOCAL_PERIOD_512 (6<<2)
+#define    VIC_XFER_TIMO_LOCAL_PERIOD_256 (5<<2)
+#define    VIC_XFER_TIMO_LOCAL_PERIOD_128 (4<<2)
+#define    VIC_XFER_TIMO_LOCAL_PERIOD_64 (3<<2)
+#define    VIC_XFER_TIMO_LOCAL_PERIOD_32 (2<<2)
+#define    VIC_XFER_TIMO_LOCAL_PERIOD_16 (1<<2)
+#define    VIC_XFER_TIMO_LOCAL_PERIOD_4  (0<<2)
+#define    VIC_XFER_TIMO_LOCAL_PERIOD_VAL(x) (((x)>>2)&7)
+#define    VIC_XFER_TIMO_ARB  (1<<1)
+#define    VIC_XFER_TIMO_VME  (1<<0)
+#define VIC_LOCAL_TIM    0xA7
+#define    VIC_LOCAL_TIM_PAS_ASSERT(x)   (((x)-2)&0xf)
+#define    VIC_LOCAL_TIM_PAS_ASSERT_VAL(x) (((x)&0xf)+2)
+#define    VIC_LOCAT_TIM_DS_DEASSERT(x)  ((((x)-1)&1)<<4)
+#define    VIC_LOCAT_TIM_DS_DEASSERT_VAL(x)  ((((x)>>4)&1)+1)
+#define    VIC_LOCAL_TIM_PAS_DEASSERT(x) ((((x)-1)&0x7)<<5)
+#define    VIC_LOCAL_TIM_PAS_DEASSERT_VAL(x) ((((x)>>5)&0x7)+1)
+#define VIC_BXFER_DEF    0xAB
+#define    VIC_BXFER_DEF_VME_CROSS    (1<<3)
+#define    VIC_BXFER_DEF_LOCAL_CROSS  (1<<2)
+#define    VIC_BXFER_DEF_AMSR   (1<<1)
+#define    VIC_BXFER_DEF_DUAL   (1<<0)
+#define VIC_IFACE_CFG    0xAF
+#define    VIC_IFACE_CFG_RMC3    (1<<7)
+#define    VIC_IFACE_CFG_RMC2    (1<<6)
+#define    VIC_IFACE_CFG_RMC1    (1<<5)
+#define    VIC_IFACE_CFG_HALT    (1<<4)
+#define    VIC_IFACE_CFG_NOHALT  (0<<4)
+#define    VIC_IFACE_CFG_NORMC   (1<<3)
+#define    VIC_IFACE_CFG_DEADLOCK_VAL(x) (((x)>>3)&3)
+#define    VIC_IFACE_CFG_MSTAB   (1<<2)
+#define    VIC_IFACE_CFG_TURBO   (1<<1)
+#define    VIC_IFACE_CFG_NOTURBO (0<<1)
+#define    VIC_IFACE_CFG_VME     (1<<0)
+#define VIC_REQ_CFG      0xB3
+#define    VIC_REQ_CFG_FAIRNESS_DISABLED  0
+#define    VIC_REQ_CFG_FAIRNESS_ENABLED   1
+#define    VIC_REQ_CFG_TIMO_DISABLED      0xf
+#define    VIC_REQ_CFG_DRAM_REFRESH       (1<<4)
+#define    VIC_REQ_CFG_LEVEL(x)           (((x)&3)<<5)
+#define    VIC_REQ_CFG_PRIO_ARBITRATION   (1<<7)
+#define    VIC_REQ_CFG_RR_ARBITRATION     (0<<7)
+#define VIC_AMS          0xB7
+#define    VIC_AMS_AM_2_0   (1<<7)
+#define    VIC_AMS_AM_5_3   (1<<6)
+#define    VIC_AMS_CODE(x)  ((x)&0x1f)
+#define VIC_BERR_STATUS  0xBB
+#define VIC_DMA_STATUS   0xBF
+#define VIC_SS0CR0       0xC3
+#define VIC_SS1CR0       0xCB
+#define    VIC_SSxCR0_LOCAL_XFER_ACCEL  (2)
+#define    VIC_SSxCR0_LOCAL_XFER_SINGLE (1)
+#define    VIC_SSxCR0_LOCAL_XFER_NONE   (0)
+#define    VIC_SSxCR0_A32       (0<<2)
+#define    VIC_SSxCR0_A24       (1<<2)
+#define    VIC_SSxCR0_A16       (2<<2)
+#define    VIC_SSxCR0_USER      (3<<2)
+#define    VIC_SSxCR0_D32       (1<<4)
+#define    VIC_SSxCR0_SUPER     (1<<5)
+#define    VIC_SS0CR0_TIMER_FREQ_MASK   (3<<6)
+#define    VIC_SS0CR0_TIMER_FREQ_NONE   (0<<6)
+#define    VIC_SS0CR0_TIMER_FREQ_50HZ   (1<<6)
+#define    VIC_SS0CR0_TIMER_FREQ_1000HZ (2<<6)
+#define    VIC_SS0CR0_TIMER_FREQ_100HZ  (3<<6)
+#define    VIC_SS1CR0_MASTER_WRPOST (1<<6)
+#define    VIC_SS1CR0_SLAVE_WRPOST  (1<<7)
+#define VIC_SS0CR1       0xC7
+#define VIC_SS1CR1       0xCF
+#define    VIC_SSxCR1_TF2(x)  (((x)&0xf)<<4)
+#define    VIC_SSxCR1_TF1(x)  ((x)&0xf)
+#define VIC_RELEASE      0xD3
+#define    VIC_RELEASE_BLKXFER_BLEN(x) ((x)&0x1f)
+#define    VIC_RELEASE_ROR             (0<<6) 
+#define    VIC_RELEASE_RWD             (1<<6) 
+#define    VIC_RELEASE_ROC             (2<<6) 
+#define    VIC_RELEASE_BCAP            (3<<6) 
+#define VIC_BXFER_CTRL   0xD7
+#define    VIC_BXFER_CTRL_MODULE     (1<<7)
+#define    VIC_BXFER_CTRL_LOCAL      (1<<6)
+#define    VIC_BXFER_CTRL_MOVEM      (1<<5)
+#define    VIC_BXFER_CTRL_READ       (1<<4)
+#define    VIC_BXFER_CTRL_WRITE      (0<<4)
+#define    VIC_BXFER_CTRL_INTERLEAVE(x)  ((x)&0xf)
+#define VIC_BXFER_LEN_LO    0xDB
+#define VIC_BXFER_LEN_HI    0xDF
+#define VIC_SYS_RESET    0xE3
+
+#ifndef __LANGUAGE_ASSEMBLY__
+
+#define vic_inb(p)    (*(volatile unsigned char *)(VIC_BASE + (p)))
+#define vic_outb(v,p) (*((volatile unsigned char *)(VIC_BASE + (p))) = v)
+
+#endif /* __LANGUAGE_ASSEMBLY__ */
+
+#endif /* !(_MIPS_VIC_H) */