diff options
author | Ralf Baechle <ralf@linux-mips.org> | 1999-10-09 00:00:47 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 1999-10-09 00:00:47 +0000 |
commit | d6434e1042f3b0a6dfe1b1f615af369486f9b1fa (patch) | |
tree | e2be02f33984c48ec019c654051d27964e42c441 /include/asm-mips/cache.h | |
parent | 609d1e803baf519487233b765eb487f9ec227a18 (diff) |
Merge with 2.3.19.
Diffstat (limited to 'include/asm-mips/cache.h')
-rw-r--r-- | include/asm-mips/cache.h | 24 |
1 files changed, 19 insertions, 5 deletions
diff --git a/include/asm-mips/cache.h b/include/asm-mips/cache.h index 1ed0b0833..6cf5ce00b 100644 --- a/include/asm-mips/cache.h +++ b/include/asm-mips/cache.h @@ -1,8 +1,14 @@ -/* - * include/asm-mips/cache.h +/* $Id$ + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1997, 1998, 1999 Ralf Baechle + * Copyright (C) 1999 Silicon Graphics, Inc. */ -#ifndef __ASM_MIPS_CACHE_H -#define __ASM_MIPS_CACHE_H +#ifndef _ASM_CACHE_H +#define _ASM_CACHE_H /* bytes per L1 cache line */ #define L1_CACHE_BYTES 32 /* a guess */ @@ -11,4 +17,12 @@ #define SMP_CACHE_BYTES L1_CACHE_BYTES -#endif /* __ASM_MIPS_CACHE_H */ +#ifdef MODULE +#define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) +#else +#define __cacheline_aligned \ + __attribute__((__aligned__(L1_CACHE_BYTES), \ + __section__(".data.cacheline_aligned"))) +#endif + +#endif /* _ASM_CACHE_H */ |