More DEC and Baget stuff.

11 files changed, 535 insertions, 0 deletions

diff --git a/include/asm-mips/dec/interrupts.h b/include/asm-mips/dec/interrupts.h
new file mode 100644
index 000000000..5f99727cc
--- /dev/null
+++ b/include/asm-mips/dec/interrupts.h
@@ -0,0 +1,79 @@
+/*  
+ * Miscellaneous definitions used to initialise the interrupt vector table
+ * with the machine-specific interrupt routines.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1997 by Paul M. Antoine.
+ * reworked 1998 by Harald Koerfgen.
+ */
+
+#ifndef __ASM_DEC_INTERRUPTS_H 
+#define __ASM_DEC_INTERRUPTS_H 
+
+/*
+ * DECstation Interrupts
+ */
+
+/*
+ * This list reflects the priority of the Interrupts.
+ * Exception: on kmins we have to handle Memory Error 
+ * Interrupts before the TC Interrupts.
+ */
+#define CLOCK 	0
+#define SCSI_INT	1
+#define ETHER	2
+#define SERIAL	3
+#define TC0	4
+#define TC1	5
+#define TC2	6
+#define MEMORY	7
+#define FPU	8
+#define HALT	9
+
+#define NR_INTS	10
+
+#ifndef _LANGUAGE_ASSEMBLY
+/*
+ * Data structure to hide the differences between the DECstation Interrupts
+ *
+ * If asic_mask == NULL, the interrupt is directly handled by the CPU.
+ * Otherwise this Interrupt is handled the IRQ Controller.
+ */
+
+typedef struct
+{
+	unsigned int	cpu_mask;	/* checking and enabling interrupts in CP0	*/
+	unsigned int	iemask;		/* enabling interrupts in IRQ Controller	*/
+} decint_t;
+
+/*
+ * Interrupt table structure to hide differences between different
+ * systems such.
+ */
+extern void *cpu_ivec_tbl[8];
+extern long cpu_mask_tbl[8];
+extern long cpu_irq_nr[8];
+extern long asic_irq_nr[32];
+extern long asic_mask_tbl[32];
+
+/*
+ * Common interrupt routine prototypes for all DECStations
+ */
+extern void	dec_intr_unimplemented(void);
+extern void	dec_intr_fpu(void);
+extern void	dec_intr_rtc(void);
+
+extern void	kn02_io_int(void);
+extern void	kn02ba_io_int(void);
+extern void	kn03_io_int(void);
+
+extern void	intr_halt(void);
+
+extern void	asic_intr_unimplemented(void);
+
+#endif
+#endif 
+
diff --git a/include/asm-mips/dec/ioasic_addrs.h b/include/asm-mips/dec/ioasic_addrs.h
new file mode 100644
index 000000000..a2044782e
--- /dev/null
+++ b/include/asm-mips/dec/ioasic_addrs.h
@@ -0,0 +1,67 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Definitions for the address map in the JUNKIO Asic
+ *
+ * Created with Information from:
+ *
+ * "DEC 3000 300/400/500/600/700/800/900 AXP Models System Programmer's Manual"
+ *
+ * and the Mach Sources
+ */
+
+#ifndef IOASIC_ADDRS_H
+#define IOASIC_ADDRS_H
+
+#define CHUNK_SIZE 0x00040000
+
+#define SYSTEM_ROM 	00*CHUNK_SIZE 		/* ??? */
+#define IOCTL 		01*CHUNK_SIZE 
+#define ESAR 		02*CHUNK_SIZE 
+#define LANCE 		03*CHUNK_SIZE 
+#define SCC0 		04*CHUNK_SIZE 
+#define VDAC_HI		05*CHUNK_SIZE		/* maxine only */
+#define SCC1 		06*CHUNK_SIZE 
+#define VDAC_LO		07*CHUNK_SIZE		/* maxine only */
+#define TOY 		08*CHUNK_SIZE 
+#define ISDN 		09*CHUNK_SIZE		/* maxine only */
+#define ERRADDR		09*CHUNK_SIZE 		/* 3maxplus only */
+#define CHKSYN 		10*CHUNK_SIZE 		/* 3maxplus only */
+#define ACCESS_BUS	10*CHUNK_SIZE 		/* maxine only */
+#define MCR 		11*CHUNK_SIZE 		/* 3maxplus only */
+#define FLOPPY 		11*CHUNK_SIZE 		/* maxine only */
+#define SCSI 		12*CHUNK_SIZE
+#define FLOPPY_DMA 	13*CHUNK_SIZE 		/* maxine only */
+#define SCSI_DMA 	14*CHUNK_SIZE 
+#define RESERVED_4 	15*CHUNK_SIZE 
+
+/*
+ * Offsets for IOCTL registers (relative to (system_base + IOCTL))
+ */
+#define SCSI_DMA_P	0x00			/* SCSI DMA Pointer */
+#define SCSI_DMA_BP	0x10			/* SCSI DMA Buffer Pointer */
+#define LANCE_DMA_P	0x20			/* LANCE DMA Pointer */
+#define SCC0_T_DMA_P	0x30			/* Communication Port 1 Transmit DMA Pointer */
+#define SCC0_R_DMA_P	0x40			/* Communication Port 1 Receive DMA Pointer */
+#define SCC1_T_DMA_P	0x50			/* Communication Port 2 Transmit DMA Pointer */
+#define SCC1_R_DMA_P	0x60			/* Communication Port 2 Receive DMA Pointer */
+#define FLOPPY_DMA_P	0x70			/* Floppy DMA Pointer */
+#define ISDN_T_DMA_P	0x80			/* ISDN Transmit DMA Pointer */
+#define ISDN_T_DMA_BP	0x90			/* ISDN Transmit DMA Buffer Pointer */
+#define ISDN_R_DMA_P	0xa0			/* ISDN Receive DMA Pointer */
+#define ISDN_R_DMA_BP	0xb0			/* ISDN Receive DMA Buffer Pointer */
+
+#define SSR		0x100			/* System Support Register */
+#define SIR		0x110			/* System Interrupt Register */
+#define SIMR		0x120			/* System Interrupt Mask Register */
+
+/*
+ * These come from mach, meaning unkown	yet
+ */
+#define	SCSI_SCR	0x1b0
+#define	SCSI_SDR0	0x1c0
+#define	SCSI_SDR1	0x1d0
+
+#endif
diff --git a/include/asm-mips/dec/ioasic_ints.h b/include/asm-mips/dec/ioasic_ints.h
new file mode 100644
index 000000000..e1f61f1cb
--- /dev/null
+++ b/include/asm-mips/dec/ioasic_ints.h
@@ -0,0 +1,108 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Definitions for the interrupt related bits in the JUNKIO Asic
+ * interrupt status register (and the interrupt mask register, of course)
+ *
+ * Created with Information from:
+ *
+ * "DEC 3000 300/400/500/600/700/800/900 AXP Models System Programmer's Manual"
+ *
+ * and the Mach Sources
+ */
+
+/* 
+ * the upper 16 bits are common to all JUNKIO machines
+ * (except the FLOPPY and ISDN bits, which are Maxine sepcific)
+ */
+#define SCC0_TRANS_PAGEEND	0x80000000	/* Serial DMA Errors	*/
+#define SCC0_TRANS_MEMRDERR	0x40000000	/* see below		*/
+#define SCC0_RECV_HALFPAGE	0x20000000
+#define	SCC0_RECV_PAGOVRRUN	0x10000000
+#define SCC1_TRANS_PAGEEND	0x08000000	/* end of page reached	*/
+#define SCC1_TRANS_MEMRDERR	0x04000000	/* SCC1 DMA memory err	*/
+#define SCC1_RECV_HALFPAGE	0x02000000	/* SCC1 half page	*/
+#define	SCC1_RECV_PAGOVRRUN	0x01000000	/* SCC1 receive overrun	*/
+#define FLOPPY_DMA_ERROR	0x00800000	/* FDI DMA error	*/
+#define	ISDN_TRANS_PTR_LOADED	0x00400000	/* xmitbuf ptr loaded	*/
+#define ISDN_RECV_PTR_LOADED	0x00200000	/* rcvbuf ptr loaded	*/
+#define ISDN_DMA_MEMRDERR	0x00100000	/* read or ovrrun error	*/
+#define SCSI_PTR_LOADED		0x00080000
+#define SCSI_PAGOVRRUN		0x00040000	/* page overrun? */
+#define SCSI_DMA_MEMRDERR	0x00020000
+#define LANCE_DMA_MEMRDERR	0x00010000
+
+/*
+ * the lower 16 bits are system specific
+ */
+
+/*
+ * The following three seem to be in common
+ */
+#define SCSI_CHIP		0x00000200
+#define LANCE_CHIP		0x00000100
+#define SCC1_CHIP		0x00000080	/* NOT on maxine	*/
+#define SCC0_CHIP		0x00000040
+
+/*
+ * The rest is different
+ */
+
+/* kmin aka 3min aka kn02ba aka DS5000_1xx */
+#define KMIN_TIMEOUT		0x00001000	/* CPU IO-Write Timeout	*/
+#define KMIN_CLOCK		0x00000020
+#define KMIN_SCSI_FIFO		0x00000004	/* SCSI Data Ready	*/
+
+/* kn02ca aka maxine */
+#define MAXINE_FLOPPY		0x00008000	/* FDI Interrupt        */
+#define MAXINE_TC0		0x00001000	/* TC Option 0      	*/
+#define MAXINE_ISDN		0x00000800	/* ISDN	Chip		*/
+#define MAXINE_FLOPPY_HDS	0x00000080	/* Floppy Status      	*/
+#define MAXINE_TC1		0x00000020	/* TC Option 1		*/
+#define MAXINE_FLOPPY_XDS	0x00000010	/* Floppy Status      	*/
+#define MAXINE_VINT		0x00000008	/* Video Frame		*/
+#define MAXINE_N_VINT		0x00000004	/* Not Video frame	*/
+#define MAXINE_DTOP_TRANS	0x00000002	/* DTI Xmit-Rdy		*/
+#define MAXINE_DTOP_RECV	0x00000001	/* DTI Recv-Available	*/
+
+/* kn03 aka 3max+ aka DS5000_2x0 */
+#define KN03_TC2		0x00004000
+#define KN03_TC1		0x00002000
+#define KN03_TC0		0x00001000
+#define KN03_SCSI_FIFO		0x00000004	/* ??? Info from Mach	*/
+
+/*
+ * Now form groups, i.e. all serial interrupts, all SCSI interrupts and so on. 
+ */
+#define SERIAL_INTS	(SCC0_TRANS_PAGEEND | SCC0_TRANS_MEMRDERR | \
+			SCC0_RECV_HALFPAGE | SCC0_RECV_PAGOVRRUN | \
+			SCC1_TRANS_PAGEEND | SCC1_TRANS_MEMRDERR | \
+			SCC1_RECV_HALFPAGE | SCC1_RECV_PAGOVRRUN | \
+			SCC1_CHIP | SCC0_CHIP)
+
+#define XINE_SERIAL_INTS	(SCC0_TRANS_PAGEEND | SCC0_TRANS_MEMRDERR | \
+			SCC0_RECV_HALFPAGE | SCC0_RECV_PAGOVRRUN | \
+			SCC0_CHIP)
+
+#define SCSI_INTS	(SCSI_PTR_LOADED | SCSI_PAGOVRRUN | \
+			SCSI_DMA_MEMRDERR | SCSI_CHIP)
+
+#define KMIN_SCSI_INTS	(SCSI_PTR_LOADED | SCSI_PAGOVRRUN | \
+			SCSI_DMA_MEMRDERR | SCSI_CHIP | KMIN_SCSI_FIFO)
+
+#define LANCE_INTS	(LANCE_DMA_MEMRDERR | LANCE_CHIP)
+
+/*
+ * For future use ...
+ */
+#define XINE_FLOPPY_INTS (MAXINE_FLOPPY | MAXINE_FLOPPY_HDS | \
+			FLOPPY_DMA_ERROR | MAXINE_FLOPPY_XDS)
+
+#define XINE_ISDN_INTS	(MAXINE_ISDN | ISDN_TRANS_PTR_LOADED | \
+			ISDN_RECV_PTR_LOADED | ISDN_DMA_MEMRDERR)
+
+#define XINE_DTOP_INTS	(MAXINE_DTOP_TRANS | DTOP_RECV | \
+			ISDN_TRANS_PTR_LOADED | ISDN_RECV_PTR_LOADED | \
+			ISDN_DMA_MEMRDERR)
diff --git a/include/asm-mips/dec/kn01.h b/include/asm-mips/dec/kn01.h
new file mode 100644
index 000000000..61a46e843
--- /dev/null
+++ b/include/asm-mips/dec/kn01.h
@@ -0,0 +1,28 @@
+/*
+ * Hardware info about DEC DECstation DS2100/3100 systems (otherwise known
+ * as pmax or kn01.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
+ * are by curteousy of Chris Fraser.
+ *
+ * This file is under construction - you were warned!
+ */
+#ifndef __ASM_MIPS_DEC_KN01_H 
+#define __ASM_MIPS_DEC_KN01_H 
+
+#include <asm/addrspace.h>
+
+/*
+ * Some port addresses...
+ * FIXME: these addresses are incomplete and need tidying up!
+ */
+
+#define KN01_LANCE_BASE (KSEG1ADDR(0x18000000)) /* 0xB8000000 */
+#define KN01_DZ11_BASE	(KSEG1ADDR(0x1c000000)) /* 0xBC000000 */
+#define KN01_RTC_BASE	(KSEG1ADDR(0x1d000000)) /* 0xBD000000 */
+
+#endif /* __ASM_MIPS_DEC_KN01_H */
diff --git a/include/asm-mips/dec/kn02.h b/include/asm-mips/dec/kn02.h
new file mode 100644
index 000000000..9888eb49f
--- /dev/null
+++ b/include/asm-mips/dec/kn02.h
@@ -0,0 +1,41 @@
+/*
+ * Hardware info about DEC DECstation 5000/2xx systems (otherwise known
+ * as 3max or kn02.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
+ * are by curteousy of Chris Fraser.
+ *
+ * This file is under construction - you were warned!
+ */
+#ifndef __ASM_MIPS_DEC_KN02_H 
+#define __ASM_MIPS_DEC_KN02_H 
+
+#include <asm/addrspace.h>
+
+/*
+ * Motherboard regs (kseg1 addresses)
+ */
+#define KN02_CSR_ADDR	KSEG1ADDR(0x1ff00000)	/* system control & status reg */
+
+/*
+ * Some port addresses...
+ * FIXME: these addresses are incomplete and need tidying up!
+ */
+#define KN02_RTC_BASE	KSEG1ADDR(0x1fe80000)
+#define KN02_DZ11_BASE	KSEG1ADDR(0x1fe00000)
+
+/*
+ * Interrupt enable Bits
+ */
+#define KN02_SLOT0	(1<<16)
+#define KN02_SLOT1	(1<<17)
+#define KN02_SLOT2	(1<<18)
+#define KN02_SLOT5	(1<<21)
+#define KN02_SLOT6	(1<<22)
+#define KN02_SLOT7	(1<<23)
+
+#endif /* __ASM_MIPS_DEC_KN02_H */
diff --git a/include/asm-mips/dec/kn02xa.h b/include/asm-mips/dec/kn02xa.h
new file mode 100644
index 000000000..b72367fec
--- /dev/null
+++ b/include/asm-mips/dec/kn02xa.h
@@ -0,0 +1,34 @@
+/*
+ * Hardware info about DEC DECstation 5000/1xx systems (otherwise known
+ * as 3min or kn02ba. Apllies to the Personal DECstations 5000/xx (otherwise known
+ * as maxine or kn02ca) as well.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
+ * are by curteousy of Chris Fraser.
+ *
+ * These are addresses which have to be known early in the boot process.
+ * For other addresses refer to tc.h ioasic_addrs.h and friends.
+ */
+#ifndef __ASM_MIPS_DEC_KN02XA_H 
+#define __ASM_MIPS_DEC_KN02XA_H 
+
+#include <asm/addrspace.h>
+
+/*
+ * Motherboard regs (kseg1 addresses)
+ */
+#define KN02XA_SSR_ADDR		KSEG1ADDR(0x1c040100)	/* system control & status reg */
+#define KN02XA_SIR_ADDR		KSEG1ADDR(0x1c040110)	/* system interrupt reg */
+#define KN02XA_SIRM_ADDR	KSEG1ADDR(0x1c040120)	/* system interrupt mask reg */
+
+/*
+ * Some port addresses...
+ * FIXME: these addresses are incomplete and need tidying up!
+ */
+#define KN02XA_RTC_BASE	(KSEG1ADDR(0x1c000000 + 0x200000)) /* ASIC + SL8 */
+
+#endif /* __ASM_MIPS_DEC_KN02XA_H */
diff --git a/include/asm-mips/dec/kn03.h b/include/asm-mips/dec/kn03.h
new file mode 100644
index 000000000..87ccae4b2
--- /dev/null
+++ b/include/asm-mips/dec/kn03.h
@@ -0,0 +1,33 @@
+/*
+ * Hardware info about DEC DECstation 5000/2x0 systems (otherwise known
+ * as 3max+ or kn03.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
+ * are by curteousy of Chris Fraser.
+ *
+ * These are addresses which have to be known early in the boot process.
+ * For other addresses refer to tc.h ioasic_addrs.h and friends.
+ */
+#ifndef __ASM_MIPS_DEC_KN03_H 
+#define __ASM_MIPS_DEC_KN03_H 
+
+#include <asm/addrspace.h>
+
+/*
+ * Motherboard regs (kseg1 addresses)
+ */
+#define KN03_SSR_ADDR	KSEG1ADDR(0x1f840100)	/* system control & status reg */
+#define KN03_SIR_ADDR	KSEG1ADDR(0x1f840110)	/* system interrupt reg */
+#define KN03_SIRM_ADDR	KSEG1ADDR(0x1f840120)	/* system interrupt mask reg */
+
+/*
+ * Some port addresses...
+ * FIXME: these addresses are incomplete and need tidying up!
+ */
+#define KN03_RTC_BASE	(KSEG1ADDR(0x1f800000 + 0x200000)) /* ASIC + SL8 */
+
+#endif /* __ASM_MIPS_DEC_KN03_H */
diff --git a/include/asm-mips/dec/machtype.h b/include/asm-mips/dec/machtype.h
new file mode 100644
index 000000000..ed4335d19
--- /dev/null
+++ b/include/asm-mips/dec/machtype.h
@@ -0,0 +1,20 @@
+/*
+ * Various machine type definitions
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1998 Harald Koerfgen
+ */
+#include <asm/bootinfo.h>
+
+#define TURBOCHANNEL	(mips_machtype == MACH_DS5000_200 || \
+			 mips_machtype == MACH_DS5000_1XX || \
+			 mips_machtype == MACH_DS5000_XX  || \
+			 mips_machtype == MACH_DS5000_2X0)
+		      
+#define IOASIC		(mips_machtype == MACH_DS5000_1XX || \
+			 mips_machtype == MACH_DS5000_XX  || \
+			 mips_machtype == MACH_DS5000_2X0)
+
diff --git a/include/asm-mips/dec/tc.h b/include/asm-mips/dec/tc.h
new file mode 100644
index 000000000..64fb03374
--- /dev/null
+++ b/include/asm-mips/dec/tc.h
@@ -0,0 +1,43 @@
+/*
+ * Interface to the TURBOchannel related routines
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1998 Harald Koerfgen
+ */
+#ifndef ASM_TC_H
+#define ASM_TC_H
+
+extern unsigned long system_base;
+
+/*
+ * Search for a TURBOchannel Option Module
+ * with a certain name. Returns slot number
+ * of the first card not in use or -ENODEV
+ * if none found.
+ */
+extern int search_tc_card(const char *);
+/*
+ * Marks the card in slot as used
+ */
+extern void claim_tc_card(int);
+/*
+ * Marks the card in slot as free
+ */
+extern void release_tc_card(int);
+/*
+ * Return base address of card in slot 
+ */
+extern unsigned long get_tc_base_addr(int);
+/*
+ * Return interrupt number of slot
+ */
+extern unsigned long get_tc_irq_nr(int);
+/*
+ * Return TURBOchannel clock frequency in hz
+ */
+extern unsigned long get_tc_speed(void);
+
+#endif
diff --git a/include/asm-mips/dec/tcinfo.h b/include/asm-mips/dec/tcinfo.h
new file mode 100644
index 000000000..72ecc894a
--- /dev/null
+++ b/include/asm-mips/dec/tcinfo.h
@@ -0,0 +1,47 @@
+/* 
+ * Various TURBOchannel related stuff
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Information obtained through the get_tcinfo prom call
+ * created from:
+ *
+ * TURBOchannel Firmware Specification
+ *
+ * EK-TCAAD-FS-004
+ * from Digital Equipment Corporation
+ *
+ * Copyright (c) 1998 Harald Koerfgen
+ */
+
+typedef struct {
+	int revision;
+	int clk_period;
+	int slot_size;
+	int io_timeout;
+	int dma_range;
+	int max_dma_burst;
+	int parity;
+	int reserved[4];
+} tcinfo;
+
+#define MAX_SLOT 7
+
+typedef struct {
+	unsigned long base_addr;
+	unsigned char name[9];
+	unsigned char vendor[9];
+	unsigned char firmware[9];
+	int interrupt;
+	int flags;
+} slot_info;
+
+/*
+ * Values for flags
+ */
+#define FREE 	1<<0
+#define IN_USE	1<<1
+
+
diff --git a/include/asm-mips/dec/tcmodule.h b/include/asm-mips/dec/tcmodule.h
new file mode 100644
index 000000000..26c5a5e29
--- /dev/null
+++ b/include/asm-mips/dec/tcmodule.h
@@ -0,0 +1,35 @@
+/* 
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Offsets for the ROM header locations for
+ * TURBOchannel cards
+ *
+ * created from:
+ *
+ * TURBOchannel Firmware Specification
+ *
+ * EK-TCAAD-FS-004
+ * from Digital Equipment Corporation
+ *
+ * Jan.1998 Harald Koerfgen
+ */
+ 
+#define OLDCARD 0x3c0000
+
+#define ROM_WIDTH 0x3e0
+#define ROM_STRIDE 0x3e4
+#define ROM_SIZE 0x3e8
+#define SLOT_SIZE 0x3ec
+#define PATTERN0 0x3f0
+#define PATTERN1 0x3f4
+#define PATTERN2 0x3f8
+#define PATTERN3 0x3fc
+#define FIRM_VER 0x400
+#define VENDOR 0x420
+#define MODULE 0x440
+#define FIRM_TYPE 0x460
+#define FLAGS 0x470
+
+#define ROM_OBJECTS 0x480