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authorHarald Koerfgen <hkoerfg@web.de>1999-07-26 19:42:38 +0000
committerHarald Koerfgen <hkoerfg@web.de>1999-07-26 19:42:38 +0000
commit14ab59aa8aba8687dc957c2186e115ac0b8ab542 (patch)
treec2eb55db21b6b46ddd983e2d40196fa61f19b64c /include/asm-mips/stackframe.h
parent552f7f2f262b8ea12edc36f9a260b068bd10f423 (diff)
The remaining R3000 changes. From now on the CVS will be R3000 aware. R3000 Indigo anyone? :-)
Diffstat (limited to 'include/asm-mips/stackframe.h')
-rw-r--r--include/asm-mips/stackframe.h55
1 files changed, 49 insertions, 6 deletions
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index 4b3a74043..68c8eabb6 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -3,7 +3,7 @@
*
* Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Paul M. Antoine.
*
- * $Id: stackframe.h,v 1.7 1998/05/04 09:13:01 ralf Exp $
+ * $Id: stackframe.h,v 1.8 1999/05/01 10:08:19 harald Exp $
*/
#ifndef __ASM_MIPS_STACKFRAME_H
#define __ASM_MIPS_STACKFRAME_H
@@ -102,9 +102,6 @@
#define RESTORE_AT \
lw $1, PT_R1(sp); \
-#define RESTORE_SP \
- lw sp, PT_R29(sp)
-
#define RESTORE_TEMP \
lw $24, PT_LO(sp); \
lw $8, PT_R8(sp); \
@@ -131,6 +128,44 @@
lw $23, PT_R23(sp); \
lw $30, PT_R30(sp)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
+
+#define RESTORE_SOME \
+ .set push; \
+ .set reorder; \
+ mfc0 t0, CP0_STATUS; \
+ .set pop; \
+ ori t0, 0x1f; \
+ xori t0, 0x1f; \
+ mtc0 t0, CP0_STATUS; \
+ li v1, 0xff00; \
+ and t0, v1; \
+ lw v0, PT_STATUS(sp); \
+ nor v1, $0, v1; \
+ and v0, v1; \
+ or v0, t0; \
+ mtc0 v0, CP0_STATUS; \
+ lw $31, PT_R31(sp); \
+ lw $28, PT_R28(sp); \
+ lw $25, PT_R25(sp); \
+ lw $7, PT_R7(sp); \
+ lw $6, PT_R6(sp); \
+ lw $5, PT_R5(sp); \
+ lw $4, PT_R4(sp); \
+ lw $3, PT_R3(sp); \
+ lw $2, PT_R2(sp)
+
+#define RESTORE_SP_AND_RET \
+ .set push; \
+ .set noreorder; \
+ lw k0, PT_EPC(sp); \
+ lw sp, PT_R29(sp); \
+ jr k0; \
+ rfe; \
+ .set pop
+
+#else
+
#define RESTORE_SOME \
.set push; \
.set reorder; \
@@ -158,12 +193,20 @@
lw $3, PT_R3(sp); \
lw $2, PT_R2(sp)
-#define RESTORE_ALL \
+#define RESTORE_SP_AND_RET \
+ lw sp, PT_R29(sp); \
+ .set mips3; \
+ eret; \
+ .set mips0
+
+#endif
+
+#define RESTORE_ALL_AND_RET \
RESTORE_SOME; \
RESTORE_AT; \
RESTORE_TEMP; \
RESTORE_STATIC; \
- RESTORE_SP
+ RESTORE_SP_AND_RET
/*
* Move to kernel mode and disable interrupts.