diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2000-08-08 11:57:03 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2000-08-08 11:57:03 +0000 |
| commit | 87075e049581f880f01eb0b41aa6ac807b299e35 (patch) | |
| tree | 73aafe9a3764b11e7b146d5d3fee70e7be6df285 /include/asm-mips64/bcache.h | |
| parent | f50251b7156e1b2f6866898df1b81a19f845c0f1 (diff) | |
Port the recent cache changes forward and backward between mips and
mips64.
Diffstat (limited to 'include/asm-mips64/bcache.h')
| -rw-r--r-- | include/asm-mips64/bcache.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/include/asm-mips64/bcache.h b/include/asm-mips64/bcache.h index 4ab0fca19..dd1e5fa02 100644 --- a/include/asm-mips64/bcache.h +++ b/include/asm-mips64/bcache.h @@ -14,8 +14,9 @@ #ifdef CONFIG_BOARD_SCACHE -/* Some R4000 / R4400 / R4600 / R5000 machines may have chipset implemented - caches. On machines with other CPUs the CPU does the cache thing itself. */ +/* Some R4000 / R4400 / R4600 / R5000 machines may have a non-dma-coherent, + chipset implemented caches. On machines with other CPUs the CPU does the + cache thing itself. */ struct bcache_ops { void (*bc_enable)(void); void (*bc_disable)(void); |