diff options
| author | Kanoj Sarcar <kanoj@engr.sgi.com> | 2000-04-07 02:14:27 +0000 |
|---|---|---|
| committer | Kanoj Sarcar <kanoj@engr.sgi.com> | 2000-04-07 02:14:27 +0000 |
| commit | 989cd949d7c7dc6e1d298b46b5f24a2543db419a (patch) | |
| tree | f771cf6455c3367be92191ac39c0fadb2dd9f9d4 /include/asm-mips64/mipsregs.h | |
| parent | 8a06a214b483c513c038fed2ae501f351b46b0af (diff) | |
Clear the TS bit from the master's status register (don't know why
PROM is getting the bit set before entry into kernel).
Fix per cpu frequency reporting.
Fix bug so that we do not clear information about mips4 availability.
Have the slaves flush their cache/tlb and set status based on what
the master processor did.
Diffstat (limited to 'include/asm-mips64/mipsregs.h')
| -rw-r--r-- | include/asm-mips64/mipsregs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-mips64/mipsregs.h b/include/asm-mips64/mipsregs.h index 3dba0bba0..cddc66d39 100644 --- a/include/asm-mips64/mipsregs.h +++ b/include/asm-mips64/mipsregs.h @@ -238,6 +238,7 @@ __BUILD_SET_CP0(config,CP0_CONFIG) #define ST0_CE 0x00020000 #define ST0_CH 0x00040000 #define ST0_SR 0x00100000 +#define ST0_TS 0x00200000 #define ST0_BEV 0x00400000 #define ST0_RE 0x02000000 #define ST0_FR 0x04000000 |