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authorRalf Baechle <ralf@linux-mips.org>1999-12-04 03:58:56 +0000
committerRalf Baechle <ralf@linux-mips.org>1999-12-04 03:58:56 +0000
commit1d67e90f19a7acfd9a05dc59678e7d0c5090bd0d (patch)
tree357efc7b93f8f5102110d20d293f41360ec212fc /include/asm-ppc/mbx.h
parentaea27b2e18d69af87e673972246e66657b4fa274 (diff)
Merge with Linux 2.3.21.
Diffstat (limited to 'include/asm-ppc/mbx.h')
-rw-r--r--include/asm-ppc/mbx.h30
1 files changed, 28 insertions, 2 deletions
diff --git a/include/asm-ppc/mbx.h b/include/asm-ppc/mbx.h
index 1d8d91039..e67e0344f 100644
--- a/include/asm-ppc/mbx.h
+++ b/include/asm-ppc/mbx.h
@@ -39,9 +39,10 @@ typedef struct bd_info {
* NVRAM, Status/Control registers, CPM Dual Port RAM, and the PCI
* Bridge CSRs 1:1 into the kernel address space.
*/
-#define PCI_ISA_IO_ADDR ((uint)0x80000000)
+#define PCI_ISA_IO_ADDR ((unsigned)0x80000000)
#define PCI_ISA_IO_SIZE ((uint)(512 * 1024 * 1024))
-#define PCI_ISA_MEM_ADDR ((uint)0xc0000000)
+#define PCI_IDE_ADDR ((unsigned)0x81000000)
+#define PCI_ISA_MEM_ADDR ((unsigned)0xc0000000)
#define PCI_ISA_MEM_SIZE ((uint)(512 * 1024 * 1024))
#define PCMCIA_MEM_ADDR ((uint)0xe0000000)
#define PCMCIA_MEM_SIZE ((uint)(64 * 1024 * 1024))
@@ -59,4 +60,29 @@ typedef struct bd_info {
#define IMAP_SIZE ((uint)(64 * 1024))
#define PCI_CSR_ADDR ((uint)0xfa210000)
#define PCI_CSR_SIZE ((uint)(64 * 1024))
+
+/* Map additional physical space into well known virtual addresses. Due
+ * to virtual address mapping, these physical addresses are not accessible
+ * in a 1:1 virtual to physical mapping.
+ */
+#define ISA_IO_VIRT_ADDR ((uint)0xfa220000)
+#define ISA_IO_VIRT_SIZE ((uint)64 * 1024)
+
+/* Interrupt assignments.
+ * These are defined (and fixed) by the MBX hardware implementation.
+ */
+#define POWER_FAIL_INT SIU_IRQ0 /* Power fail */
+#define TEMP_HILO_INT SIU_IRQ1 /* Temperature sensor */
+#define QSPAN_INT SIU_IRQ2 /* PCI Bridge (DMA CTLR?) */
+#define ISA_BRIDGE_INT SIU_IRQ3 /* All those PC things */
+#define COMM_L_INT SIU_IRQ6 /* MBX Comm expansion connector pin */
+#define STOP_ABRT_INT SIU_IRQ7 /* Stop/Abort header pin */
+
+/* The MBX uses the 8259.
+*/
+#define NR_8259_INTS 16
+
+/* Generic 8xx type
+*/
+#define _MACH_8xx (_MACH_mbx)
#endif