diff options
author | Ralf Baechle <ralf@linux-mips.org> | 1998-03-17 22:05:47 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 1998-03-17 22:05:47 +0000 |
commit | 27cfca1ec98e91261b1a5355d10a8996464b63af (patch) | |
tree | 8e895a53e372fa682b4c0a585b9377d67ed70d0e /include/asm-ppc/mmu.h | |
parent | 6a76fb7214c477ccf6582bd79c5b4ccc4f9c41b1 (diff) |
Look Ma' what I found on my harddisk ...
o New faster syscalls for 2.1.x, too
o Upgrade to 2.1.89.
Don't try to run this. It's flaky as hell. But feel free to debug ...
Diffstat (limited to 'include/asm-ppc/mmu.h')
-rw-r--r-- | include/asm-ppc/mmu.h | 141 |
1 files changed, 65 insertions, 76 deletions
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h index 57ce8eda8..db12454a5 100644 --- a/include/asm-ppc/mmu.h +++ b/include/asm-ppc/mmu.h @@ -6,23 +6,22 @@ #define _PPC_MMU_H_ /* Hardware Page Table Entry */ -typedef struct _PTE - { - unsigned long v:1; /* Entry is valid */ - unsigned long vsid:24; /* Virtual segment identifier */ - unsigned long h:1; /* Hash algorithm indicator */ - unsigned long api:6; /* Abbreviated page index */ - unsigned long rpn:20; /* Real (physical) page number */ - unsigned long :3; /* Unused */ - unsigned long r:1; /* Referenced */ - unsigned long c:1; /* Changed */ - unsigned long w:1; /* Write-thru cache mode */ - unsigned long i:1; /* Cache inhibited */ - unsigned long m:1; /* Memory coherence */ - unsigned long g:1; /* Guarded */ - unsigned long :1; /* Unused */ - unsigned long pp:2; /* Page protection */ - } PTE; +typedef struct _PTE { + unsigned long v:1; /* Entry is valid */ + unsigned long vsid:24; /* Virtual segment identifier */ + unsigned long h:1; /* Hash algorithm indicator */ + unsigned long api:6; /* Abbreviated page index */ + unsigned long rpn:20; /* Real (physical) page number */ + unsigned long :3; /* Unused */ + unsigned long r:1; /* Referenced */ + unsigned long c:1; /* Changed */ + unsigned long w:1; /* Write-thru cache mode */ + unsigned long i:1; /* Cache inhibited */ + unsigned long m:1; /* Memory coherence */ + unsigned long g:1; /* Guarded */ + unsigned long :1; /* Unused */ + unsigned long pp:2; /* Page protection */ +} PTE; /* Values for PP (assumes Ks=0, Kp=1) */ #define PP_RWXX 0 /* Supervisor read/write, User none */ @@ -31,68 +30,61 @@ typedef struct _PTE #define PP_RXRX 3 /* Supervisor read, User read */ /* Segment Register */ -typedef struct _SEGREG -{ - unsigned long t:1; /* Normal or I/O type */ - unsigned long ks:1; /* Supervisor 'key' (normally 0) */ - unsigned long kp:1; /* User 'key' (normally 1) */ - unsigned long n:1; /* No-execute */ - unsigned long :4; /* Unused */ - unsigned long vsid:24; /* Virtual Segment Identifier */ +typedef struct _SEGREG { + unsigned long t:1; /* Normal or I/O type */ + unsigned long ks:1; /* Supervisor 'key' (normally 0) */ + unsigned long kp:1; /* User 'key' (normally 1) */ + unsigned long n:1; /* No-execute */ + unsigned long :4; /* Unused */ + unsigned long vsid:24; /* Virtual Segment Identifier */ } SEGREG; /* Block Address Translation (BAT) Registers */ -typedef struct _P601_BATU -{ - unsigned long bepi:15; /* Effective page index (virtual address) */ - unsigned long :8; /* unused */ - unsigned long w:1; - unsigned long i:1; /* Cache inhibit */ - unsigned long m:1; /* Memory coherence */ - unsigned long vs:1; /* Supervisor valid */ - unsigned long vp:1; /* User valid */ - unsigned long pp:2; /* Page access protections */ +typedef struct _P601_BATU { /* Upper part of BAT for 601 processor */ + unsigned long bepi:15; /* Effective page index (virtual address) */ + unsigned long :8; /* unused */ + unsigned long w:1; + unsigned long i:1; /* Cache inhibit */ + unsigned long m:1; /* Memory coherence */ + unsigned long ks:1; /* Supervisor key (normally 0) */ + unsigned long kp:1; /* User key (normally 1) */ + unsigned long pp:2; /* Page access protections */ } P601_BATU; -typedef struct _BATU /* Upper part of BAT */ -{ - unsigned long bepi:15; /* Effective page index (virtual address) */ - unsigned long :4; /* Unused */ - unsigned long bl:11; /* Block size mask */ - unsigned long vs:1; /* Supervisor valid */ - unsigned long vp:1; /* User valid */ +typedef struct _BATU { /* Upper part of BAT (all except 601) */ + unsigned long bepi:15; /* Effective page index (virtual address) */ + unsigned long :4; /* Unused */ + unsigned long bl:11; /* Block size mask */ + unsigned long vs:1; /* Supervisor valid */ + unsigned long vp:1; /* User valid */ } BATU; -typedef struct _P601_BATL -{ - unsigned long brpn:15; /* Real page index (physical address) */ - unsigned long :10; /* Unused */ - unsigned long v:1; /* valid/invalid */ - unsigned long bl:6; /* Block size mask */ +typedef struct _P601_BATL { /* Lower part of BAT for 601 processor */ + unsigned long brpn:15; /* Real page index (physical address) */ + unsigned long :10; /* Unused */ + unsigned long v:1; /* Valid bit */ + unsigned long bl:6; /* Block size mask */ } P601_BATL; -typedef struct _BATL /* Lower part of BAT */ -{ - unsigned long brpn:15; /* Real page index (physical address) */ - unsigned long :10; /* Unused */ - unsigned long w:1; /* Write-thru cache */ - unsigned long i:1; /* Cache inhibit */ - unsigned long m:1; /* Memory coherence */ - unsigned long g:1; /* Guarded (MBZ) */ - unsigned long :1; /* Unused */ - unsigned long pp:2; /* Page access protections */ +typedef struct _BATL { /* Lower part of BAT (all except 601) */ + unsigned long brpn:15; /* Real page index (physical address) */ + unsigned long :10; /* Unused */ + unsigned long w:1; /* Write-thru cache */ + unsigned long i:1; /* Cache inhibit */ + unsigned long m:1; /* Memory coherence */ + unsigned long g:1; /* Guarded (MBZ in IBAT) */ + unsigned long :1; /* Unused */ + unsigned long pp:2; /* Page access protections */ } BATL; -typedef struct _BAT -{ - BATU batu; /* Upper register */ - BATL batl; /* Lower register */ +typedef struct _BAT { + BATU batu; /* Upper register */ + BATL batl; /* Lower register */ } BAT; -typedef struct _P601_BAT -{ - P601_BATU batu; /* Upper register */ - P601_BATL batl; /* Lower register */ +typedef struct _P601_BAT { + P601_BATU batu; /* Upper register */ + P601_BATL batl; /* Lower register */ } P601_BAT; /* Block size masks */ @@ -123,11 +115,10 @@ typedef struct _P601_BAT * platforms, notably the 80x86 and 680x0. */ -typedef struct _pte - { +typedef struct _pte { unsigned long page_num:20; - unsigned long flags:12; /* Page flags (with some unused bits) */ - } pte; + unsigned long flags:12; /* Page flags (some unused bits) */ +} pte; #define PD_SHIFT (10+12) /* Page directory */ #define PD_MASK 0x02FF @@ -138,11 +129,10 @@ typedef struct _pte /* MMU context */ -typedef struct _MMU_context - { - SEGREG segs[16]; /* Segment registers */ - pte **pmap; /* Two-level page-map structure */ - } MMU_context; +typedef struct _MMU_context { + SEGREG segs[16]; /* Segment registers */ + pte **pmap; /* Two-level page-map structure */ +} MMU_context; /* Used to set up SDR1 register */ #define HASH_TABLE_SIZE_64K 0x00010000 @@ -167,5 +157,4 @@ extern inline void _tlbie(unsigned long va) } extern void _tlbia(void); /* invalidate all TLB entries */ - #endif |