Merge with Linux 2.2.1.

18 files changed, 198 insertions, 59 deletions

diff --git a/include/asm-ppc/amigappc.h b/include/asm-ppc/amigappc.h
index 5546cb1fb..bea284b2d 100644
--- a/include/asm-ppc/amigappc.h
+++ b/include/asm-ppc/amigappc.h
@@ -16,20 +16,20 @@
 
 #ifndef __ASSEMBLY__
 
-#ifndef iobarrier /* Don't include io.h - avoid circular dependency */
-#define iobarrier() eieio()
+#ifndef iobarrier_rw /* Don't include io.h - avoid circular dependency */
+#define iobarrier_rw() eieio()
 #endif
 
 #define APUS_WRITE(_a_, _v_)				\
 do {							\
 	(*((volatile unsigned char *)(_a_)) = (_v_));	\
-	iobarrier ();					\
+	iobarrier_rw ();				\
 } while (0)
 
 #define APUS_READ(_a_, _v_) 				\
 do {							\
 	(_v_) = (*((volatile unsigned char *)(_a_)));	\
-	iobarrier ();					\
+	iobarrier_rw ();				\
 } while (0)
 #endif /* ndef __ASSEMBLY__ */
 
diff --git a/include/asm-ppc/bitops.h b/include/asm-ppc/bitops.h
index 9e0614ae2..95b59cafc 100644
--- a/include/asm-ppc/bitops.h
+++ b/include/asm-ppc/bitops.h
@@ -1,5 +1,5 @@
 /*
- * $Id: bitops.h,v 1.10 1998/08/16 21:56:53 geert Exp $
+ * $Id: bitops.h,v 1.11 1999/01/03 20:16:48 cort Exp $
  * bitops.h: Bit string operations on the ppc
  */
 
@@ -16,6 +16,16 @@ extern int test_and_set_bit(int nr, volatile void *addr);
 extern int test_and_clear_bit(int nr, volatile void *addr);
 extern int test_and_change_bit(int nr, volatile void *addr);
 
+
+/* Returns the number of 0's to the left of the most significant 1 bit */
+extern __inline__  int cntlzw(int bits)
+{
+	int lz;
+
+	asm ("cntlzw %0,%1" : "=r" (lz) : "r" (bits));
+	return lz;
+}
+
 /*
  * These are if'd out here because using : "cc" as a constraint
  * results in errors from gcc. -- Cort
diff --git a/include/asm-ppc/checksum.h b/include/asm-ppc/checksum.h
index 1c18664bc..e635ff599 100644
--- a/include/asm-ppc/checksum.h
+++ b/include/asm-ppc/checksum.h
@@ -83,13 +83,13 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr,
 						   unsigned int sum) 
 {
     __asm__("
-	add %0,%0,%1
-	add %0,%0,%2
-	add %0,%0,%0
-	addi %0,%0,0
+	addc %0,%0,%1
+	adde %0,%0,%2
+	adde %0,%0,%3
+	addze %0,%0
 	"
 	: "=r" (sum)
-	: "r" (daddr), "r"(saddr), "r"((ntohs(len)<<16)+proto*256), "0"(sum));
+	: "r" (daddr), "r"(saddr), "r"((proto<<16)+len), "0"(sum));
     return sum;
 }
 
diff --git a/include/asm-ppc/dma.h b/include/asm-ppc/dma.h
index 8560c7d88..b817e055a 100644
--- a/include/asm-ppc/dma.h
+++ b/include/asm-ppc/dma.h
@@ -204,6 +204,7 @@ extern long ppc_cs4232_dma, ppc_cs4232_dma2;
 #define DMA2_EXT_REG               0x4D6
 
 #define DMA_MODE_CASCADE 0xC0   /* pass thru DREQ->HRQ, DACK<-HLDA only */
+#define DMA_AUTOINIT	0x10
 
 extern spinlock_t  dma_spin_lock;
 
@@ -393,4 +394,10 @@ static __inline__ int get_dma_residue(unsigned int dmanr)
 extern int request_dma(unsigned int dmanr, const char * device_id);	/* reserve a DMA channel */
 extern void free_dma(unsigned int dmanr);	/* release it again */
 
+#ifdef CONFIG_PCI_QUIRKS
+extern int isa_dma_bridge_buggy;
+#else
+#define isa_dma_bridge_buggy    (0)
+#endif
+
 #endif /* _ASM_DMA_H */
diff --git a/include/asm-ppc/ide.h b/include/asm-ppc/ide.h
index 75f77641c..cad526b12 100644
--- a/include/asm-ppc/ide.h
+++ b/include/asm-ppc/ide.h
@@ -80,8 +80,11 @@ extern void chrp_ide_probe(void);
 
 static __inline__ int ide_default_irq(ide_ioreg_t base)
 {
-	if ( (_machine == _MACH_Pmac) || (_machine == _MACH_mbx) )
+	if ( _machine == _MACH_Pmac )
 		return 0;
+	else if ( _machine == _MACH_mbx )
+		/* hardcode IRQ 14 on the MBX */
+		return 14+16;		     
         else if ( _machine == _MACH_chrp) {
                 if (chrp_ide_ports_known == 0) 
 			chrp_ide_probe();
@@ -142,7 +145,7 @@ static __inline__ void ide_release_region (ide_ioreg_t from, unsigned int extent
 }
 
 /* Convert the shorts/longs in hd_driveid from little to big endian;
-   chars are endian independant, of course, but strings need to be flipped.
+   chars are endian independent, of course, but strings need to be flipped.
    (Despite what it says in drivers/block/ide.h, they come up as little endian...)
    Changes to linux/hdreg.h may require changes here. */
 static __inline__ void ide_fix_driveid (struct hd_driveid *id) {
@@ -200,26 +203,66 @@ static __inline__ void ide_fix_driveid (struct hd_driveid *id) {
 		id->word79         = __le16_to_cpu(id->word79);
 		id->word80         = __le16_to_cpu(id->word80);
 		id->word81         = __le16_to_cpu(id->word81);
-		id->word82         = __le16_to_cpu(id->word82);
+		id->command_sets   = __le16_to_cpu(id->command_sets);
 		id->word83         = __le16_to_cpu(id->word83);
 		id->word84         = __le16_to_cpu(id->word84);
 		id->word85         = __le16_to_cpu(id->word85);
 		id->word86         = __le16_to_cpu(id->word86);
 		id->word87         = __le16_to_cpu(id->word87);
 		id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
-		for (i=0; i<167; i++)
+		id->word89         = __le16_to_cpu(id->word89);
+		id->word90         = __le16_to_cpu(id->word90);
+		id->word91         = __le16_to_cpu(id->word91);
+		id->word92         = __le16_to_cpu(id->word92);
+		id->word93         = __le16_to_cpu(id->word93);
+		id->word94         = __le16_to_cpu(id->word94);
+		id->word95         = __le16_to_cpu(id->word95);
+		id->word96         = __le16_to_cpu(id->word96);
+		id->word97         = __le16_to_cpu(id->word97);
+		id->word98         = __le16_to_cpu(id->word98);
+		id->word99         = __le16_to_cpu(id->word99);
+		id->word100        = __le16_to_cpu(id->word100);
+		id->word101        = __le16_to_cpu(id->word101);
+		id->word102        = __le16_to_cpu(id->word102);
+		id->word103        = __le16_to_cpu(id->word103);
+		id->word104        = __le16_to_cpu(id->word104);
+		id->word105        = __le16_to_cpu(id->word105);
+		id->word106        = __le16_to_cpu(id->word106);
+		id->word107        = __le16_to_cpu(id->word107);
+		id->word108        = __le16_to_cpu(id->word108);
+		id->word109        = __le16_to_cpu(id->word109);
+		id->word110        = __le16_to_cpu(id->word110);
+		id->word111        = __le16_to_cpu(id->word111);
+		id->word112        = __le16_to_cpu(id->word112);
+		id->word113        = __le16_to_cpu(id->word113);
+		id->word114        = __le16_to_cpu(id->word114);
+		id->word115        = __le16_to_cpu(id->word115);
+		id->word116        = __le16_to_cpu(id->word116);
+		id->word117        = __le16_to_cpu(id->word117);
+		id->word118        = __le16_to_cpu(id->word118);
+		id->word119        = __le16_to_cpu(id->word119);
+		id->word120        = __le16_to_cpu(id->word120);
+		id->word121        = __le16_to_cpu(id->word121);
+		id->word122        = __le16_to_cpu(id->word122);
+		id->word123        = __le16_to_cpu(id->word123);
+		id->word124        = __le16_to_cpu(id->word124);
+		id->word125        = __le16_to_cpu(id->word125);
+		id->word126        = __le16_to_cpu(id->word126);
+		id->word127        = __le16_to_cpu(id->word127);
+		id->security       = __le16_to_cpu(id->security);
+		for (i=0; i<127; i++)
 			id->reserved[i] = __le16_to_cpu(id->reserved[i]);
 	}
 }
 
-
 #undef insw
 #define insw(port, buf, ns) 	do {			\
 	if ( _machine == _MACH_chrp)  {\
 		 ide_insw((port)+_IO_BASE, (buf), (ns));  \
 	}\
 	else if ( (_machine == _MACH_Pmac) || (_machine == _MACH_mbx) )			\
-		ide_insw((port), (buf), (ns));		\
+		ide_insw((port)+((_machine==_MACH_mbx)? 0x80000000: 0), \
+			 (buf), (ns));		\
 	else						\
 		/* this must be the same as insw in io.h!! */	\
 		_insw((unsigned short *)((port)+_IO_BASE), (buf), (ns)); \
@@ -230,8 +273,9 @@ static __inline__ void ide_fix_driveid (struct hd_driveid *id) {
 	if ( _machine == _MACH_chrp) {\
 		ide_outsw((port)+_IO_BASE, (buf), (ns)); \
 	}\
-	else if ( (_machine == _MACH_Pmac) || (_machine == _MACH_mbx) )			\
-		ide_outsw((port), (buf), (ns));		\
+	else if ( (_machine == _MACH_Pmac) || (_machine == _MACH_mbx) )	 \
+		ide_outsw((port)+((_machine==_MACH_mbx)? 0x80000000: 0), \
+			   (buf), (ns));		\
 	else						\
 		/* this must be the same as outsw in io.h!! */	\
 		_outsw((unsigned short *)((port)+_IO_BASE), (buf), (ns)); \
@@ -239,13 +283,17 @@ static __inline__ void ide_fix_driveid (struct hd_driveid *id) {
 
 #undef inb
 #define inb(port)	\
-	in_8((unsigned char *)((port) + ((_machine==_MACH_Pmac)? 0: _IO_BASE)))
+	in_8((unsigned char *)((port) + \
+			       ((_machine==_MACH_Pmac)? 0: _IO_BASE) + \
+			       ((_machine==_MACH_mbx)? 0x80000000: 0)) )
 #undef inb_p
 #define inb_p(port)	inb(port)
 
 #undef outb
 #define outb(val, port)	\
-	out_8((unsigned char *)((port) + ((_machine==_MACH_Pmac)? 0: _IO_BASE)), (val))
+	out_8((unsigned char *)((port) + \
+				((_machine==_MACH_Pmac)? 0: _IO_BASE) + \
+				((_machine==_MACH_mbx)? 0x80000000: 0)), (val) )
 #undef outb_p
 #define outb_p(val, port)	outb(val, port)
 
diff --git a/include/asm-ppc/init.h b/include/asm-ppc/init.h
index ea24bbab7..5ee43593c 100644
--- a/include/asm-ppc/init.h
+++ b/include/asm-ppc/init.h
@@ -31,6 +31,9 @@
 #define __FINIT	.previous
 #define __INITDATA	.section	".data.init",#alloc,#write
 
+#define __cacheline_aligned __attribute__ \
+			 ((__section__ (".data.cacheline_aligned")))
+
 #else /* not egcs */
 
 #define __init
@@ -52,5 +55,7 @@
 #define __openfirmware
 #define __openfirmwaredata
 #define __openfirmwarefunc(x) x
+
+#define __cacheline_aligned
 #endif /* egcs */
 #endif
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index da5219e39..b6b80c4ea 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -192,7 +192,13 @@ extern inline void eieio(void)
 {
 	__asm__ __volatile__ ("eieio" : : : "memory");
 }
-#define iobarrier() eieio()
+
+/* Enforce in-order execution of data I/O. 
+ * No distinction between read/write on PPC; use eieio for all three.
+ */
+#define iobarrier_rw() eieio()
+#define iobarrier_r()  eieio()
+#define iobarrier_w()  eieio()
 
 /*
  * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
diff --git a/include/asm-ppc/mmu_context.h b/include/asm-ppc/mmu_context.h
index 5b2bdc932..50fa27081 100644
--- a/include/asm-ppc/mmu_context.h
+++ b/include/asm-ppc/mmu_context.h
@@ -38,7 +38,7 @@
 #define MUNGE_CONTEXT(n)        (((n) * 897) & LAST_CONTEXT)
 #endif
 
-extern int next_mmu_context;
+extern atomic_t next_mmu_context;
 extern void mmu_context_overflow(void);
 
 #ifndef CONFIG_8xx
@@ -54,9 +54,9 @@ extern void set_context(int context);
 do { 								\
 	struct mm_struct *mm = (tsk)->mm;			\
 	if (mm->context == NO_CONTEXT) {			\
-		if (next_mmu_context == LAST_CONTEXT)		\
+		if (atomic_read(&next_mmu_context) == LAST_CONTEXT)		\
 			mmu_context_overflow();			\
-		mm->context = MUNGE_CONTEXT(++next_mmu_context);\
+		mm->context = MUNGE_CONTEXT(atomic_inc_return(&next_mmu_context));\
 	}							\
 } while (0)
 
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index d0c0673b3..9e8e36d60 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -121,6 +121,7 @@ extern pte_t *va_to_pte(struct task_struct *tsk, unsigned long address);
 #define _PAGE_DIRTY	0x080	/* C: page changed */
 #define _PAGE_ACCESSED	0x100	/* R: page referenced */
 #define _PAGE_HWWRITE	0x200	/* software: _PAGE_RW & _PAGE_DIRTY */
+#define _PAGE_SHARED	0
 
 #else
 #define _PAGE_PRESENT	0x0001	/* Page is valid */
@@ -147,28 +148,23 @@ extern pte_t *va_to_pte(struct task_struct *tsk, unsigned long address);
 
 #define _PAGE_CHG_MASK	(PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
 
+#ifdef __SMP__
+#define _PAGE_BASE	_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT
+#else
+#define _PAGE_BASE	_PAGE_PRESENT | _PAGE_ACCESSED
+#endif
+#define _PAGE_WRENABLE	_PAGE_RW | _PAGE_DIRTY | _PAGE_HWWRITE
+
 #define PAGE_NONE	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
 
-#ifndef CONFIG_8xx
-#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
-				 _PAGE_ACCESSED)
-#define PAGE_COPY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
-#define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
-#define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
-				 _PAGE_HWWRITE | _PAGE_ACCESSED)
-#define PAGE_KERNEL_CI	__pgprot(_PAGE_PRESENT | _PAGE_NO_CACHE | _PAGE_RW | \
-				 _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
-#else
-#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
-				 _PAGE_ACCESSED | _PAGE_SHARED)
-#define PAGE_COPY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
-#define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
-#define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
-				 _PAGE_SHARED | _PAGE_ACCESSED)
-#define PAGE_KERNEL_CI	__pgprot(_PAGE_PRESENT | _PAGE_NO_CACHE | _PAGE_RW | \
-				 _PAGE_SHARED | _PAGE_DIRTY | _PAGE_ACCESSED)
-#endif /* CONFIG_8xx */
-     
+#define PAGE_SHARED	__pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | \
+				 _PAGE_SHARED)
+#define PAGE_COPY	__pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_READONLY	__pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_KERNEL	__pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_SHARED)
+#define PAGE_KERNEL_CI	__pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_SHARED | \
+				 _PAGE_NO_CACHE )
+
 /*
  * The PowerPC can only do execute protection on a segment (256MB) basis,
  * not on a page basis.  So we consider execute permission the same as read.
@@ -230,7 +226,7 @@ extern unsigned long empty_zero_page[1024];
  do { \
 	unsigned long __pgdir = (unsigned long)pgdir; \
 	((tsk)->tss.pg_tables = (unsigned long *)(__pgdir)); \
-	asm("mtspr %0,%1 \n\t" :: "i"(M_TWB), "r"(__pa(__pgdir))); \
+	asm("mtspr %0,%1 \n\t" : : "i"(M_TWB), "r"(__pa(__pgdir))); \
  } while (0)
 #endif /* CONFIG_8xx */
      
@@ -641,5 +637,7 @@ extern void kernel_set_cachemode (unsigned long address, unsigned long size,
 
 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
 #define PageSkip(page)		(0)
+#define kern_addr_valid(addr)	(1)
+
 #endif __ASSEMBLY__
 #endif /* _PPC_PGTABLE_H */
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index a3e06e566..de8f12e5b 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -286,8 +286,9 @@ struct thread_struct {
  * Note: the vm_start and vm_end fields here should *not*
  * be in kernel space.  (Could vm_end == vm_start perhaps?)
  */
-#define INIT_MMAP { &init_mm, 0, 0x1000, \
-		      PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC }
+#define INIT_MMAP { &init_mm, 0, 0x1000, NULL, \
+		    PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, \
+		    1, NULL, NULL }
 
 /*
  * Return saved PC of a blocked thread. For now, this is the "user" PC
@@ -299,6 +300,7 @@ static inline unsigned long thread_saved_pc(struct thread_struct *t)
 
 #define copy_segments(nr, tsk, mm)	do { } while (0)
 #define release_segments(mm)		do { } while (0)
+#define forget_segments()		do { } while (0)
 
 /*
  * NOTE! The task struct and the stack go together
diff --git a/include/asm-ppc/resource.h b/include/asm-ppc/resource.h
index 4555502a2..674e6d6f1 100644
--- a/include/asm-ppc/resource.h
+++ b/include/asm-ppc/resource.h
@@ -21,7 +21,7 @@
     {LONG_MAX, LONG_MAX},			/* RLIMIT_CPU */	\
     {LONG_MAX, LONG_MAX},			/* RLIMIT_FSIZE */	\
     {LONG_MAX, LONG_MAX},			/* RLIMIT_DATA */	\
-    {_STK_LIM, _STK_LIM},			/* RLIMIT_STACK */	\
+    {_STK_LIM, LONG_MAX},			/* RLIMIT_STACK */	\
     {       0, LONG_MAX},			/* RLIMIT_CORE */	\
     {LONG_MAX, LONG_MAX},			/* RLIMIT_RSS */	\
     {MAX_TASKS_PER_USER, MAX_TASKS_PER_USER},	/* RLIMIT_NPROC */	\
diff --git a/include/asm-ppc/semaphore.h b/include/asm-ppc/semaphore.h
index f6a2a59f2..a78c203d2 100644
--- a/include/asm-ppc/semaphore.h
+++ b/include/asm-ppc/semaphore.h
@@ -37,7 +37,7 @@ static inline void wake_one_more(struct semaphore * sem)
 	atomic_inc(&sem->waking);
 }
 
-static inline int waking_non_zero(struct semaphore *sem)
+static inline int waking_non_zero(struct semaphore *sem, struct task_struct *tsk)
 {
 	int ret, tmp;
 
diff --git a/include/asm-ppc/softirq.h b/include/asm-ppc/softirq.h
index 739b22580..e2064f07d 100644
--- a/include/asm-ppc/softirq.h
+++ b/include/asm-ppc/softirq.h
@@ -12,7 +12,7 @@ extern unsigned int local_bh_count[NR_CPUS];
 extern inline void init_bh(int nr, void (*routine)(void))
 {
 	bh_base[nr] = routine;
-	bh_mask_count[nr] = 0;
+	atomic_set(&bh_mask_count[nr], 0);
 	bh_mask |= 1 << nr;
 }
 
@@ -96,13 +96,13 @@ extern inline void end_bh_atomic(void)
 extern inline void disable_bh(int nr)
 {
 	bh_mask &= ~(1 << nr);
-	bh_mask_count[nr]++;
+	atomic_inc(&bh_mask_count[nr]);
 	synchronize_bh();
 }
 
 extern inline void enable_bh(int nr)
 {
-	if (!--bh_mask_count[nr])
+	if (atomic_dec_and_test(&bh_mask_count[nr]))
 		bh_mask |= 1 << nr;
 }
 
diff --git a/include/asm-ppc/spinlock.h b/include/asm-ppc/spinlock.h
index 55e6bd16f..c048dbc1a 100644
--- a/include/asm-ppc/spinlock.h
+++ b/include/asm-ppc/spinlock.h
@@ -3,12 +3,23 @@
 
 #ifndef __SMP__
 
-typedef struct { } spinlock_t;
-#define SPIN_LOCK_UNLOCKED { }
+/*
+ * Your basic spinlocks, allowing only a single CPU anywhere
+ *
+ * Gcc-2.7.x has a nasty bug with empty initializers.
+ */
+#if (__GNUC__ > 2) || (__GNUC__ == 2 && __GNUC_MINOR__ >= 8)
+  typedef struct { } spinlock_t;
+  #define SPIN_LOCK_UNLOCKED (spinlock_t) { }
+#else
+  typedef struct { int gcc_is_buggy; } spinlock_t;
+  #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
+#endif
 
 #define spin_lock_init(lock)	do { } while(0)
 #define spin_lock(lock)		do { } while(0)
 #define spin_trylock(lock)	do { } while(0)
+#define spin_unlock_wait(lock)	do { } while(0)
 #define spin_unlock(lock)	do { } while(0)
 #define spin_lock_irq(lock)	cli()
 #define spin_unlock_irq(lock)	sti()
@@ -27,9 +38,16 @@ typedef struct { } spinlock_t;
  * can "mix" irq-safe locks - any writer needs to get a
  * irq-safe write-lock, but readers can get non-irqsafe
  * read-locks.
+ *
+ * Gcc-2.7.x has a nasty bug with empty initializers.
  */
-typedef struct { } rwlock_t;
-#define RW_LOCK_UNLOCKED { }
+#if (__GNUC__ > 2) || (__GNUC__ == 2 && __GNUC_MINOR__ >= 8)
+  typedef struct { } rwlock_t;
+  #define RW_LOCK_UNLOCKED (rwlock_t) { }
+#else
+  typedef struct { int gcc_is_buggy; } rwlock_t;
+  #define RW_LOCK_UNLOCKED (rwlock_t) { 0 }
+#endif
 
 #define read_lock(lock)		do { } while(0)
 #define read_unlock(lock)	do { } while(0)
@@ -63,8 +81,8 @@ typedef struct {
 	volatile unsigned long owner_cpu;
 } spinlock_t;
 
-#define SPIN_LOCK_UNLOCKED	{ 0, 0, 0 }
-#define spin_lock_init(lp) do { (lp)->lock = 0; } while(0)
+#define SPIN_LOCK_UNLOCKED	(spinlock_t) { 0, 0, 0 }
+#define spin_lock_init(lp) 	do { (lp)->lock = 0; } while(0)
 #define spin_unlock_wait(lp)	do { barrier(); } while((lp)->lock)
 
 extern void _spin_lock(spinlock_t *lock);
@@ -99,7 +117,7 @@ typedef struct {
 	volatile unsigned long owner_pc;
 } rwlock_t;
 
-#define RW_LOCK_UNLOCKED { 0, 0 }
+#define RW_LOCK_UNLOCKED (rwlock_t) { 0, 0 }
 
 extern void _read_lock(rwlock_t *rw);
 extern void _read_unlock(rwlock_t *rw);
diff --git a/include/asm-ppc/system.h b/include/asm-ppc/system.h
index 32d01e7f2..5a1740847 100644
--- a/include/asm-ppc/system.h
+++ b/include/asm-ppc/system.h
@@ -5,7 +5,15 @@
 #include <asm/processor.h>
 #include <asm/atomic.h>
 
+/*
+ * Memory barrier.
+ * The sync instruction guarantees that all memory accesses initiated
+ * by this processor have been performed (with respect to all other
+ * mechanisms that access memory).
+ */
 #define mb()  __asm__ __volatile__ ("sync" : : : "memory")
+#define rmb()  __asm__ __volatile__ ("sync" : : : "memory")
+#define wmb()  __asm__ __volatile__ ("sync" : : : "memory")
 
 #define __save_flags(flags)	({\
 	__asm__ __volatile__ ("mfmsr %0" : "=r" ((flags)) : : "memory"); })
diff --git a/include/asm-ppc/termbits.h b/include/asm-ppc/termbits.h
index df1014281..0d387ca10 100644
--- a/include/asm-ppc/termbits.h
+++ b/include/asm-ppc/termbits.h
@@ -126,6 +126,17 @@ struct termios {
 #define  B115200  00021
 #define  B230400  00022
 #define  B460800  00023
+#define  B500000  00024
+#define  B576000  00025
+#define  B921600  00026
+#define B1000000  00027
+#define B1152000  00030
+#define B1500000  00031
+#define B2000000  00032
+#define B2500000  00033
+#define B3000000  00034
+#define B3500000  00035
+#define B4000000  00036
 
 #define CSIZE	00001400
 #define   CS5	00000000
diff --git a/include/asm-ppc/termios.h b/include/asm-ppc/termios.h
index c6385d4a7..13b3591b8 100644
--- a/include/asm-ppc/termios.h
+++ b/include/asm-ppc/termios.h
@@ -182,6 +182,8 @@ struct termio {
 #define N_MASC		8	/* Reserved for Mobitex module <kaz@cafe.net> */
 #define N_R3964		9	/* Reserved for Simatic R3964 module */
 #define N_PROFIBUS_FDL	10	/* Reserved for Profibus <Dave@mvhi.com> */
+#define N_IRDA		11	/* Linux IrDa - http://www.cs.uit.no/~dagb/irda/irda.html */
+#define N_SMSBLOCK	12	/* SMS block mode - for talking to GSM data cards about SMS messages */
 
 #ifdef __KERNEL__
 
diff --git a/include/asm-ppc/timex.h b/include/asm-ppc/timex.h
index a20f6031c..4fac4ea39 100644
--- a/include/asm-ppc/timex.h
+++ b/include/asm-ppc/timex.h
@@ -12,4 +12,28 @@
 	(1000000/CLOCK_TICK_FACTOR) / (CLOCK_TICK_RATE/CLOCK_TICK_FACTOR)) \
 		<< (SHIFT_SCALE-SHIFT_HZ)) / HZ)
 
+typedef unsigned long cycles_t;
+
+/*
+ * For the "cycle" counter we use the timebase lower half.
+ * Currently only used on SMP.
+ *
+ * Since SMP kernels won't run on the PPC601 CPU (which doesn't have
+ * the timebase register) anyway, we don't bother checking the CPU version.
+ */
+
+extern cycles_t cacheflush_time;
+
+static inline cycles_t get_cycles(void)
+{
+#ifdef __SMP__
+	cycles_t ret;
+
+	__asm__("mftb %0" : "=r" (ret) : );
+	return ret;
+#else
+	return 0;
+#endif
+}
+
 #endif