diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 1997-04-29 21:13:14 +0000 |
|---|---|---|
| committer | <ralf@linux-mips.org> | 1997-04-29 21:13:14 +0000 |
| commit | 19c9bba94152148523ba0f7ef7cffe3d45656b11 (patch) | |
| tree | 40b1cb534496a7f1ca0f5c314a523c69f1fee464 /include/asm-sparc/psr.h | |
| parent | 7206675c40394c78a90e74812bbdbf8cf3cca1be (diff) | |
Import of Linux/MIPS 2.1.36
Diffstat (limited to 'include/asm-sparc/psr.h')
| -rw-r--r-- | include/asm-sparc/psr.h | 34 |
1 files changed, 24 insertions, 10 deletions
diff --git a/include/asm-sparc/psr.h b/include/asm-sparc/psr.h index 829ca47b6..bbec3d969 100644 --- a/include/asm-sparc/psr.h +++ b/include/asm-sparc/psr.h @@ -1,4 +1,4 @@ -/* $Id: psr.h,v 1.12 1996/09/30 02:23:19 davem Exp $ +/* $Id: psr.h,v 1.14 1997/04/11 00:42:19 davem Exp $ * psr.h: This file holds the macros for masking off various parts of * the processor status register on the Sparc. This is valid * for Version 8. On the V9 this is renamed to the PSTATE @@ -41,16 +41,28 @@ extern __inline__ unsigned int get_psr(void) { unsigned int psr; - __asm__ __volatile__("rd\t%%psr, %0" : - "=r" (psr)); + __asm__ __volatile__(" + rd %%psr, %0 + nop + nop + nop +" : "=r" (psr) + : /* no inputs */ + : "memory"); + return psr; } extern __inline__ void put_psr(unsigned int new_psr) { - __asm__ __volatile__("wr\t%0, 0x0, %%psr\n\t" - "nop; nop; nop;" : : - "r" (new_psr)); + __asm__ __volatile__(" + wr %0, 0x0, %%psr + nop + nop + nop +" : /* no outputs */ + : "r" (new_psr) + : "memory", "cc"); } /* Get the %fsr register. Be careful, make sure the floating point @@ -64,10 +76,12 @@ extern __inline__ unsigned int get_fsr(void) { unsigned int fsr = 0; - __asm__ __volatile__("st\t%%fsr, %1\n\t" - "ld\t%1, %0" : - "=r" (fsr) : - "m" (fsr_storage)); + __asm__ __volatile__(" + st %%fsr, %1 + ld %1, %0 +" : "=r" (fsr) + : "m" (fsr_storage)); + return fsr; } |