diff options
author | Ralf Baechle <ralf@linux-mips.org> | 1997-04-29 21:13:14 +0000 |
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committer | <ralf@linux-mips.org> | 1997-04-29 21:13:14 +0000 |
commit | 19c9bba94152148523ba0f7ef7cffe3d45656b11 (patch) | |
tree | 40b1cb534496a7f1ca0f5c314a523c69f1fee464 /include/asm-sparc64/irq.h | |
parent | 7206675c40394c78a90e74812bbdbf8cf3cca1be (diff) |
Import of Linux/MIPS 2.1.36
Diffstat (limited to 'include/asm-sparc64/irq.h')
-rw-r--r-- | include/asm-sparc64/irq.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h new file mode 100644 index 000000000..1a23abb72 --- /dev/null +++ b/include/asm-sparc64/irq.h @@ -0,0 +1,53 @@ +/* $Id: irq.h,v 1.4 1997/04/04 00:50:20 davem Exp $ + * irq.h: IRQ registers on the 64-bit Sparc. + * + * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _SPARC64_IRQ_H +#define _SPARC64_IRQ_H + +#include <linux/linkage.h> + +#include <asm/system.h> /* For NCPUS */ + +#define NR_IRQS 15 + +extern void disable_irq(unsigned int); +extern void enable_irq(unsigned int); +extern void init_timers(void (*lvl10_irq)(int, void *, struct pt_regs *)); + +#ifdef __SMP__ +extern void set_cpu_int(int, int); +extern void clear_cpu_int(int, int); +extern void set_irq_udt(int); +#endif + +extern int request_fast_irq(unsigned int irq, + void (*handler)(int, void *, struct pt_regs *), + unsigned long flags, __const__ char *devname); + +extern __inline__ void set_softint(unsigned long bits) +{ + __asm__ __volatile__("wr %0, 0x0, %%set_softint" + : /* No outputs */ + : "r" (bits)); +} + +extern __inline__ void clear_softint(unsigned long bits) +{ + __asm__ __volatile__("wr %0, 0x0, %%clear_softint" + : /* No outputs */ + : "r" (bits)); +} + +extern __inline__ unsigned long get_softint(void) +{ + unsigned long retval; + + __asm__ __volatile__("rd %%softint, %0" + : "=r" (retval)); + return retval; +} + +#endif |