Merge with Linux 2.3.99-pre4.

9 files changed, 190 insertions, 362 deletions

diff --git a/include/asm-sparc64/asm_offsets.h b/include/asm-sparc64/asm_offsets.h
index 3ed7dd760..8a5eb1246 100644
--- a/include/asm-sparc64/asm_offsets.h
+++ b/include/asm-sparc64/asm_offsets.h
@@ -266,33 +266,39 @@
 #define ASIZ_thread_w_saved	0x00000001
 #define AOFF_thread_fpdepth	0x0000000d
 #define ASIZ_thread_fpdepth	0x00000001
-#define AOFF_thread_fpsaved	0x0000000e
+#define AOFF_thread_fault_code	0x0000000e
+#define ASIZ_thread_fault_code	0x00000001
+#define AOFF_thread_use_blkcommit	0x0000000f
+#define ASIZ_thread_use_blkcommit	0x00000001
+#define AOFF_thread_fault_address	0x00000010
+#define ASIZ_thread_fault_address	0x00000008
+#define AOFF_thread_fpsaved	0x00000018
 #define ASIZ_thread_fpsaved	0x00000007
-#define AOFF_thread___pad1	0x00000015
-#define ASIZ_thread___pad1	0x00000003
-#define AOFF_thread_kregs	0x00000018
+#define AOFF_thread___pad2	0x0000001f
+#define ASIZ_thread___pad2	0x00000001
+#define AOFF_thread_kregs	0x00000020
 #define ASIZ_thread_kregs	0x00000008
-#define AOFF_thread_utraps	0x00000020
+#define AOFF_thread_utraps	0x00000028
 #define ASIZ_thread_utraps	0x00000008
-#define AOFF_thread_gsr	0x00000028
+#define AOFF_thread_gsr	0x00000030
 #define ASIZ_thread_gsr	0x00000007
-#define AOFF_thread___pad2	0x0000002f
-#define ASIZ_thread___pad2	0x00000001
-#define AOFF_thread_xfsr	0x00000030
+#define AOFF_thread___pad3	0x00000037
+#define ASIZ_thread___pad3	0x00000001
+#define AOFF_thread_xfsr	0x00000038
 #define ASIZ_thread_xfsr	0x00000038
-#define AOFF_thread_reg_window	0x00000068
+#define AOFF_thread_reg_window	0x00000070
 #define ASIZ_thread_reg_window	0x00000380
-#define AOFF_thread_rwbuf_stkptrs	0x000003e8
+#define AOFF_thread_rwbuf_stkptrs	0x000003f0
 #define ASIZ_thread_rwbuf_stkptrs	0x00000038
-#define AOFF_thread_user_cntd0	0x00000420
+#define AOFF_thread_user_cntd0	0x00000428
 #define ASIZ_thread_user_cntd0	0x00000008
-#define AOFF_thread_user_cntd1	0x00000428
+#define AOFF_thread_user_cntd1	0x00000430
 #define ASIZ_thread_user_cntd1	0x00000008
-#define AOFF_thread_kernel_cntd0	0x00000430
+#define AOFF_thread_kernel_cntd0	0x00000438
 #define ASIZ_thread_kernel_cntd0	0x00000008
-#define AOFF_thread_kernel_cntd1	0x00000438
+#define AOFF_thread_kernel_cntd1	0x00000440
 #define ASIZ_thread_kernel_cntd1	0x00000008
-#define AOFF_thread_pcr_reg	0x00000440
+#define AOFF_thread_pcr_reg	0x00000448
 #define ASIZ_thread_pcr_reg	0x00000008
 #define ASIZ_thread	0x00000450
 
@@ -554,33 +560,39 @@
 #define ASIZ_thread_w_saved	0x00000001
 #define AOFF_thread_fpdepth	0x0000000d
 #define ASIZ_thread_fpdepth	0x00000001
-#define AOFF_thread_fpsaved	0x0000000e
+#define AOFF_thread_fault_code	0x0000000e
+#define ASIZ_thread_fault_code	0x00000001
+#define AOFF_thread_use_blkcommit	0x0000000f
+#define ASIZ_thread_use_blkcommit	0x00000001
+#define AOFF_thread_fault_address	0x00000010
+#define ASIZ_thread_fault_address	0x00000008
+#define AOFF_thread_fpsaved	0x00000018
 #define ASIZ_thread_fpsaved	0x00000007
-#define AOFF_thread___pad1	0x00000015
-#define ASIZ_thread___pad1	0x00000003
-#define AOFF_thread_kregs	0x00000018
+#define AOFF_thread___pad2	0x0000001f
+#define ASIZ_thread___pad2	0x00000001
+#define AOFF_thread_kregs	0x00000020
 #define ASIZ_thread_kregs	0x00000008
-#define AOFF_thread_utraps	0x00000020
+#define AOFF_thread_utraps	0x00000028
 #define ASIZ_thread_utraps	0x00000008
-#define AOFF_thread_gsr	0x00000028
+#define AOFF_thread_gsr	0x00000030
 #define ASIZ_thread_gsr	0x00000007
-#define AOFF_thread___pad2	0x0000002f
-#define ASIZ_thread___pad2	0x00000001
-#define AOFF_thread_xfsr	0x00000030
+#define AOFF_thread___pad3	0x00000037
+#define ASIZ_thread___pad3	0x00000001
+#define AOFF_thread_xfsr	0x00000038
 #define ASIZ_thread_xfsr	0x00000038
-#define AOFF_thread_reg_window	0x00000068
+#define AOFF_thread_reg_window	0x00000070
 #define ASIZ_thread_reg_window	0x00000380
-#define AOFF_thread_rwbuf_stkptrs	0x000003e8
+#define AOFF_thread_rwbuf_stkptrs	0x000003f0
 #define ASIZ_thread_rwbuf_stkptrs	0x00000038
-#define AOFF_thread_user_cntd0	0x00000420
+#define AOFF_thread_user_cntd0	0x00000428
 #define ASIZ_thread_user_cntd0	0x00000008
-#define AOFF_thread_user_cntd1	0x00000428
+#define AOFF_thread_user_cntd1	0x00000430
 #define ASIZ_thread_user_cntd1	0x00000008
-#define AOFF_thread_kernel_cntd0	0x00000430
+#define AOFF_thread_kernel_cntd0	0x00000438
 #define ASIZ_thread_kernel_cntd0	0x00000008
-#define AOFF_thread_kernel_cntd1	0x00000438
+#define AOFF_thread_kernel_cntd1	0x00000440
 #define ASIZ_thread_kernel_cntd1	0x00000008
-#define AOFF_thread_pcr_reg	0x00000440
+#define AOFF_thread_pcr_reg	0x00000448
 #define ASIZ_thread_pcr_reg	0x00000008
 #define ASIZ_thread	0x00000450
 
@@ -840,33 +852,39 @@
 #define ASIZ_thread_w_saved	0x00000001
 #define AOFF_thread_fpdepth	0x0000000d
 #define ASIZ_thread_fpdepth	0x00000001
-#define AOFF_thread_fpsaved	0x0000000e
+#define AOFF_thread_fault_code	0x0000000e
+#define ASIZ_thread_fault_code	0x00000001
+#define AOFF_thread_use_blkcommit	0x0000000f
+#define ASIZ_thread_use_blkcommit	0x00000001
+#define AOFF_thread_fault_address	0x00000010
+#define ASIZ_thread_fault_address	0x00000008
+#define AOFF_thread_fpsaved	0x00000018
 #define ASIZ_thread_fpsaved	0x00000007
-#define AOFF_thread___pad1	0x00000015
-#define ASIZ_thread___pad1	0x00000003
-#define AOFF_thread_kregs	0x00000018
+#define AOFF_thread___pad2	0x0000001f
+#define ASIZ_thread___pad2	0x00000001
+#define AOFF_thread_kregs	0x00000020
 #define ASIZ_thread_kregs	0x00000008
-#define AOFF_thread_utraps	0x00000020
+#define AOFF_thread_utraps	0x00000028
 #define ASIZ_thread_utraps	0x00000008
-#define AOFF_thread_gsr	0x00000028
+#define AOFF_thread_gsr	0x00000030
 #define ASIZ_thread_gsr	0x00000007
-#define AOFF_thread___pad2	0x0000002f
-#define ASIZ_thread___pad2	0x00000001
-#define AOFF_thread_xfsr	0x00000030
+#define AOFF_thread___pad3	0x00000037
+#define ASIZ_thread___pad3	0x00000001
+#define AOFF_thread_xfsr	0x00000038
 #define ASIZ_thread_xfsr	0x00000038
-#define AOFF_thread_reg_window	0x00000068
+#define AOFF_thread_reg_window	0x00000070
 #define ASIZ_thread_reg_window	0x00000380
-#define AOFF_thread_rwbuf_stkptrs	0x000003e8
+#define AOFF_thread_rwbuf_stkptrs	0x000003f0
 #define ASIZ_thread_rwbuf_stkptrs	0x00000038
-#define AOFF_thread_user_cntd0	0x00000420
+#define AOFF_thread_user_cntd0	0x00000428
 #define ASIZ_thread_user_cntd0	0x00000008
-#define AOFF_thread_user_cntd1	0x00000428
+#define AOFF_thread_user_cntd1	0x00000430
 #define ASIZ_thread_user_cntd1	0x00000008
-#define AOFF_thread_kernel_cntd0	0x00000430
+#define AOFF_thread_kernel_cntd0	0x00000438
 #define ASIZ_thread_kernel_cntd0	0x00000008
-#define AOFF_thread_kernel_cntd1	0x00000438
+#define AOFF_thread_kernel_cntd1	0x00000440
 #define ASIZ_thread_kernel_cntd1	0x00000008
-#define AOFF_thread_pcr_reg	0x00000440
+#define AOFF_thread_pcr_reg	0x00000448
 #define ASIZ_thread_pcr_reg	0x00000008
 #define ASIZ_thread	0x00000450
 #endif /* SPIN_LOCK_DEBUG */
diff --git a/include/asm-sparc64/bitops.h b/include/asm-sparc64/bitops.h
index 6a6ec52b1..512d16410 100644
--- a/include/asm-sparc64/bitops.h
+++ b/include/asm-sparc64/bitops.h
@@ -1,4 +1,4 @@
-/* $Id: bitops.h,v 1.27 2000/02/09 03:28:33 davem Exp $
+/* $Id: bitops.h,v 1.28 2000/03/27 10:38:56 davem Exp $
  * bitops.h: Bit string operations on the V9.
  *
  * Copyright 1996, 1997 David S. Miller (davem@caip.rutgers.edu)
@@ -8,132 +8,17 @@
 #define _SPARC64_BITOPS_H
 
 #include <asm/byteorder.h>
-#include <asm/asi.h>         /* For the little endian spaces. */
 
-/* These can all be exported to userland, because the atomic
- * primitives used are not privileged.
- */
-
-/* Set bit 'nr' in 64-bit quantity at address 'addr' where bit '0'
- * is in the highest of the eight bytes and bit '63' is the high bit
- * within the first byte. Sparc is BIG-Endian. Unless noted otherwise
- * all bit-ops return 0 if bit was previously clear and != 0 otherwise.
- */
+extern long __test_and_set_bit(unsigned long nr, void *addr);
+extern long __test_and_clear_bit(unsigned long nr, void *addr);
+extern long __test_and_change_bit(unsigned long nr, void *addr);
 
-extern __inline__ int test_and_set_bit(unsigned long nr, void *addr)
-{
-	unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
-	unsigned long oldbit;
-
-	__asm__ __volatile__("
-1:	ldx		[%2], %%g7
-	andcc		%%g7, %1, %0
-	bne,pn		%%xcc, 2f
-	 xor		%%g7, %1, %%g5
-	casx 		[%2], %%g7, %%g5
-	cmp		%%g7, %%g5
-	bne,pn		%%xcc, 1b
-	 nop
-2:
-"	: "=&r" (oldbit)
-	: "HIr" (1UL << (nr & 63)), "r" (m)
-	: "g5", "g7", "cc", "memory");
-	return oldbit != 0;
-}
-
-extern __inline__ void set_bit(unsigned long nr, void *addr)
-{
-	unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
-
-	__asm__ __volatile__("
-1:	ldx		[%1], %%g7
-	andcc		%%g7, %0, %%g0
-	bne,pn		%%xcc, 2f
-	 xor		%%g7, %0, %%g5
-	casx 		[%1], %%g7, %%g5
-	cmp		%%g7, %%g5
-	bne,pn		%%xcc, 1b
-	 nop
-2:
-"	: /* no outputs */
-	: "HIr" (1UL << (nr & 63)), "r" (m)
-	: "g5", "g7", "cc", "memory");
-}
-
-extern __inline__ int test_and_clear_bit(unsigned long nr, void *addr)
-{
-	unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
-	unsigned long oldbit;
-
-	__asm__ __volatile__("
-1:	ldx		[%2], %%g7
-	andcc		%%g7, %1, %0
-	be,pn		%%xcc, 2f
-	 xor		%%g7, %1, %%g5
-	casx 		[%2], %%g7, %%g5
-	cmp		%%g7, %%g5
-	bne,pn		%%xcc, 1b
-	 nop
-2:
-"	: "=&r" (oldbit)
-	: "HIr" (1UL << (nr & 63)), "r" (m)
-	: "g5", "g7", "cc", "memory");
-	return oldbit != 0;
-}
-
-extern __inline__ void clear_bit(unsigned long nr, void *addr)
-{
-	unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
-
-	__asm__ __volatile__("
-1:	ldx		[%1], %%g7
-	andcc		%%g7, %0, %%g0
-	be,pn		%%xcc, 2f
-	 xor		%%g7, %0, %%g5
-	casx 		[%1], %%g7, %%g5
-	cmp		%%g7, %%g5
-	bne,pn		%%xcc, 1b
-	 nop
-2:
-"	: /* no outputs */
-	: "HIr" (1UL << (nr & 63)), "r" (m)
-	: "g5", "g7", "cc", "memory");
-}
-
-extern __inline__ int test_and_change_bit(unsigned long nr, void *addr)
-{
-	unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
-	unsigned long oldbit;
-
-	__asm__ __volatile__("
-1:	ldx		[%2], %%g7
-	and		%%g7, %1, %0
-	xor		%%g7, %1, %%g5
-	casx 		[%2], %%g7, %%g5
-	cmp		%%g7, %%g5
-	bne,pn		%%xcc, 1b
-	 nop
-"	: "=&r" (oldbit)
-	: "HIr" (1UL << (nr & 63)), "r" (m)
-	: "g5", "g7", "cc", "memory");
-	return oldbit != 0;
-}
-
-extern __inline__ void change_bit(unsigned long nr, void *addr)
-{
-	unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
-
-	__asm__ __volatile__("
-1:	ldx		[%1], %%g7
-	xor		%%g7, %0, %%g5
-	casx 		[%1], %%g7, %%g5
-	cmp		%%g7, %%g5
-	bne,pn		%%xcc, 1b
-	 nop
-"	: /* no outputs */
-	: "HIr" (1UL << (nr & 63)), "r" (m)
-	: "g5", "g7", "cc", "memory");
-}
+#define test_and_set_bit(nr,addr)	(__test_and_set_bit(nr,addr)!=0)
+#define test_and_clear_bit(nr,addr)	(__test_and_clear_bit(nr,addr)!=0)
+#define test_and_change_bit(nr,addr)	(__test_and_change_bit(nr,addr)!=0)
+#define set_bit(nr,addr)		((void)__test_and_set_bit(nr,addr))
+#define clear_bit(nr,addr)		((void)__test_and_clear_bit(nr,addr))
+#define change_bit(nr,addr)		((void)__test_and_change_bit(nr,addr))
 
 extern __inline__ int test_bit(int nr, __const__ void *addr)
 {
@@ -280,50 +165,13 @@ found_middle:
 #define find_first_zero_bit(addr, size) \
         find_next_zero_bit((addr), (size), 0)
 
-/* Now for the ext2 filesystem bit operations and helper routines.
- * Note the usage of the little endian ASI's, werd, V9 is supreme.
- */
-extern __inline__ int set_le_bit(int nr,void * addr)
-{
-	unsigned int * m = ((unsigned int *) addr) + (nr >> 5);
-	unsigned long oldbit;
-
-	__asm__ __volatile__("
-1:	lduwa		[%2] %3, %%g7
-	andcc		%%g7, %1, %0
-	bne,pn		%%icc, 2f
-	 xor		%%g7, %1, %%g5
-	casa 		[%2] %3, %%g7, %%g5
-	cmp		%%g7, %%g5
-	bne,pn		%%icc, 1b
-	 nop
-2:
-"	: "=&r" (oldbit)
-	: "HIr" (1UL << (nr & 31)), "r" (m), "i" (ASI_PL)
-	: "g5", "g7", "cc", "memory");
-	return oldbit != 0;
-}
-
-extern __inline__ int clear_le_bit(int nr, void * addr)
-{
-	unsigned int * m = ((unsigned int *) addr) + (nr >> 5);
-	unsigned long oldbit;
+extern long __test_and_set_le_bit(int nr, void *addr);
+extern long __test_and_clear_le_bit(int nr, void *addr);
 
-	__asm__ __volatile__("
-1:	lduwa		[%2] %3, %%g7
-	andcc		%%g7, %1, %0
-	be,pn		%%icc, 2f
-	 xor		%%g7, %1, %%g5
-	casa 		[%2] %3, %%g7, %%g5
-	cmp		%%g7, %%g5
-	bne,pn		%%icc, 1b
-	 nop
-2:
-"	: "=&r" (oldbit)
-	: "HIr" (1UL << (nr & 31)), "r" (m), "i" (ASI_PL)
-	: "g5", "g7", "cc", "memory");
-	return oldbit != 0;
-}
+#define test_and_set_le_bit(nr,addr)	(__test_and_set_le_bit(nr,addr)!=0)
+#define test_and_clear_le_bit(nr,addr)	(__test_and_clear_le_bit(nr,addr)!=0)
+#define set_le_bit(nr,addr)		((void)__test_and_set_le_bit(nr,addr))
+#define clear_le_bit(nr,addr)		((void)__test_and_clear_le_bit(nr,addr))
 
 extern __inline__ int test_le_bit(int nr, __const__ void * addr)
 {
@@ -375,8 +223,8 @@ found_middle:
 
 #ifdef __KERNEL__
 
-#define ext2_set_bit			set_le_bit
-#define ext2_clear_bit			clear_le_bit
+#define ext2_set_bit			test_and_set_le_bit
+#define ext2_clear_bit			test_and_clear_le_bit
 #define ext2_test_bit  			test_le_bit
 #define ext2_find_first_zero_bit	find_first_zero_le_bit
 #define ext2_find_next_zero_bit		find_next_zero_le_bit
diff --git a/include/asm-sparc64/io.h b/include/asm-sparc64/io.h
index f8bdaa826..2ca3b4693 100644
--- a/include/asm-sparc64/io.h
+++ b/include/asm-sparc64/io.h
@@ -1,4 +1,4 @@
-/* $Id: io.h,v 1.33 2000/02/25 05:47:38 davem Exp $ */
+/* $Id: io.h,v 1.34 2000/03/30 01:40:54 davem Exp $ */
 #ifndef __SPARC64_IO_H
 #define __SPARC64_IO_H
 
@@ -156,6 +156,68 @@ extern __inline__ void _writel(unsigned int l, unsigned long addr)
 #define writew(__w, __addr)	(_writew((__w), (unsigned long)(__addr)))
 #define writel(__l, __addr)	(_writel((__l), (unsigned long)(__addr)))
 
+/* Now versions without byte-swapping. */
+extern __inline__ unsigned int _raw_readb(unsigned long addr)
+{
+	unsigned int ret;
+
+	__asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */"
+			     : "=r" (ret)
+			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+	return ret;
+}
+
+extern __inline__ unsigned int _raw_readw(unsigned long addr)
+{
+	unsigned int ret;
+
+	__asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */"
+			     : "=r" (ret)
+			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+	return ret;
+}
+
+extern __inline__ unsigned int _raw_readl(unsigned long addr)
+{
+	unsigned int ret;
+
+	__asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */"
+			     : "=r" (ret)
+			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+	return ret;
+}
+
+extern __inline__ void _raw_writeb(unsigned char b, unsigned long addr)
+{
+	__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
+			     : /* no outputs */
+			     : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+extern __inline__ void _raw_writew(unsigned short w, unsigned long addr)
+{
+	__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
+			     : /* no outputs */
+			     : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+extern __inline__ void _raw_writel(unsigned int l, unsigned long addr)
+{
+	__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
+			     : /* no outputs */
+			     : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+#define __raw_readb(__addr)		(_raw_readb((unsigned long)(__addr)))
+#define __raw_readw(__addr)		(_raw_readw((unsigned long)(__addr)))
+#define __raw_readl(__addr)		(_raw_readl((unsigned long)(__addr)))
+#define __raw_writeb(__b, __addr)	(_raw_writeb((__b), (unsigned long)(__addr)))
+#define __raw_writew(__w, __addr)	(_raw_writew((__w), (unsigned long)(__addr)))
+#define __raw_writel(__l, __addr)	(_raw_writel((__l), (unsigned long)(__addr)))
+
 /* Valid I/O Space regions are anywhere, because each PCI bus supported
  * can live in an arbitrary area of the physical address range.
  */
diff --git a/include/asm-sparc64/namei.h b/include/asm-sparc64/namei.h
index d3d57545c..7f6dd9495 100644
--- a/include/asm-sparc64/namei.h
+++ b/include/asm-sparc64/namei.h
@@ -11,53 +11,16 @@
 #define SPARC_BSD_EMUL "usr/gnemul/sunos/"
 #define SPARC_SOL_EMUL "usr/gnemul/solaris/"
 
-static inline struct dentry *
-__sparc64_lookup_dentry(const char *name, int lookup_flags)
+static inline char * __emul_prefix(void)
 {
-	struct dentry *base;
-	char *emul;
-
 	switch (current->personality) {
 	case PER_BSD:
-		emul = SPARC_BSD_EMUL; break;
+		return SPARC_BSD_EMUL;
 	case PER_SVR4:
-		emul = SPARC_SOL_EMUL; break;
+		return SPARC_SOL_EMUL;
 	default:
 		return NULL;
 	}
-
-	base = lookup_dentry (emul, 
-			      dget (current->fs->root), 
-			      (LOOKUP_FOLLOW | LOOKUP_DIRECTORY));
-			
-	if (IS_ERR (base)) return NULL;
-	
-	base = lookup_dentry (name, base, lookup_flags);
-	
-	if (IS_ERR (base)) return NULL;
-	
-	if (!base->d_inode) {
-		struct dentry *fromroot;
-		
-		fromroot = lookup_dentry (name, dget (current->fs->root), lookup_flags);
-		
-		if (IS_ERR (fromroot)) return base;
-		
-		if (fromroot->d_inode) {
-			dput(base);
-			return fromroot;
-		}
-		
-		dput(fromroot);
-	}
-	
-	return base;
 }
 
-#define __prefix_lookup_dentry(name, lookup_flags)				\
-	if (current->personality) {						\
-		dentry = __sparc64_lookup_dentry (name, lookup_flags);		\
-		if (dentry) return dentry;					\
-	}
-
 #endif /* __SPARC64_NAMEI_H */
diff --git a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h
index d1141d105..c17e9bf23 100644
--- a/include/asm-sparc64/pbm.h
+++ b/include/asm-sparc64/pbm.h
@@ -1,4 +1,4 @@
-/* $Id: pbm.h,v 1.21 2000/03/10 02:42:17 davem Exp $
+/* $Id: pbm.h,v 1.22 2000/03/25 05:18:30 davem Exp $
  * pbm.h: UltraSparc PCI controller software state.
  *
  * Copyright (C) 1997, 1998, 1999 David S. Miller (davem@redhat.com)
@@ -143,6 +143,10 @@ struct pci_pbm_info {
 	struct resource			io_space;
 	struct resource			mem_space;
 
+	/* State of 66MHz capabilities on this PBM. */
+	int				is_66mhz_capable;
+	int				all_devs_66mhz;
+
 	/* This PBM's streaming buffer. */
 	struct pci_strbuf		stc;
 
diff --git a/include/asm-sparc64/pgalloc.h b/include/asm-sparc64/pgalloc.h
index fe4d9e1fa..697dc6fbc 100644
--- a/include/asm-sparc64/pgalloc.h
+++ b/include/asm-sparc64/pgalloc.h
@@ -70,27 +70,11 @@ extern void smp_flush_tlb_page(struct mm_struct *mm, unsigned long page);
 
 #define flush_cache_all()	smp_flush_cache_all()
 #define flush_tlb_all()		smp_flush_tlb_all()
-
-extern __inline__ void flush_tlb_mm(struct mm_struct *mm)
-{
-	if (CTX_VALID(mm->context))
-		smp_flush_tlb_mm(mm);
-}
-
-extern __inline__ void flush_tlb_range(struct mm_struct *mm, unsigned long start,
-				       unsigned long end)
-{
-	if (CTX_VALID(mm->context))
-		smp_flush_tlb_range(mm, start, end);
-}
-
-extern __inline__ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
-{
-	struct mm_struct *mm = vma->vm_mm;
-
-	if (CTX_VALID(mm->context))
-		smp_flush_tlb_page(mm, page);
-}
+#define flush_tlb_mm(mm)	smp_flush_tlb_mm(mm)
+#define flush_tlb_range(mm, start, end) \
+	smp_flush_tlb_range(mm, start, end)
+#define flush_tlb_page(vma, page) \
+	smp_flush_tlb_page((vma)->vm_mm, page)
 
 #endif /* ! __SMP__ */
 
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index 056b60f6a..0d49e700e 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -1,4 +1,4 @@
-/* $Id: pgtable.h,v 1.121 2000/03/02 20:37:41 davem Exp $
+/* $Id: pgtable.h,v 1.124 2000/03/27 10:38:56 davem Exp $
  * pgtable.h: SpitFire page table operations.
  *
  * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
@@ -214,26 +214,9 @@ extern inline pte_t pte_modify(pte_t orig_pte, pgprot_t new_prot)
 #define pte_page(x) (mem_map+pte_pagenr(x))
 
 /* Be very careful when you change these three, they are delicate. */
-static __inline__ pte_t pte_mkyoung(pte_t _pte)
-{	if(pte_val(_pte) & _PAGE_READ)
-		return __pte(pte_val(_pte)|(_PAGE_ACCESSED|_PAGE_R));
-	else
-		return __pte(pte_val(_pte)|(_PAGE_ACCESSED));
-}
-
-static __inline__ pte_t pte_mkwrite(pte_t _pte)
-{	if(pte_val(_pte) & _PAGE_MODIFIED)
-		return __pte(pte_val(_pte)|(_PAGE_WRITE|_PAGE_W));
-	else
-		return __pte(pte_val(_pte)|(_PAGE_WRITE));
-}
-
-static __inline__ pte_t pte_mkdirty(pte_t _pte)
-{	if(pte_val(_pte) & _PAGE_WRITE)
-		return __pte(pte_val(_pte)|(_PAGE_MODIFIED|_PAGE_W));
-	else
-		return __pte(pte_val(_pte)|(_PAGE_MODIFIED));
-}
+#define pte_mkyoung(pte)	(__pte(pte_val(pte) | _PAGE_ACCESSED | _PAGE_R))
+#define pte_mkwrite(pte)	(__pte(pte_val(pte) | _PAGE_WRITE))
+#define pte_mkdirty(pte)	(__pte(pte_val(pte) | _PAGE_MODIFIED | _PAGE_W))
 
 /* to find an entry in a page-table-directory. */
 #define pgd_index(address)	(((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD))
@@ -256,41 +239,7 @@ extern pgd_t swapper_pg_dir[1];
 #define mmu_lockarea(vaddr, len)		(vaddr)
 #define mmu_unlockarea(vaddr, len)		do { } while(0)
 
-/* There used to be some funny code here which tried to guess which
- * TLB wanted the mapping, that wasn't accurate enough to justify it's
- * existance.  The real way to do that is to have each TLB miss handler
- * pass in a distinct code to do_sparc64_fault() and do it more accurately
- * there.
- *
- * What we do need to handle here is prevent I-cache corruption.  The
- * deal is that the I-cache snoops stores from other CPUs and all DMA
- * activity, however stores from the local processor are not snooped.
- * The dynamic linker and our signal handler mechanism take care of
- * the cases where they write into instruction space, but when a page
- * is copied in the kernel and then executed in user-space is not handled
- * right.  This leads to corruptions if things are "just right", consider
- * the following scenerio:
- * 1) Process 1 frees up a page that was used for the PLT of libc in
- *    it's address space.
- * 2) Process 2 writes into a page in the PLT of libc for the first
- *    time.  do_wp_page() copies the page locally, the local I-cache of
- *    the processor does not notice the writes during the page copy.
- *    The new page used just so happens to be the one just freed in #1.
- * 3) After the PLT write, later the cpu calls into an unresolved PLT
- *    entry, the CPU executes old instructions from process 1's PLT
- *    table.
- * 4) Splat.
- */
-extern void __flush_icache_page(unsigned long phys_page);
-#define update_mmu_cache(__vma, __address, _pte) \
-do { \
-	unsigned short __flags = ((__vma)->vm_flags); \
-	if ((__flags & VM_EXEC) != 0 && \
-	    ((pte_val(_pte) & (_PAGE_PRESENT | _PAGE_WRITE | _PAGE_MODIFIED)) == \
-	     (_PAGE_PRESENT | _PAGE_WRITE | _PAGE_MODIFIED))) { \
-		__flush_icache_page(pte_pagenr(_pte) << PAGE_SHIFT); \
-	} \
-} while(0)
+extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte);
 
 #define flush_icache_page(vma, pg)	do { } while(0)
 
diff --git a/include/asm-sparc64/processor.h b/include/asm-sparc64/processor.h
index 158fbbf39..7237736fe 100644
--- a/include/asm-sparc64/processor.h
+++ b/include/asm-sparc64/processor.h
@@ -1,4 +1,4 @@
-/* $Id: processor.h,v 1.61 2000/01/21 11:39:22 jj Exp $
+/* $Id: processor.h,v 1.63 2000/03/27 10:38:57 davem Exp $
  * include/asm-sparc64/processor.h
  *
  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
@@ -51,15 +51,16 @@ struct thread_struct {
 	unsigned long ksp __attribute__ ((aligned(16)));
 	unsigned char wstate, cwp, flags;
 	mm_segment_t current_ds;
-	unsigned char w_saved, fpdepth;
+	unsigned char w_saved, fpdepth, fault_code, use_blkcommit;
+	unsigned long fault_address;
 	unsigned char fpsaved[7];
-	unsigned char __pad1[3];
-	struct pt_regs *kregs;
+	unsigned char __pad2;
 	
 	/* D$ line 2, 3, 4 */
+	struct pt_regs *kregs;
 	unsigned long *utraps;
 	unsigned char gsr[7];
-	unsigned char __pad2;
+	unsigned char __pad3;
 	unsigned long xfsr[7];
 
 	struct reg_window reg_window[NSWINS];
@@ -73,11 +74,16 @@ struct thread_struct {
 
 #endif /* !(__ASSEMBLY__) */
 
-#define SPARC_FLAG_UNALIGNED    0x01    /* is allowed to do unaligned accesses */
-#define SPARC_FLAG_NEWSIGNALS   0x02    /* task wants new-style signals */
-#define SPARC_FLAG_32BIT        0x04    /* task is older 32-bit binary */
-#define SPARC_FLAG_NEWCHILD     0x08    /* task is just-spawned child process */
-#define SPARC_FLAG_PERFCTR	0x10    /* task has performance counters active */
+#define SPARC_FLAG_UNALIGNED    0x01    /* is allowed to do unaligned accesses	*/
+#define SPARC_FLAG_NEWSIGNALS   0x02    /* task wants new-style signals		*/
+#define SPARC_FLAG_32BIT        0x04    /* task is older 32-bit binary		*/
+#define SPARC_FLAG_NEWCHILD     0x08    /* task is just-spawned child process	*/
+#define SPARC_FLAG_PERFCTR	0x10    /* task has performance counters active	*/
+
+#define FAULT_CODE_WRITE	0x01	/* Write access, implies D-TLB		*/
+#define FAULT_CODE_DTLB		0x02	/* Miss happened in D-TLB		*/
+#define FAULT_CODE_ITLB		0x04	/* Miss happened in I-TLB		*/
+#define FAULT_CODE_WINFIXUP	0x08	/* Miss happened during spill/fill	*/
 
 #define INIT_MMAP { &init_mm, 0xfffff80000000000, 0xfffff80001000000, \
 		    NULL, PAGE_SHARED , VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
@@ -85,10 +91,12 @@ struct thread_struct {
 #define INIT_THREAD  {					\
 /* ksp, wstate, cwp, flags, current_ds, */ 		\
    0,   0,      0,   0,     KERNEL_DS,			\
-/* w_saved, fpdepth, fpsaved, pad1,  kregs, */		\
-   0,       0,       { 0 },   { 0 }, 0,			\
-/* utraps, gsr,   pad2, xfsr, */			\
-   0,	   { 0 }, 0,    { 0 },				\
+/* w_saved, fpdepth, fault_code, use_blkcommit, */	\
+   0,       0,       0,          0,			\
+/* fault_address, fpsaved, __pad2, kregs, */		\
+   0,             { 0 },   0,      0,			\
+/* utraps, gsr,   __pad3, xfsr, */			\
+   0,	   { 0 }, 0,      { 0 },			\
 /* reg_window */					\
    { { { 0, }, { 0, } }, }, 				\
 /* rwbuf_stkptrs */					\
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h
index 87379139b..1429e7772 100644
--- a/include/asm-sparc64/system.h
+++ b/include/asm-sparc64/system.h
@@ -1,4 +1,4 @@
-/* $Id: system.h,v 1.56 2000/03/06 22:33:45 davem Exp $ */
+/* $Id: system.h,v 1.57 2000/03/27 10:38:57 davem Exp $ */
 #ifndef __SPARC64_SYSTEM_H
 #define __SPARC64_SYSTEM_H
 
@@ -131,16 +131,8 @@ extern void __global_restore_flags(unsigned long flags);
 
 extern void synchronize_user_stack(void);
 
-extern __inline__ void flushw_user(void)
-{
-	__asm__ __volatile__("
-		rdpr		%%otherwin, %%g1
-		brz,pt		%%g1, 1f
-		 mov		%%o7, %%g3
-		call		__flushw_user
-		 clr		%%g2
-1:"	: : : "g1", "g2", "g3");
-}
+extern void __flushw_user(void);
+#define flushw_user() __flushw_user()
 
 #define flush_user_windows flushw_user
 #define flush_register_windows flushw_all