Merge with 2.4.0-test1-ac21 + pile of MIPS cleanups to make merging

possible.  Chainsawed RM200 kernel to compile again.  Jazz machine
status unknown.

5 files changed, 35 insertions, 6 deletions

diff --git a/include/asm-sparc64/ide.h b/include/asm-sparc64/ide.h
index 71bfa67ca..4f621f2cb 100644
--- a/include/asm-sparc64/ide.h
+++ b/include/asm-sparc64/ide.h
@@ -1,4 +1,4 @@
-/* $Id: ide.h,v 1.18 2000/05/22 07:29:43 davem Exp $
+/* $Id: ide.h,v 1.19 2000/05/27 00:49:37 davem Exp $
  * ide.h: Ultra/PCI specific IDE glue.
  *
  * Copyright (C) 1997  David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc64/mc146818rtc.h b/include/asm-sparc64/mc146818rtc.h
new file mode 100644
index 000000000..05c8ffd97
--- /dev/null
+++ b/include/asm-sparc64/mc146818rtc.h
@@ -0,0 +1,27 @@
+/*
+ * Machine dependent access functions for RTC registers.
+ */
+#ifndef __ASM_SPARC64_MC146818RTC_H
+#define __ASM_SPARC64_MC146818RTC_H
+
+#include <asm/io.h>
+
+#ifndef RTC_PORT
+#define RTC_PORT(x)	(0x70 + (x))
+#define RTC_ALWAYS_BCD	1	/* RTC operates in binary mode */
+#endif
+
+/*
+ * The yet supported machines all access the RTC index register via
+ * an ISA port access but the way to access the date register differs ...
+ */
+#define CMOS_READ(addr) ({ \
+outb_p((addr),RTC_PORT(0)); \
+inb_p(RTC_PORT(1)); \
+})
+#define CMOS_WRITE(val, addr) ({ \
+outb_p((addr),RTC_PORT(0)); \
+outb_p((val),RTC_PORT(1)); \
+})
+
+#endif /* __ASM_SPARC64_MC146818RTC_H */
diff --git a/include/asm-sparc64/socket.h b/include/asm-sparc64/socket.h
index f88030301..387ee1774 100644
--- a/include/asm-sparc64/socket.h
+++ b/include/asm-sparc64/socket.h
@@ -1,4 +1,4 @@
-/* $Id: socket.h,v 1.6 2000/02/27 19:47:58 davem Exp $ */
+/* $Id: socket.h,v 1.7 2000/06/09 07:35:28 davem Exp $ */
 #ifndef _ASM_SOCKET_H
 #define _ASM_SOCKET_H
 
diff --git a/include/asm-sparc64/string.h b/include/asm-sparc64/string.h
index 31bbf32e7..4f1d49d2a 100644
--- a/include/asm-sparc64/string.h
+++ b/include/asm-sparc64/string.h
@@ -111,7 +111,7 @@ static inline void *__constant_memset(void *s, int c, __kernel_size_t count)
 
 extern __kernel_size_t __strlen(const char *);
 
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#if (__GNUC__ > 2) || (__GNUC__ == 2 && __GNUC_MINOR__ >= 91)
 extern __kernel_size_t strlen(const char *);
 #else /* !EGCS */
 /* Ugly but it works around a bug in our original sparc64-linux-gcc.  */
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h
index 00303c239..257bca48d 100644
--- a/include/asm-sparc64/system.h
+++ b/include/asm-sparc64/system.h
@@ -1,4 +1,4 @@
-/* $Id: system.h,v 1.59 2000/05/09 17:40:15 davem Exp $ */
+/* $Id: system.h,v 1.60 2000/05/29 05:34:02 davem Exp $ */
 #ifndef __SPARC64_SYSTEM_H
 #define __SPARC64_SYSTEM_H
 
@@ -269,7 +269,8 @@ extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noret
 extern __inline__ unsigned long
 __cmpxchg_u32(volatile int *m, int old, int new)
 {
-	__asm__ __volatile__("cas [%2], %3, %0"
+	__asm__ __volatile__("cas [%2], %3, %0\n\t"
+			     "membar #StoreStore | #StoreLoad"
 			     : "=&r" (new)
 			     : "0" (new), "r" (m), "r" (old)
 			     : "memory");
@@ -280,7 +281,8 @@ __cmpxchg_u32(volatile int *m, int old, int new)
 extern __inline__ unsigned long
 __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
 {
-	__asm__ __volatile__("casx [%2], %3, %0"
+	__asm__ __volatile__("casx [%2], %3, %0\n\t"
+			     "membar #StoreStore | #StoreLoad"
 			     : "=&r" (new)
 			     : "0" (new), "r" (m), "r" (old)
 			     : "memory");