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authorKanoj Sarcar <kanoj@engr.sgi.com>2001-02-16 03:26:34 +0000
committerKanoj Sarcar <kanoj@engr.sgi.com>2001-02-16 03:26:34 +0000
commit32d720e84fb594066b2c3b0e8727a5341e03ebea (patch)
tree855707555dbb1d835eedfefda2602171c6147317 /include
parente25ac8bd2505cccb57f4af28acf1fa9a2e024e52 (diff)
Add in support to specify the proper L2 cache line size to eliminate false
sharing.
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips64/cache.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/include/asm-mips64/cache.h b/include/asm-mips64/cache.h
index c05688a72..9c50dff97 100644
--- a/include/asm-mips64/cache.h
+++ b/include/asm-mips64/cache.h
@@ -10,8 +10,9 @@
#ifndef _ASM_CACHE_H
#define _ASM_CACHE_H
+#include <linux/config.h>
+
/* bytes per L1 cache line */
-#define L1_CACHE_BYTES 32 /* A guess */
-#define SMP_CACHE_BYTES L1_CACHE_BYTES
+#define L1_CACHE_BYTES (1 << CONFIG_L1_CACHE_SHIFT)
#endif /* _ASM_CACHE_H */