diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2001-03-09 20:33:35 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2001-03-09 20:33:35 +0000 |
| commit | 116674acc97ba75a720329996877077d988443a2 (patch) | |
| tree | 6a3f2ff0b612ae2ee8a3f3509370c9e6333a53b3 /include | |
| parent | 71118c319fcae4a138f16e35b4f7e0a6d53ce2ca (diff) | |
Merge with Linux 2.4.2.
Diffstat (limited to 'include')
352 files changed, 28619 insertions, 2259 deletions
diff --git a/include/asm-alpha/errno.h b/include/asm-alpha/errno.h index fd5b8fafc..724f03b77 100644 --- a/include/asm-alpha/errno.h +++ b/include/asm-alpha/errno.h @@ -139,6 +139,4 @@ #define ENOMEDIUM 129 /* No medium found */ #define EMEDIUMTYPE 130 /* Wrong medium type */ -#define EHASHCOLLISION 131 /* Number of hash collisons exceeds maximum generation counter value. */ - #endif diff --git a/include/asm-alpha/io.h b/include/asm-alpha/io.h index 35a9dafc3..ddbdedfa2 100644 --- a/include/asm-alpha/io.h +++ b/include/asm-alpha/io.h @@ -440,6 +440,22 @@ out: return retval; } + +/* + * ISA space is mapped to some machine-specific location on Alpha. + * Call into the existing hooks to get the address translated. + */ +#define isa_readb(a) readb(__ioremap(a)) +#define isa_readw(a) readw(__ioremap(a)) +#define isa_readl(a) readl(__ioremap(a)) +#define isa_writeb(b,a) writeb((b),__ioremap(a)) +#define isa_writew(w,a) writew((w),__ioremap(a)) +#define isa_writel(l,a) writel((l),__ioremap(a)) +#define isa_memset_io(a,b,c) memset_io(__ioremap(a),(b),(c)) +#define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ioremap(b),(c)) +#define isa_memcpy_toio(a,b,c) memcpy_toio(__ioremap(a),(b),(c)) + + /* * The Alpha Jensen hardware for some rather strange reason puts * the RTC clock at 0x170 instead of 0x70. Probably due to some diff --git a/include/asm-alpha/page.h b/include/asm-alpha/page.h index 41afdcbd8..fbae9324f 100644 --- a/include/asm-alpha/page.h +++ b/include/asm-alpha/page.h @@ -12,64 +12,10 @@ #define STRICT_MM_TYPECHECKS -/* - * A _lot_ of the kernel time is spent clearing pages, so - * do this as fast as we possibly can. Also, doing this - * as a separate inline function (rather than memset()) - * results in clearer kernel profiles as we see _who_ is - * doing page clearing or copying. - */ -static inline void clear_page(void * page) -{ - unsigned long count = PAGE_SIZE/64; - unsigned long *ptr = (unsigned long *)page; - - do { - ptr[0] = 0; - ptr[1] = 0; - ptr[2] = 0; - ptr[3] = 0; - count--; - ptr[4] = 0; - ptr[5] = 0; - ptr[6] = 0; - ptr[7] = 0; - ptr += 8; - } while (count); -} - +extern void clear_page(void *page); #define clear_user_page(page, vaddr) clear_page(page) -static inline void copy_page(void * _to, void * _from) -{ - unsigned long count = PAGE_SIZE/64; - unsigned long *to = (unsigned long *)_to; - unsigned long *from = (unsigned long *)_from; - - do { - unsigned long a,b,c,d,e,f,g,h; - a = from[0]; - b = from[1]; - c = from[2]; - d = from[3]; - e = from[4]; - f = from[5]; - g = from[6]; - h = from[7]; - count--; - from += 8; - to[0] = a; - to[1] = b; - to[2] = c; - to[3] = d; - to[4] = e; - to[5] = f; - to[6] = g; - to[7] = h; - to += 8; - } while (count); -} - +extern void copy_page(void * _to, void * _from); #define copy_user_page(to, from, vaddr) copy_page(to, from) #ifdef STRICT_MM_TYPECHECKS diff --git a/include/asm-alpha/socket.h b/include/asm-alpha/socket.h index 637889c3f..b87863c34 100644 --- a/include/asm-alpha/socket.h +++ b/include/asm-alpha/socket.h @@ -29,6 +29,7 @@ #define SO_SNDLOWAT 0x1011 #define SO_RCVTIMEO 0x1012 #define SO_SNDTIMEO 0x1013 +#define SO_ACCEPTCONN 0x1014 /* linux-specific, might as well be the same as on i386 */ #define SO_NO_CHECK 11 diff --git a/include/asm-alpha/termios.h b/include/asm-alpha/termios.h index 670576b84..374793646 100644 --- a/include/asm-alpha/termios.h +++ b/include/asm-alpha/termios.h @@ -78,7 +78,7 @@ struct termio { #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IrDa - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IrDa - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ #define N_SYNC_PPP 14 diff --git a/include/asm-arm/arch-arc/io.h b/include/asm-arm/arch-arc/io.h index 22a30f583..dd80763d9 100644 --- a/include/asm-arm/arch-arc/io.h +++ b/include/asm-arm/arch-arc/io.h @@ -16,6 +16,49 @@ #define IO_SPACE_LIMIT 0xffffffff /* + * GCC is totally crap at loading/storing data. We try to persuade it + * to do the right thing by using these whereever possible instead of + * the above. + */ +#define __arch_base_getb(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_getl(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_putb(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "strb %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +#define __arch_base_putl(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "str %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +/* * We use two different types of addressing - PC style addresses, and ARM * addresses. PC style accesses the PC hardware with the normal PC IO * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ @@ -75,7 +118,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ "tst %2, #0x80000000\n\t" \ "mov %0, %4\n\t" \ "addeq %0, %0, %3\n\t" \ - "ldr" ##instr## " %1, [%0, %2, lsl #2] @ in"###fnsuffix \ + "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \ : "=&r" (temp), "=r" (value) \ : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ : "cc"); \ @@ -203,22 +246,7 @@ DECLARE_IO(int,l,"") #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) #define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) - -/* - * Translated address IO functions - * - * IO address has already been translated to a virtual address - */ -#define outb_t(v,p) \ - (*(volatile unsigned char *)(p) = (v)) - -#define inb_t(p) \ - (*(volatile unsigned char *)(p)) - -#define outl_t(v,p) \ - (*(volatile unsigned long *)(p) = (v)) - -#define inl_t(p) \ - (*(volatile unsigned long *)(p)) +/* the following macro is depreciated */ +#define ioaddr(port) __ioaddr((port)) #endif diff --git a/include/asm-arm/arch-arc/irqs.h b/include/asm-arm/arch-arc/irqs.h index 2cb34d39f..5a15c794f 100644 --- a/include/asm-arm/arch-arc/irqs.h +++ b/include/asm-arm/arch-arc/irqs.h @@ -52,4 +52,9 @@ #define IRQ_TIMER IRQ_TIMER0 +/* + * This is the offset of the FIQ "IRQ" numbers + */ +#define FIQ_START 64 + #define irq_cannonicalize(i) (i) diff --git a/include/asm-arm/arch-cl7500/io.h b/include/asm-arm/arch-cl7500/io.h index 37f44316c..20f2275f5 100644 --- a/include/asm-arm/arch-cl7500/io.h +++ b/include/asm-arm/arch-cl7500/io.h @@ -13,6 +13,49 @@ #define IO_SPACE_LIMIT 0xffffffff /* + * GCC is totally crap at loading/storing data. We try to persuade it + * to do the right thing by using these whereever possible instead of + * the above. + */ +#define __arch_base_getb(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_getl(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_putb(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "strb %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +#define __arch_base_putl(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "str %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +/* * We use two different types of addressing - PC style addresses, and ARM * addresses. PC style accesses the PC hardware with the normal PC IO * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ @@ -72,7 +115,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ "tst %2, #0x80000000\n\t" \ "mov %0, %4\n\t" \ "addeq %0, %0, %3\n\t" \ - "ldr" ##instr## " %1, [%0, %2, lsl #2] @ in"###fnsuffix \ + "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \ : "=&r" (temp), "=r" (value) \ : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ : "cc"); \ @@ -193,22 +236,7 @@ DECLARE_IO(int,l,"") #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) #define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) - -/* - * Translated address IO functions - * - * IO address has already been translated to a virtual address - */ -#define outb_t(v,p) \ - (*(volatile unsigned char *)(p) = (v)) - -#define inb_t(p) \ - (*(volatile unsigned char *)(p)) - -#define outl_t(v,p) \ - (*(volatile unsigned long *)(p) = (v)) - -#define inl_t(p) \ - (*(volatile unsigned long *)(p)) +/* the following macro is depreciated */ +#define ioaddr(port) __ioaddr((port)) #endif diff --git a/include/asm-arm/arch-cl7500/irqs.h b/include/asm-arm/arch-cl7500/irqs.h index 22c9ab23a..bca7b35d5 100644 --- a/include/asm-arm/arch-cl7500/irqs.h +++ b/include/asm-arm/arch-cl7500/irqs.h @@ -56,4 +56,9 @@ #define FIQ_INT8 6 #define FIQ_FORCE 7 +/* + * This is the offset of the FIQ "IRQ" numbers + */ +#define FIQ_START 64 + #define IRQ_TIMER IRQ_TIMER0 diff --git a/include/asm-arm/arch-ebsa110/io.h b/include/asm-arm/arch-ebsa110/io.h index 73172dcd7..3e186be71 100644 --- a/include/asm-arm/arch-ebsa110/io.h +++ b/include/asm-arm/arch-ebsa110/io.h @@ -16,186 +16,11 @@ #define IO_SPACE_LIMIT 0xffffffff /* - * We use two different types of addressing - PC style addresses, and ARM - * addresses. PC style accesses the PC hardware with the normal PC IO - * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ - * and are translated to the start of IO. Note that all addresses are - * shifted left! + * Generic virtual read/write */ -#define __PORT_PCIO(x) (!((x) & 0x80000000)) +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) -/* - * Dynamic IO functions - let the compiler - * optimize the expressions - */ -#define DECLARE_DYN_OUT(fnsuffix,instr) \ -extern __inline__ void __out##fnsuffix (unsigned int value, unsigned int port) \ -{ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "tst %2, #0x80000000\n\t" \ - "mov %0, %4\n\t" \ - "addeq %0, %0, %3\n\t" \ - "str" ##instr## " %1, [%0, %2, lsl #2] @ out"###fnsuffix \ - : "=&r" (temp) \ - : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ - : "cc"); \ -} - -#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ -{ \ - unsigned long temp, value; \ - __asm__ __volatile__( \ - "tst %2, #0x80000000\n\t" \ - "mov %0, %4\n\t" \ - "addeq %0, %0, %3\n\t" \ - "ldr" ##instr## " %1, [%0, %2, lsl #2] @ in"###fnsuffix \ - : "=&r" (temp), "=r" (value) \ - : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ - : "cc"); \ - return (unsigned sz)value; \ -} - -extern __inline__ unsigned int __ioaddr (unsigned int port) \ -{ \ - if (__PORT_PCIO(port)) \ - return (unsigned int)(PCIO_BASE + (port << 2)); \ - else \ - return (unsigned int)(IO_BASE + (port << 2)); \ -} - -#define DECLARE_IO(sz,fnsuffix,instr) \ - DECLARE_DYN_OUT(fnsuffix,instr) \ - DECLARE_DYN_IN(sz,fnsuffix,instr) - -DECLARE_IO(char,b,"b") -DECLARE_IO(short,w,"") -DECLARE_IO(int,l,"") - -#undef DECLARE_IO -#undef DECLARE_DYN_OUT -#undef DECLARE_DYN_IN - -/* - * Constant address IO functions - * - * These have to be macros for the 'J' constraint to work - - * +/-4096 immediate operand. - */ -#define __outbc(value,port) \ -({ \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inbc(port) \ -({ \ - unsigned char result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result; \ -}) - -#define __outwc(value,port) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outwc" \ - : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outwc" \ - : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inwc(port) \ -({ \ - unsigned short result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result & 0xffff; \ -}) - -#define __outlc(v,p) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inlc(port) \ -({ \ - unsigned long result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result; \ -}) - -#define __ioaddrc(port) \ -({ \ - unsigned long addr; \ - if (__PORT_PCIO((port))) \ - addr = PCIO_BASE + ((port) << 2); \ - else \ - addr = IO_BASE + ((port) << 2); \ - addr; \ -}) - -#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) -#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) -#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) -#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) -#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) -#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) -#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) - -/* - * Translated address IO functions - * - * IO address has already been translated to a virtual address - */ -#define outb_t(v,p) \ - (*(volatile unsigned char *)(p) = (v)) - -#define inb_t(p) \ - (*(volatile unsigned char *)(p)) - -#define outl_t(v,p) \ - (*(volatile unsigned long *)(p) = (v)) - -#define inl_t(p) \ - (*(volatile unsigned long *)(p)) +#define __io(p) (ISAIO_BASE + ((p) << 2)) #endif diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h index 96d7e3354..e46fda443 100644 --- a/include/asm-arm/arch-ebsa110/memory.h +++ b/include/asm-arm/arch-ebsa110/memory.h @@ -23,6 +23,12 @@ #define TASK_SIZE_26 (0x04000000UL) /* + * This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) + +/* * Page offset: 3GB */ #define PAGE_OFFSET (0xc0000000UL) diff --git a/include/asm-arm/arch-ebsa110/processor.h b/include/asm-arm/arch-ebsa110/processor.h deleted file mode 100644 index 1c0561018..000000000 --- a/include/asm-arm/arch-ebsa110/processor.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa110/processor.h - * - * Copyright (C) 1996-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 21-Mar-1999 RMK Added asm/arch/memory.h - */ - -#ifndef __ASM_ARCH_PROCESSOR_H -#define __ASM_ARCH_PROCESSOR_H - -/* - * Bus types - */ -#define EISA_bus 0 -#define EISA_bus__is_a_macro /* for versions in ksyms.c */ -#define MCA_bus 0 -#define MCA_bus__is_a_macro /* for versions in ksyms.c */ - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) - -#endif diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h index e06ed893a..a65ec3fe6 100644 --- a/include/asm-arm/arch-ebsa285/io.h +++ b/include/asm-arm/arch-ebsa285/io.h @@ -19,7 +19,7 @@ /* * Translation of various region addresses to virtual addresses */ -#define __io_pci(a) (PCIO_BASE + (a)) +#define __io(a) (PCIO_BASE + (a)) #if 1 #define __mem_pci(a) ((unsigned long)(a)) #define __mem_isa(a) (PCIMEM_BASE + (unsigned long)(a)) @@ -42,41 +42,11 @@ extern __inline__ unsigned long ___mem_isa(unsigned long a) #define __mem_isa(a) ___mem_isa((unsigned long)(a)) #endif -/* the following macro is depreciated */ -#define __ioaddr(p) __io_pci(p) - /* * Generic virtual read/write */ -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getl(a) (*(volatile unsigned int *)(a)) - -extern __inline__ unsigned int __arch_getw(unsigned long a) -{ - unsigned int value; - __asm__ __volatile__("ldr%?h %0, [%1, #0] @ getw" - : "=&r" (value) - : "r" (a)); - return value; -} - - -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) - -extern __inline__ void __arch_putw(unsigned int value, unsigned long a) -{ - __asm__ __volatile__("str%?h %0, [%1, #0] @ putw" - : : "r" (value), "r" (a)); -} - -#define inb(p) __arch_getb(__io_pci(p)) -#define inw(p) __arch_getw(__io_pci(p)) -#define inl(p) __arch_getl(__io_pci(p)) - -#define outb(v,p) __arch_putb(v,__io_pci(p)) -#define outw(v,p) __arch_putw(v,__io_pci(p)) -#define outl(v,p) __arch_putl(v,__io_pci(p)) +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) #include <asm/hardware/dec21285.h> @@ -85,20 +55,9 @@ extern __inline__ void __arch_putw(unsigned int value, unsigned long a) * and convert a PCI memory address to a physical * address for the page tables. */ -#define valid_ioaddr(off,sz) ((off) < 0x80000000 && (off) + (sz) <= 0x80000000) -#define io_to_phys(off) ((off) + DC21285_PCI_MEM) +#define iomem_valid_addr(iomem,sz) \ + ((iomem) < 0x80000000 && (iomem) + (sz) <= 0x80000000) -/* - * ioremap takes a PCI memory address, as specified in - * linux/Documentation/IO-mapping.txt - */ -#define __arch_ioremap(off,size,nocache) \ -({ \ - unsigned long _off = (off), _size = (size); \ - void *_ret = (void *)0; \ - if (valid_ioaddr(_off, _size)) \ - _ret = __ioremap(io_to_phys(_off), _size, 0); \ - _ret; \ -}) +#define iomem_to_phys(iomem) ((iomem) + DC21285_PCI_MEM) #endif diff --git a/include/asm-arm/arch-nexuspci/io.h b/include/asm-arm/arch-nexuspci/io.h index 81033afa2..91de8ff9b 100644 --- a/include/asm-arm/arch-nexuspci/io.h +++ b/include/asm-arm/arch-nexuspci/io.h @@ -12,7 +12,7 @@ /* * Translation of various region addresses to virtual addresses */ -#define __io_pci(a) (PCIO_BASE + (a)) +#define __io(a) (PCIO_BASE + (a)) #if 1 #define __mem_pci(a) ((unsigned long)(a)) #define __mem_isa(a) (PCIMEM_BASE + (unsigned long)(a)) @@ -36,61 +36,19 @@ extern __inline__ unsigned long ___mem_isa(unsigned long a) #define __mem_isa(a) ___mem_isa((unsigned long)(a)) #endif -/* the following macro is depreciated */ -#define __ioaddr(p) __io_pci(p) - /* * Generic virtual read/write */ -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getl(a) (*(volatile unsigned int *)(a)) - -extern __inline__ unsigned int __arch_getw(unsigned long a) -{ - unsigned int value; - __asm__ __volatile__("ldr%?h %0, [%1, #0] @ getw" - : "=&r" (value) - : "r" (a)); - return value; -} - - -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) - -extern __inline__ void __arch_putw(unsigned int value, unsigned long a) -{ - __asm__ __volatile__("str%?h %0, [%1, #0] @ putw" - : : "r" (value), "r" (a)); -} - -#define inb(p) __arch_getb(__io_pci(p)) -#define inw(p) __arch_getw(__io_pci(p)) -#define inl(p) __arch_getl(__io_pci(p)) - -#define outb(v,p) __arch_putb(v,__io_pci(p)) -#define outw(v,p) __arch_putw(v,__io_pci(p)) -#define outl(v,p) __arch_putl(v,__io_pci(p)) +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) /* * ioremap support - validate a PCI memory address, * and convert a PCI memory address to a physical * address for the page tables. */ -#define valid_ioaddr(off,sz) ((off) < 0x80000000 && (off) + (sz) <= 0x80000000) -#define io_to_phys(off) ((off) + PLX_MEM_START) - -/* - * ioremap takes a PCI memory address, as specified in - * linux/Documentation/IO-mapping.txt - */ -#define __arch_ioremap(off,size,nocache) \ -({ \ - unsigned long _off = (off), _size = (size); \ - void *_ret = (void *)0; \ - if (valid_ioaddr(_off, _size)) \ - _ret = __ioremap(io_to_phys(_off), _size, 0); \ - _ret; \ -}) +#define iomem_valid_addr(iomem,sz) \ + ((iomem) < 0x80000000 && (iomem) + (sz) <= 0x80000000) +#define iomem_to_phys(iomem) ((iomem) + PLX_MEM_START) #endif diff --git a/include/asm-arm/arch-rpc/io.h b/include/asm-arm/arch-rpc/io.h index 81f201aae..86f124807 100644 --- a/include/asm-arm/arch-rpc/io.h +++ b/include/asm-arm/arch-rpc/io.h @@ -16,6 +16,49 @@ #define IO_SPACE_LIMIT 0xffffffff /* + * GCC is totally crap at loading/storing data. We try to persuade it + * to do the right thing by using these whereever possible instead of + * the above. + */ +#define __arch_base_getb(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_getl(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_putb(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "strb %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +#define __arch_base_putl(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "str %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +/* * We use two different types of addressing - PC style addresses, and ARM * addresses. PC style accesses the PC hardware with the normal PC IO * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ @@ -74,7 +117,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ "tst %2, #0x80000000\n\t" \ "mov %0, %4\n\t" \ "addeq %0, %0, %3\n\t" \ - "ldr" ##instr## " %1, [%0, %2, lsl #2] @ in"###fnsuffix \ + "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \ : "=&r" (temp), "=r" (value) \ : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ : "cc"); \ @@ -195,22 +238,7 @@ DECLARE_IO(int,l,"") #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) #define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) - -/* - * Translated address IO functions - * - * IO address has already been translated to a virtual address - */ -#define outb_t(v,p) \ - (*(volatile unsigned char *)(p) = (v)) - -#define inb_t(p) \ - (*(volatile unsigned char *)(p)) - -#define outl_t(v,p) \ - (*(volatile unsigned long *)(p) = (v)) - -#define inl_t(p) \ - (*(volatile unsigned long *)(p)) +/* the following macro is depreciated */ +#define ioaddr(port) __ioaddr((port)) #endif diff --git a/include/asm-arm/arch-rpc/irqs.h b/include/asm-arm/arch-rpc/irqs.h index 72ee47185..27c35b05b 100644 --- a/include/asm-arm/arch-rpc/irqs.h +++ b/include/asm-arm/arch-rpc/irqs.h @@ -37,5 +37,10 @@ #define FIQ_EXPANSIONCARD 6 #define FIQ_FORCE 7 +/* + * This is the offset of the FIQ "IRQ" numbers + */ +#define FIQ_START 64 + #define IRQ_TIMER IRQ_TIMER0 diff --git a/include/asm-arm/arch-sa1100/SA-1101.h b/include/asm-arm/arch-sa1100/SA-1101.h index 854a6d292..a2e194a67 100644 --- a/include/asm-arm/arch-sa1100/SA-1101.h +++ b/include/asm-arm/arch-sa1100/SA-1101.h @@ -230,7 +230,7 @@ * IEEE_Addr Forward transfer address register * IEEE_Status Port IO signal status register * IEEE_IntStatus Port interrupts status register - * IEEE_FifoLevels Rx and Tx FIFO interupt generation levels + * IEEE_FifoLevels Rx and Tx FIFO interrupt generation levels * IEEE_InitTime Forward timeout counter initial value * IEEE_TimerStatus Forward timeout counter current value * IEEE_FifoReset Reset forward transfer FIFO diff --git a/include/asm-arm/arch-sa1100/SA-1111.h b/include/asm-arm/arch-sa1100/SA-1111.h index 34c303261..00e85126d 100644 --- a/include/asm-arm/arch-sa1100/SA-1111.h +++ b/include/asm-arm/arch-sa1100/SA-1111.h @@ -11,6 +11,8 @@ #ifndef _ASM_ARCH_SA1111 #define _ASM_ARCH_SA1111 +#include <asm/arch/bitfield.h> + /* * Macro that calculates real address for registers in the SA-1111 */ @@ -18,7 +20,21 @@ #define _SA1111( x ) ((x) + SA1111_BASE) /* - * System Bus Interface (SBI) + * 26 bits of the SA-1110 address bus are available to the SA-1111. + * Use these when feeding target addresses to the DMA engines. + */ + +#define SA1111_ADDR_WIDTH (26) +#define SA1111_ADDR_MASK ((1<<SA1111_ADDR_WIDTH)-1) +#define SA1111_DMA_ADDR(x) ((x)&SA1111_ADDR_MASK) + +/* + * Don't ask the (SAC) DMA engines to move less than this amount. + */ + +#define SA1111_SAC_DMA_MIN_XFER (0x800) + +/* System Bus Interface (SBI) * * Registers * SKCR Control Register @@ -57,6 +73,7 @@ #define SMCR_DRAC_0 (1<<2) #define SMCR_DRAC_1 (1<<3) #define SMCR_DRAC_2 (1<<4) +#define SMCR_DRAC Fld(3, 2) #define SMCR_CLAT (1<<5) #define SKID_SIREV_MASK (0x000000f0) @@ -103,6 +120,186 @@ #endif /* LANGUAGE == C */ +#define SKPCR_UCLKEN (1<<0) +#define SKPCR_ACCLKEN (1<<1) +#define SKPCR_I2SCLKEN (1<<2) +#define SKPCR_L3CLKEN (1<<3) +#define SKPCR_SCLKEN (1<<4) +#define SKPCR_PMCLKEN (1<<5) +#define SKPCR_PTCLKEN (1<<6) +#define SKPCR_DCLKEN (1<<7) +#define SKPCR_PWMCLKEN (1<<8) + +/* + * Serial Audio Controller + * + * Registers + * SACR0 Serial Audio Common Control Register + * SACR1 Serial Audio Alternate Mode (I2C/MSB) Control Register + * SACR2 Serial Audio AC-link Control Register + * SASR0 Serial Audio I2S/MSB Interface & FIFO Status Register + * SASR1 Serial Audio AC-link Interface & FIFO Status Register + * SASCR Serial Audio Status Clear Register + * L3_CAR L3 Control Bus Address Register + * L3_CDR L3 Control Bus Data Register + * ACCAR AC-link Command Address Register + * ACCDR AC-link Command Data Register + * ACSAR AC-link Status Address Register + * ACSDR AC-link Status Data Register + * SADTCS Serial Audio DMA Transmit Control/Status Register + * SADTSA Serial Audio DMA Transmit Buffer Start Address A + * SADTCA Serial Audio DMA Transmit Buffer Count Register A + * SADTSB Serial Audio DMA Transmit Buffer Start Address B + * SADTCB Serial Audio DMA Transmit Buffer Count Register B + * SADRCS Serial Audio DMA Receive Control/Status Register + * SADRSA Serial Audio DMA Receive Buffer Start Address A + * SADRCA Serial Audio DMA Receive Buffer Count Register A + * SADRSB Serial Audio DMA Receive Buffer Start Address B + * SADRCB Serial Audio DMA Receive Buffer Count Register B + * SAITR Serial Audio Interrupt Test Register + * SADR Serial Audio Data Register (16 x 32-bit) + */ + +#define _SACR0 _SA1111( 0x0600 ) +#define _SACR1 _SA1111( 0x0604 ) +#define _SACR2 _SA1111( 0x0608 ) +#define _SASR0 _SA1111( 0x060c ) +#define _SASR1 _SA1111( 0x0610 ) +#define _SASCR _SA1111( 0x0618 ) +#define _L3_CAR _SA1111( 0x061c ) +#define _L3_CDR _SA1111( 0x0620 ) +#define _ACCAR _SA1111( 0x0624 ) +#define _ACCDR _SA1111( 0x0628 ) +#define _ACSAR _SA1111( 0x062c ) +#define _ACSDR _SA1111( 0x0630 ) +#define _SADTCS _SA1111( 0x0634 ) +#define _SADTSA _SA1111( 0x0638 ) +#define _SADTCA _SA1111( 0x063c ) +#define _SADTSB _SA1111( 0x0640 ) +#define _SADTCB _SA1111( 0x0644 ) +#define _SADRCS _SA1111( 0x0648 ) +#define _SADRSA _SA1111( 0x064c ) +#define _SADRCA _SA1111( 0x0650 ) +#define _SADRSB _SA1111( 0x0654 ) +#define _SADRCB _SA1111( 0x0658 ) +#define _SAITR _SA1111( 0x065c ) +#define _SADR _SA1111( 0x0680 ) + +#if LANGUAGE == C + +#define SACR0 (*((volatile Word *) SA1111_p2v (_SACR0))) +#define SACR1 (*((volatile Word *) SA1111_p2v (_SACR1))) +#define SACR2 (*((volatile Word *) SA1111_p2v (_SACR2))) +#define SASR0 (*((volatile Word *) SA1111_p2v (_SASR0))) +#define SASR1 (*((volatile Word *) SA1111_p2v (_SASR1))) +#define SASCR (*((volatile Word *) SA1111_p2v (_SASCR))) +#define L3_CAR (*((volatile Word *) SA1111_p2v (_L3_CAR))) +#define L3_CDR (*((volatile Word *) SA1111_p2v (_L3_CDR))) +#define ACCAR (*((volatile Word *) SA1111_p2v (_ACCAR))) +#define ACCDR (*((volatile Word *) SA1111_p2v (_ACCDR))) +#define ACSAR (*((volatile Word *) SA1111_p2v (_ACSAR))) +#define ACSDR (*((volatile Word *) SA1111_p2v (_ACSDR))) +#define SADTCS (*((volatile Word *) SA1111_p2v (_SADTCS))) +#define SADTSA (*((volatile Word *) SA1111_p2v (_SADTSA))) +#define SADTCA (*((volatile Word *) SA1111_p2v (_SADTCA))) +#define SADTSB (*((volatile Word *) SA1111_p2v (_SADTSB))) +#define SADTCB (*((volatile Word *) SA1111_p2v (_SADTCB))) +#define SADRCS (*((volatile Word *) SA1111_p2v (_SADRCS))) +#define SADRSA (*((volatile Word *) SA1111_p2v (_SADRSA))) +#define SADRCA (*((volatile Word *) SA1111_p2v (_SADRCA))) +#define SADRSB (*((volatile Word *) SA1111_p2v (_SADRSB))) +#define SADRCB (*((volatile Word *) SA1111_p2v (_SADRCB))) +#define SAITR (*((volatile Word *) SA1111_p2v (_SAITR))) +#define SADR (*((volatile Word *) SA1111_p2v (_SADR))) + +#endif /* LANGUAGE == C */ + +#define SACR0_ENB (1<<0) +#define SACR0_BCKD (1<<2) +#define SACR0_RST (1<<3) + +#define SACR1_AMSL (1<<0) +#define SACR1_L3EN (1<<1) +#define SACR1_L3MB (1<<2) +#define SACR1_DREC (1<<3) +#define SACR1_DRPL (1<<4) +#define SACR1_ENLBF (1<<5) + +#define SACR2_TS3V (1<<0) +#define SACR2_TS4V (1<<1) +#define SACR2_WKUP (1<<2) +#define SACR2_DREC (1<<3) +#define SACR2_DRPL (1<<4) +#define SACR2_ENLBF (1<<5) +#define SACR2_RESET (1<<5) + +#define SASR0_TNF (1<<0) +#define SASR0_RNE (1<<1) +#define SASR0_BSY (1<<2) +#define SASR0_TFS (1<<3) +#define SASR0_RFS (1<<4) +#define SASR0_TUR (1<<5) +#define SASR0_ROR (1<<6) +#define SASR0_L3WD (1<<16) +#define SASR0_L3RD (1<<17) + +#define SASR1_TNF (1<<0) +#define SASR1_RNE (1<<1) +#define SASR1_BSY (1<<2) +#define SASR1_TFS (1<<3) +#define SASR1_RFS (1<<4) +#define SASR1_TUR (1<<5) +#define SASR1_ROR (1<<6) +#define SASR1_CADT (1<<16) +#define SASR1_SADR (1<<17) +#define SASR1_RSTO (1<<18) +#define SASR1_CLPM (1<<19) +#define SASR1_CRDY (1<<20) +#define SASR1_RS3V (1<<21) +#define SASR1_RS4V (1<<22) + +#define SASCR_TUR (1<<5) +#define SASCR_ROR (1<<6) +#define SASCR_DTS (1<<16) +#define SASCR_RDD (1<<17) +#define SASCR_STO (1<<18) + +#define SADTCS_TDEN (1<<0) +#define SADTCS_TDIE (1<<1) +#define SADTCS_TDBDA (1<<3) +#define SADTCS_TDSTA (1<<4) +#define SADTCS_TDBDB (1<<5) +#define SADTCS_TDSTB (1<<6) +#define SADTCS_TBIU (1<<7) + +#define SADRCS_RDEN (1<<0) +#define SADRCS_RDIE (1<<1) +#define SADRCS_RDBDA (1<<3) +#define SADRCS_RDSTA (1<<4) +#define SADRCS_RDBDB (1<<5) +#define SADRCS_RDSTB (1<<6) +#define SADRCS_RBIU (1<<7) + +#define SAD_CS_DEN (1<<0) +#define SAD_CS_DIE (1<<1) /* Not functional on metal 1 */ +#define SAD_CS_DBDA (1<<3) /* Not functional on metal 1 */ +#define SAD_CS_DSTA (1<<4) +#define SAD_CS_DBDB (1<<5) /* Not functional on metal 1 */ +#define SAD_CS_DSTB (1<<6) +#define SAD_CS_BIU (1<<7) /* Not functional on metal 1 */ + +#define SAITR_TFS (1<<0) +#define SAITR_RFS (1<<1) +#define SAITR_TUR (1<<2) +#define SAITR_ROR (1<<3) +#define SAITR_CADT (1<<4) +#define SAITR_SADR (1<<5) +#define SAITR_RSTO (1<<6) +#define SAITR_TDBDA (1<<8) +#define SAITR_TDBDB (1<<9) +#define SAITR_RDBDA (1<<10) +#define SAITR_RDBDB (1<<11) + /* * General-Purpose I/O Interface * @@ -215,6 +412,154 @@ #endif /* LANGUAGE == C */ /* + * PS/2 Trackpad and Mouse Interfaces + * + * Registers (prefix kbd applies to trackpad interface, mse to mouse) + * KBDCR Control Register + * KBDSTAT Status Register + * KBDDATA Transmit/Receive Data register + * KBDCLKDIV Clock Division Register + * KBDPRECNT Clock Precount Register + * KBDTEST1 Test register 1 + * KBDTEST2 Test register 2 + * KBDTEST3 Test register 3 + * KBDTEST4 Test register 4 + * MSECR + * MSESTAT + * MSEDATA + * MSECLKDIV + * MSEPRECNT + * MSETEST1 + * MSETEST2 + * MSETEST3 + * MSETEST4 + * + */ + +#define _KBD( x ) _SA1111( 0x0A00 ) +#define _MSE( x ) _SA1111( 0x0C00 ) + +#define _KBDCR _SA1111( 0x0A00 ) +#define _KBDSTAT _SA1111( 0x0A04 ) +#define _KBDDATA _SA1111( 0x0A08 ) +#define _KBDCLKDIV _SA1111( 0x0A0C ) +#define _KBDPRECNT _SA1111( 0x0A10 ) +#define _MSECR _SA1111( 0x0C00 ) +#define _MSESTAT _SA1111( 0x0C04 ) +#define _MSEDATA _SA1111( 0x0C08 ) +#define _MSECLKDIV _SA1111( 0x0C10 ) +#define _MSEPRECNT _SA1111( 0x0C14 ) + +#if ( LANGUAGE == C ) + +#define KBDCR (*((volatile Word *) SA1111_p2v (_KBDCR))) +#define KBDSTAT (*((volatile Word *) SA1111_p2v (_KBDSTAT))) +#define KBDDATA (*((volatile Word *) SA1111_p2v (_KBDDATA))) +#define KBDCLKDIV (*((volatile Word *) SA1111_p2v (_KBDCLKDIV))) +#define KBDPRECNT (*((volatile Word *) SA1111_p2v (_KBDPRECNT))) +#define KBDTEST1 (*((volatile Word *) SA1111_p2v (_KBDTEST1))) +#define KBDTEST2 (*((volatile Word *) SA1111_p2v (_KBDTEST2))) +#define KBDTEST3 (*((volatile Word *) SA1111_p2v (_KBDTEST3))) +#define KBDTEST4 (*((volatile Word *) SA1111_p2v (_KBDTEST4))) +#define MSECR (*((volatile Word *) SA1111_p2v (_MSECR))) +#define MSESTAT (*((volatile Word *) SA1111_p2v (_MSESTAT))) +#define MSEDATA (*((volatile Word *) SA1111_p2v (_MSEDATA))) +#define MSECLKDIV (*((volatile Word *) SA1111_p2v (_MSECLKDIV))) +#define MSEPRECNT (*((volatile Word *) SA1111_p2v (_MSEPRECNT))) +#define MSETEST1 (*((volatile Word *) SA1111_p2v (_MSETEST1))) +#define MSETEST2 (*((volatile Word *) SA1111_p2v (_MSETEST2))) +#define MSETEST3 (*((volatile Word *) SA1111_p2v (_MSETEST3))) +#define MSETEST4 (*((volatile Word *) SA1111_p2v (_MSETEST4))) + +#define KBDCR_ENA 0x08 +#define KBDCR_FKD 0x02 +#define KBDCR_FKC 0x01 + +#define KBDSTAT_TXE 0x80 +#define KBDSTAT_TXB 0x40 +#define KBDSTAT_RXF 0x20 +#define KBDSTAT_RXB 0x10 +#define KBDSTAT_ENA 0x08 +#define KBDSTAT_RXP 0x04 +#define KBDSTAT_KBD 0x02 +#define KBDSTAT_KBC 0x01 + +#define KBDCLKDIV_DivVal Fld(4,0) + +#define MSECR_ENA 0x08 +#define MSECR_FKD 0x02 +#define MSECR_FKC 0x01 + +#define MSESTAT_TXE 0x80 +#define MSESTAT_TXB 0x40 +#define MSESTAT_RXF 0x20 +#define MSESTAT_RXB 0x10 +#define MSESTAT_ENA 0x08 +#define MSESTAT_RXP 0x04 +#define MSESTAT_MSD 0x02 +#define MSESTAT_MSC 0x01 + +#define MSECLKDIV_DivVal Fld(4,0) + +#define KBDTEST1_CD 0x80 +#define KBDTEST1_RC1 0x40 +#define KBDTEST1_MC 0x20 +#define KBDTEST1_C Fld(2,3) +#define KBDTEST1_T2 0x40 +#define KBDTEST1_T1 0x20 +#define KBDTEST1_T0 0x10 +#define KBDTEST2_TICBnRES 0x08 +#define KBDTEST2_RKC 0x04 +#define KBDTEST2_RKD 0x02 +#define KBDTEST2_SEL 0x01 +#define KBDTEST3_ms_16 0x80 +#define KBDTEST3_us_64 0x40 +#define KBDTEST3_us_16 0x20 +#define KBDTEST3_DIV8 0x10 +#define KBDTEST3_DIn 0x08 +#define KBDTEST3_CIn 0x04 +#define KBDTEST3_KD 0x02 +#define KBDTEST3_KC 0x01 +#define KBDTEST4_BC12 0x80 +#define KBDTEST4_BC11 0x40 +#define KBDTEST4_TRES 0x20 +#define KBDTEST4_CLKOE 0x10 +#define KBDTEST4_CRES 0x08 +#define KBDTEST4_RXB 0x04 +#define KBDTEST4_TXB 0x02 +#define KBDTEST4_SRX 0x01 + +#define MSETEST1_CD 0x80 +#define MSETEST1_RC1 0x40 +#define MSETEST1_MC 0x20 +#define MSETEST1_C Fld(2,3) +#define MSETEST1_T2 0x40 +#define MSETEST1_T1 0x20 +#define MSETEST1_T0 0x10 +#define MSETEST2_TICBnRES 0x08 +#define MSETEST2_RKC 0x04 +#define MSETEST2_RKD 0x02 +#define MSETEST2_SEL 0x01 +#define MSETEST3_ms_16 0x80 +#define MSETEST3_us_64 0x40 +#define MSETEST3_us_16 0x20 +#define MSETEST3_DIV8 0x10 +#define MSETEST3_DIn 0x08 +#define MSETEST3_CIn 0x04 +#define MSETEST3_KD 0x02 +#define MSETEST3_KC 0x01 +#define MSETEST4_BC12 0x80 +#define MSETEST4_BC11 0x40 +#define MSETEST4_TRES 0x20 +#define MSETEST4_CLKOE 0x10 +#define MSETEST4_CRES 0x08 +#define MSETEST4_RXB 0x04 +#define MSETEST4_TXB 0x02 +#define MSETEST4_SRX 0x01 + +#endif /* LANGUAGE == C */ + +/* * PCMCIA Interface * * Registers diff --git a/include/asm-arm/arch-sa1100/thinclient.h b/include/asm-arm/arch-sa1100/graphicsclient.h index 830152117..eb1789bac 100644 --- a/include/asm-arm/arch-sa1100/thinclient.h +++ b/include/asm-arm/arch-sa1100/graphicsclient.h @@ -1,10 +1,11 @@ /* - * linux/include/asm-arm/arch-sa1100/thinclient.h + * linux/include/asm-arm/arch-sa1100/graphicsclient.h * * Created 2000/06/11 by Nicolas Pitre <nico@cam.org> + * Modified 7/27/00 by Woojung <whuh@applieddata.net> * - * This file contains the hardware specific definitions for the ADS - * ThinClient/GraphicsClient boards. + * This file contains the hardware specific definitions for the + * ADS GraphicsClient/ThinClient boards. */ #ifndef __ASM_ARCH_HARDWARE_H @@ -27,19 +28,14 @@ #define _ADS_CS_STATUS 0x10040000 /* PCMCIA status reg */ #define ADS_CS_ST_A_READY (1 << 0) /* Socket A Card Ready */ -#define ADS_CS_ST_B_READY (1 << 1) /* Socket B Card Ready */ #define ADS_CS_ST_A_CD (1 << 2) /* Socket A Card Detect */ -#define ADS_CS_ST_B_CD (1 << 3) /* Socket B Card Detect */ #define ADS_CS_ST_A_BUSY (1 << 4) /* Socket A Card Busy */ -#define ADS_CS_ST_B_BUSY (1 << 5) /* Socket B Card Busy */ #define ADS_CS_ST_A_STS (1 << 6) /* Socket A Card STS */ -#define ADS_CS_ST_B_STS (1 << 7) /* Socket B Card STS */ #define _ADS_CS_PR 0x10040004 /* PCMCIA Power/Reset */ -#define ADS_CS_PR_A_POWER (1 << 0) /* Socket A Enable Power */ -#define ADS_CS_PR_B_POWER (1 << 1) /* Socket B Enable Power */ -#define ADS_CS_PR_A_RESET (1 << 2) /* Socket A Reset */ -#define ADS_CS_PR_B_RESET (1 << 3) /* Socket B Reset */ +#define ADS_CS_PR_A_5V_POWER (1 << 0) /* Socket A Enable 5V Power */ +#define ADS_CS_PR_A_3V_POWER (1 << 0) /* Socket A Enable 3.3V Power */ +#define ADS_CS_PR_A_RESET (1 << 2) /* Socket A Reset */ #define _ADS_SW_SWITCHES 0x10060000 /* Software Switches */ @@ -52,6 +48,8 @@ #define _ADS_INT_EN1 0x10080008 /* IRQ Enable #1 */ #define _ADS_INT_EN2 0x1008000c /* IRQ Enable #2 */ +/* Discrete Controller (AVR:Atmel AT90LS8535) */ +#define _ADS_AVR_REG 0x10080018 /* On-Board Ethernet */ @@ -86,4 +84,5 @@ #define ADS_INT_EN1 (*((volatile u_char *) ADS_p2v(_ADS_INT_EN1))) #define ADS_INT_EN2 (*((volatile u_char *) ADS_p2v(_ADS_INT_EN2))) #define ADS_ETHERNET ((int) ADS_p2v(_ADS_ETHERNET)) +#define ADS_AVR_REG (*((volatile u_char *) ADS_p2v(_ADS_AVR_REG))) #endif diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index e60c4ec68..9e9e45686 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -80,6 +80,10 @@ extern void set_GPIO_IRQ_edge( int gpio_mask, int edge_mask ); * Implementation specifics */ +#ifdef CONFIG_SA1100_PANGOLIN +#include "pangolin.h" +#endif + #ifdef CONFIG_SA1100_ASSABET #include "assabet.h" #else @@ -98,10 +102,6 @@ extern void set_GPIO_IRQ_edge( int gpio_mask, int edge_mask ); #include "bitsy.h" #endif -#if defined(CONFIG_SA1100_THINCLIENT) -#include "thinclient.h" -#endif - #if defined(CONFIG_SA1100_GRAPHICSCLIENT) #include "graphicsclient.h" #endif diff --git a/include/asm-arm/arch-sa1100/ide.h b/include/asm-arm/arch-sa1100/ide.h index 22aae0157..b893e0dfd 100644 --- a/include/asm-arm/arch-sa1100/ide.h +++ b/include/asm-arm/arch-sa1100/ide.h @@ -15,10 +15,6 @@ #include <asm/mach-types.h> -#define PCMCIA_IO_0_BASE 0xe0000000 -#define PCMCIA_IO_1_BASE 0xe4000000 - - /* * Set up a hw structure for a specified data port, control port and IRQ. * This should follow whatever the default interface uses. diff --git a/include/asm-arm/arch-sa1100/io.h b/include/asm-arm/arch-sa1100/io.h index 9a955de6c..6b57f9e20 100644 --- a/include/asm-arm/arch-sa1100/io.h +++ b/include/asm-arm/arch-sa1100/io.h @@ -16,45 +16,17 @@ * We don't actually have real ISA nor PCI buses, but there is so many * drivers out there that might just work if we fake them... */ -#define __io_pci(a) (PCIO_BASE + (a)) +#define __io(a) (PCIO_BASE + (a)) #define __mem_pci(a) ((unsigned long)(a)) #define __mem_isa(a) ((unsigned long)(a)) -#define __ioaddr(p) __io_pci(p) - /* * Generic virtual read/write */ -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getl(a) (*(volatile unsigned int *)(a)) - -extern __inline__ unsigned int __arch_getw(unsigned long a) -{ - unsigned int value; - __asm__ __volatile__("ldr%?h %0, [%1, #0] @ getw" - : "=&r" (value) - : "r" (a)); - return value; -} - - -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) - -extern __inline__ void __arch_putw(unsigned int value, unsigned long a) -{ - __asm__ __volatile__("str%?h %0, [%1, #0] @ putw" - : : "r" (value), "r" (a)); -} - -#define inb(p) __arch_getb(__io_pci(p)) -#define inw(p) __arch_getw(__io_pci(p)) -#define inl(p) __arch_getl(__io_pci(p)) - -#define outb(v,p) __arch_putb(v,__io_pci(p)) -#define outw(v,p) __arch_putw(v,__io_pci(p)) -#define outl(v,p) __arch_putl(v,__io_pci(p)) +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) -#define __arch_ioremap __ioremap +#define iomem_valid_addr(iomem,sz) (1) +#define iomem_to_phys(iomem) (iomem) #endif diff --git a/include/asm-arm/arch-sa1100/irq.h b/include/asm-arm/arch-sa1100/irq.h index 8c6b0e821..91bca91d8 100644 --- a/include/asm-arm/arch-sa1100/irq.h +++ b/include/asm-arm/arch-sa1100/irq.h @@ -11,11 +11,14 @@ * 17-02-1999 NP empeg henry ugly hacks now in a separate file ;) * 11-08-1999 PD SA1101 support added * 25-09-1999 RMK Merged into main ARM tree, cleaned up - * 12-05-2000 NP IRQ dispatcher handler for GPIO 11 to 27. + * 12-05-2000 NP IRQ dispatcher handler for GPIOs 11 to 27. * 26-05-2000 JD SA-1111 support added + * 01-06-2000 NP GraphicsClient external IRQ dispatcher + * 09-10-2000 NP Fixed lost interrupts on GPIOs 11 to 27. */ #include <linux/config.h> #include <asm/irq.h> +#include <asm/hardware.h> #include <asm/mach-types.h> #define fixup_irq(x) (x) @@ -85,7 +88,7 @@ static void sa1100_GPIO11_27_demux(int irq, void *dev_id, * unmasked. However, such situation should happen only * during the loop below. Thus all IRQs which aren't * enabled at this point are considered spurious. Those - * are cleared but only de-activated if they happened twice. + * are cleared but only de-activated if they happen twice. */ spurious = irq & ~GPIO_11_27_enabled; if (spurious) { @@ -114,20 +117,35 @@ static struct irqaction GPIO11_27_irq = { static void sa1100_mask_and_ack_GPIO11_27_irq(unsigned int irq) { int mask = (1 << GPIO_11_27_IRQ(irq)); + GPIO_11_27_spurious &= ~mask; GPIO_11_27_enabled &= ~mask; GEDR = mask; } static void sa1100_mask_GPIO11_27_irq(unsigned int irq) { - GPIO_11_27_enabled &= ~(1 << GPIO_11_27_IRQ(irq)); + int mask = (1 << GPIO_11_27_IRQ(irq)); + GPIO_11_27_spurious &= ~mask; + GPIO_11_27_enabled &= ~mask; } static void sa1100_unmask_GPIO11_27_irq(unsigned int irq) { int mask = (1 << GPIO_11_27_IRQ(irq)); + if (GPIO_11_27_spurious & mask) { + /* + * We don't want to miss an interrupt that would have occured + * while it was masked. Simulate it if it is the case. + */ + int state = GPLR; + if (((state & GPIO_IRQ_rising_edge) | + (~state & GPIO_IRQ_falling_edge)) & mask) { + do_IRQ(irq, NULL); + /* we are being called again from do_IRQ() so ... */ + return; + } + } GPIO_11_27_enabled |= mask; - GPIO_11_27_spurious &= ~mask; GRER = (GRER & ~mask) | (GPIO_IRQ_rising_edge & mask); GFER = (GFER & ~mask) | (GPIO_IRQ_falling_edge & mask); } @@ -245,7 +263,7 @@ static struct irqaction neponset_irq = { #endif -#if defined(CONFIG_SA1100_GRAPHICSCLIENT) || defined(CONFIG_SA1100_THINCLIENT) +#if defined(CONFIG_SA1100_GRAPHICSCLIENT) /* * IRQ handler for the ThinClient/GraphicsClient external IRQ controller @@ -399,8 +417,8 @@ static __inline__ void irq_init_irq(void) } #endif -#if defined(CONFIG_SA1100_GRAPHICSCLIENT) || defined(CONFIG_SA1100_THINCLIENT) - if( machine_is_graphicsclient() || machine_is_thinclient() ){ +#if defined(CONFIG_SA1100_GRAPHICSCLIENT) + if( machine_is_graphicsclient() ){ /* disable all IRQs */ ADS_INT_EN1 = 0; ADS_INT_EN2 = 0; diff --git a/include/asm-arm/arch-sa1100/irqs.h b/include/asm-arm/arch-sa1100/irqs.h index 909247f72..f83cddd3c 100644 --- a/include/asm-arm/arch-sa1100/irqs.h +++ b/include/asm-arm/arch-sa1100/irqs.h @@ -72,7 +72,7 @@ #define NR_IRQS (IRQ_GPIO27 + 1) -#if defined(CONFIG_SA1100_GRAPHICSCLIENT) || defined(CONFIG_SA1100_THINCLIENT) +#if defined(CONFIG_SA1100_GRAPHICSCLIENT) #define ADS_EXT_IRQ(x) (IRQ_GPIO27 + 1 + (x)) #undef NR_IRQS #define NR_IRQS (ADS_EXT_IRQ(15) + 1) diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h index 28c4015c5..9aa94003d 100644 --- a/include/asm-arm/arch-sa1100/memory.h +++ b/include/asm-arm/arch-sa1100/memory.h @@ -15,6 +15,12 @@ #define TASK_SIZE_26 (0x04000000UL) /* + * This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) + +/* * Page offset: 3GB */ #define PAGE_OFFSET (0xc0000000UL) diff --git a/include/asm-arm/arch-sa1100/mmzone.h b/include/asm-arm/arch-sa1100/mmzone.h index 09e90be62..c35fdfcee 100644 --- a/include/asm-arm/arch-sa1100/mmzone.h +++ b/include/asm-arm/arch-sa1100/mmzone.h @@ -41,11 +41,11 @@ extern pg_data_t sa1100_node_data[]; * Given a kernel address, find the home node of the underlying memory. */ #define KVADDR_TO_NID(addr) \ - (((unsigned long)(addr) & 0x18000000) >> 27) + (((unsigned long)(addr) - 0xc0000000) >> 27) /* * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory - * and returns the the mem_map of that node. + * and returns the mem_map of that node. */ #define ADDR_TO_MAPBASE(kaddr) \ NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr))) @@ -66,7 +66,12 @@ extern pg_data_t sa1100_node_data[]; (ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr)) /* - * Didn't find the best way to validate a page pointer yet... + * VALID_PAGE returns a non-zero value if given page pointer is valid. + * This assumes all node's mem_maps are stored within the node they refer to. */ +#define VALID_PAGE(page) \ +({ unsigned int node = KVADDR_TO_NID(page); \ + ( (node < 4) && \ + ((unsigned)((page) - NODE_MEM_MAP(node)) < NODE_DATA(node)->node_size) ); \ +}) -#define VALID_PAGE(page) (1) diff --git a/include/asm-arm/arch-sa1100/pangolin.h b/include/asm-arm/arch-sa1100/pangolin.h new file mode 100644 index 000000000..4f7d0b7bf --- /dev/null +++ b/include/asm-arm/arch-sa1100/pangolin.h @@ -0,0 +1,22 @@ +/* + * linux/include/asm-arm/arch-sa1100/pangolin.h + * + * Created 2000/08/25 by Murphy Chen <murphy@mail.dialogue.com.tw> + * + * This file contains the hardware specific definitions for Pangolin + * + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#error "include <asm/hardware.h> instead" +#endif + + +/* GPIOs for which the generic definition doesn't say much */ +#define GPIO_CF_BUS_ON GPIO_GPIO (3) +#define GPIO_CF_RESET GPIO_GPIO (2) +#define GPIO_CF_CD GPIO_GPIO (22) +#define GPIO_CF_IRQ GPIO_GPIO (21) + +#define IRQ_GPIO_CF_IRQ IRQ_GPIO21 +#define IRQ_GPIO_CF_CD IRQ_GPIO22 diff --git a/include/asm-arm/arch-sa1100/processor.h b/include/asm-arm/arch-sa1100/processor.h deleted file mode 100644 index 1d0c5a6c3..000000000 --- a/include/asm-arm/arch-sa1100/processor.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/processor.h - * - * Copyright (c) 1996 Russell King. - * - * Changelog: - * 10-09-1996 RMK Created - * 05-01-1999 HBF Mods for SA1100 - * 21-09-1999 NP SWAPPER_PG_DIR readjusted for SA1100 - */ - -#ifndef __ASM_ARCH_PROCESSOR_H -#define __ASM_ARCH_PROCESSOR_H - -/* - * Bus types - */ -#define EISA_bus 0 -#define EISA_bus__is_a_macro /* for versions in ksyms.c */ -#define MCA_bus 0 -#define MCA_bus__is_a_macro /* for versions in ksyms.c */ - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) - -#endif diff --git a/include/asm-arm/arch-sa1100/system.h b/include/asm-arm/arch-sa1100/system.h index ca8e6330a..984a5dc0f 100644 --- a/include/asm-arm/arch-sa1100/system.h +++ b/include/asm-arm/arch-sa1100/system.h @@ -24,13 +24,9 @@ extern inline void arch_reset(char mode) /* Jump into ROM at address 0 */ cpu_reset(0); } else { - /* Activate SA1100 watchdog and wait for the trigger... */ - OSMR3 = OSCR + 3686400/2; /* in 1/2 sec */ - OWER |= OWER_WME; - OIER |= OIER_E3; + /* Use on-chip reset capability */ + RSRR = RSRR_SWR; } } -#define arch_power_off() do { } while (0) - #endif diff --git a/include/asm-arm/arch-sa1100/uncompress.h b/include/asm-arm/arch-sa1100/uncompress.h index 5f4648ee6..f2a46c0d8 100644 --- a/include/asm-arm/arch-sa1100/uncompress.h +++ b/include/asm-arm/arch-sa1100/uncompress.h @@ -31,10 +31,12 @@ static void puts( const char *s ) serial_port = (unsigned long *)_Ser3UTCR0; else serial_port = (unsigned long *)_Ser1UTCR0; - } else if (machine_is_brutus()||machine_is_nanoengine()) + } else if (machine_is_brutus()||machine_is_nanoengine() || + machine_is_pangolin()) serial_port = (unsigned long *)_Ser1UTCR0; else if (machine_is_empeg() || machine_is_bitsy() || - machine_is_victor() || machine_is_lart()) + machine_is_victor() || machine_is_lart() || + machine_is_sherman() ) serial_port = (unsigned long *)_Ser3UTCR0; else return; diff --git a/include/asm-arm/arch-shark/io.h b/include/asm-arm/arch-shark/io.h index ef14f7169..ab8efb1fc 100644 --- a/include/asm-arm/arch-shark/io.h +++ b/include/asm-arm/arch-shark/io.h @@ -35,7 +35,7 @@ extern __inline__ void __out##fnsuffix (unsigned int value, unsigned int port) \ "tst %2, #0x80000000\n\t" \ "mov %0, %4\n\t" \ "addeq %0, %0, %3\n\t" \ - "str" ##instr## " %1, [%0, %2] @ out"###fnsuffix \ + "str" instr " %1, [%0, %2] @ out" #fnsuffix \ : "=&r" (temp) \ : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ : "cc"); \ @@ -49,7 +49,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ "tst %2, #0x80000000\n\t" \ "mov %0, %4\n\t" \ "addeq %0, %0, %3\n\t" \ - "ldr" ##instr## " %1, [%0, %2] @ in"###fnsuffix \ + "ldr" instr " %1, [%0, %2] @ in" #fnsuffix \ : "=&r" (temp), "=r" (value) \ : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ : "cc"); \ @@ -181,13 +181,8 @@ DECLARE_IO(long,l,"") #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) -#define __arch_getb(addr) (*(volatile unsigned char *)(addr)) #define __arch_getw(addr) (*(volatile unsigned short *)(addr)) -#define __arch_getl(addr) (*(volatile unsigned long *)(addr)) - -#define __arch_putb(b,addr) (*(volatile unsigned char *)(addr) = (b)) #define __arch_putw(b,addr) (*(volatile unsigned short *)(addr) = (b)) -#define __arch_putl(b,addr) (*(volatile unsigned long *)(addr) = (b)) /* * Translated address IO functions diff --git a/include/asm-arm/arch-tbox/io.h b/include/asm-arm/arch-tbox/io.h index 322941657..5fd9aa0a3 100644 --- a/include/asm-arm/arch-tbox/io.h +++ b/include/asm-arm/arch-tbox/io.h @@ -10,14 +10,11 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io_pc(_x) ((_x) << 2) +#define __io(_x) ((_x) << 2) /* * Generic virtual read/write */ -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getl(a) (*(volatile unsigned long *)(a)) - extern __inline__ unsigned int __arch_getw(unsigned long a) { unsigned int value; @@ -27,24 +24,12 @@ extern __inline__ unsigned int __arch_getw(unsigned long a) return value; } - -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned long *)(a) = (v)) - extern __inline__ void __arch_putw(unsigned int value, unsigned long a) { __asm__ __volatile__("str%?h %0, [%1, #0] @ putw" : : "r" (value), "r" (a)); } -#define inb(p) __arch_getb(__io_pc(p)) -#define inw(p) __arch_getw(__io_pc(p)) -#define inl(p) __arch_getl(__io_pc(p)) - -#define outb(v,p) __arch_putb(v,__io_pc(p)) -#define outw(v,p) __arch_putw(v,__io_pc(p)) -#define outl(v,p) __arch_putl(v,__io_pc(p)) - /* Idem, for devices on the upper byte lanes */ #define inb_u(p) __arch_getb(__io_pc(p) + 2) #define inw_u(p) __arch_getw(__io_pc(p) + 2) diff --git a/include/asm-arm/ecard.h b/include/asm-arm/ecard.h index 56ae7ab35..fa0adbaeb 100644 --- a/include/asm-arm/ecard.h +++ b/include/asm-arm/ecard.h @@ -41,8 +41,8 @@ #define PROD_MORLEY_SCSI_UNCACHED 0x0067 #define MANU_CUMANA 0x003a -#define PROD_CUMANA_SCSI_1 0x00a0 #define PROD_CUMANA_SCSI_2 0x003a +#define PROD_CUMANA_SCSI_1 0x00a0 #define MANU_ICS 0x003c #define PROD_ICS_IDE 0x00ae @@ -59,6 +59,7 @@ #define PROD_I3_ETHERLAN600A 0x011e #define MANU_ANT 0x0053 +#define PROD_ANT_ETHERM 0x00d8 #define PROD_ANT_ETHERB 0x00e4 #define MANU_ALSYSTEMS 0x005b diff --git a/include/asm-arm/fiq.h b/include/asm-arm/fiq.h index 0e00841df..a3bad09e8 100644 --- a/include/asm-arm/fiq.h +++ b/include/asm-arm/fiq.h @@ -31,5 +31,7 @@ extern void release_fiq(struct fiq_handler *f); extern void set_fiq_handler(void *start, unsigned int length); extern void set_fiq_regs(struct pt_regs *regs); extern void get_fiq_regs(struct pt_regs *regs); +extern void enable_fiq(int fiq); +extern void disable_fiq(int fiq); #endif diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index 707aa9788..1e1d838b7 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -20,10 +20,43 @@ #ifndef __ASM_ARM_IO_H #define __ASM_ARM_IO_H +#ifdef __KERNEL__ + #include <linux/types.h> +#include <asm/memory.h> #include <asm/arch/hardware.h> + +/* + * Generic virtual read/write. Note that we don't support half-word + * read/writes. We define __arch_*[bl] here, and leave __arch_*w + * to the architecture specific code. + */ +#define __arch_getb(a) (*(volatile unsigned char *)(a)) +#define __arch_getl(a) (*(volatile unsigned int *)(a)) + +#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) + +/* + * Now, pick up the machine-defined IO definitions + */ #include <asm/arch/io.h> +/* + * IO definitions. We define {out,in}[bwl] if __io is defined by + * the machine. Otherwise, these definitions are left for the + * machine specific header files to pick up. + */ +#ifdef __io +#define outb(v,p) __arch_putb(v,__io(p)) +#define outw(v,p) __arch_putw(v,__io(p)) +#define outl(v,p) __arch_putl(v,__io(p)) + +#define inb(p) __arch_getb(__io(p)) +#define inw(p) __arch_getw(__io(p)) +#define inl(p) __arch_getl(__io(p)) +#endif + #define outb_p(val,port) outb((val),(port)) #define outw_p(val,port) outw((val),(port)) #define outl_p(val,port) outl((val),(port)) @@ -45,19 +78,34 @@ extern void insl(unsigned int port, void *from, int len); #define insw_p(port,to,len) insw(port,to,len) #define insl_p(port,to,len) insl(port,to,len) -#ifdef __KERNEL__ - -#include <asm/memory.h> - -/* the following macro is depreciated */ -#define ioaddr(port) __ioaddr((port)) - /* - * ioremap and friends + * ioremap and friends. + * + * ioremap takes a PCI memory address, as specified in + * linux/Documentation/IO-mapping.txt. If you want a + * physical address, use __ioremap instead. */ extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags); extern void __iounmap(void *addr); +/* + * Generic ioremap support. + * + * Define: + * iomem_valid_addr(off,size) + * iomem_to_phys(off) + */ +#ifdef iomem_valid_addr +#define __arch_ioremap(off,sz,nocache) \ + ({ \ + unsigned long _off = (off), _size = (sz); \ + void *_ret = (void *)0; \ + if (iomem_valid_addr(_off, _size)) \ + _ret = __ioremap(iomem_to_phys(_off),_size,0); \ + _ret; \ + }) +#endif + #define ioremap(off,sz) __arch_ioremap((off),(sz),0) #define ioremap_nocache(off,sz) __arch_ioremap((off),(sz),1) #define iounmap(_addr) __iounmap(_addr) @@ -72,7 +120,26 @@ extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); extern void consistent_free(void *vaddr); extern void consistent_sync(void *vaddr, size_t size, int rw); -extern void __readwrite_bug(const char *fn); +#define __raw_writeb(v,a) __arch_putb(v,a) +#define __raw_writew(v,a) __arch_putw(v,a) +#define __raw_writel(v,a) __arch_putl(v,a) + +#define __raw_readb(a) __arch_getb(a) +#define __raw_readw(a) __arch_getw(a) +#define __raw_readl(a) __arch_getl(a) + +/* + * The compiler seems to be incapable of optimising constants + * properly. Spell it out to the compiler in some cases. + * These are only valid for small values of "off" (< 1<<12) + */ +#define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off) +#define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off) +#define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off) + +#define __raw_base_readb(base,off) __arch_base_getb(base,off) +#define __raw_base_readw(base,off) __arch_base_getw(base,off) +#define __raw_base_readl(base,off) __arch_base_getl(base,off) /* * String version of IO memory access ops: @@ -81,26 +148,21 @@ extern void _memcpy_fromio(void *, unsigned long, size_t); extern void _memcpy_toio(unsigned long, const void *, size_t); extern void _memset_io(unsigned long, int, size_t); -#define __raw_writeb(val,addr) __arch_putb(val,addr) -#define __raw_writew(val,addr) __arch_putw(val,addr) -#define __raw_writel(val,addr) __arch_putl(val,addr) - -#define __raw_readb(addr) __arch_getb(addr) -#define __raw_readw(addr) __arch_getw(addr) -#define __raw_readl(addr) __arch_getl(addr) +extern void __readwrite_bug(const char *fn); /* * If this architecture has PCI memory IO, then define the read/write - * macros. + * macros. These should only be used with the cookie passed from + * ioremap. */ #ifdef __mem_pci -#define readb(addr) __arch_getb(__mem_pci(addr)) -#define readw(addr) __arch_getw(__mem_pci(addr)) -#define readl(addr) __arch_getl(__mem_pci(addr)) -#define writeb(val,addr) __arch_putb(val,__mem_pci(addr)) -#define writew(val,addr) __arch_putw(val,__mem_pci(addr)) -#define writel(val,addr) __arch_putl(val,__mem_pci(addr)) +#define readb(addr) __raw_readb(__mem_pci(addr)) +#define readw(addr) __raw_readw(__mem_pci(addr)) +#define readl(addr) __raw_readl(__mem_pci(addr)) +#define writeb(val,addr) __raw_writeb(val,__mem_pci(addr)) +#define writew(val,addr) __raw_writew(val,__mem_pci(addr)) +#define writel(val,addr) __raw_writel(val,__mem_pci(addr)) #define memset_io(a,b,c) _memset_io(__mem_pci(a),(b),(c)) #define memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_pci(b),(c)) @@ -142,17 +204,25 @@ out: #endif /* __mem_pci */ /* + * remap a physical address `phys' of size `size' with page protection `prot' + * into virtual address `from' + */ +#define io_remap_page_range(from,phys,size,prot) \ + remap_page_range(from,phys,size,prot) + + +/* * If this architecture has ISA IO, then define the isa_read/isa_write * macros. */ #ifdef __mem_isa -#define isa_readb(addr) __arch_getb(__mem_isa(addr)) -#define isa_readw(addr) __arch_getw(__mem_isa(addr)) -#define isa_readl(addr) __arch_getl(__mem_isa(addr)) -#define isa_writeb(val,addr) __arch_putb(val,__mem_isa(addr)) -#define isa_writew(val,addr) __arch_putw(val,__mem_isa(addr)) -#define isa_writel(val,addr) __arch_putl(val,__mem_isa(addr)) +#define isa_readb(addr) __raw_readb(__mem_isa(addr)) +#define isa_readw(addr) __raw_readw(__mem_isa(addr)) +#define isa_readl(addr) __raw_readl(__mem_isa(addr)) +#define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr)) +#define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr)) +#define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr)) #define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c)) #define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c)) #define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c)) diff --git a/include/asm-arm/ioctls.h b/include/asm-arm/ioctls.h index 87f998fae..ba9c7d81d 100644 --- a/include/asm-arm/ioctls.h +++ b/include/asm-arm/ioctls.h @@ -65,6 +65,7 @@ #define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ #define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ +#define FIOQSIZE 0x545E /* Used for packet mode */ #define TIOCPKT_DATA 0 diff --git a/include/asm-arm/linux_logo.h b/include/asm-arm/linux_logo.h index ba0bc304d..5bdf5fbb3 100644 --- a/include/asm-arm/linux_logo.h +++ b/include/asm-arm/linux_logo.h @@ -32,9 +32,6 @@ extern unsigned char linux_logo_green[]; extern unsigned char linux_logo_blue[]; extern unsigned char linux_logo[]; extern unsigned char linux_logo_bw[]; -extern unsigned char linux_logo16_red[]; -extern unsigned char linux_logo16_green[]; -extern unsigned char linux_logo16_blue[]; extern unsigned char linux_logo16[]; extern unsigned char *linux_serial_image; diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h index f5297ecf1..d6e6c4daf 100644 --- a/include/asm-arm/mach/arch.h +++ b/include/asm-arm/mach/arch.h @@ -12,35 +12,42 @@ * The size of struct machine_desc * (for assembler code) */ -#define SIZEOF_MACHINE_DESC 44 +#define SIZEOF_MACHINE_DESC 56 #ifndef __ASSEMBLY__ +extern void setup_initrd(unsigned int start, unsigned int size); +extern void setup_ramdisk(int doload, int prompt, int start, unsigned int rd_sz); + +struct tagtable; + struct machine_desc { /* * Note! The first four elements are used * by assembler code in head-armv.S */ - unsigned int nr; /* architecture number */ - unsigned int phys_ram; /* start of physical ram */ - unsigned int phys_io; /* start of physical io */ - unsigned int virt_io; /* start of virtual io */ - - const char *name; /* architecture name */ - unsigned int param_offset; /* parameter page */ - - unsigned int video_start; /* start of video RAM */ - unsigned int video_end; /* end of video RAM */ - - unsigned int reserve_lp0 :1; /* never has lp0 */ - unsigned int reserve_lp1 :1; /* never has lp1 */ - unsigned int reserve_lp2 :1; /* never has lp2 */ - unsigned int broken_hlt :1; /* hlt is broken */ - unsigned int soft_reboot :1; /* soft reboot */ - void (*fixup)(struct machine_desc *, - struct param_struct *, char **, - struct meminfo *); - void (*map_io)(void);/* IO mapping function */ + unsigned int nr; /* architecture number */ + unsigned int phys_ram; /* start of physical ram */ + unsigned int phys_io; /* start of physical io */ + unsigned int virt_io; /* start of virtual io */ + + const char *name; /* architecture name */ + unsigned int param_offset; /* parameter page */ + + unsigned int video_start; /* start of video RAM */ + unsigned int video_end; /* end of video RAM */ + + unsigned int reserve_lp0 :1; /* never has lp0 */ + unsigned int reserve_lp1 :1; /* never has lp1 */ + unsigned int reserve_lp2 :1; /* never has lp2 */ + unsigned int soft_reboot :1; /* soft reboot */ + const struct tagtable * tagtable; /* tag table */ + int tagsize; /* tag table size */ + void (*fixup)(struct machine_desc *, + struct param_struct *, char **, + struct meminfo *); + void (*map_io)(void);/* IO mapping function */ + void (*init_irq)(void); }; /* @@ -50,7 +57,7 @@ struct machine_desc { #define MACHINE_START(_type,_name) \ const struct machine_desc __mach_desc_##_type \ __attribute__((__section__(".arch.info"))) = { \ - nr: MACH_TYPE_##_type##, \ + nr: MACH_TYPE_##_type, \ name: _name, #define MAINTAINER(n) @@ -68,10 +75,9 @@ const struct machine_desc __mach_desc_##_type \ video_end: _end, #define DISABLE_PARPORT(_n) \ - reserve_lp##_n##: 1, + reserve_lp##_n: 1, -#define BROKEN_HLT \ - broken_hlt: 1, +#define BROKEN_HLT /* unused */ #define SOFT_REBOOT \ soft_reboot: 1, @@ -82,6 +88,9 @@ const struct machine_desc __mach_desc_##_type \ #define MAPIO(_func) \ map_io: _func, +#define INITIRQ(_func) \ + init_irq: _func, + #define MACHINE_END \ }; diff --git a/include/asm-arm/mach/irq.h b/include/asm-arm/mach/irq.h new file mode 100644 index 000000000..1270097b2 --- /dev/null +++ b/include/asm-arm/mach/irq.h @@ -0,0 +1,41 @@ +/* + * linux/include/asm-arm/mach/irq.h + * + * Copyright (C) 1995-2000 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_ARM_MACH_IRQ_H +#define __ASM_ARM_MACH_IRQ_H + +struct irqdesc { + unsigned int nomask : 1; /* IRQ does not mask in IRQ */ + unsigned int enabled : 1; /* IRQ is currently enabled */ + unsigned int triggered: 1; /* IRQ has occurred */ + unsigned int probing : 1; /* IRQ in use for a probe */ + unsigned int probe_ok : 1; /* IRQ can be used for probe */ + unsigned int valid : 1; /* IRQ claimable */ + unsigned int noautoenable : 1; /* don't automatically enable IRQ */ + unsigned int unused :25; + void (*mask_ack)(unsigned int irq); /* Mask and acknowledge IRQ */ + void (*mask)(unsigned int irq); /* Mask IRQ */ + void (*unmask)(unsigned int irq); /* Unmask IRQ */ + struct irqaction *action; + /* + * IRQ lock detection + */ + unsigned int lck_cnt; + unsigned int lck_pc; + unsigned int lck_jif; +}; + +extern struct irqdesc irq_desc[]; + +extern void (*init_arch_irq)(void); +extern int setup_arm_irq(int, struct irqaction *); +extern int get_fiq_list(char *); +extern void init_FIQ(void); + +#endif diff --git a/include/asm-arm/proc-armo/pgtable.h b/include/asm-arm/proc-armo/pgtable.h index 12dc2cee0..b16bf61c6 100644 --- a/include/asm-arm/proc-armo/pgtable.h +++ b/include/asm-arm/proc-armo/pgtable.h @@ -96,4 +96,9 @@ extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) &= ~_PAGE_OLD; #define pte_alloc_kernel pte_alloc +/* + * We don't store cache state bits in the page table here. + */ +#define pgprot_noncached(prot) (prot) + #endif /* __ASM_PROC_PGTABLE_H */ diff --git a/include/asm-arm/proc-armv/pgtable.h b/include/asm-arm/proc-armv/pgtable.h index 2de66aabe..5bb0f41d1 100644 --- a/include/asm-arm/proc-armv/pgtable.h +++ b/include/asm-arm/proc-armv/pgtable.h @@ -149,7 +149,7 @@ extern __inline__ unsigned long pmd_page(pmd_t pmd) #define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG) #define PTE_BIT_FUNC(fn,op) \ -extern inline pte_t pte_##fn##(pte_t pte) { pte_val(pte) op##; return pte; } +extern inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; } /*PTE_BIT_FUNC(rdprotect, &= ~L_PTE_USER);*/ /*PTE_BIT_FUNC(mkread, |= L_PTE_USER);*/ @@ -163,4 +163,9 @@ PTE_BIT_FUNC(mkold, &= ~L_PTE_YOUNG); PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG); PTE_BIT_FUNC(nocache, &= ~L_PTE_CACHEABLE); +/* + * Mark the prot value as uncacheable and unbufferable. + */ +#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) & ~(L_PTE_CACHEABLE | L_PTE_BUFFERABLE)) + #endif /* __ASM_PROC_PGTABLE_H */ diff --git a/include/asm-arm/setup.h b/include/asm-arm/setup.h index c067c9618..29cfe814c 100644 --- a/include/asm-arm/setup.h +++ b/include/asm-arm/setup.h @@ -68,6 +68,143 @@ struct param_struct { }; /* + * New idea - a list of tagged entries + */ +#define ATAG_NONE 0x00000000 + +struct tag_header { + u32 size; + u32 tag; +}; + +#define ATAG_CORE 0x54410001 + +struct tag_core { + u32 flags; /* bit 0 = read-only */ + u32 pagesize; + u32 rootdev; +}; + +#define ATAG_MEM 0x54410002 + +struct tag_mem32 { + u32 size; + u32 start; +}; + +#define ATAG_VIDEOTEXT 0x54410003 + +struct tag_videotext { + u8 x; + u8 y; + u16 video_page; + u8 video_mode; + u8 video_cols; + u16 video_ega_bx; + u8 video_lines; + u8 video_isvga; + u16 video_points; +}; + +#define ATAG_RAMDISK 0x54410004 + +struct tag_ramdisk { + u32 flags; /* b0 = load, b1 = prompt */ + u32 size; + u32 start; +}; + +#define ATAG_INITRD 0x54410005 + +struct tag_initrd { + u32 start; + u32 size; +}; + +#define ATAG_SERIAL 0x54410006 + +struct tag_serialnr { + u32 low; + u32 high; +}; + +#define ATAG_REVISION 0x54410007 + +struct tag_revision { + u32 rev; +}; + +#define ATAG_VIDEOLFB 0x54410008 + +struct tag_videolfb { + u16 lfb_width; + u16 lfb_height; + u16 lfb_depth; + u16 lfb_linelength; + u32 lfb_base; + u32 lfb_size; + u8 red_size; + u8 red_pos; + u8 green_size; + u8 green_pos; + u8 blue_size; + u8 blue_pos; + u8 rsvd_size; + u8 rsvd_pos; +}; + +#define ATAG_CMDLINE 0x54410009 + +struct tag_cmdline { + char cmdline[1]; +}; + +#define ATAG_ACORN 0x41000101 + +struct tag_acorn { + u32 memc_control_reg; + u32 vram_pages; + u8 sounddefault; + u8 adfsdrives; +}; + +#define ATAG_MEMCLK 0x41000402 + +struct tag_memclk { + u32 fmemclk; +}; + +struct tag { + struct tag_header hdr; + union { + struct tag_core core; + struct tag_mem32 mem; + struct tag_videotext videotext; + struct tag_ramdisk ramdisk; + struct tag_initrd initrd; + struct tag_serialnr serialnr; + struct tag_revision revision; + struct tag_videolfb videolfb; + struct tag_cmdline cmdline; + + /* + * Acorn specific + */ + struct tag_acorn acorn; + + /* + * DC21285 specific + */ + struct tag_memclk memclk; + } u; +}; + +struct tagtable { + u32 tag; + int (*parse)(const struct tag *); +}; + +/* * Memory map description */ #define NR_BANKS 4 diff --git a/include/asm-arm/socket.h b/include/asm-arm/socket.h index a421e6dc3..37ec7b03c 100644 --- a/include/asm-arm/socket.h +++ b/include/asm-arm/socket.h @@ -43,6 +43,8 @@ #define SO_TIMESTAMP 29 #define SCM_TIMESTAMP SO_TIMESTAMP +#define SO_ACCEPTCONN 30 + /* Nast libc5 fixup - bletch */ #if defined(__KERNEL__) /* Socket types. */ diff --git a/include/asm-arm/termios.h b/include/asm-arm/termios.h index 6d589dd1d..3da727e71 100644 --- a/include/asm-arm/termios.h +++ b/include/asm-arm/termios.h @@ -61,7 +61,7 @@ struct termio { #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IrDa - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IrDa - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ #define N_SYNC_PPP 14 diff --git a/include/asm-cris/a.out.h b/include/asm-cris/a.out.h new file mode 100644 index 000000000..770734ce5 --- /dev/null +++ b/include/asm-cris/a.out.h @@ -0,0 +1,31 @@ +#ifndef __CRIS_A_OUT_H__ +#define __CRIS_A_OUT_H__ + +/* we don't support a.out binaries on Linux/CRIS anyway, so this is + * not really used but still needed because binfmt_elf.c for some reason + * wants to know about a.out even if there is no interpreter available... + */ + +/* grabbed from the intel stuff */ +#define STACK_TOP TASK_SIZE + + +struct exec +{ + unsigned long a_info; /* Use macros N_MAGIC, etc for access */ + unsigned a_text; /* length of text, in bytes */ + unsigned a_data; /* length of data, in bytes */ + unsigned a_bss; /* length of uninitialized data area for file, in bytes */ + unsigned a_syms; /* length of symbol table data in file, in bytes */ + unsigned a_entry; /* start address */ + unsigned a_trsize; /* length of relocation info for text, in bytes */ + unsigned a_drsize; /* length of relocation info for data, in bytes */ +}; + + +#define N_TRSIZE(a) ((a).a_trsize) +#define N_DRSIZE(a) ((a).a_drsize) +#define N_SYMSIZE(a) ((a).a_syms) + + +#endif diff --git a/include/asm-cris/atomic.h b/include/asm-cris/atomic.h new file mode 100644 index 000000000..7b4cd6c63 --- /dev/null +++ b/include/asm-cris/atomic.h @@ -0,0 +1,142 @@ +/* $Id: atomic.h,v 1.2 2000/07/13 16:51:57 bjornw Exp $ */ + +#ifndef __ASM_CRIS_ATOMIC__ +#define __ASM_CRIS_ATOMIC__ + +#include <asm/system.h> + +/* + * Atomic operations that C can't guarantee us. Useful for + * resource counting etc.. + */ + +/* + * Make sure gcc doesn't try to be clever and move things around + * on us. We need to use _exactly_ the address the user gave us, + * not some alias that contains the same information. + */ + +#define __atomic_fool_gcc(x) (*(struct { int a[100]; } *)x) + +typedef struct { int counter; } atomic_t; + +#define ATOMIC_INIT(i) { (i) } + +#define atomic_read(v) ((v)->counter) +#define atomic_set(v,i) (((v)->counter) = (i)) + +/* These should be written in asm but we do it in C for now. */ + +static __inline__ void atomic_add(int i, volatile atomic_t *v) +{ + unsigned long flags; + save_flags(flags); + cli(); + v->counter += i; + restore_flags(flags); +} + +static __inline__ void atomic_sub(int i, volatile atomic_t *v) +{ + unsigned long flags; + save_flags(flags); + cli(); + v->counter -= i; + restore_flags(flags); +} + +static __inline__ int atomic_add_return(int i, volatile atomic_t *v) +{ + unsigned long flags; + int retval; + save_flags(flags); + cli(); + retval = (v->counter += i); + restore_flags(flags); + return retval; +} + +static __inline__ int atomic_sub_return(int i, volatile atomic_t *v) +{ + unsigned long flags; + int retval; + save_flags(flags); + cli(); + retval = (v->counter -= i); + restore_flags(flags); + return retval; +} + +static __inline__ int atomic_sub_and_test(int i, volatile atomic_t *v) +{ + int retval; + unsigned long flags; + save_flags(flags); + cli(); + retval = (v->counter -= i) == 0; + restore_flags(flags); + return retval; +} + +static __inline__ void atomic_inc(volatile atomic_t *v) +{ + unsigned long flags; + save_flags(flags); + cli(); + (v->counter)++; + restore_flags(flags); +} + +static __inline__ void atomic_dec(volatile atomic_t *v) +{ + unsigned long flags; + save_flags(flags); + cli(); + (v->counter)--; + restore_flags(flags); +} + +static __inline__ int atomic_inc_return(volatile atomic_t *v) +{ + unsigned long flags; + int retval; + save_flags(flags); + cli(); + retval = (v->counter)++; + restore_flags(flags); + return retval; +} + +static __inline__ int atomic_dec_return(volatile atomic_t *v) +{ + unsigned long flags; + int retval; + save_flags(flags); + cli(); + retval = (v->counter)--; + restore_flags(flags); + return retval; +} +static __inline__ int atomic_dec_and_test(volatile atomic_t *v) +{ + int retval; + unsigned long flags; + save_flags(flags); + cli(); + retval = --(v->counter) == 0; + restore_flags(flags); + return retval; +} + +static __inline__ int atomic_inc_and_test(volatile atomic_t *v) +{ + int retval; + unsigned long flags; + save_flags(flags); + cli(); + retval = ++(v->counter) == 0; + restore_flags(flags); + return retval; +} + +#endif diff --git a/include/asm-cris/axisflashmap.h b/include/asm-cris/axisflashmap.h new file mode 100644 index 000000000..a3438501d --- /dev/null +++ b/include/asm-cris/axisflashmap.h @@ -0,0 +1,59 @@ +#ifndef __ASM_AXISFLASHMAP_H +#define __ASM_AXISFLASHMAP_H + +/* Bootblock parameters are stored at 0xc000 and has the FLASH_BOOT_MAGIC + * as start, it ends with 0xFFFFFFFF */ +#define FLASH_BOOT_MAGIC 0xbeefcace +#define BOOTPARAM_OFFSET 0xc000 +/* apps/bootblocktool is used to read and write the parameters, + * and it has nothing to do with the partition table. + */ + + +/* the partitiontable consists of some "jump over" code, a head and + * then the actual entries. + * tools/mkptable is used to generate the ptable. + */ + +/* The partition table start with kod to "jump over" it: */ +#define PARTITIONTABLE_CODE_START { \ + 0x0f, 0x05, /* nop 0 */\ + 0x25, 0xf0, /* di 2 */\ + 0xed, 0xff /* ba 4 */ } + +/* The actual offset depend on the number of entries */ +#define PARTITIONTABLE_CODE_END { \ + 0x00, 0x00, /* ba offset 6 */\ + 0x0f, 0x0f /* nop 8 */} + +#define PARTITION_TABLE_OFFSET 10 +#define PARTITION_TABLE_MAGIC 0xbeef /* Not a good magic */ + +/* The partitiontable_head is located at offset +10: */ +struct partitiontable_head { + __u16 magic; /* PARTITION_TABLE_MAGIC */ + __u16 size; /* Length of ptable block (not header) */ + __u32 checksum; /* simple longword sum */ +}; + +/* And followed by partition table entries */ +struct partitiontable_entry { + __u32 offset; /* Offset is relative to the sector the ptable is in */ + __u32 size; + __u32 checksum; /* simple longword sum */ + __u16 type; + __u16 flags; /* bit 0: ro/rw = 1/0 */ + __u32 future0; /* 16 bytes reserved for future use */ + __u32 future1; + __u32 future2; + __u32 future3; +}; +/* ended by an end marker: */ +#define PARTITIONTABLE_END_MARKER 0xFFFFFFFF + +/*#define PARTITION_TYPE_RESCUE 0x0000?*/ /* Not used, maybe it should? */ +#define PARTITION_TYPE_PARAM 0x0001 /* Hmm.. */ +#define PARTITION_TYPE_KERNEL 0x0002 +#define PARTITION_TYPE_JFFS 0x0003 + +#endif diff --git a/include/asm-cris/bitops.h b/include/asm-cris/bitops.h new file mode 100644 index 000000000..2d2c4df61 --- /dev/null +++ b/include/asm-cris/bitops.h @@ -0,0 +1,184 @@ +/* $Id: bitops.h,v 1.3 2000/10/17 14:56:27 bjornw Exp $ */ +/* all of these should probably be rewritten in assembler for speed. */ + +#ifndef _CRIS_BITOPS_H +#define _CRIS_BITOPS_H + +#include <asm/system.h> + +/* + * These have to be done with inline assembly: that way the bit-setting + * is guaranteed to be atomic. All bit operations return 0 if the bit + * was cleared before the operation and != 0 if it was not. + * + * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1). + */ + +/* + * Some hacks to defeat gcc over-optimizations.. + */ +struct __dummy { unsigned long a[100]; }; +#define ADDR (*(struct __dummy *) addr) +#define CONST_ADDR (*(const struct __dummy *) addr) + +#define set_bit(nr, addr) (void)test_and_set_bit(nr, addr) +#define clear_bit(nr, addr) (void)test_and_clear_bit(nr, addr) +#define change_bit(nr, addr) (void)test_and_change_bit(nr, addr) + +extern __inline__ int test_and_set_bit(int nr, void *addr) +{ + unsigned int mask, retval; + unsigned long flags; + unsigned int *adr = (unsigned int *)addr; + + adr += nr >> 5; + mask = 1 << (nr & 0x1f); + save_flags(flags); + cli(); + retval = (mask & *adr) != 0; + *adr |= mask; + restore_flags(flags); + return retval; +} + +/* + * clear_bit() doesn't provide any barrier for the compiler. + */ +#define smp_mb__before_clear_bit() barrier() +#define smp_mb__after_clear_bit() barrier() + +extern __inline__ int test_and_clear_bit(int nr, void *addr) +{ + unsigned int mask, retval; + unsigned long flags; + unsigned int *adr = (unsigned int *)addr; + + adr += nr >> 5; + mask = 1 << (nr & 0x1f); + save_flags(flags); + cli(); + retval = (mask & *adr) != 0; + *adr &= ~mask; + restore_flags(flags); + return retval; +} + +extern __inline__ int test_and_change_bit(int nr, void *addr) +{ + unsigned int mask, retval; + unsigned long flags; + unsigned int *adr = (unsigned int *)addr; + adr += nr >> 5; + mask = 1 << (nr & 0x1f); + save_flags(flags); + cli(); + retval = (mask & *adr) != 0; + *adr ^= mask; + restore_flags(flags); + return retval; +} + +/* + * This routine doesn't need to be atomic. + */ +extern __inline__ int test_bit(int nr, const void *addr) +{ + unsigned int mask; + unsigned int *adr = (unsigned int *)addr; + + adr += nr >> 5; + mask = 1 << (nr & 0x1f); + return ((mask & *adr) != 0); +} + +/* + * Find-bit routines.. + */ + +/* + * ffz = Find First Zero in word. Undefined if no zero exists, + * so code should check against ~0UL first.. + */ +extern __inline__ unsigned long ffz(unsigned long word) +{ + unsigned long result = 0; + + while(word & 1) { + result++; + word >>= 1; + } + return result; +} + +/* + * Find first one in word. Undefined if no one exists, + * so code should check against 0UL first.. + */ +extern __inline__ unsigned long find_first_one(unsigned long word) +{ + unsigned long result = 0; + + while(!(word & 1)) { + result++; + word >>= 1; + } + return result; +} + +extern __inline__ int find_next_zero_bit (void * addr, int size, int offset) +{ + unsigned long *p = ((unsigned long *) addr) + (offset >> 5); + unsigned long result = offset & ~31UL; + unsigned long tmp; + + if (offset >= size) + return size; + size -= result; + offset &= 31UL; + if (offset) { + tmp = *(p++); + tmp |= ~0UL >> (32-offset); + if (size < 32) + goto found_first; + if (~tmp) + goto found_middle; + size -= 32; + result += 32; + } + while (size & ~31UL) { + if (~(tmp = *(p++))) + goto found_middle; + result += 32; + size -= 32; + } + if (!size) + return result; + tmp = *p; + + found_first: + tmp |= ~0UL >> size; + found_middle: + return result + ffz(tmp); +} + +#define find_first_zero_bit(addr, size) \ + find_next_zero_bit((addr), (size), 0) + +#ifdef __KERNEL__ + +#define ext2_set_bit test_and_set_bit +#define ext2_clear_bit test_and_clear_bit +#define ext2_test_bit test_bit +#define ext2_find_first_zero_bit find_first_zero_bit +#define ext2_find_next_zero_bit find_next_zero_bit + +/* Bitmap functions for the minix filesystem. */ +#define minix_set_bit(nr,addr) test_and_set_bit(nr,addr) +#define minix_clear_bit(nr,addr) test_and_clear_bit(nr,addr) +#define minix_test_bit(nr,addr) test_bit(nr,addr) +#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size) + +#endif /* __KERNEL__ */ + + +#endif /* _CRIS_BITOPS_H */ diff --git a/include/asm-cris/bugs.h b/include/asm-cris/bugs.h new file mode 100644 index 000000000..c5907aac1 --- /dev/null +++ b/include/asm-cris/bugs.h @@ -0,0 +1,21 @@ +/* $Id: bugs.h,v 1.2 2001/01/17 17:03:18 bjornw Exp $ + * + * include/asm-cris/bugs.h + * + * Copyright (C) 2001 Axis Communications AB + */ + +/* + * This is included by init/main.c to check for architecture-dependent bugs. + * + * Needs: + * void check_bugs(void); + */ + +static void check_bugs(void) +{ +} + + + + diff --git a/include/asm-cris/byteorder.h b/include/asm-cris/byteorder.h new file mode 100644 index 000000000..64275f604 --- /dev/null +++ b/include/asm-cris/byteorder.h @@ -0,0 +1,47 @@ +/* $Id: byteorder.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $ */ + +#ifndef _CRIS_BYTEORDER_H +#define _CRIS_BYTEORDER_H + +#include <asm/types.h> + +#ifdef __GNUC__ + +/* we just define these two (as we can do the swap in a single + * asm instruction in CRIS) and the arch-independent files will put + * them together into ntohl etc. + */ + +static __inline__ __const__ __u32 ___arch__swab32(__u32 x) +{ + __asm__ ("swapwb %0" : "=r" (x) : "0" (x)); + + return(x); +} + +static __inline__ __const__ __u16 ___arch__swab16(__u16 x) +{ + __asm__ ("swapb %0" : "=r" (x) : "0" (x)); + + return(x); +} + +/* defines are necessary because the other files detect the presence + * of a defined __arch_swab32, not an inline + */ + +#define __arch__swab32(x) ___arch__swab32(x) +#define __arch__swab16(x) ___arch__swab16(x) + +#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) +# define __BYTEORDER_HAS_U64__ +# define __SWAB_64_THRU_32__ +#endif + +#endif /* __GNUC__ */ + +#include <linux/byteorder/little_endian.h> + +#endif + + diff --git a/include/asm-cris/cache.h b/include/asm-cris/cache.h new file mode 100644 index 000000000..222f5d531 --- /dev/null +++ b/include/asm-cris/cache.h @@ -0,0 +1,10 @@ +#ifndef _ASM_CACHE_H +#define _ASM_CACHE_H + +/* Etrax 100LX have 32-byte cache-lines. When we add support for future chips + * here should be a check for CPU type. + */ + +#define L1_CACHE_BYTES 32 + +#endif /* _ASM_CACHE_H */ diff --git a/include/asm-cris/checksum.h b/include/asm-cris/checksum.h new file mode 100644 index 000000000..6f93e59db --- /dev/null +++ b/include/asm-cris/checksum.h @@ -0,0 +1,119 @@ +/* $Id: checksum.h,v 1.3 2000/11/15 17:35:16 bjornw Exp $ */ +/* TODO: csum_tcpudp_magic could be speeded up, and csum_fold as well */ + +#ifndef _CRIS_CHECKSUM_H +#define _CRIS_CHECKSUM_H + +/* + * computes the checksum of a memory block at buff, length len, + * and adds in "sum" (32-bit) + * + * returns a 32-bit number suitable for feeding into itself + * or csum_tcpudp_magic + * + * this function must be called with even lengths, except + * for the last fragment, which may be odd + * + * it's best to have buff aligned on a 32-bit boundary + */ +unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); + +/* + * the same as csum_partial, but copies from src while it + * checksums + * + * here even more important to align src and dst on a 32-bit (or even + * better 64-bit) boundary + */ + +unsigned int csum_partial_copy_nocheck(const char *src, char *dst, + int len, unsigned int sum); + +/* + * Fold a partial checksum into a word + */ + +static inline unsigned int csum_fold(unsigned int sum) +{ + /* the while loop is unnecessary really, it's always enough with two + iterations */ + + while(sum >> 16) + sum = (sum & 0xffff) + (sum >> 16); /* add in end-around carry */ + + return ~sum; +} + +/* Checksum some values used in TCP/UDP headers. + * + * The gain by doing this in asm is that C will not generate carry-additions + * for the 32-bit components of the checksum, so otherwise we would have had + * to split all of those into 16-bit components, then add. + */ + +static inline unsigned int +csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, + unsigned short proto, unsigned int sum) +{ + int res; + __asm__ ("add.d %2, %0\n\t" + "ax\n\t" + "add.d %3, %0\n\t" + "ax\n\t" + "add.d %4, %0\n\t" + "ax\n\t" + "addq 0, %0\n" + : "=r" (res) + : "0" (sum), "r" (daddr), "r" (saddr), "r" ((ntohs(len) << 16) + (proto << 8))); + + return res; +} + + +/* TODO we need to write this properly to handle userland VM exceptions!! */ + +#define csum_partial_copy_from_user(a,b,c,d,errptr) csum_partial_copy_nocheck(a,b,c,d) + +#if 0 +unsigned int csum_partial_copy_from_user(const char *src, char *dst, + int len, unsigned int sum); +#endif + + + +/* + * This is a version of ip_compute_csum() optimized for IP headers, + * which always checksum on 4 octet boundaries. + * + */ + +static inline unsigned short ip_fast_csum(unsigned char * iph, + unsigned int ihl) +{ + return csum_fold(csum_partial(iph, ihl * 4, 0)); +} + +/* + * computes the checksum of the TCP/UDP pseudo-header + * returns a 16-bit checksum, already complemented + */ + +static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, + unsigned long daddr, + unsigned short len, + unsigned short proto, + unsigned int sum) +{ + return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); +} + +/* + * this routine is used for miscellaneous IP-like checksums, mainly + * in icmp.c + */ + +static inline unsigned short ip_compute_csum(unsigned char * buff, int len) { + return csum_fold (csum_partial(buff, len, 0)); +} + +#endif diff --git a/include/asm-cris/current.h b/include/asm-cris/current.h new file mode 100644 index 000000000..6b00b86b6 --- /dev/null +++ b/include/asm-cris/current.h @@ -0,0 +1,15 @@ +#ifndef _CRIS_CURRENT_H +#define _CRIS_CURRENT_H + +struct task_struct; + +static inline struct task_struct * get_current(void) +{ + struct task_struct *current; + __asm__("and.d sp,%0; ":"=r" (current) : "0" (~8191UL)); + return current; + } + +#define current get_current() + +#endif /* !(_CRIS_CURRENT_H) */ diff --git a/include/asm-cris/delay.h b/include/asm-cris/delay.h new file mode 100644 index 000000000..7360b7bff --- /dev/null +++ b/include/asm-cris/delay.h @@ -0,0 +1,67 @@ +/* $Id: delay.h,v 1.2 2000/08/08 16:36:41 bjornw Exp $ */ + +#ifndef _CRIS_DELAY_H +#define _CRIS_DELAY_H + +/* + * Copyright (C) 1998, 1999, 2000 Axis Communications AB + * + * Delay routines, using a pre-computed "loops_per_second" value. + */ + +#include <linux/config.h> +#include <linux/linkage.h> + +#ifdef CONFIG_SMP +#include <asm/smp.h> +#endif + +extern void __do_delay(void); /* Special register call calling convention */ + +extern __inline__ void __delay(int loops) +{ + /* need to be a great deal of nops, because Etrax shuts off IRQ's during a branch + and we depend on the irq's to measure the time! */ + + __asm__ __volatile__ ( + "move.d %0,r0\n" + "1:\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "subq 1,r0\n\t" + "bne 1b\n\t" + "nop\n\t" + : : "r" (loops) : "r0", "cc"); +} + + +/* + * Use only for very small delays ( < 1 msec). Should probably use a + * lookup table, really, as the multiplications take much too long with + * short delays. This is a "reasonable" implementation, though (and the + * first constant multiplications gets optimized away if the delay is + * a constant) + */ + +extern unsigned long loops_per_usec; /* arch/cris/mm/init.c */ + +extern __inline__ void udelay(unsigned long usecs) +{ + __delay(usecs * loops_per_usec); +} + +extern __inline__ unsigned long muldiv(unsigned long a, unsigned long b, unsigned long c) +{ + printk("muldiv called!\n"); + return 0; +} + +#endif /* defined(_ETRAX_DELAY_H) */ + + + diff --git a/include/asm-cris/div64.h b/include/asm-cris/div64.h new file mode 100644 index 000000000..bf33c2e8a --- /dev/null +++ b/include/asm-cris/div64.h @@ -0,0 +1,16 @@ +#ifndef __ASM_CRIS_DIV64 +#define __ASM_CRIS_DIV64 + +/* copy from asm-arm */ + +/* We're not 64-bit, but... */ +#define do_div(n,base) \ +({ \ + int __res; \ + __res = ((unsigned long)n) % (unsigned int)base; \ + n = ((unsigned long)n) / (unsigned int)base; \ + __res; \ +}) + +#endif + diff --git a/include/asm-cris/dma.h b/include/asm-cris/dma.h new file mode 100644 index 000000000..a42d2a5f8 --- /dev/null +++ b/include/asm-cris/dma.h @@ -0,0 +1,21 @@ +/* $Id: dma.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $ + * linux/include/asm/dma.h: Defines for using and allocating dma channels. + */ + +#ifndef _ASM_DMA_H +#define _ASM_DMA_H + +/* it's useless on the Etrax, but unfortunately needed by the new + bootmem allocator (but this should do it for this) */ + +#define MAX_DMA_ADDRESS PAGE_OFFSET + +/* TODO: check nbr of channels on Etrax-100LX */ + +#define MAX_DMA_CHANNELS 10 + +/* These are in kernel/dma.c: */ +extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */ +extern void free_dma(unsigned int dmanr); /* release it */ + +#endif /* _ASM_DMA_H */ diff --git a/include/asm-cris/elf.h b/include/asm-cris/elf.h new file mode 100644 index 000000000..776276198 --- /dev/null +++ b/include/asm-cris/elf.h @@ -0,0 +1,68 @@ +#ifndef __ASMCRIS_ELF_H +#define __ASMCRIS_ELF_H + +/* + * ELF register definitions.. + */ + +#include <asm/ptrace.h> + +typedef unsigned long elf_greg_t; + +/* These probably need fixing. */ +#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) +typedef elf_greg_t elf_gregset_t[ELF_NGREG]; + +/* A placeholder; CRIS does not have any fp regs. */ +typedef unsigned long elf_fpregset_t; + +/* + * This is used to ensure we don't load something for the wrong architecture. + */ +#define elf_check_arch(x) ( (x)->e_machine == EM_CRIS ) + +/* + * These are used to set parameters in the core dumps. + */ +#define ELF_CLASS ELFCLASS32 +#define ELF_DATA ELFDATA2LSB; +#define ELF_ARCH EM_CRIS + + /* SVR4/i386 ABI (pages 3-31, 3-32) says that when the program + starts (a register; assume first param register for CRIS) + contains a pointer to a function which might be + registered using `atexit'. This provides a mean for the + dynamic linker to call DT_FINI functions for shared libraries + that have been loaded before the code runs. + + A value of 0 tells we have no such handler. */ +#define ELF_PLAT_INIT(_r) ((_r)->r10 = 0) + +#undef USE_ELF_CORE_DUMP +#define ELF_EXEC_PAGESIZE 8192 + +/* This is the location that an ET_DYN program is loaded if exec'ed. Typical + use of this is to invoke "./ld.so someprog" to test out a new version of + the loader. We need to make sure that it is out of the way of the program + that it will "exec", and that there is sufficient room for the brk. */ + +#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) + +/* This yields a mask that user programs can use to figure out what + instruction set this CPU supports. This could be done in user space, + but it's not easy, and we've already done it here. */ + +#define ELF_HWCAP (0) + +/* This yields a string that ld.so will use to load implementation + specific libraries for optimization. This is more specific in + intent than poking at uname or /proc/cpuinfo. +*/ + +#define ELF_PLATFORM (NULL) + +#ifdef __KERNEL__ +#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) +#endif + +#endif diff --git a/include/asm-cris/errno.h b/include/asm-cris/errno.h new file mode 100644 index 000000000..667de21f8 --- /dev/null +++ b/include/asm-cris/errno.h @@ -0,0 +1,134 @@ +/* verbatim copy of asm-i386/errno.h */ + +#ifndef _CRIS_ERRNO_H +#define _CRIS_ERRNO_H + +#define EPERM 1 /* Operation not permitted */ +#define ENOENT 2 /* No such file or directory */ +#define ESRCH 3 /* No such process */ +#define EINTR 4 /* Interrupted system call */ +#define EIO 5 /* I/O error */ +#define ENXIO 6 /* No such device or address */ +#define E2BIG 7 /* Arg list too long */ +#define ENOEXEC 8 /* Exec format error */ +#define EBADF 9 /* Bad file number */ +#define ECHILD 10 /* No child processes */ +#define EAGAIN 11 /* Try again */ +#define ENOMEM 12 /* Out of memory */ +#define EACCES 13 /* Permission denied */ +#define EFAULT 14 /* Bad address */ +#define ENOTBLK 15 /* Block device required */ +#define EBUSY 16 /* Device or resource busy */ +#define EEXIST 17 /* File exists */ +#define EXDEV 18 /* Cross-device link */ +#define ENODEV 19 /* No such device */ +#define ENOTDIR 20 /* Not a directory */ +#define EISDIR 21 /* Is a directory */ +#define EINVAL 22 /* Invalid argument */ +#define ENFILE 23 /* File table overflow */ +#define EMFILE 24 /* Too many open files */ +#define ENOTTY 25 /* Not a typewriter */ +#define ETXTBSY 26 /* Text file busy */ +#define EFBIG 27 /* File too large */ +#define ENOSPC 28 /* No space left on device */ +#define ESPIPE 29 /* Illegal seek */ +#define EROFS 30 /* Read-only file system */ +#define EMLINK 31 /* Too many links */ +#define EPIPE 32 /* Broken pipe */ +#define EDOM 33 /* Math argument out of domain of func */ +#define ERANGE 34 /* Math result not representable */ +#define EDEADLK 35 /* Resource deadlock would occur */ +#define ENAMETOOLONG 36 /* File name too long */ +#define ENOLCK 37 /* No record locks available */ +#define ENOSYS 38 /* Function not implemented */ +#define ENOTEMPTY 39 /* Directory not empty */ +#define ELOOP 40 /* Too many symbolic links encountered */ +#define EWOULDBLOCK EAGAIN /* Operation would block */ +#define ENOMSG 42 /* No message of desired type */ +#define EIDRM 43 /* Identifier removed */ +#define ECHRNG 44 /* Channel number out of range */ +#define EL2NSYNC 45 /* Level 2 not synchronized */ +#define EL3HLT 46 /* Level 3 halted */ +#define EL3RST 47 /* Level 3 reset */ +#define ELNRNG 48 /* Link number out of range */ +#define EUNATCH 49 /* Protocol driver not attached */ +#define ENOCSI 50 /* No CSI structure available */ +#define EL2HLT 51 /* Level 2 halted */ +#define EBADE 52 /* Invalid exchange */ +#define EBADR 53 /* Invalid request descriptor */ +#define EXFULL 54 /* Exchange full */ +#define ENOANO 55 /* No anode */ +#define EBADRQC 56 /* Invalid request code */ +#define EBADSLT 57 /* Invalid slot */ + +#define EDEADLOCK EDEADLK + +#define EBFONT 59 /* Bad font file format */ +#define ENOSTR 60 /* Device not a stream */ +#define ENODATA 61 /* No data available */ +#define ETIME 62 /* Timer expired */ +#define ENOSR 63 /* Out of streams resources */ +#define ENONET 64 /* Machine is not on the network */ +#define ENOPKG 65 /* Package not installed */ +#define EREMOTE 66 /* Object is remote */ +#define ENOLINK 67 /* Link has been severed */ +#define EADV 68 /* Advertise error */ +#define ESRMNT 69 /* Srmount error */ +#define ECOMM 70 /* Communication error on send */ +#define EPROTO 71 /* Protocol error */ +#define EMULTIHOP 72 /* Multihop attempted */ +#define EDOTDOT 73 /* RFS specific error */ +#define EBADMSG 74 /* Not a data message */ +#define EOVERFLOW 75 /* Value too large for defined data type */ +#define ENOTUNIQ 76 /* Name not unique on network */ +#define EBADFD 77 /* File descriptor in bad state */ +#define EREMCHG 78 /* Remote address changed */ +#define ELIBACC 79 /* Can not access a needed shared library */ +#define ELIBBAD 80 /* Accessing a corrupted shared library */ +#define ELIBSCN 81 /* .lib section in a.out corrupted */ +#define ELIBMAX 82 /* Attempting to link in too many shared libraries */ +#define ELIBEXEC 83 /* Cannot exec a shared library directly */ +#define EILSEQ 84 /* Illegal byte sequence */ +#define ERESTART 85 /* Interrupted system call should be restarted */ +#define ESTRPIPE 86 /* Streams pipe error */ +#define EUSERS 87 /* Too many users */ +#define ENOTSOCK 88 /* Socket operation on non-socket */ +#define EDESTADDRREQ 89 /* Destination address required */ +#define EMSGSIZE 90 /* Message too long */ +#define EPROTOTYPE 91 /* Protocol wrong type for socket */ +#define ENOPROTOOPT 92 /* Protocol not available */ +#define EPROTONOSUPPORT 93 /* Protocol not supported */ +#define ESOCKTNOSUPPORT 94 /* Socket type not supported */ +#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ +#define EPFNOSUPPORT 96 /* Protocol family not supported */ +#define EAFNOSUPPORT 97 /* Address family not supported by protocol */ +#define EADDRINUSE 98 /* Address already in use */ +#define EADDRNOTAVAIL 99 /* Cannot assign requested address */ +#define ENETDOWN 100 /* Network is down */ +#define ENETUNREACH 101 /* Network is unreachable */ +#define ENETRESET 102 /* Network dropped connection because of reset */ +#define ECONNABORTED 103 /* Software caused connection abort */ +#define ECONNRESET 104 /* Connection reset by peer */ +#define ENOBUFS 105 /* No buffer space available */ +#define EISCONN 106 /* Transport endpoint is already connected */ +#define ENOTCONN 107 /* Transport endpoint is not connected */ +#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */ +#define ETOOMANYREFS 109 /* Too many references: cannot splice */ +#define ETIMEDOUT 110 /* Connection timed out */ +#define ECONNREFUSED 111 /* Connection refused */ +#define EHOSTDOWN 112 /* Host is down */ +#define EHOSTUNREACH 113 /* No route to host */ +#define EALREADY 114 /* Operation already in progress */ +#define EINPROGRESS 115 /* Operation now in progress */ +#define ESTALE 116 /* Stale NFS file handle */ +#define EUCLEAN 117 /* Structure needs cleaning */ +#define ENOTNAM 118 /* Not a XENIX named type file */ +#define ENAVAIL 119 /* No XENIX semaphores available */ +#define EISNAM 120 /* Is a named type file */ +#define EREMOTEIO 121 /* Remote I/O error */ +#define EDQUOT 122 /* Quota exceeded */ + +#define ENOMEDIUM 123 /* No medium found */ +#define EMEDIUMTYPE 124 /* Wrong medium type */ + +#endif diff --git a/include/asm-cris/eshlibld.h b/include/asm-cris/eshlibld.h new file mode 100644 index 000000000..7f998a08c --- /dev/null +++ b/include/asm-cris/eshlibld.h @@ -0,0 +1,114 @@ +/*!************************************************************************** +*! +*! FILE NAME : eshlibld.h +*! +*! DESCRIPTION: Prototypes for exported shared library functions +*! +*! FUNCTIONS : perform_cris_aout_relocations, shlibmod_fork, shlibmod_exit +*! (EXPORTED) +*! +*!--------------------------------------------------------------------------- +*! +*! (C) Copyright 1998, 1999 Axis Communications AB, LUND, SWEDEN +*! +*!**************************************************************************/ +/* $Id: eshlibld.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $ */ + +#ifndef _cris_relocate_h +#define _cris_relocate_h + +/* Please note that this file is also compiled into the xsim simulator. + Try to avoid breaking its double use (only works on a little-endian + 32-bit machine such as the i386 anyway). + + Use __KERNEL__ when you're about to use kernel functions, + (which you should not do here anyway, since this file is + used by glibc). + Use defined(__KERNEL__) || defined(__elinux__) when doing + things that only makes sense on an elinux system. + Use __CRIS__ when you're about to do (really) CRIS-specific code. +*/ + +/* We have dependencies all over the place for the host system + for xsim being a linux system, so let's not pretend anything + else with #ifdef:s here until fixed. */ +#include <linux/config.h> +#include <linux/limits.h> + +/* Maybe do sanity checking if file input. */ +#undef SANITYCHECK_RELOC + +/* Maybe output debug messages. */ +#undef RELOC_DEBUG + +/* Maybe we want to share core as well as disk space. + Mainly depends on the config macro CONFIG_SHARE_SHLIB_CORE, but it is + assumed that we want to share code when debugging (exposes more + trouble). */ +#ifndef SHARE_LIB_CORE +# if (defined(__KERNEL__) || !defined(RELOC_DEBUG)) \ + && !defined(CONFIG_SHARE_SHLIB_CORE) +# define SHARE_LIB_CORE 0 +# else +# define SHARE_LIB_CORE 1 +# endif /* __KERNEL__ etc */ +#endif /* SHARE_LIB_CORE */ + + +/* Main exported function; supposed to be called when the program a.out + has been read in. */ +extern int +perform_cris_aout_relocations(unsigned long text, unsigned long tlength, + unsigned long data, unsigned long dlength, + unsigned long baddr, unsigned long blength, + + /* These may be zero when there's "perfect" + position-independent code. */ + unsigned char *trel, unsigned long tsrel, + unsigned long dsrel, + + /* These will be zero at a first try, to see + if code is statically linked. Else a + second try, with the symbol table and + string table nonzero should be done. */ + unsigned char *symbols, unsigned long symlength, + unsigned char *strings, unsigned long stringlength, + + /* These will only be used when symbol table + information is present. */ + char **env, int envc, + int euid, int is_suid); + + +#ifdef RELOC_DEBUG +/* Task-specific debug stuff. */ +struct task_reloc_debug { + struct memdebug *alloclast; + unsigned long alloc_total; + unsigned long export_total; +}; +#endif /* RELOC_DEBUG */ + +#if SHARE_LIB_CORE + +/* When code (and some very specific data) is shared and not just + dynamically linked, we need to export hooks for exec beginning and + end. */ + +struct shlibdep; + +extern void +shlibmod_exit(struct shlibdep **deps); + +/* Returns 0 if failure, nonzero for ok. */ +extern int +shlibmod_fork(struct shlibdep **deps); + +#else /* ! SHARE_LIB_CORE */ +# define shlibmod_exit(x) +# define shlibmod_fork(x) 1 +#endif /* ! SHARE_LIB_CORE */ + +#endif _cris_relocate_h +/********************** END OF FILE eshlibld.h *****************************/ + diff --git a/include/asm-cris/fcntl.h b/include/asm-cris/fcntl.h new file mode 100644 index 000000000..a68e2886e --- /dev/null +++ b/include/asm-cris/fcntl.h @@ -0,0 +1,89 @@ +#ifndef _CRIS_FCNTL_H +#define _CRIS_FCNTL_H + +/* verbatim copy of i386 version */ + +/* open/fcntl - O_SYNC is only implemented on blocks devices and on files + located on an ext2 file system */ +#define O_ACCMODE 0003 +#define O_RDONLY 00 +#define O_WRONLY 01 +#define O_RDWR 02 +#define O_CREAT 0100 /* not fcntl */ +#define O_EXCL 0200 /* not fcntl */ +#define O_NOCTTY 0400 /* not fcntl */ +#define O_TRUNC 01000 /* not fcntl */ +#define O_APPEND 02000 +#define O_NONBLOCK 04000 +#define O_NDELAY O_NONBLOCK +#define O_SYNC 010000 +#define FASYNC 020000 /* fcntl, for BSD compatibility */ +#define O_DIRECT 040000 /* direct disk access hint - currently ignored */ +#define O_LARGEFILE 0100000 +#define O_DIRECTORY 0200000 /* must be a directory */ +#define O_NOFOLLOW 0400000 /* don't follow links */ + +#define F_DUPFD 0 /* dup */ +#define F_GETFD 1 /* get f_flags */ +#define F_SETFD 2 /* set f_flags */ +#define F_GETFL 3 /* more flags (cloexec) */ +#define F_SETFL 4 +#define F_GETLK 5 +#define F_SETLK 6 +#define F_SETLKW 7 + +#define F_SETOWN 8 /* for sockets. */ +#define F_GETOWN 9 /* for sockets. */ +#define F_SETSIG 10 /* for sockets. */ +#define F_GETSIG 11 /* for sockets. */ + +#define F_GETLK64 12 /* using 'struct flock64' */ +#define F_SETLK64 13 +#define F_SETLKW64 14 + +/* for F_[GET|SET]FL */ +#define FD_CLOEXEC 1 /* actually anything with low bit set goes */ + +/* for posix fcntl() and lockf() */ +#define F_RDLCK 0 +#define F_WRLCK 1 +#define F_UNLCK 2 + +/* for old implementation of bsd flock () */ +#define F_EXLCK 4 /* or 3 */ +#define F_SHLCK 8 /* or 4 */ + +/* for leases */ +#define F_INPROGRESS 16 + +/* operations for bsd flock(), also used by the kernel implementation */ +#define LOCK_SH 1 /* shared lock */ +#define LOCK_EX 2 /* exclusive lock */ +#define LOCK_NB 4 /* or'd with one of the above to prevent + blocking */ +#define LOCK_UN 8 /* remove lock */ + +#define LOCK_MAND 32 /* This is a mandatory flock */ +#define LOCK_READ 64 /* ... Which allows concurrent read operations */ +#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */ +#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */ + +struct flock { + short l_type; + short l_whence; + off_t l_start; + off_t l_len; + pid_t l_pid; +}; + +struct flock64 { + short l_type; + short l_whence; + loff_t l_start; + loff_t l_len; + pid_t l_pid; +}; + +#define F_LINUX_SPECIFIC_BASE 1024 + +#endif diff --git a/include/asm-cris/hardirq.h b/include/asm-cris/hardirq.h new file mode 100644 index 000000000..f5d717416 --- /dev/null +++ b/include/asm-cris/hardirq.h @@ -0,0 +1,35 @@ +#ifndef __ASM_HARDIRQ_H +#define __ASM_HARDIRQ_H + +/* only non-SMP supported */ + +#include <linux/threads.h> + +/* entry.S is sensitive to the offsets of these fields */ +typedef struct { + unsigned int __softirq_active; + unsigned int __softirq_mask; + unsigned int __local_irq_count; + unsigned int __local_bh_count; + unsigned int __syscall_count; +} ____cacheline_aligned irq_cpustat_t; + +#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ + +/* + * Are we in an interrupt context? Either doing bottom half + * or hardware interrupt processing? + */ +#define in_interrupt() ((local_irq_count(smp_processor_id()) + \ + local_bh_count(smp_processor_id())) != 0) +#define in_irq() (local_irq_count(smp_processor_id()) != 0) + +#define hardirq_trylock(cpu) (local_irq_count(cpu) == 0) +#define hardirq_endlock(cpu) do { (void)(cpu); } while (0) + +#define irq_enter(cpu) (local_irq_count(cpu)++) +#define irq_exit(cpu) (local_irq_count(cpu)--) + +#define synchronize_irq() barrier() + +#endif /* __ASM_HARDIRQ_H */ diff --git a/include/asm-cris/hdreg.h b/include/asm-cris/hdreg.h new file mode 100644 index 000000000..382a8e64c --- /dev/null +++ b/include/asm-cris/hdreg.h @@ -0,0 +1,11 @@ +/* + * linux/include/asm-cris/hdreg.h + * + */ + +#ifndef __ASMCRIS_HDREG_H +#define __ASMCRIS_HDREG_H + +typedef unsigned long ide_ioreg_t; + +#endif /* __ASMCRIS_HDREG_H */ diff --git a/include/asm-cris/ide.h b/include/asm-cris/ide.h new file mode 100644 index 000000000..39f402021 --- /dev/null +++ b/include/asm-cris/ide.h @@ -0,0 +1,142 @@ +/* + * linux/include/asm-cris/ide.h + * + * Copyright (C) 2000 Axis Communications AB + * + * Authors: Bjorn Wesen + * + */ + +/* + * This file contains the ETRAX 100LX specific IDE code. + */ + +#ifndef __ASMCRIS_IDE_H +#define __ASMCRIS_IDE_H + +#ifdef __KERNEL__ + +#include <asm/svinto.h> + +/* ETRAX 100 can support 4 IDE busses on the same pins (serialized) */ + +#define MAX_HWIFS 4 + +#define ide__sti() __sti() + +static __inline__ int ide_default_irq(ide_ioreg_t base) +{ + /* all IDE busses share the same IRQ, number 4. + * this has the side-effect that ide-probe.c will cluster our 4 interfaces + * together in a hwgroup, and will serialize accesses. this is good, because + * we can't access more than one interface at the same time on ETRAX100. + */ + return 4; +} + +static __inline__ ide_ioreg_t ide_default_io_base(int index) +{ + /* we have no real I/O base address per interface, since all go through the + * same register. but in a bitfield in that register, we have the i/f number. + * so we can use the io_base to remember that bitfield. + */ + static const unsigned long io_bases[MAX_HWIFS] = { + IO_FIELD(R_ATA_CTRL_DATA, sel, 0), + IO_FIELD(R_ATA_CTRL_DATA, sel, 1), + IO_FIELD(R_ATA_CTRL_DATA, sel, 2), + IO_FIELD(R_ATA_CTRL_DATA, sel, 3) + }; + return io_bases[index]; +} + +/* this is called once for each interface, to setup the port addresses. data_port is the result + * of the ide_default_io_base call above. ctrl_port will be 0, but that is don't care for us. + */ + +static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq) +{ + int i; + + /* fill in ports for ATA addresses 0 to 7 */ + + for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { + hw->io_ports[i] = data_port | + IO_FIELD(R_ATA_CTRL_DATA, addr, i) | + IO_STATE(R_ATA_CTRL_DATA, cs0, active); + } + + /* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */ + + hw->io_ports[IDE_CONTROL_OFFSET] = data_port | + IO_FIELD(R_ATA_CTRL_DATA, addr, 6) | + IO_STATE(R_ATA_CTRL_DATA, cs1, active); + + /* whats this for ? */ + + hw->io_ports[IDE_IRQ_OFFSET] = 0; +} + +static __inline__ void ide_init_default_hwifs(void) +{ + hw_regs_t hw; + int index; + + for(index = 0; index < MAX_HWIFS; index++) { + ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL); + hw.irq = ide_default_irq(ide_default_io_base(index)); + ide_register_hw(&hw, NULL); + } +} + +typedef union { + unsigned all : 8; /* all of the bits together */ + struct { + unsigned head : 4; /* always zeros here */ + unsigned unit : 1; /* drive select number, 0 or 1 */ + unsigned bit5 : 1; /* always 1 */ + unsigned lba : 1; /* using LBA instead of CHS */ + unsigned bit7 : 1; /* always 1 */ + } b; + } select_t; + +/* some configuration options we don't need */ + +#undef SUPPORT_VLB_SYNC +#define SUPPORT_VLB_SYNC 0 + +#undef SUPPORT_SLOW_DATA_PORTS +#define SUPPORT_SLOW_DATA_PORTS 0 + +/* request and free a normal interrupt */ + +#define ide_request_irq(irq,hand,flg,dev,id) request_irq((irq),(hand),(flg),(dev),(id)) +#define ide_free_irq(irq,dev_id) free_irq((irq), (dev_id)) + +/* ide-probe.c calls ide_request_region and stuff on the io_ports defined, + * but since they are not actually memory-mapped in the ETRAX driver, we don't + * do anything. + */ + +#define ide_check_region(from,extent) (0) +#define ide_request_region(from,extent,name) do {} while(0) +#define ide_release_region(from,extent) do {} while(0) + +/* + * The following are not needed for the non-m68k ports + */ +#define ide_ack_intr(hwif) (1) +#define ide_fix_driveid(id) do {} while (0) +#define ide_release_lock(lock) do {} while (0) +#define ide_get_lock(lock, hdlr, data) do {} while (0) + +/* the drive addressing is done through a controller register on the Etrax CPU */ +void OUT_BYTE(unsigned char data, ide_ioreg_t reg); +unsigned char IN_BYTE(ide_ioreg_t reg); + +/* this tells ide.h not to define the standard macros */ +#define HAVE_ARCH_OUT_BYTE +#define HAVE_ARCH_IN_BYTE + +#endif /* __KERNEL__ */ + +#endif /* __ASMCRIS_IDE_H */ diff --git a/include/asm-cris/io.h b/include/asm-cris/io.h new file mode 100644 index 000000000..08f876017 --- /dev/null +++ b/include/asm-cris/io.h @@ -0,0 +1,178 @@ +#ifndef _ASM_CRIS_IO_H +#define _ASM_CRIS_IO_H + +#include <asm/page.h> /* for __va, __pa */ +#include <asm/svinto.h> +#include <linux/config.h> + +/* Console I/O for simulated etrax100. Use #ifdef so erroneous + use will be evident. */ +#ifdef CONFIG_SVINTO_SIM + /* Let's use the ucsim interface since it lets us do write(2, ...) */ +#define SIMCOUT(s,len) asm ("moveq 4,r1\n\tmoveq 2,r10\n\tmove.d %0,r11\n\tmove.d %1,r12\ +\n\tpush irp\n\t.word 0xae3f\n\t.dword 0f\n\tjump -6809\n0:\n\tpop irp" \ + : : "rm" (s), "rm" (len) : "r1","r10","r11","r12","memory") +#define TRACE_ON() __extension__ \ + ({ int _Foofoo; __asm__ volatile ("bmod [%0],%0" : "=r" (_Foofoo) : "0" \ + (255)); _Foofoo; }) + +#define TRACE_OFF() do { __asm__ volatile ("bmod [%0],%0" :: "r" (254)); } while (0) +#define SIM_END() do { __asm__ volatile ("bmod [%0],%0" :: "r" (28)); } while (0) +#define CRIS_CYCLES() __extension__ \ + ({ unsigned long c; asm ("bmod [%1],%0" : "=r" (c) : "r" (27)); c;}) +#else /* ! defined CONFIG_SVINTO_SIM */ +/* FIXME: Is there a reliable cycle counter available in some chip? Use + that then. */ +#define CRIS_CYCLES() 0 +#endif /* ! defined CONFIG_SVINTO_SIM */ + +/* Etrax shadow registers - which live in arch/cris/kernel/shadows.c */ + +extern unsigned long port_g_data_shadow; +extern unsigned char port_pa_dir_shadow; +extern unsigned char port_pa_data_shadow; +extern unsigned char port_pb_i2c_shadow; +extern unsigned char port_pb_config_shadow; +extern unsigned char port_pb_dir_shadow; +extern unsigned char port_pb_data_shadow; +extern unsigned long r_timer_ctrl_shadow; +extern unsigned long port_90000000_shadow; + +/* macro for setting regs through a shadow - + * r = register name (like R_PORT_PA_DATA) + * s = shadow name (like port_pa_data_shadow) + * b = bit number + * v = value (0 or 1) + */ + +#define REG_SHADOW_SET(r,s,b,v) *r = s = (s & ~(1 << b)) | ((v) << b) + +/* The LED's on various Etrax-based products are set differently. */ + +#if defined(CONFIG_ETRAX_NO_LEDS) || defined(CONFIG_SVINTO_SIM) +#undef CONFIG_ETRAX_PA_LEDS +#undef CONFIG_ETRAX_PB_LEDS +#undef CONFIG_ETRAX_90000000_LEDS +#define LED_NETWORK_RX_SET(x) +#define LED_NETWORK_TX_SET(x) +#define LED_ACTIVE_SET(x) +#define LED_ACTIVE_SET_G(x) +#define LED_ACTIVE_SET_R(x) +#define LED_DISK_WRITE(x) +#define LED_DISK_READ(x) +#endif + +#ifdef CONFIG_ETRAX_PA_LEDS +#define LED_NETWORK_RX_SET(x) \ + REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !x) +#define LED_NETWORK_TX_SET(x) \ + REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !x) +#define LED_ACTIVE_SET(x) \ + REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !x) +#define LED_ACTIVE_SET_G(x) \ + REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !x) +#define LED_ACTIVE_SET_R(x) \ + REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !x) +#define LED_DISK_WRITE(x) \ + REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !x) +#define LED_DISK_READ(x) \ + REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !x) +#endif + +#ifdef CONFIG_ETRAX_PB_LEDS +#define LED_NETWORK_RX_SET(x) \ + REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !x) +#define LED_NETWORK_TX_SET(x) \ + REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !x) +#define LED_ACTIVE_SET(x) \ + REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !x) +#define LED_ACTIVE_SET_G(x) \ + REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !x) +#define LED_ACTIVE_SET_R(x) \ + REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !x) +#define LED_DISK_WRITE(x) \ + REG_SHADOW_SET(R_PORT_PB_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !x) +#define LED_DISK_READ(x) \ + REG_SHADOW_SET(R_PORT_PB_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !x) +#endif + +#ifdef CONFIG_ETRAX_90000000_LEDS +/* TODO: this won't work, need a vremap into kernel virtual memory of 90000000 */ +#define LED_PORT_90 (volatile unsigned long*)0x90000000 +#define LED_ACTIVE_SET(x) \ + REG_SHADOW_SET(LED_PORT_90, port_90000000_shadow, CONFIG_ETRAX_LED2G, !x) +#define LED_NETWORK_RX_SET(x) \ + REG_SHADOW_SET(LED_PORT_90, port_90000000_shadow, CONFIG_ETRAX_LED1G, !x) +#define LED_NETWORK_TX_SET(x) \ + REG_SHADOW_SET(LED_PORT_90, port_90000000_shadow, CONFIG_ETRAX_LED1R, !x) +#define LED_ACTIVE_SET_G(x) \ + REG_SHADOW_SET(LED_PORT_90, port_90000000_shadow, CONFIG_ETRAX_LED2G, !x) +#define LED_ACTIVE_SET_R(x) \ + REG_SHADOW_SET(LED_PORT_90, port_90000000_shadow, CONFIG_ETRAX_LED2R, !x) +#define LED_DISK_WRITE(x) \ + REG_SHADOW_SET(LED_PORT_90, port_90000000_shadow, CONFIG_ETRAX_LED3R, !x) +#define LED_DISK_READ(x) \ + REG_SHADOW_SET(LED_PORT_90, port_90000000_shadow, CONFIG_ETRAX_LED3G, !x) +#endif + +/* + * Change virtual addresses to physical addresses and vv. + */ + +static inline unsigned long virt_to_phys(volatile void * address) +{ + return __pa(address); +} + +static inline void * phys_to_virt(unsigned long address) +{ + return __va(address); +} + +/* + * IO bus memory addresses are also 1:1 with the physical address + */ +#define virt_to_bus virt_to_phys +#define bus_to_virt phys_to_virt + +/* + * readX/writeX() are used to access memory mapped devices. On some + * architectures the memory mapped IO stuff needs to be accessed + * differently. On the CRIS architecture, we just read/write the + * memory location directly. + */ +#define readb(addr) (*(volatile unsigned char *) (addr)) +#define readw(addr) (*(volatile unsigned short *) (addr)) +#define readl(addr) (*(volatile unsigned int *) (addr)) + +#define writeb(b,addr) ((*(volatile unsigned char *) (addr)) = (b)) +#define writew(b,addr) ((*(volatile unsigned short *) (addr)) = (b)) +#define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b)) + +#define memset_io(a,b,c) memset((void *)(a),(b),(c)) +#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) +#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) + +/* + * Again, CRIS does not require mem IO specific function. + */ + +#define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void *)(b),(c),(d)) + +/* The following is junk needed for the arch-independant code but which + * we never use in the CRIS port + */ + +#define IO_SPACE_LIMIT 0xffff +#define inb(x) (0) +#define outb(x,y) +#define outw(x,y) +#define outl(x,y) +#define insb(x,y,z) +#define insw(x,y,z) +#define insl(x,y,z) +#define outsb(x,y,z) +#define outsw(x,y,z) +#define outsl(x,y,z) + +#endif diff --git a/include/asm-cris/ioctl.h b/include/asm-cris/ioctl.h new file mode 100644 index 000000000..bb12a105c --- /dev/null +++ b/include/asm-cris/ioctl.h @@ -0,0 +1,76 @@ +/* + * linux/ioctl.h for Linux by H.H. Bergman. + * + * This is the same as the i386 version. + */ + +#ifndef _ASMCRIS_IOCTL_H +#define _ASMCRIS_IOCTL_H + +/* ioctl command encoding: 32 bits total, command in lower 16 bits, + * size of the parameter structure in the lower 14 bits of the + * upper 16 bits. + * Encoding the size of the parameter structure in the ioctl request + * is useful for catching programs compiled with old versions + * and to avoid overwriting user space outside the user buffer area. + * The highest 2 bits are reserved for indicating the ``access mode''. + * NOTE: This limits the max parameter size to 16kB -1 ! + */ + +/* + * The following is for compatibility across the various Linux + * platforms. The i386 ioctl numbering scheme doesn't really enforce + * a type field. De facto, however, the top 8 bits of the lower 16 + * bits are indeed used as a type field, so we might just as well make + * this explicit here. Please be sure to use the decoding macros + * below from now on. + */ +#define _IOC_NRBITS 8 +#define _IOC_TYPEBITS 8 +#define _IOC_SIZEBITS 14 +#define _IOC_DIRBITS 2 + +#define _IOC_NRMASK ((1 << _IOC_NRBITS)-1) +#define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1) +#define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1) +#define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1) + +#define _IOC_NRSHIFT 0 +#define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS) +#define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS) +#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS) + +/* + * Direction bits. + */ +#define _IOC_NONE 0U +#define _IOC_WRITE 1U +#define _IOC_READ 2U + +#define _IOC(dir,type,nr,size) \ + (((dir) << _IOC_DIRSHIFT) | \ + ((type) << _IOC_TYPESHIFT) | \ + ((nr) << _IOC_NRSHIFT) | \ + ((size) << _IOC_SIZESHIFT)) + +/* used to create numbers */ +#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) +#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) +#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) +#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) + +/* used to decode ioctl numbers.. */ +#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) +#define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) +#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) +#define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK) + +/* ...and for the drivers/sound files... */ + +#define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT) +#define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT) +#define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT) +#define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT) +#define IOCSIZE_SHIFT (_IOC_SIZESHIFT) + +#endif /* _ASMCRIS_IOCTL_H */ diff --git a/include/asm-cris/ioctls.h b/include/asm-cris/ioctls.h new file mode 100644 index 000000000..634628728 --- /dev/null +++ b/include/asm-cris/ioctls.h @@ -0,0 +1,84 @@ +#ifndef __ARCH_CRIS_IOCTLS_H__ +#define __ARCH_CRIS_IOCTLS_H__ + +/* verbatim copy of asm-i386/ioctls.h */ + +#include <asm/ioctl.h> + +/* 0x54 is just a magic number to make these relatively unique ('T') */ + +#define TCGETS 0x5401 +#define TCSETS 0x5402 +#define TCSETSW 0x5403 +#define TCSETSF 0x5404 +#define TCGETA 0x5405 +#define TCSETA 0x5406 +#define TCSETAW 0x5407 +#define TCSETAF 0x5408 +#define TCSBRK 0x5409 +#define TCXONC 0x540A +#define TCFLSH 0x540B +#define TIOCEXCL 0x540C +#define TIOCNXCL 0x540D +#define TIOCSCTTY 0x540E +#define TIOCGPGRP 0x540F +#define TIOCSPGRP 0x5410 +#define TIOCOUTQ 0x5411 +#define TIOCSTI 0x5412 +#define TIOCGWINSZ 0x5413 +#define TIOCSWINSZ 0x5414 +#define TIOCMGET 0x5415 +#define TIOCMBIS 0x5416 +#define TIOCMBIC 0x5417 +#define TIOCMSET 0x5418 +#define TIOCGSOFTCAR 0x5419 +#define TIOCSSOFTCAR 0x541A +#define FIONREAD 0x541B +#define TIOCINQ FIONREAD +#define TIOCLINUX 0x541C +#define TIOCCONS 0x541D +#define TIOCGSERIAL 0x541E +#define TIOCSSERIAL 0x541F +#define TIOCPKT 0x5420 +#define FIONBIO 0x5421 +#define TIOCNOTTY 0x5422 +#define TIOCSETD 0x5423 +#define TIOCGETD 0x5424 +#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ +#define TIOCTTYGSTRUCT 0x5426 /* For debugging only */ +#define TIOCSBRK 0x5427 /* BSD compatibility */ +#define TIOCCBRK 0x5428 /* BSD compatibility */ +#define TIOCGSID 0x5429 /* Return the session ID of FD */ +#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ +#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ + +#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ +#define FIOCLEX 0x5451 +#define FIOASYNC 0x5452 +#define TIOCSERCONFIG 0x5453 +#define TIOCSERGWILD 0x5454 +#define TIOCSERSWILD 0x5455 +#define TIOCGLCKTRMIOS 0x5456 +#define TIOCSLCKTRMIOS 0x5457 +#define TIOCSERGSTRUCT 0x5458 /* For debugging only */ +#define TIOCSERGETLSR 0x5459 /* Get line status register */ +#define TIOCSERGETMULTI 0x545A /* Get multiport config */ +#define TIOCSERSETMULTI 0x545B /* Set multiport config */ + +#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ +#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ +#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */ +#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */ + +/* Used for packet mode */ +#define TIOCPKT_DATA 0 +#define TIOCPKT_FLUSHREAD 1 +#define TIOCPKT_FLUSHWRITE 2 +#define TIOCPKT_STOP 4 +#define TIOCPKT_START 8 +#define TIOCPKT_NOSTOP 16 +#define TIOCPKT_DOSTOP 32 + +#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ + +#endif diff --git a/include/asm-cris/ipc.h b/include/asm-cris/ipc.h new file mode 100644 index 000000000..07e51a11d --- /dev/null +++ b/include/asm-cris/ipc.h @@ -0,0 +1,34 @@ +#ifndef __CRIS_IPC_H__ +#define __CRIS_IPC_H__ + +/* + * These are used to wrap system calls on CRIS. + * + * See arch/cris/kernel/sys_cris.c for ugly details.. + * + * Same as x86 version. + * + */ +struct ipc_kludge { + struct msgbuf *msgp; + long msgtyp; +}; + +#define SEMOP 1 +#define SEMGET 2 +#define SEMCTL 3 +#define MSGSND 11 +#define MSGRCV 12 +#define MSGGET 13 +#define MSGCTL 14 +#define SHMAT 21 +#define SHMDT 22 +#define SHMGET 23 +#define SHMCTL 24 + +/* Used by the DIPC package, try and avoid reusing it */ +#define DIPC 25 + +#define IPCCALL(version,op) ((version)<<16 | (op)) + +#endif diff --git a/include/asm-cris/ipcbuf.h b/include/asm-cris/ipcbuf.h new file mode 100644 index 000000000..8b0c18b02 --- /dev/null +++ b/include/asm-cris/ipcbuf.h @@ -0,0 +1,29 @@ +#ifndef __CRIS_IPCBUF_H__ +#define __CRIS_IPCBUF_H__ + +/* + * The user_ipc_perm structure for CRIS architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 32-bit mode_t and seq + * - 2 miscellaneous 32-bit values + */ + +struct ipc64_perm +{ + __kernel_key_t key; + __kernel_uid32_t uid; + __kernel_gid32_t gid; + __kernel_uid32_t cuid; + __kernel_gid32_t cgid; + __kernel_mode_t mode; + unsigned short __pad1; + unsigned short seq; + unsigned short __pad2; + unsigned long __unused1; + unsigned long __unused2; +}; + +#endif /* __CRIS_IPCBUF_H__ */ diff --git a/include/asm-cris/irq.h b/include/asm-cris/irq.h new file mode 100644 index 000000000..fe88db74e --- /dev/null +++ b/include/asm-cris/irq.h @@ -0,0 +1,102 @@ +/* + * Interrupt handling assembler for Linux/CRIS + * + * Copyright (c) 2000 Axis Communications AB + * + * Authors: Bjorn Wesen (bjornw@axis.com) + * + */ + +#ifndef _ASM_IRQ_H +#define _ASM_IRQ_H + +/* + * linux/include/asm-cris/irq.h + */ + +#include <linux/linkage.h> +#include <asm/segment.h> + +#include <asm/sv_addr_ag.h> + +#define NR_IRQS 26 /* TODO: what is this for Etrax100/LX ? */ + +extern void disable_irq(unsigned int); +extern void enable_irq(unsigned int); + +#define disable_irq_nosync disable_irq +#define enable_irq_nosync enable_irq + +/* our fine, global, etrax irq vector! the pointer lives in the head.S file. */ + +typedef void (*irqvectptr)(void); + +struct etrax_interrupt_vector { + irqvectptr v[256]; +}; + +extern struct etrax_interrupt_vector *etrax_irv; +void set_int_vector(int n, irqvectptr addr, irqvectptr saddr); +void set_break_vector(int n, irqvectptr addr); + +#define __STR(x) #x +#define STR(x) __STR(x) + +/* SAVE_ALL saves registers so they match pt_regs */ + +#define SAVE_ALL \ + "push irp\n\t" /* push instruction pointer */ \ + "push srp\n\t" /* push subroutine return pointer */ \ + "push dccr\n\t" /* push condition codes */ \ + "push mof\n\t" /* push multiply overflow reg */ \ + "di\n\t" /* need to disable irq's at this point */\ + "subq 14*4,sp\n\t" /* make room for r0-r13 */ \ + "movem r13,[sp]\n\t" /* push the r0-r13 registers */ \ + "push r10\n\t" /* push orig_r10 */ \ + "clear.d [sp=sp-4]\n\t" /* frametype - this is a normal stackframe */ + + /* BLOCK_IRQ and UNBLOCK_IRQ do the same as mask_irq and unmask_irq in irq.c */ + +#define BLOCK_IRQ(mask,nr) \ + "move.d " #mask ",r0\n\t" \ + "move.d r0,[0xb00000d8]\n\t" + +#define UNBLOCK_IRQ(mask) \ + "move.d " #mask ",r0\n\t" \ + "move.d r0,[0xb00000dc]\n\t" + +#define IRQ_NAME2(nr) nr##_interrupt(void) +#define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr) +#define sIRQ_NAME(nr) IRQ_NAME2(sIRQ##nr) +#define BAD_IRQ_NAME(nr) IRQ_NAME2(bad_IRQ##nr) + + /* the asm IRQ handler makes sure the causing IRQ is blocked, then it calls + * do_IRQ (with irq disabled still). after that it unblocks and jumps to + * ret_from_intr (entry.S) + */ + +#define BUILD_IRQ(nr,mask) \ +void IRQ_NAME(nr); \ +void sIRQ_NAME(nr); \ +void BAD_IRQ_NAME(nr); \ +__asm__ ( \ + ".text\n\t" \ + "_IRQ" #nr "_interrupt:\n\t" \ + SAVE_ALL \ + "_sIRQ" #nr "_interrupt:\n\t" /* shortcut for the multiple irq handler */ \ + BLOCK_IRQ(mask,nr) /* this must be done to prevent irq loops when we ei later */ \ + "moveq "#nr",r10\n\t" \ + "move.d sp,r11\n\t" \ + "jsr _do_IRQ\n\t" /* irq.c, r10 and r11 are arguments */ \ + UNBLOCK_IRQ(mask) \ + "moveq 0,r9\n\t" /* make ret_from_intr realise we came from an irq */ \ + "jump _ret_from_intr\n\t" \ + "_bad_IRQ" #nr "_interrupt:\n\t" \ + "push r0\n\t" \ + BLOCK_IRQ(mask,nr) \ + "pop r0\n\t"); + + +#endif /* _ASM_IRQ_H */ + + diff --git a/include/asm-cris/locks.h b/include/asm-cris/locks.h new file mode 100644 index 000000000..a075e92bd --- /dev/null +++ b/include/asm-cris/locks.h @@ -0,0 +1,133 @@ +/* + * SMP locks primitives for building ix86 locks + * (not yet used). + * + * Alan Cox, alan@cymru.net, 1995 + */ + +/* + * This would be much easier but far less clear and easy + * to borrow for other processors if it was just assembler. + */ + +extern __inline__ void prim_spin_lock(struct spinlock *sp) +{ + int processor=smp_processor_id(); + + /* + * Grab the lock bit + */ + + while(lock_set_bit(0,&sp->lock)) + { + /* + * Failed, but that's cos we own it! + */ + + if(sp->cpu==processor) + { + sp->users++; + return 0; + } + /* + * Spin in the cache S state if possible + */ + while(sp->lock) + { + /* + * Wait for any invalidates to go off + */ + + if(smp_invalidate_needed&(1<<processor)) + while(lock_clear_bit(processor,&smp_invalidate_needed)) + local_flush_tlb(); + sp->spins++; + } + /* + * Someone wrote the line, we go 'I' and get + * the cache entry. Now try to regrab + */ + } + sp->users++;sp->cpu=processor; + return 1; +} + +/* + * Release a spin lock + */ + +extern __inline__ int prim_spin_unlock(struct spinlock *sp) +{ + /* This is safe. The decrement is still guarded by the lock. A multilock would + not be safe this way */ + if(!--sp->users) + { + lock_clear_bit(0,&sp->lock);sp->cpu= NO_PROC_ID; + return 1; + } + return 0; +} + + +/* + * Non blocking lock grab + */ + +extern __inline__ int prim_spin_lock_nb(struct spinlock *sp) +{ + if(lock_set_bit(0,&sp->lock)) + return 0; /* Locked already */ + sp->users++; + return 1; /* We got the lock */ +} + + +/* + * These wrap the locking primitives up for usage + */ + +extern __inline__ void spinlock(struct spinlock *sp) +{ + if(sp->priority<current->lock_order) + panic("lock order violation: %s (%d)\n", sp->name, current->lock_order); + if(prim_spin_lock(sp)) + { + /* + * We got a new lock. Update the priority chain + */ + sp->oldpri=current->lock_order; + current->lock_order=sp->priority; + } +} + +extern __inline__ void spinunlock(struct spinlock *sp) +{ + if(current->lock_order!=sp->priority) + panic("lock release order violation %s (%d)\n", sp->name, current->lock_order); + if(prim_spin_unlock(sp)) + { + /* + * Update the debugging lock priority chain. We dumped + * our last right to the lock. + */ + current->lock_order=sp->oldpri; + } +} + +extern __inline__ void spintestlock(struct spinlock *sp) +{ + /* + * We do no sanity checks, it's legal to optimistically + * get a lower lock. + */ + prim_spin_lock_nb(sp); +} + +extern __inline__ void spintestunlock(struct spinlock *sp) +{ + /* + * A testlock doesn't update the lock chain so we + * must not update it on free + */ + prim_spin_unlock(sp); +} diff --git a/include/asm-cris/mman.h b/include/asm-cris/mman.h new file mode 100644 index 000000000..827849b9f --- /dev/null +++ b/include/asm-cris/mman.h @@ -0,0 +1,40 @@ +#ifndef __CRIS_MMAN_H__ +#define __CRIS_MMAN_H__ + +/* verbatim copy of asm-i386/ version */ + +#define PROT_READ 0x1 /* page can be read */ +#define PROT_WRITE 0x2 /* page can be written */ +#define PROT_EXEC 0x4 /* page can be executed */ +#define PROT_NONE 0x0 /* page can not be accessed */ + +#define MAP_SHARED 0x01 /* Share changes */ +#define MAP_PRIVATE 0x02 /* Changes are private */ +#define MAP_TYPE 0x0f /* Mask for type of mapping */ +#define MAP_FIXED 0x10 /* Interpret addr exactly */ +#define MAP_ANONYMOUS 0x20 /* don't use a file */ + +#define MAP_GROWSDOWN 0x0100 /* stack-like segment */ +#define MAP_DENYWRITE 0x0800 /* ETXTBSY */ +#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ +#define MAP_LOCKED 0x2000 /* pages are locked */ +#define MAP_NORESERVE 0x4000 /* don't check for reservations */ + +#define MS_ASYNC 1 /* sync memory asynchronously */ +#define MS_INVALIDATE 2 /* invalidate the caches */ +#define MS_SYNC 4 /* synchronous memory sync */ + +#define MCL_CURRENT 1 /* lock all current mappings */ +#define MCL_FUTURE 2 /* lock all future mappings */ + +#define MADV_NORMAL 0x0 /* default page-in behavior */ +#define MADV_RANDOM 0x1 /* page-in minimum required */ +#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */ +#define MADV_WILLNEED 0x3 /* pre-fault pages */ +#define MADV_DONTNEED 0x4 /* discard these pages */ + +/* compatibility flags */ +#define MAP_ANON MAP_ANONYMOUS +#define MAP_FILE 0 + +#endif /* __CRIS_MMAN_H__ */ diff --git a/include/asm-cris/mmu.h b/include/asm-cris/mmu.h new file mode 100644 index 000000000..df2d5ee85 --- /dev/null +++ b/include/asm-cris/mmu.h @@ -0,0 +1,62 @@ +/* + * CRIS MMU constants and PTE layout + */ + +#ifndef _CRIS_MMU_H +#define _CRIS_MMU_H + +/* type used in struct mm to couple an MMU context to an active mm */ + +typedef unsigned int mm_context_t; + +/* kernel memory segments */ + +#define KSEG_F 0xf0000000UL +#define KSEG_E 0xe0000000UL +#define KSEG_D 0xd0000000UL +#define KSEG_C 0xc0000000UL +#define KSEG_B 0xb0000000UL +#define KSEG_A 0xa0000000UL +#define KSEG_9 0x90000000UL +#define KSEG_8 0x80000000UL +#define KSEG_7 0x70000000UL +#define KSEG_6 0x60000000UL +#define KSEG_5 0x50000000UL +#define KSEG_4 0x40000000UL +#define KSEG_3 0x30000000UL +#define KSEG_2 0x20000000UL +#define KSEG_1 0x10000000UL +#define KSEG_0 0x00000000UL + +/* CRIS PTE bits (see R_TLB_LO in the register description) + * + * Bit: 31-13 12-------4 3 2 1 0 + * ________________________________________________ + * | pfn | reserved | global | valid | kernel | we | + * |_____|__________|________|_______|________|_____| + * + * (pfn = physical frame number) + */ + +/* Real HW-based PTE bits. We use some synonym names so that + * things become less confusing in combination with the SW-based + * bits further below. + * + */ + +#define _PAGE_WE (1<<0) /* page is write-enabled */ +#define _PAGE_SILENT_WRITE (1<<0) /* synonym */ +#define _PAGE_KERNEL (1<<1) /* page is kernel only */ +#define _PAGE_VALID (1<<2) /* page is valid */ +#define _PAGE_SILENT_READ (1<<2) /* synonym */ +#define _PAGE_GLOBAL (1<<3) /* global page - context is ignored */ + +/* Bits the HW doesn't care about but the kernel uses them in SW */ + +#define _PAGE_PRESENT (1<<4) /* page present in memory */ +#define _PAGE_ACCESSED (1<<5) /* simulated in software using valid bit */ +#define _PAGE_MODIFIED (1<<6) /* simulated in software using we bit */ +#define _PAGE_READ (1<<7) /* read-enabled */ +#define _PAGE_WRITE (1<<8) /* write-enabled */ + +#endif diff --git a/include/asm-cris/mmu_context.h b/include/asm-cris/mmu_context.h new file mode 100644 index 000000000..f45447c3d --- /dev/null +++ b/include/asm-cris/mmu_context.h @@ -0,0 +1,16 @@ +#ifndef __CRIS_MMU_CONTEXT_H +#define __CRIS_MMU_CONTEXT_H + +extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm); +extern void get_mmu_context(struct mm_struct *mm); +extern void destroy_context(struct mm_struct *mm); +extern void switch_mm(struct mm_struct *prev, struct mm_struct *next, + struct task_struct *tsk, int cpu); + +#define activate_mm(prev,next) switch_mm((prev),(next),NULL,smp_processor_id()) + +static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk, unsigned cpu) +{ +} + +#endif diff --git a/include/asm-cris/module.h b/include/asm-cris/module.h new file mode 100644 index 000000000..aeba10fec --- /dev/null +++ b/include/asm-cris/module.h @@ -0,0 +1,11 @@ +#ifndef _ASM_CRIS_MODULE_H +#define _ASM_CRIS_MODULE_H +/* + * This file contains the CRIS architecture specific module code. + */ + +#define module_map(x) vmalloc(x) +#define module_unmap(x) vfree(x) +#define module_arch_init(x) (0) + +#endif /* _ASM_CRIS_MODULE_H */ diff --git a/include/asm-cris/msgbuf.h b/include/asm-cris/msgbuf.h new file mode 100644 index 000000000..ada63df1d --- /dev/null +++ b/include/asm-cris/msgbuf.h @@ -0,0 +1,33 @@ +#ifndef _CRIS_MSGBUF_H +#define _CRIS_MSGBUF_H + +/* verbatim copy of asm-i386 version */ + +/* + * The msqid64_ds structure for CRIS architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 64-bit time_t to solve y2038 problem + * - 2 miscellaneous 32-bit values + */ + +struct msqid64_ds { + struct ipc64_perm msg_perm; + __kernel_time_t msg_stime; /* last msgsnd time */ + unsigned long __unused1; + __kernel_time_t msg_rtime; /* last msgrcv time */ + unsigned long __unused2; + __kernel_time_t msg_ctime; /* last change time */ + unsigned long __unused3; + unsigned long msg_cbytes; /* current number of bytes on queue */ + unsigned long msg_qnum; /* number of messages in queue */ + unsigned long msg_qbytes; /* max number of bytes on queue */ + __kernel_pid_t msg_lspid; /* pid of last msgsnd */ + __kernel_pid_t msg_lrpid; /* last receive pid */ + unsigned long __unused4; + unsigned long __unused5; +}; + +#endif /* _CRIS_MSGBUF_H */ diff --git a/include/asm-cris/namei.h b/include/asm-cris/namei.h new file mode 100644 index 000000000..f244273e3 --- /dev/null +++ b/include/asm-cris/namei.h @@ -0,0 +1,17 @@ +/* $Id: namei.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $ + * linux/include/asm-cris/namei.h + * + * Included from linux/fs/namei.c + */ + +#ifndef __CRIS_NAMEI_H +#define __CRIS_NAMEI_H + +/* used to find file-system prefixes for doing emulations + * see for example asm-sparc/namei.h + * we dont use it... + */ + +#define __emul_prefix() NULL + +#endif /* __CRIS_NAMEI_H */ diff --git a/include/asm-cris/page.h b/include/asm-cris/page.h new file mode 100644 index 000000000..549345ff4 --- /dev/null +++ b/include/asm-cris/page.h @@ -0,0 +1,118 @@ +#ifndef _CRIS_PAGE_H +#define _CRIS_PAGE_H + +#include <linux/config.h> +#include <asm/mmu.h> + +/* PAGE_SHIFT determines the page size */ +#define PAGE_SHIFT 13 +#define PAGE_SIZE (1UL << PAGE_SHIFT) +#define PAGE_MASK (~(PAGE_SIZE-1)) + +#ifdef __KERNEL__ + +#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) +#define copy_page(to,from) memcpy((void *)(to), (void *)(from), PAGE_SIZE) + +#define clear_user_page(page, vaddr) clear_page(page) +#define copy_user_page(to, from, vaddr) copy_page(to, from) + +#define STRICT_MM_TYPECHECKS + +#ifdef STRICT_MM_TYPECHECKS +/* + * These are used to make use of C type-checking.. + */ +typedef struct { unsigned long pte; } pte_t; +typedef struct { unsigned long pmd; } pmd_t; +typedef struct { unsigned long pgd; } pgd_t; +typedef struct { unsigned long pgprot; } pgprot_t; + +#define pte_val(x) ((x).pte) +#define pmd_val(x) ((x).pmd) +#define pgd_val(x) ((x).pgd) +#define pgprot_val(x) ((x).pgprot) + +#define __pte(x) ((pte_t) { (x) } ) +#define __pmd(x) ((pmd_t) { (x) } ) +#define __pgd(x) ((pgd_t) { (x) } ) +#define __pgprot(x) ((pgprot_t) { (x) } ) + +#else +/* + * .. while these make it easier on the compiler + */ +typedef unsigned long pte_t; +typedef unsigned long pmd_t; +typedef unsigned long pgd_t; +typedef unsigned long pgprot_t; + +#define pte_val(x) (x) +#define pmd_val(x) (x) +#define pgd_val(x) (x) +#define pgprot_val(x) (x) + +#define __pte(x) (x) +#define __pmd(x) (x) +#define __pgd(x) (x) +#define __pgprot(x) (x) + +#endif + +/* to align the pointer to the (next) page boundary */ +#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) + +/* This handles the memory map.. */ + +#ifdef CONFIG_CRIS_LOW_MAP +#define PAGE_OFFSET KSEG_6 /* kseg_6 is mapped to physical ram */ +#else +#define PAGE_OFFSET KSEG_C /* kseg_c is mapped to physical ram */ +#endif + +#ifndef __ASSEMBLY__ + +#define BUG() do { \ + printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \ +} while (0) + +#define PAGE_BUG(page) do { \ + BUG(); \ +} while (0) + +#endif /* __ASSEMBLY__ */ + +/* macros to convert between really physical and virtual addresses + * by stripping a selected bit, we can convert between KSEG_x and 0x40000000 where + * the DRAM really resides + */ + +#ifdef CONFIG_CRIS_LOW_MAP +/* we have DRAM virtually at 0x6 */ +#define __pa(x) ((unsigned long)(x) & 0xdfffffff) +#define __va(x) ((void *)((unsigned long)(x) | 0x20000000)) +#else +/* we have DRAM virtually at 0xc */ +#define __pa(x) ((unsigned long)(x) & 0x7fffffff) +#define __va(x) ((void *)((unsigned long)(x) | 0x80000000)) +#endif + +/* to index into the page map. our pages all start at physical addr PAGE_OFFSET so + * we can let the map start there. notice that we subtract PAGE_OFFSET because + * we start our mem_map there - in other ports they map mem_map physically and + * use __pa instead. in our system both the physical and virtual address of DRAM + * is too high to let mem_map start at 0, so we do it this way instead (similar + * to arm and m68k I think) + */ + +#define virt_to_page(kaddr) (mem_map + (((unsigned long)kaddr - PAGE_OFFSET) >> PAGE_SHIFT)) +#define VALID_PAGE(page) ((page - mem_map) < max_mapnr) + +/* from linker script */ + +extern unsigned long dram_start, dram_end; + +#endif /* __KERNEL__ */ + +#endif /* _CRIS_PAGE_H */ + diff --git a/include/asm-cris/param.h b/include/asm-cris/param.h new file mode 100644 index 000000000..50fe5729b --- /dev/null +++ b/include/asm-cris/param.h @@ -0,0 +1,24 @@ +#ifndef _ASMCRIS_PARAM_H +#define _ASMCRIS_PARAM_H + +#ifndef HZ +#define HZ 100 +#endif + +#define EXEC_PAGESIZE 8192 + +#ifndef NGROUPS +#define NGROUPS 32 +#endif + +#ifndef NOGROUP +#define NOGROUP (-1) +#endif + +#define MAXHOSTNAMELEN 64 /* max length of hostname */ + +#ifdef __KERNEL__ +# define CLOCKS_PER_SEC 100 /* frequency at which times() counts */ +#endif + +#endif diff --git a/include/asm-cris/pci.h b/include/asm-cris/pci.h new file mode 100644 index 000000000..e080860b4 --- /dev/null +++ b/include/asm-cris/pci.h @@ -0,0 +1,9 @@ +#ifndef __ASM_CRIS_PCI_H +#define __ASM_CRIS_PCI_H + +/* ETRAX chips don't have a PCI bus. This file is just here because some stupid .c code + * includes it even if CONFIG_PCI is not set. + */ + +#endif /* __ASM_CRIS_PCI_H */ + diff --git a/include/asm-cris/pgalloc.h b/include/asm-cris/pgalloc.h new file mode 100644 index 000000000..3f955459c --- /dev/null +++ b/include/asm-cris/pgalloc.h @@ -0,0 +1,200 @@ +#ifndef _CRIS_PGALLOC_H +#define _CRIS_PGALLOC_H + +#include <linux/config.h> +#include <asm/page.h> +#include <linux/threads.h> + +/* bunch of protos */ + +extern pgd_t *get_pgd_slow(void); +extern void free_pgd_slow(pgd_t *pgd); +extern __inline__ void free_pmd_slow(pmd_t *pmd) { } +extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted); +extern pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long address_preadjusted); + +/* first the non-cached versions */ + +extern __inline__ void free_pte_slow(pte_t *pte) +{ + free_page((unsigned long)pte); +} + +extern __inline__ pgd_t *get_pgd_slow(void) +{ + pgd_t *ret = (pgd_t *)__get_free_page(GFP_KERNEL); + + if (ret) { + memset(ret, 0, USER_PTRS_PER_PGD * sizeof(pgd_t)); + memcpy(ret + USER_PTRS_PER_PGD, swapper_pg_dir + USER_PTRS_PER_PGD, + (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); + } + return ret; +} + +extern __inline__ void free_pgd_slow(pgd_t *pgd) +{ + free_page((unsigned long)pgd); +} + +/* + * Now for the page table cache versions + */ + +#ifndef CONFIG_NO_PGT_CACHE + +#ifdef CONFIG_SMP +#error Pgtable caches have to be per-CPU, so that no locking is needed. +#endif /* CONFIG_SMP */ + +extern struct pgtable_cache_struct { + unsigned long *pgd_cache; + unsigned long *pte_cache; + unsigned long pgtable_cache_sz; +} quicklists; + +#define pgd_quicklist (quicklists.pgd_cache) +#define pmd_quicklist ((unsigned long *)0) +#define pte_quicklist (quicklists.pte_cache) +#define pgtable_cache_size (quicklists.pgtable_cache_sz) + +extern __inline__ pgd_t *get_pgd_fast(void) +{ + unsigned long *ret; + + if ((ret = pgd_quicklist) != NULL) { + pgd_quicklist = (unsigned long *)(*ret); + ret[0] = 0; + pgtable_cache_size--; + } else + ret = (unsigned long *)get_pgd_slow(); + return (pgd_t *)ret; +} + +extern __inline__ void free_pgd_fast(pgd_t *pgd) +{ + *(unsigned long *)pgd = (unsigned long) pgd_quicklist; + pgd_quicklist = (unsigned long *) pgd; + pgtable_cache_size++; +} + +/* We don't use pmd cache, so this is a dummy routine */ + +extern __inline__ pmd_t *get_pmd_fast(void) +{ + return (pmd_t *)0; +} + +extern __inline__ void free_pmd_fast(pmd_t *pmd) { } + +extern __inline__ pte_t *get_pte_fast(void) +{ + unsigned long *ret; + + if((ret = (unsigned long *)pte_quicklist) != NULL) { + pte_quicklist = (unsigned long *)(*ret); + ret[0] = ret[1]; + pgtable_cache_size--; + } + return (pte_t *)ret; +} + +extern __inline__ void free_pte_fast(pte_t *pte) +{ + *(unsigned long *)pte = (unsigned long) pte_quicklist; + pte_quicklist = (unsigned long *) pte; + pgtable_cache_size++; +} + +#else /* CONFIG_NO_PGT_CACHE */ + +#define pgd_quicklist ((unsigned long *)0) +#define pmd_quicklist ((unsigned long *)0) +#define pte_quicklist ((unsigned long *)0) + +#define get_pgd_fast() ((pgd_t *)0) +#define get_pmd_fast() ((pmd_t *)0) +#define get_pte_fast() ((pte_t *)0) + +#define free_pgd_fast(pgd) free_pgd_slow(pgd) +#define free_pmd_fast(pmd) free_pmd_slow(pmd) +#define free_pte_fast(pte) free_pte_slow(pte) + +#endif /* CONFIG_NO_PGT_CACHE */ + +/* + * Allocate and free page tables. The xxx_kernel() versions are + * used to allocate a kernel page table - this turns on ASN bits + * if any. + */ + +#define pte_free_kernel(pte) free_pte_slow(pte) +#define pte_free(pte) free_pte_slow(pte) + +extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address) +{ + if (!pmd) + BUG(); + address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); + if (pmd_none(*pmd)) { + pte_t * page = (pte_t *) get_pte_fast(); + if (!page) + return get_pte_kernel_slow(pmd, address); + pmd_set_kernel(pmd, page); + return page + address; + } + if (pmd_bad(*pmd)) { + __handle_bad_pmd_kernel(pmd); + return NULL; + } + return (pte_t *) pmd_page(*pmd) + address; +} + +extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address) +{ + address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); + + if (pmd_none(*pmd)) + goto getnew; + if (pmd_bad(*pmd)) + goto fix; + return (pte_t *)pmd_page(*pmd) + address; + getnew: + { + pte_t * page = (pte_t *) get_pte_fast(); + if (!page) + return get_pte_slow(pmd, address); + pmd_set(pmd, page); + return page + address; + } + fix: + __handle_bad_pmd(pmd); + return NULL; +} + +/* + * allocating and freeing a pmd is trivial: the 1-entry pmd is + * inside the pgd, so has no extra memory associated with it. + */ + +#define pmd_free(pmd) free_pmd_slow(pmd) +#define pmd_free_kernel pmd_free +#define pmd_alloc_kernel pmd_alloc + +extern inline pmd_t * pmd_alloc(pgd_t *pgd, unsigned long address) +{ + if (!pgd) + BUG(); + return (pmd_t *) pgd; +} + +/* pgd handling */ + +#define pgd_free(pgd) free_pgd_slow(pgd) +#define pgd_alloc() get_pgd_fast() + +/* other stuff */ + +extern int do_check_pgt_cache(int, int); + +#endif diff --git a/include/asm-cris/pgtable.h b/include/asm-cris/pgtable.h new file mode 100644 index 000000000..c863cdbb7 --- /dev/null +++ b/include/asm-cris/pgtable.h @@ -0,0 +1,518 @@ +/* CRIS pgtable.h - macros and functions to manipulate page tables + * + * HISTORY: + * + * $Log: pgtable.h,v $ + * Revision 1.9 2000/11/22 14:57:53 bjornw + * * extern inline -> static inline + * * include asm-generic/pgtable.h + * + * Revision 1.8 2000/11/21 13:56:16 bjornw + * Use CONFIG_CRIS_LOW_MAP for the low VM map instead of explicit CPU type + * + * Revision 1.7 2000/10/06 15:05:32 bjornw + * VMALLOC area changed in memory mapping change + * + * Revision 1.6 2000/10/04 16:59:14 bjornw + * Changed comments + * + * Revision 1.5 2000/09/13 14:39:53 bjornw + * New macros + * + * Revision 1.4 2000/08/17 15:38:48 bjornw + * 2.4.0-test6 modifications: + * * flush_dcache_page added + * * MAP_NR removed + * * virt_to_page added + * + * Plus some comments and type-clarifications. + * + * Revision 1.3 2000/08/15 16:33:35 bjornw + * pmd_bad should recognize both kernel and user page-tables + * + * Revision 1.2 2000/07/10 17:06:01 bjornw + * Fixed warnings + * + * Revision 1.1.1.1 2000/07/10 16:32:31 bjornw + * CRIS architecture, working draft + * + * + * Revision 1.11 2000/05/29 14:55:56 bjornw + * Small tweaks of pte_mk routines + * + * Revision 1.10 2000/01/27 01:49:06 bjornw + * * Ooops. The physical frame number in a PTE entry needs to point to the + * DRAM directly, not to what the kernel thinks is DRAM (due to KSEG mapping). + * Hence we need to strip bit 31 so 0xcXXXXXXX -> 0x4XXXXXXX. + * + * Revision 1.9 2000/01/26 16:25:50 bjornw + * Fixed PAGE_KERNEL bits + * + * Revision 1.8 2000/01/23 22:53:22 bjornw + * Correct flush_tlb_* macros and externs + * + * Revision 1.7 2000/01/18 16:22:55 bjornw + * Use PAGE_MASK instead of PFN_MASK. + * + * Revision 1.6 2000/01/17 02:42:53 bjornw + * Added the pmd_set macro. + * + * Revision 1.5 2000/01/16 19:53:42 bjornw + * Removed VMALLOC_OFFSET. Changed definitions of swapper_pg_dir and zero_page. + * + * Revision 1.4 2000/01/14 16:38:20 bjornw + * PAGE_DIRTY -> PAGE_SILENT_WRITE, removed PAGE_COW from PAGE_COPY. + * + * Revision 1.3 1999/12/04 20:12:21 bjornw + * * PTE bits have moved to asm/mmu.h + * * Fixed definitions of the higher level page protection bits + * * Added the pte_* functions, including dirty/accessed SW simulation + * (these are exactly the same as for the MIPS port) + * + * Revision 1.2 1999/12/04 00:41:54 bjornw + * * Fixed page table offsets, sizes and shifts + * * Removed reference to i386 SMP stuff + * * Added stray comments about Linux/CRIS mm design + * * Include asm/mmu.h which will contain MMU details + * + * Revision 1.1 1999/12/03 15:04:02 bjornw + * Copied from include/asm-etrax100. For the new CRIS architecture. + */ + +#ifndef _CRIS_PGTABLE_H +#define _CRIS_PGTABLE_H + +#include <linux/config.h> +#include <asm/mmu.h> + +/* + * The Linux memory management assumes a three-level page table setup. On + * CRIS, we use that, but "fold" the mid level into the top-level page + * table. Since the MMU TLB is software loaded through an interrupt, it + * supports any page table structure, so we could have used a three-level + * setup, but for the amounts of memory we normally use, a two-level is + * probably more efficient. + * + * This file contains the functions and defines necessary to modify and use + * the CRIS page table tree. + */ + +/* The cache doesn't need to be flushed when TLB entries change (I think!) */ +#define flush_cache_all() do { } while (0) +#define flush_cache_mm(mm) do { } while (0) +#define flush_cache_range(mm, start, end) do { } while (0) +#define flush_cache_page(vma, vmaddr) do { } while (0) +#define flush_page_to_ram(page) do { } while (0) +#define flush_dcache_page(page) do { } while (0) +#define flush_icache_range(start, end) do { } while (0) +#define flush_icache_page(vma,pg) do { } while (0) + +/* + * TLB flushing (implemented in arch/cris/mm/tlb.c): + * + * - flush_tlb() flushes the current mm struct TLBs + * - flush_tlb_all() flushes all processes TLBs + * - flush_tlb_mm(mm) flushes the specified mm context TLB's + * - flush_tlb_page(vma, vmaddr) flushes one page + * - flush_tlb_range(mm, start, end) flushes a range of pages + * + */ + +extern void flush_tlb_all(void); +extern void flush_tlb_mm(struct mm_struct *mm); +extern void flush_tlb_page(struct vm_area_struct *vma, + unsigned long addr); +extern void flush_tlb_range(struct mm_struct *mm, + unsigned long start, + unsigned long end); + +static inline void flush_tlb_pgtables(struct mm_struct *mm, + unsigned long start, unsigned long end) +{ + /* CRIS does not keep any page table caches in TLB */ +} + + +static inline void flush_tlb(void) +{ + flush_tlb_mm(current->mm); +} + +/* Certain architectures need to do special things when pte's + * within a page table are directly modified. Thus, the following + * hook is made available. + */ +#define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval)) +/* + * (pmds are folded into pgds so this doesnt get actually called, + * but the define is needed for a generic inline function.) + */ +#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) +#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval) + +/* PMD_SHIFT determines the size of the area a second-level page table can + * map. It is equal to the page size times the number of PTE's that fit in + * a PMD page. A PTE is 4-bytes in CRIS. Hence the following number. + */ + +#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-2)) +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) + +/* PGDIR_SHIFT determines what a third-level page table entry can map. + * Since we fold into a two-level structure, this is the same as PMD_SHIFT. + */ + +#define PGDIR_SHIFT PMD_SHIFT +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) + +/* + * entries per page directory level: we use a two-level, so + * we don't really have any PMD directory physically. + * pointers are 4 bytes so we can use the page size and + * divide it by 4 (shift by 2). + */ +#define PTRS_PER_PTE (1UL << (PAGE_SHIFT-2)) +#define PTRS_PER_PMD 1 +#define PTRS_PER_PGD (1UL << (PAGE_SHIFT-2)) + +/* calculate how many PGD entries a user-level program can use + * the first mappable virtual address is 0 + * (TASK_SIZE is the maximum virtual address space) + */ + +#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) +#define FIRST_USER_PGD_NR 0 + +/* + * Kernels own virtual memory area. + */ + +#ifdef CONFIG_CRIS_LOW_MAP +#define VMALLOC_START KSEG_7 +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END KSEG_8 +#else +#define VMALLOC_START KSEG_D +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END KSEG_E +#endif + +/* Define some higher level generic page attributes. The PTE bits are + * defined in asm-cris/mmu.h, and these are just combinations of those. + */ + +#define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED) +#define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED) + +#define _PAGE_TABLE (_PAGE_PRESENT | __READABLE | __WRITEABLE) +#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_SILENT_WRITE) + +#define PAGE_NONE __pgprot(_PAGE_PRESENT | __READABLE) +#define PAGE_SHARED __pgprot(_PAGE_PRESENT | __READABLE | _PAGE_WRITE | \ + _PAGE_ACCESSED) +#define PAGE_COPY __pgprot(_PAGE_PRESENT | __READABLE) // | _PAGE_COW +#define PAGE_READONLY __pgprot(_PAGE_PRESENT | __READABLE) +#define PAGE_KERNEL __pgprot(_PAGE_GLOBAL | _PAGE_KERNEL | \ + _PAGE_PRESENT | __READABLE | __WRITEABLE) +#define _KERNPG_TABLE (_PAGE_TABLE | _PAGE_KERNEL) + +/* + * CRIS can't do page protection for execute, and considers read the same. + * Also, write permissions imply read permissions. This is the closest we can + * get.. + */ + +#define __P000 PAGE_NONE +#define __P001 PAGE_READONLY +#define __P010 PAGE_COPY +#define __P011 PAGE_COPY +#define __P100 PAGE_READONLY +#define __P101 PAGE_READONLY +#define __P110 PAGE_COPY +#define __P111 PAGE_COPY + +#define __S000 PAGE_NONE +#define __S001 PAGE_READONLY +#define __S010 PAGE_SHARED +#define __S011 PAGE_SHARED +#define __S100 PAGE_READONLY +#define __S101 PAGE_READONLY +#define __S110 PAGE_SHARED +#define __S111 PAGE_SHARED + +/* zero page used for uninitialized stuff */ +extern unsigned long empty_zero_page; + +/* + * BAD_PAGETABLE is used when we need a bogus page-table, while + * BAD_PAGE is used for a bogus page. + * + * ZERO_PAGE is a global shared page that is always zero: used + * for zero-mapped memory areas etc.. + */ +extern pte_t __bad_page(void); +extern pte_t * __bad_pagetable(void); + +#define BAD_PAGETABLE __bad_pagetable() +#define BAD_PAGE __bad_page() +#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) + +/* + * Handling allocation failures during page table setup. + */ +extern void __handle_bad_pmd(pmd_t * pmd); +extern void __handle_bad_pmd_kernel(pmd_t * pmd); + +/* number of bits that fit into a memory pointer */ +#define BITS_PER_PTR (8*sizeof(unsigned long)) + +/* to align the pointer to a pointer address */ +#define PTR_MASK (~(sizeof(void*)-1)) + +/* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */ +/* 64-bit machines, beware! SRB. */ +#define SIZEOF_PTR_LOG2 2 + +/* to find an entry in a page-table */ +#define PAGE_PTR(address) \ +((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK) + +/* to set the page-dir */ +#define SET_PAGE_DIR(tsk,pgdir) + +#define pte_none(x) (!pte_val(x)) +#define pte_present(x) (pte_val(x) & _PAGE_PRESENT) +#define pte_clear(xp) do { pte_val(*(xp)) = 0; } while (0) + +#define pmd_none(x) (!pmd_val(x)) +/* by removing the _PAGE_KERNEL bit from the comparision, the same pmd_bad + * works for both _PAGE_TABLE and _KERNPG_TABLE pmd entries. + */ +#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_KERNEL)) != _PAGE_TABLE) +#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) +#define pmd_clear(xp) do { pmd_val(*(xp)) = 0; } while (0) + +/* + * The "pgd_xxx()" functions here are trivial for a folded two-level + * setup: the pgd is never bad, and a pmd always exists (as it's folded + * into the pgd entry) + */ +static inline int pgd_none(pgd_t pgd) { return 0; } +static inline int pgd_bad(pgd_t pgd) { return 0; } +static inline int pgd_present(pgd_t pgd) { return 1; } +static inline void pgd_clear(pgd_t * pgdp) { } + +/* + * The following only work if pte_present() is true. + * Undefined behaviour if not.. + */ + +static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; } +static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } +static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_READ; } +static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; } +static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } + +static inline pte_t pte_wrprotect(pte_t pte) +{ + pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); + return pte; +} + +static inline pte_t pte_rdprotect(pte_t pte) +{ + pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ); + return pte; +} + +static inline pte_t pte_exprotect(pte_t pte) +{ + pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ); + return pte; +} + +static inline pte_t pte_mkclean(pte_t pte) +{ + pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE); + return pte; +} + +static inline pte_t pte_mkold(pte_t pte) +{ + pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ); + return pte; +} + +static inline pte_t pte_mkwrite(pte_t pte) +{ + pte_val(pte) |= _PAGE_WRITE; + if (pte_val(pte) & _PAGE_MODIFIED) + pte_val(pte) |= _PAGE_SILENT_WRITE; + return pte; +} + +static inline pte_t pte_mkread(pte_t pte) +{ + pte_val(pte) |= _PAGE_READ; + if (pte_val(pte) & _PAGE_ACCESSED) + pte_val(pte) |= _PAGE_SILENT_READ; + return pte; +} + +static inline pte_t pte_mkexec(pte_t pte) +{ + pte_val(pte) |= _PAGE_READ; + if (pte_val(pte) & _PAGE_ACCESSED) + pte_val(pte) |= _PAGE_SILENT_READ; + return pte; +} + +static inline pte_t pte_mkdirty(pte_t pte) +{ + pte_val(pte) |= _PAGE_MODIFIED; + if (pte_val(pte) & _PAGE_WRITE) + pte_val(pte) |= _PAGE_SILENT_WRITE; + return pte; +} + +static inline pte_t pte_mkyoung(pte_t pte) +{ + pte_val(pte) |= _PAGE_ACCESSED; + if (pte_val(pte) & _PAGE_READ) + { + pte_val(pte) |= _PAGE_SILENT_READ; + if ((pte_val(pte) & (_PAGE_WRITE | _PAGE_MODIFIED)) == + (_PAGE_WRITE | _PAGE_MODIFIED)) + pte_val(pte) |= _PAGE_SILENT_WRITE; + } + return pte; +} + +/* + * Conversion functions: convert a page and protection to a page entry, + * and a page entry and page directory to the page they refer to. + */ + +/* What actually goes as arguments to the various functions is less than + * obvious, but a rule of thumb is that struct page's goes as struct page *, + * really physical DRAM addresses are unsigned long's, and DRAM "virtual" + * addresses (the 0xc0xxxxxx's) goes as void *'s. + */ + +static inline pte_t __mk_pte(void * page, pgprot_t pgprot) +{ + pte_t pte; + /* the PTE needs a physical address */ + pte_val(pte) = __pa(page) | pgprot_val(pgprot); + return pte; +} + +#define mk_pte(page, pgprot) __mk_pte(page_address(page), (pgprot)) + +#define mk_pte_phys(physpage, pgprot) \ +({ \ + pte_t __pte; \ + \ + pte_val(__pte) = (physpage) + pgprot_val(pgprot); \ + __pte; \ +}) + +static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) +{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; } + + +/* pte_val refers to a page in the 0x4xxxxxxx physical DRAM interval + * __pte_page(pte_val) refers to the "virtual" DRAM interval + * pte_pagenr refers to the page-number counted starting from the virtual DRAM start + */ + +static inline unsigned long __pte_page(pte_t pte) +{ + /* the PTE contains a physical address */ + return (unsigned long)__va(pte_val(pte) & PAGE_MASK); +} + +#define pte_pagenr(pte) ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT) + +/* permanent address of a page */ + +#define page_address(page) ((page)->virtual) +#define __page_address(page) (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT)) +#define pte_page(pte) (mem_map+pte_pagenr(pte)) + +/* only the pte's themselves need to point to physical DRAM (see above) + * the pagetable links are purely handled within the kernel SW and thus + * don't need the __pa and __va transformations. + */ + +static inline unsigned long pmd_page(pmd_t pmd) +{ return pmd_val(pmd) & PAGE_MASK; } + +static inline void pmd_set(pmd_t * pmdp, pte_t * ptep) +{ pmd_val(*pmdp) = _PAGE_TABLE | (unsigned long) ptep; } + +static inline void pmd_set_kernel(pmd_t * pmdp, pte_t * ptep) +{ pmd_val(*pmdp) = _KERNPG_TABLE | (unsigned long) ptep; } + +/* to find an entry in a page-table-directory. */ +#define pgd_index(address) ((address >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) + +/* to find an entry in a page-table-directory */ +static inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address) +{ + return mm->pgd + pgd_index(address); +} + +/* to find an entry in a kernel page-table-directory */ +#define pgd_offset_k(address) pgd_offset(&init_mm, address) + +/* Find an entry in the second-level page table.. */ +static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address) +{ + return (pmd_t *) dir; +} + +/* Find an entry in the third-level page table.. */ +static inline pte_t * pte_offset(pmd_t * dir, unsigned long address) +{ + return (pte_t *) pmd_page(*dir) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)); +} + +#define pte_ERROR(e) \ + printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), pte_val(e)) +#define pmd_ERROR(e) \ + printk("%s:%d: bad pmd %p(%08lx).\n", __FILE__, __LINE__, &(e), pmd_val(e)) +#define pgd_ERROR(e) \ + printk("%s:%d: bad pgd %p(%08lx).\n", __FILE__, __LINE__, &(e), pgd_val(e)) + +extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* defined in head.S */ + +/* + * CRIS doesn't have any external MMU info: the kernel page + * tables contain all the necessary information. + * + * Actually I am not sure on what this could be used for. + */ +static inline void update_mmu_cache(struct vm_area_struct * vma, + unsigned long address, pte_t pte) +{ +} + +/* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */ +/* Since the PAGE_PRESENT bit is bit 4, we can use the bits above */ + +#define SWP_TYPE(x) (((x).val >> 5) & 0x7f) +#define SWP_OFFSET(x) ((x).val >> 12) +#define SWP_ENTRY(type, offset) ((swp_entry_t) { ((type) << 5) | ((offset) << 12) }) +#define pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) +#define swp_entry_to_pte(x) ((pte_t) { (x).val }) + +/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ +#define PageSkip(page) (0) +#define kern_addr_valid(addr) (1) + +#include <asm-generic/pgtable.h> + +#endif /* _CRIS_PGTABLE_H */ diff --git a/include/asm-cris/poll.h b/include/asm-cris/poll.h new file mode 100644 index 000000000..8699d59da --- /dev/null +++ b/include/asm-cris/poll.h @@ -0,0 +1,24 @@ +#ifndef __ASM_CRIS_POLL_H +#define __ASM_CRIS_POLL_H + +/* taken from asm-alpha */ + +#define POLLIN 1 +#define POLLPRI 2 +#define POLLOUT 4 +#define POLLERR 8 +#define POLLHUP 16 +#define POLLNVAL 32 +#define POLLRDNORM 64 +#define POLLRDBAND 128 +#define POLLWRNORM 256 +#define POLLWRBAND 512 +#define POLLMSG 1024 + +struct pollfd { + int fd; + short events; + short revents; +}; + +#endif diff --git a/include/asm-cris/posix_types.h b/include/asm-cris/posix_types.h new file mode 100644 index 000000000..5cf227002 --- /dev/null +++ b/include/asm-cris/posix_types.h @@ -0,0 +1,72 @@ +/* $Id: posix_types.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $ */ + +/* We cheat a bit and use our C-coded bitops functions from asm/bitops.h */ +/* I guess we should write these in assembler because they are used often. */ + +#ifndef __ARCH_CRIS_POSIX_TYPES_H +#define __ARCH_CRIS_POSIX_TYPES_H + +#include <asm/bitops.h> + +/* + * This file is generally used by user-level software, so you need to + * be a little careful about namespace pollution etc. Also, we cannot + * assume GCC is being used. + */ + +typedef unsigned short __kernel_dev_t; +typedef unsigned long __kernel_ino_t; +typedef unsigned short __kernel_mode_t; +typedef unsigned short __kernel_nlink_t; +typedef long __kernel_off_t; +typedef int __kernel_pid_t; +typedef unsigned short __kernel_ipc_pid_t; +typedef unsigned short __kernel_uid_t; +typedef unsigned short __kernel_gid_t; +typedef unsigned long __kernel_size_t; +typedef long __kernel_ssize_t; +typedef int __kernel_ptrdiff_t; +typedef long __kernel_time_t; +typedef long __kernel_suseconds_t; +typedef long __kernel_clock_t; +typedef int __kernel_daddr_t; +typedef char * __kernel_caddr_t; +typedef unsigned short __kernel_uid16_t; +typedef unsigned short __kernel_gid16_t; +typedef unsigned int __kernel_uid32_t; +typedef unsigned int __kernel_gid32_t; + +typedef unsigned short __kernel_old_uid_t; +typedef unsigned short __kernel_old_gid_t; + +#ifdef __GNUC__ +typedef long long __kernel_loff_t; +#endif + +typedef struct { +#if defined(__KERNEL__) || defined(__USE_ALL) + int val[2]; +#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ + int __val[2]; +#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ +} __kernel_fsid_t; + +/* should this ifdef be here ? */ + +#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) + +#undef __FD_SET +#define __FD_SET(fd,fdsetp) set_bit(fd, (void *)(fdsetp)) + +#undef __FD_CLR +#define __FD_CLR(fd,fdsetp) clear_bit(fd, (void *)(fdsetp)) + +#undef __FD_ISSET +#define __FD_ISSET(fd,fdsetp) test_bit(fd, (void *)(fdsetp)) + +#undef __FD_ZERO +#define __FD_ZERO(fdsetp) memset((void *)(fdsetp), 0, __FDSET_LONGS << 2) + +#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ + +#endif /* __ARCH_CRIS_POSIX_TYPES_H */ diff --git a/include/asm-cris/processor.h b/include/asm-cris/processor.h new file mode 100644 index 000000000..5df5e26a4 --- /dev/null +++ b/include/asm-cris/processor.h @@ -0,0 +1,147 @@ +/* + * include/asm-cris/processor.h + * + * Copyright (C) 2000 Axis Communications AB + * + * Authors: Bjorn Wesen Initial version + * + */ + +#ifndef __ASM_CRIS_PROCESSOR_H +#define __ASM_CRIS_PROCESSOR_H + +#include <linux/config.h> +#include <asm/system.h> +#include <asm/ptrace.h> + +/* + * Default implementation of macro that returns current + * instruction pointer ("program counter"). + */ +#define current_text_addr() ({ __label__ _l; _l: &&_l;}) + +/* CRIS has no problems with write protection */ + +#define wp_works_ok 1 + +/* + * User space process size. This is hardcoded into a few places, + * so don't change it unless you know what you are doing. + */ + +#ifdef CONFIG_CRIS_LOW_MAP +#define TASK_SIZE (0x50000000UL) /* 1.25 GB */ +#else +#define TASK_SIZE (0xB0000000UL) /* 2.75 GB */ +#endif + +/* This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) + +/* CRIS thread_struct. this really has nothing to do with the processor itself, since + * CRIS does not do any hardware task-switching, but it's here for legacy reasons. + * The thread_struct here is used when task-switching using _resume defined in entry.S. + * The offsets here are hardcoded into _resume - if you change this struct, you need to + * change them as well!!! +*/ + +struct thread_struct { + unsigned long ksp; /* kernel stack pointer */ + unsigned long usp; /* user stack pointer */ + unsigned long esp0; /* points to start of saved stack frame, set in entry.S */ + unsigned long dccr; /* saved flag register */ +}; + +/* saved stack-frame upon syscall entry, points to registers */ + +#define current_regs() (current->thread.esp0) + +/* this lives in process.c */ +asmlinkage void set_esp0(unsigned long ssp); + +/* INIT_MMAP is the kernels map of memory, between KSEG_C and KSEG_D */ + +#ifdef CONFIG_CRIS_LOW_MAP +#define INIT_MMAP { &init_mm, KSEG_6, KSEG_7, NULL, PAGE_SHARED, \ + VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } +#else +#define INIT_MMAP { &init_mm, KSEG_C, KSEG_D, NULL, PAGE_SHARED, \ + VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } +#endif + +#define INIT_THREAD { \ + 0, 0, 0, 0x20 } /* ccr = int enable, nothing else */ + +/* TODO: REMOVE */ +#define alloc_kernel_stack() __get_free_page(GFP_KERNEL) +#define free_kernel_stack(page) free_page((page)) + +extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); + +/* give the thread a program location + * set user-mode (The 'U' flag (User mode flag) is CCR/DCCR bit 8) + * switch user-stackpointer + */ + +#define start_thread(regs, ip, usp) do { \ + set_fs(USER_DS); \ + regs->irp = ip; \ + regs->dccr |= 1 << 8; \ + wrusp(usp); \ +} while(0) + +unsigned long get_wchan(struct task_struct *p); + +#define KSTK_EIP(tsk) \ + ({ \ + unsigned long eip = 0; \ + if ((tsk)->thread.esp0 > PAGE_SIZE && \ + VALID_PAGE(virt_to_page((tsk)->thread.esp0))) \ + eip = ((struct pt_regs *) (tsk)->thread.esp0)->irp; \ + eip; }) + +#define KSTK_ESP(tsk) ((tsk) == current ? rdusp() : (tsk)->thread.usp) + +#define copy_segments(tsk, mm) do { } while (0) +#define release_segments(mm) do { } while (0) +#define forget_segments() do { } while (0) + +/* + * Free current thread data structures etc.. + */ + +static inline void exit_thread(void) +{ +} + +/* Free all resources held by a thread. */ +static inline void release_thread(struct task_struct *dead_task) +{ +} + +/* + * Return saved PC of a blocked thread. + */ +extern inline unsigned long thread_saved_pc(struct thread_struct *t) +{ + return (unsigned long)((struct pt_regs *)t->esp0)->irp; +} + +/* THREAD_SIZE is the size of the task_struct/kernel_stack combo. + * normally, the stack is found by doing something like p + THREAD_SIZE + * in CRIS, a page is 8192 bytes, which seems like a sane size + */ + +#define THREAD_SIZE PAGE_SIZE +#define KERNEL_STACK_SIZE PAGE_SIZE + +#define alloc_task_struct() ((struct task_struct *) __get_free_pages(GFP_KERNEL,1)) +#define free_task_struct(p) free_pages((unsigned long) (p), 1) +#define get_task_struct(tsk) atomic_inc(&virt_to_page(tsk)->count) + +#define init_task (init_task_union.task) +#define init_stack (init_task_union.stack) + +#endif /* __ASM_CRIS_PROCESSOR_H */ diff --git a/include/asm-cris/ptrace.h b/include/asm-cris/ptrace.h new file mode 100644 index 000000000..25bc1f5a7 --- /dev/null +++ b/include/asm-cris/ptrace.h @@ -0,0 +1,99 @@ +#ifndef _CRIS_PTRACE_H +#define _CRIS_PTRACE_H + +/* Register numbers in the ptrace system call interface */ + +#define PT_FRAMETYPE 0 +#define PT_ORIG_R10 1 +#define PT_R13 2 +#define PT_R12 3 +#define PT_R11 4 +#define PT_R10 5 +#define PT_R9 6 +#define PT_R8 7 +#define PT_R7 8 +#define PT_R6 9 +#define PT_R5 10 +#define PT_R4 11 +#define PT_R3 12 +#define PT_R2 13 +#define PT_R1 14 +#define PT_R0 15 +#define PT_MOF 16 +#define PT_DCCR 17 +#define PT_SRP 18 +#define PT_IRP 19 +#define PT_MAX 19 + +#define PT_USP 42 /* special case - USP is not in the pt_regs */ + +/* Frame types */ + +#define CRIS_FRAME_NORMAL 0 /* normal frame like pt_regs struct */ +#define CRIS_FRAME_BUSFAULT 1 /* SBFS frame of 4 longwords on top, including irp */ +#define CRIS_FRAME_FIXUP 2 /* SBFS frame which should do a normal return, not RBF */ + +/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ +#define PTRACE_GETREGS 12 +#define PTRACE_SETREGS 13 + +/* pt_regs not only specifices the format in the user-struct during + * ptrace but is also the frame format used in the kernel prologue/epilogues + * themselves + */ + +struct pt_regs { + unsigned long frametype; /* type of stackframe */ + unsigned long orig_r10; + /* pushed by movem r13, [sp] in SAVE_ALL, movem pushes backwards */ + unsigned long r13; /* 8 */ + unsigned long r12; /* 12 */ + unsigned long r11; /* 16 */ + unsigned long r10; /* 20 */ + unsigned long r9; + unsigned long r8; + unsigned long r7; + unsigned long r6; + unsigned long r5; + unsigned long r4; + unsigned long r3; + unsigned long r2; + unsigned long r1; + unsigned long r0; + unsigned long mof; + unsigned long dccr; + unsigned long srp; + unsigned long irp; +}; + +/* switch_stack is the extra stuff pushed onto the stack in _resume (entry.S) when + doing a context-switch. it is used (apart from in resume) when a new thread is made + and we need to make _resume (which is starting it for the first time) realise what + is going on. + + actually, the use is very close to the thread struct (TSS) in that both the switch_stack + and the TSS are used to keep thread stuff when switching in _resume. +*/ + +struct switch_stack { + unsigned long r9; + unsigned long r8; + unsigned long r7; + unsigned long r6; + unsigned long r5; + unsigned long r4; + unsigned long r3; + unsigned long r2; + unsigned long r1; + unsigned long r0; + unsigned long return_ip; /* ip that _resume will return to */ +}; + +#ifdef __KERNEL__ +/* bit 8 is user-mode flag */ +#define user_mode(regs) ((regs)->dccr & 0x100) +#define instruction_pointer(regs) ((regs)->irp) +extern void show_regs(struct pt_regs *); +#endif + +#endif /* _CRIS_PTRACE_H */ diff --git a/include/asm-cris/resource.h b/include/asm-cris/resource.h new file mode 100644 index 000000000..83561dab9 --- /dev/null +++ b/include/asm-cris/resource.h @@ -0,0 +1,47 @@ +#ifndef _CRIS_RESOURCE_H +#define _CRIS_RESOURCE_H + +/* + * Resource limits + */ + +#define RLIMIT_CPU 0 /* CPU time in ms */ +#define RLIMIT_FSIZE 1 /* Maximum filesize */ +#define RLIMIT_DATA 2 /* max data size */ +#define RLIMIT_STACK 3 /* max stack size */ +#define RLIMIT_CORE 4 /* max core file size */ +#define RLIMIT_RSS 5 /* max resident set size */ +#define RLIMIT_NPROC 6 /* max number of processes */ +#define RLIMIT_NOFILE 7 /* max number of open files */ +#define RLIMIT_MEMLOCK 8 /* max locked-in-memory address space */ +#define RLIMIT_AS 9 /* address space limit */ +#define RLIMIT_LOCKS 10 /* maximum file locks held */ + +#define RLIM_NLIMITS 11 + +/* + * SuS says limits have to be unsigned. + * Which makes a ton more sense anyway. + */ +#define RLIM_INFINITY (~0UL) + +#ifdef __KERNEL__ + +#define INIT_RLIMITS \ +{ \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { _STK_LIM, RLIM_INFINITY }, \ + { 0, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { 0, 0 }, \ + { INR_OPEN, INR_OPEN }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ +} + +#endif /* __KERNEL__ */ + +#endif diff --git a/include/asm-cris/rtc.h b/include/asm-cris/rtc.h new file mode 100644 index 000000000..a6196111a --- /dev/null +++ b/include/asm-cris/rtc.h @@ -0,0 +1,59 @@ +/* $Id: rtc.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $ */ + +#ifndef RTC_H +#define RTC_H + +#include <linux/config.h> + +/* Dallas DS1302 clock/calendar register numbers */ + +#define RTC_SECONDS 0 +#define RTC_MINUTES 1 +#define RTC_HOURS 2 +#define RTC_DAY_OF_MONTH 3 +#define RTC_MONTH 4 +#define RTC_WEEKDAY 5 +#define RTC_YEAR 6 + +#ifdef CONFIG_DS1302 +#define CMOS_READ(x) ds1302_readreg(x) +#define CMOS_WRITE(val,reg) ds1302_writereg(reg,val) +#define RTC_INIT() ds1302_init() +#else +/* no RTC configured so we shouldn't try to access any */ +#define CMOS_READ(x) 42 +#define CMOS_WRITE(x,y) +#define RTC_INIT() (-1) +#endif + +/* conversions to and from the stupid RTC internal format */ + +#define BCD_TO_BIN(x) x = (((x & 0xf0) >> 3) * 5 + (x & 0xf)) +#define BIN_TO_BCD(x) x = (x % 10) | ((x / 10) << 4) + +/* + * The struct used to pass data via the following ioctl. Similar to the + * struct tm in <time.h>, but it needs to be here so that the kernel + * source is self contained, allowing cross-compiles, etc. etc. + */ + +struct rtc_time { + int tm_sec; + int tm_min; + int tm_hour; + int tm_mday; + int tm_mon; + int tm_year; + int tm_wday; + int tm_yday; + int tm_isdst; +}; + +/* + * ioctl calls that are permitted to the /dev/rtc interface + */ + +#define RTC_RD_TIME _IOR('p', 0x09, struct rtc_time) /* Read RTC time */ +#define RTC_SET_TIME _IOW('p', 0x0a, struct rtc_time) /* Set RTC time */ + +#endif diff --git a/include/asm-cris/segment.h b/include/asm-cris/segment.h new file mode 100644 index 000000000..a352fa16a --- /dev/null +++ b/include/asm-cris/segment.h @@ -0,0 +1,16 @@ +#ifndef _ASM_SEGMENT_H +#define _ASM_SEGMENT_H + +/* argh. really legacy. totally misnomed. */ + +#define __KERNEL_CS 0x10 +#define __KERNEL_DS 0x18 + +#define __USER_CS 0x23 +#define __USER_DS 0x2B + +typedef struct { + unsigned long seg; +} mm_segment_t; + +#endif diff --git a/include/asm-cris/semaphore-helper.h b/include/asm-cris/semaphore-helper.h new file mode 100644 index 000000000..33effefba --- /dev/null +++ b/include/asm-cris/semaphore-helper.h @@ -0,0 +1,77 @@ +/* $Id: semaphore-helper.h,v 1.1 2000/07/13 16:52:42 bjornw Exp $ + * + * SMP- and interrupt-safe semaphores helper functions. Generic versions, no + * optimizations whatsoever... + * + */ + +#ifndef _ASM_SEMAPHORE_HELPER_H +#define _ASM_SEMAPHORE_HELPER_H + +#include <asm/atomic.h> + +/* + * These two _must_ execute atomically wrt each other. + */ +static inline void wake_one_more(struct semaphore * sem) +{ + atomic_inc(&sem->waking); +} + +#define read(a) ((a)->counter) +#define inc(a) (((a)->counter)++) +#define dec(a) (((a)->counter)--) + +#define count_inc(a) ((*(a))++) + +static inline int waking_non_zero(struct semaphore *sem) +{ + unsigned long flags; + int ret = 0; + + save_and_cli(flags); + if (read(&sem->waking) > 0) { + dec(&sem->waking); + ret = 1; + } + restore_flags(flags); + return ret; +} + +static inline int waking_non_zero_interruptible(struct semaphore *sem, + struct task_struct *tsk) +{ + int ret = 0; + unsigned long flags; + + save_and_cli(flags); + if (read(&sem->waking) > 0) { + dec(&sem->waking); + ret = 1; + } else if (signal_pending(tsk)) { + count_inc(&sem->count); + ret = -EINTR; + } + restore_flags(flags); + return ret; +} + +static inline int waking_non_zero_trylock(struct semaphore *sem) +{ + int ret = 1; + unsigned long flags; + + save_and_cli(flags); + if (read(&sem->waking) <= 0) + count_inc(&sem->count); + else { + dec(&sem->waking); + ret = 0; + } + restore_flags(flags); + return ret; +} + +#endif /* _ASM_SEMAPHORE_HELPER_H */ + + diff --git a/include/asm-cris/semaphore.h b/include/asm-cris/semaphore.h new file mode 100644 index 000000000..cfa148a49 --- /dev/null +++ b/include/asm-cris/semaphore.h @@ -0,0 +1,321 @@ +/* $Id: semaphore.h,v 1.2 2000/07/13 16:52:46 bjornw Exp $ */ + +/* On the i386 these are coded in asm, perhaps we should as well. Later.. */ + +#ifndef _CRIS_SEMAPHORE_H +#define _CRIS_SEMAPHORE_H + +#define RW_LOCK_BIAS 0x01000000 + +#include <linux/wait.h> +#include <linux/spinlock.h> + +#include <asm/system.h> +#include <asm/atomic.h> + +/* + * CRIS semaphores, implemented in C-only so far. + */ + +int printk(const char *fmt, ...); + +struct semaphore { + int count; /* not atomic_t since we do the atomicity here already */ + atomic_t waking; + wait_queue_head_t wait; +#if WAITQUEUE_DEBUG + long __magic; +#endif +}; + +#if WAITQUEUE_DEBUG +# define __SEM_DEBUG_INIT(name) , (long)&(name).__magic +#else +# define __SEM_DEBUG_INIT(name) +#endif + +#define __SEMAPHORE_INITIALIZER(name,count) \ + { count, ATOMIC_INIT(0), \ + __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ + __SEM_DEBUG_INIT(name) } + +#define __MUTEX_INITIALIZER(name) \ + __SEMAPHORE_INITIALIZER(name,1) + +#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ + struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) + +#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) +#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) + +extern inline void sema_init(struct semaphore *sem, int val) +{ + *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val); +} + +static inline void init_MUTEX (struct semaphore *sem) +{ + sema_init(sem, 1); +} + +static inline void init_MUTEX_LOCKED (struct semaphore *sem) +{ + sema_init(sem, 0); +} + +extern void __down(struct semaphore * sem); +extern int __down_interruptible(struct semaphore * sem); +extern int __down_trylock(struct semaphore * sem); +extern void __up(struct semaphore * sem); + +/* notice - we probably can do cli/sti here instead of saving */ + +extern inline void down(struct semaphore * sem) +{ + unsigned long flags; + int failed; + +#if WAITQUEUE_DEBUG + CHECK_MAGIC(sem->__magic); +#endif + + /* atomically decrement the semaphores count, and if its negative, we wait */ + save_flags(flags); + cli(); + failed = --(sem->count) < 0; + restore_flags(flags); + if(failed) { + __down(sem); + } +} + +/* + * This version waits in interruptible state so that the waiting + * process can be killed. The down_interruptible routine + * returns negative for signalled and zero for semaphore acquired. + */ + +extern inline int down_interruptible(struct semaphore * sem) +{ + unsigned long flags; + int failed; + +#if WAITQUEUE_DEBUG + CHECK_MAGIC(sem->__magic); +#endif + + /* atomically decrement the semaphores count, and if its negative, we wait */ + save_flags(flags); + cli(); + failed = --(sem->count) < 0; + restore_flags(flags); + if(failed) + failed = __down_interruptible(sem); + return(failed); +} + +extern inline int down_trylock(struct semaphore * sem) +{ + unsigned long flags; + int failed; + +#if WAITQUEUE_DEBUG + CHECK_MAGIC(sem->__magic); +#endif + + save_flags(flags); + cli(); + failed = --(sem->count) < 0; + restore_flags(flags); + if(failed) + failed = __down_trylock(sem); + return(failed); +} + +/* + * Note! This is subtle. We jump to wake people up only if + * the semaphore was negative (== somebody was waiting on it). + * The default case (no contention) will result in NO + * jumps for both down() and up(). + */ +extern inline void up(struct semaphore * sem) +{ + unsigned long flags; + int wakeup; + +#if WAITQUEUE_DEBUG + CHECK_MAGIC(sem->__magic); +#endif + + /* atomically increment the semaphores count, and if it was negative, we wake people */ + save_flags(flags); + cli(); + wakeup = ++(sem->count) <= 0; + restore_flags(flags); + if(wakeup) { + __up(sem); + } +} + +/* rw mutexes (should that be mutices? =) -- throw rw + * spinlocks and semaphores together, and this is what we + * end up with... + * + * The lock is initialized to BIAS. This way, a writer + * subtracts BIAS ands gets 0 for the case of an uncontended + * lock. Readers decrement by 1 and see a positive value + * when uncontended, negative if there are writers waiting + * (in which case it goes to sleep). + * + * In terms of fairness, this should result in the lock + * flopping back and forth between readers and writers + * under heavy use. + * + * -ben + */ + +struct rw_semaphore { + atomic_t count; + /* bit 0 means read bias granted; + bit 1 means write bias granted. */ + unsigned granted; + wait_queue_head_t wait; + wait_queue_head_t write_bias_wait; +#if WAITQUEUE_DEBUG + long __magic; + atomic_t readers; + atomic_t writers; +#endif +}; + +#if WAITQUEUE_DEBUG +#define __RWSEM_DEBUG_INIT , ATOMIC_INIT(0), ATOMIC_INIT(0) +#else +#define __RWSEM_DEBUG_INIT /* */ +#endif + +#define __RWSEM_INITIALIZER(name,count) \ +{ ATOMIC_INIT(count), 0, __WAIT_QUEUE_HEAD_INITIALIZER((name).wait), \ + __WAIT_QUEUE_HEAD_INITIALIZER((name).write_bias_wait) \ + __SEM_DEBUG_INIT(name) __RWSEM_DEBUG_INIT } + +#define __DECLARE_RWSEM_GENERIC(name,count) \ + struct rw_semaphore name = __RWSEM_INITIALIZER(name,count) + +#define DECLARE_RWSEM(name) __DECLARE_RWSEM_GENERIC(name,RW_LOCK_BIAS) +#define DECLARE_RWSEM_READ_LOCKED(name) __DECLARE_RWSEM_GENERIC(name,RW_LOCK_BIAS-1) +#define DECLARE_RWSEM_WRITE_LOCKED(name) __DECLARE_RWSEM_GENERIC(name,0) + +extern inline void init_rwsem(struct rw_semaphore *sem) +{ + atomic_set(&sem->count, RW_LOCK_BIAS); + sem->granted = 0; + init_waitqueue_head(&sem->wait); + init_waitqueue_head(&sem->write_bias_wait); +#if WAITQUEUE_DEBUG + sem->__magic = (long)&sem->__magic; + atomic_set(&sem->readers, 0); + atomic_set(&sem->writers, 0); +#endif +} + +/* The expensive part is outlined. */ +extern void __down_read(struct rw_semaphore *sem, int count); +extern void __down_write(struct rw_semaphore *sem, int count); +extern void __rwsem_wake(struct rw_semaphore *sem, unsigned long readers); + +extern inline void down_read(struct rw_semaphore *sem) +{ + int count; + +#if WAITQUEUE_DEBUG + CHECK_MAGIC(sem->__magic); +#endif + + count = atomic_dec_return(&sem->count); + if (count < 0) { + __down_read(sem, count); + } + mb(); + +#if WAITQUEUE_DEBUG + if (sem->granted & 2) + BUG(); + if (atomic_read(&sem->writers)) + BUG(); + atomic_inc(&sem->readers); +#endif +} + +extern inline void down_write(struct rw_semaphore *sem) +{ + int count; + +#if WAITQUEUE_DEBUG + CHECK_MAGIC(sem->__magic); +#endif + + count = atomic_sub_return(RW_LOCK_BIAS, &sem->count); + if (count) { + __down_write(sem, count); + } + mb(); + +#if WAITQUEUE_DEBUG + if (atomic_read(&sem->writers)) + BUG(); + if (atomic_read(&sem->readers)) + BUG(); + if (sem->granted & 3) + BUG(); + atomic_inc(&sem->writers); +#endif +} + +/* When a reader does a release, the only significant case is when + there was a writer waiting, and we've bumped the count to 0: we must + wake the writer up. */ + +extern inline void up_read(struct rw_semaphore *sem) +{ +#if WAITQUEUE_DEBUG + CHECK_MAGIC(sem->__magic); + if (sem->granted & 2) + BUG(); + if (atomic_read(&sem->writers)) + BUG(); + atomic_dec(&sem->readers); +#endif + + mb(); + if (atomic_inc_return(&sem->count) == 0) + __rwsem_wake(sem, 0); +} + +/* + * Releasing the writer is easy -- just release it and wake up any sleepers. + */ +extern inline void up_write(struct rw_semaphore *sem) +{ + int count; + +#if WAITQUEUE_DEBUG + CHECK_MAGIC(sem->__magic); + if (sem->granted & 3) + BUG(); + if (atomic_read(&sem->readers)) + BUG(); + if (atomic_read(&sem->writers) != 1) + BUG(); + atomic_dec(&sem->writers); +#endif + + mb(); + count = atomic_add_return(RW_LOCK_BIAS, &sem->count); + if (count - RW_LOCK_BIAS < 0 && count >= 0) { + /* Only do the wake if we're no longer negative. */ + __rwsem_wake(sem, count); + } +} + +#endif diff --git a/include/asm-cris/sembuf.h b/include/asm-cris/sembuf.h new file mode 100644 index 000000000..7fed98437 --- /dev/null +++ b/include/asm-cris/sembuf.h @@ -0,0 +1,25 @@ +#ifndef _CRIS_SEMBUF_H +#define _CRIS_SEMBUF_H + +/* + * The semid64_ds structure for CRIS architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 64-bit time_t to solve y2038 problem + * - 2 miscellaneous 32-bit values + */ + +struct semid64_ds { + struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ + __kernel_time_t sem_otime; /* last semop time */ + unsigned long __unused1; + __kernel_time_t sem_ctime; /* last change time */ + unsigned long __unused2; + unsigned long sem_nsems; /* no. of semaphores in array */ + unsigned long __unused3; + unsigned long __unused4; +}; + +#endif /* _CRIS_SEMBUF_H */ diff --git a/include/asm-cris/setup.h b/include/asm-cris/setup.h new file mode 100644 index 000000000..f382d3b4d --- /dev/null +++ b/include/asm-cris/setup.h @@ -0,0 +1,405 @@ +/* +** asm/setup.h -- Definition of the Linux/m68k boot information structure +** +** Copyright 1992 by Greg Harp +** +** This file is subject to the terms and conditions of the GNU General Public +** License. See the file COPYING in the main directory of this archive +** for more details. +** +** Created 09/29/92 by Greg Harp +** +** 5/2/94 Roman Hodek: +** Added bi_atari part of the machine dependent union bi_un; for now it +** contains just a model field to distinguish between TT and Falcon. +** 26/7/96 Roman Zippel: +** Renamed to setup.h; added some useful macros to allow gcc some +** optimizations if possible. +*/ + +#ifndef _M68K_SETUP_H +#define _M68K_SETUP_H + +#include <linux/config.h> + +#define CL_SIZE (256) + +#if 0 + +#include <asm/zorro.h> + +/* + * Amiga specific part of bootinfo structure. + */ + +#define NUM_AUTO 16 + +#ifndef __ASSEMBLY__ + +#define AMIGAHW_DECLARE(name) unsigned name : 1 +#define AMIGAHW_SET(name) (boot_info.bi_amiga.hw_present.name = 1) +#define AMIGAHW_PRESENT(name) (boot_info.bi_amiga.hw_present.name) + +struct bi_Amiga { + int model; /* Amiga Model (3000?) */ + int num_autocon; /* # of autoconfig devices found */ + struct ConfigDev autocon[NUM_AUTO]; /* up to 16 autoconfig devices */ +#ifdef HACKER_KERNEL + void (*exit_func)(void); /* addr of function to exit kernel */ + unsigned long chip_addr; /* start of chip memory (bytes) */ +#endif + unsigned long chip_size; /* size of chip memory (bytes) */ + unsigned char vblank; /* VBLANK frequency */ + unsigned char psfreq; /* power supply frequency */ + unsigned long eclock; /* EClock frequency */ + unsigned long chipset; /* native chipset present */ + struct { + /* video hardware */ + AMIGAHW_DECLARE(AMI_VIDEO); /* Amiga Video */ + AMIGAHW_DECLARE(AMI_BLITTER); /* Amiga Blitter */ + AMIGAHW_DECLARE(AMBER_FF); /* Amber Flicker Fixer */ + /* sound hardware */ + AMIGAHW_DECLARE(AMI_AUDIO); /* Amiga Audio */ + /* disk storage interfaces */ + AMIGAHW_DECLARE(AMI_FLOPPY); /* Amiga Floppy */ + AMIGAHW_DECLARE(A3000_SCSI); /* SCSI (wd33c93, A3000 alike) */ + AMIGAHW_DECLARE(A4000_SCSI); /* SCSI (ncr53c710, A4000T alike) */ + AMIGAHW_DECLARE(A1200_IDE); /* IDE (A1200 alike) */ + AMIGAHW_DECLARE(A4000_IDE); /* IDE (A4000 alike) */ + AMIGAHW_DECLARE(CD_ROM); /* CD ROM drive */ + /* other I/O hardware */ + AMIGAHW_DECLARE(AMI_KEYBOARD); /* Amiga Keyboard */ + AMIGAHW_DECLARE(AMI_MOUSE); /* Amiga Mouse */ + AMIGAHW_DECLARE(AMI_SERIAL); /* Amiga Serial */ + AMIGAHW_DECLARE(AMI_PARALLEL); /* Amiga Parallel */ + /* real time clocks */ + AMIGAHW_DECLARE(A2000_CLK); /* Hardware Clock (A2000 alike) */ + AMIGAHW_DECLARE(A3000_CLK); /* Hardware Clock (A3000 alike) */ + /* supporting hardware */ + AMIGAHW_DECLARE(CHIP_RAM); /* Chip RAM */ + AMIGAHW_DECLARE(PAULA); /* Paula (8364) */ + AMIGAHW_DECLARE(DENISE); /* Denise (8362) */ + AMIGAHW_DECLARE(DENISE_HR); /* Denise (8373) */ + AMIGAHW_DECLARE(LISA); /* Lisa (8375) */ + AMIGAHW_DECLARE(AGNUS_PAL); /* Normal/Fat PAL Agnus (8367/8371) */ + AMIGAHW_DECLARE(AGNUS_NTSC); /* Normal/Fat NTSC Agnus (8361/8370) */ + AMIGAHW_DECLARE(AGNUS_HR_PAL); /* Fat Hires PAL Agnus (8372) */ + AMIGAHW_DECLARE(AGNUS_HR_NTSC); /* Fat Hires NTSC Agnus (8372) */ + AMIGAHW_DECLARE(ALICE_PAL); /* PAL Alice (8374) */ + AMIGAHW_DECLARE(ALICE_NTSC); /* NTSC Alice (8374) */ + AMIGAHW_DECLARE(MAGIC_REKICK); /* A3000 Magic Hard Rekick */ + AMIGAHW_DECLARE(ZORRO); /* Zorro AutoConfig */ + } hw_present; +}; + +#else /* __ASSEMBLY__ */ + +BI_amiga_model = BI_un +BI_amiga_num_autcon = BI_amiga_model+4 +BI_amiga_autocon = BI_amiga_num_autcon+4 +#ifdef HACKER_KERNEL +BI_amiga_exit_func = BI_amiga_autocon+(CD_sizeof*NUM_AUTO) +BI_amiga_chip_addr = BI_amiga_exit_func+4 +BI_amiga_chip_size = BI_amiga_chip_addr+4 +#else +BI_amiga_chip_size = BI_amiga_autocon+(CD_sizeof*NUM_AUTO) +#endif +BI_amiga_vblank = BI_amiga_chip_size+4 +BI_amiga_psfreq = BI_amiga_vblank+1 +BI_amiga_eclock = BI_amiga_psfreq+1 +BI_amiga_chipset = BI_amiga_eclock+4 +BI_amiga_hw_present = BI_amiga_chipset+4 + +#endif /* __ASSEMBLY__ */ + +/* Atari specific part of bootinfo */ + +/* + * Define several Hardware-Chips for indication so that for the ATARI we do + * no longer decide whether it is a Falcon or other machine . It's just + * important what hardware the machine uses + */ + +/* ++roman 08/08/95: rewritten from ORing constants to a C bitfield */ + +#ifndef __ASSEMBLY__ + +#define ATARIHW_DECLARE(name) unsigned name : 1 +#define ATARIHW_SET(name) (boot_info.bi_atari.hw_present.name = 1) +#define ATARIHW_PRESENT(name) (boot_info.bi_atari.hw_present.name) + +struct bi_Atari { + struct { + /* video hardware */ + ATARIHW_DECLARE(STND_SHIFTER); /* ST-Shifter - no base low ! */ + ATARIHW_DECLARE(EXTD_SHIFTER); /* STe-Shifter - 24 bit address */ + ATARIHW_DECLARE(TT_SHIFTER); /* TT-Shifter */ + ATARIHW_DECLARE(VIDEL_SHIFTER); /* Falcon-Shifter */ + /* sound hardware */ + ATARIHW_DECLARE(YM_2149); /* Yamaha YM 2149 */ + ATARIHW_DECLARE(PCM_8BIT); /* PCM-Sound in STe-ATARI */ + ATARIHW_DECLARE(CODEC); /* CODEC Sound (Falcon) */ + /* disk storage interfaces */ + ATARIHW_DECLARE(TT_SCSI); /* Directly mapped NCR5380 */ + ATARIHW_DECLARE(ST_SCSI); /* NCR5380 via ST-DMA (Falcon) */ + ATARIHW_DECLARE(ACSI); /* Standard ACSI like in STs */ + ATARIHW_DECLARE(IDE); /* IDE Interface */ + ATARIHW_DECLARE(FDCSPEED); /* 8/16 MHz switch for FDC */ + /* other I/O hardware */ + ATARIHW_DECLARE(ST_MFP); /* The ST-MFP (there should + be no Atari without + it... but who knows?) */ + ATARIHW_DECLARE(TT_MFP); /* 2nd MFP */ + ATARIHW_DECLARE(SCC); /* Serial Communications Contr. */ + ATARIHW_DECLARE(ST_ESCC); /* SCC Z83230 in an ST */ + ATARIHW_DECLARE(ANALOG_JOY); /* Paddle Interface for STe + and Falcon */ + ATARIHW_DECLARE(MICROWIRE); /* Microwire Interface */ + /* DMA */ + ATARIHW_DECLARE(STND_DMA); /* 24 Bit limited ST-DMA */ + ATARIHW_DECLARE(EXTD_DMA); /* 32 Bit ST-DMA */ + ATARIHW_DECLARE(SCSI_DMA); /* DMA for the NCR5380 */ + ATARIHW_DECLARE(SCC_DMA); /* DMA for the SCC */ + /* real time clocks */ + ATARIHW_DECLARE(TT_CLK); /* TT compatible clock chip */ + ATARIHW_DECLARE(MSTE_CLK); /* Mega ST(E) clock chip */ + /* supporting hardware */ + ATARIHW_DECLARE(SCU); /* System Control Unit */ + ATARIHW_DECLARE(BLITTER); /* Blitter */ + ATARIHW_DECLARE(VME); /* VME Bus */ + } hw_present; + unsigned long mch_cookie; /* _MCH cookie from TOS */ +}; + +/* mch_cookie values (upper word) */ +#define ATARI_MCH_ST 0 +#define ATARI_MCH_STE 1 +#define ATARI_MCH_TT 2 +#define ATARI_MCH_FALCON 3 + +struct mem_info { + unsigned long addr; /* physical address of memory chunk */ + unsigned long size; /* length of memory chunk (in bytes) */ +}; + +#else /* __ASSEMBLY__ */ + +MI_addr = 0 +MI_size = MI_addr+4 +MI_sizeof = MI_size+4 + +#endif /* __ASSEMBLY__ */ + +#define NUM_MEMINFO 4 + +#define MACH_AMIGA 1 +#define MACH_ATARI 2 +#define MACH_MAC 3 + +/* + * CPU and FPU types + */ + +#define CPUB_68020 0 +#define CPUB_68030 1 +#define CPUB_68040 2 +#define CPUB_68060 3 +#define FPUB_68881 5 +#define FPUB_68882 6 +#define FPUB_68040 7 /* Internal FPU */ +#define FPUB_68060 8 /* Internal FPU */ + +#define CPU_68020 (1<<CPUB_68020) +#define CPU_68030 (1<<CPUB_68030) +#define CPU_68040 (1<<CPUB_68040) +#define CPU_68060 (1<<CPUB_68060) +#define CPU_MASK (31) +#define FPU_68881 (1<<FPUB_68881) +#define FPU_68882 (1<<FPUB_68882) +#define FPU_68040 (1<<FPUB_68040) /* Internal FPU */ +#define FPU_68060 (1<<FPUB_68060) /* Internal FPU */ +#define FPU_MASK (0xfe0) + +#define CL_SIZE (256) + +/* + * machine type definitions + */ + +#if !defined(CONFIG_AMIGA) +# define MACH_IS_AMIGA (0) +#elif defined(CONFIG_ATARI) || defined(CONFIG_MAC) +# define MACH_IS_AMIGA (boot_info.machtype == MACH_AMIGA) +#else +# define CONFIG_AMIGA_ONLY +# define MACH_IS_AMIGA (1) +# define MACH_TYPE (MACH_AMIGA) +#endif + +#if !defined(CONFIG_ATARI) +# define MACH_IS_ATARI (0) +#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) +# define MACH_IS_ATARI (boot_info.machtype == MACH_ATARI) +#else +# define CONFIG_ATARI_ONLY +# define MACH_IS_ATARI (1) +# define MACH_TYPE (MACH_ATARI) +#endif + +#if defined(CONFIG_MAC) +# error Currently no Mac support! +#endif + +#ifndef MACH_TYPE +# define MACH_TYPE (boot_info.machtype) +#endif + +/* + * cpu type definitions + */ + +#if !defined(CONFIG_M68020) +# define CPU_IS_020 (0) +#elif defined(CONFIG_M68030) || defined(CONFIG_M68040) || defined(CONFIG_M68060) +# define CPU_IS_020 (boot_info.cputype & CPU_68020) +#else +# define CONFIG_M68020_ONLY +# define CPU_IS_020 (1) +#endif + +#if !defined(CONFIG_M68030) +# define CPU_IS_030 (0) +#elif defined(CONFIG_M68020) || defined(CONFIG_M68040) || defined(CONFIG_M68060) +# define CPU_IS_030 (boot_info.cputype & CPU_68030) +#else +# define CONFIG_M68030_ONLY +# define CPU_IS_030 (1) +#endif + +#if !defined(CONFIG_M68040) +# define CPU_IS_040 (0) +#elif defined(CONFIG_M68020) || defined(CONFIG_M68030) || defined(CONFIG_M68060) +# define CPU_IS_040 (boot_info.cputype & CPU_68040) +#else +# define CONFIG_M68040_ONLY +# define CPU_IS_040 (1) +#endif + +#if !defined(CONFIG_M68060) +# define CPU_IS_060 (0) +#elif defined(CONFIG_M68020) || defined(CONFIG_M68030) || defined(CONFIG_M68040) +# define CPU_IS_060 (boot_info.cputype & CPU_68060) +#else +# define CONFIG_M68060_ONLY +# define CPU_IS_060 (1) +#endif + +#if !defined(CONFIG_M68020) && !defined(CONFIG_M68030) +# define CPU_IS_020_OR_030 (0) +#else +# define CONFIG_M68020_OR_M68030 +# if defined(CONFIG_M68040) || defined(CONFIG_M68060) +# define CPU_IS_020_OR_030 (!m68k_is040or060) +# else +# define CONFIG_M68020_OR_M68030_ONLY +# define CPU_IS_020_OR_030 (1) +# endif +#endif + +#if !defined(CONFIG_M68040) && !defined(CONFIG_M68060) +# define CPU_IS_040_OR_060 (0) +#else +# define CONFIG_M68040_OR_M68060 +# if defined(CONFIG_M68020) || defined(CONFIG_M68030) +# define CPU_IS_040_OR_060 (m68k_is040or060) +# else +# define CONFIG_M68040_OR_M68060_ONLY +# define CPU_IS_040_OR_060 (1) +# endif +#endif + +#define CPU_TYPE (boot_info.cputype) + +#ifndef __ASSEMBLY__ +#ifdef __KERNEL__ + /* + * m68k_is040or060 is != 0 for a '040 or higher; + * used numbers are 4 for 68040 and 6 for 68060. + */ + +extern int m68k_is040or060; +#endif + +struct bootinfo { + unsigned long machtype; /* machine type */ + unsigned long cputype; /* system CPU & FPU */ + struct mem_info memory[NUM_MEMINFO]; /* memory description */ + int num_memory; /* # of memory blocks found */ + unsigned long ramdisk_size; /* ramdisk size in 1024 byte blocks */ + unsigned long ramdisk_addr; /* address of the ram disk in mem */ + char command_line[CL_SIZE]; /* kernel command line parameters */ + union { + struct bi_Amiga bi_ami; /* Amiga specific information */ + struct bi_Atari bi_ata; /* Atari specific information */ + } bi_un; +}; +#define bi_amiga bi_un.bi_ami +#define bi_atari bi_un.bi_ata +#define bi_mac bi_un.bi_mac + +extern struct bootinfo + boot_info; + +#else /* __ASSEMBLY__ */ + +BI_machtype = 0 +BI_cputype = BI_machtype+4 +BI_memory = BI_cputype+4 +BI_num_memory = BI_memory+(MI_sizeof*NUM_MEMINFO) +BI_ramdisk_size = BI_num_memory+4 +BI_ramdisk_addr = BI_ramdisk_size+4 +BI_command_line = BI_ramdisk_addr+4 +BI_un = BI_command_line+CL_SIZE + +#endif /* __ASSEMBLY__ */ + + +/* + * Stuff for bootinfo interface versioning + * + * At the start of kernel code, a 'struct bootversion' is located. bootstrap + * checks for a matching version of the interface before booting a kernel, to + * avoid user confusion if kernel and bootstrap don't work together :-) + * + * If incompatible changes are made to the bootinfo interface, the major + * number below should be stepped (and the minor reset to 0) for the + * appropriate machine. If a change is backward-compatible, the minor should + * be stepped. "Backwards-compatible" means that booting will work, but + * certain features may not. + */ + +#define BOOTINFOV_MAGIC 0x4249561A /* 'BIV^Z' */ +#define MK_BI_VERSION(major,minor) (((major)<<16)+(minor)) +#define BI_VERSION_MAJOR(v) (((v) >> 16) & 0xffff) +#define BI_VERSION_MINOR(v) ((v) & 0xffff) + +#ifndef __ASSEMBLY__ + +struct bootversion { + unsigned short branch; + unsigned long magic; + struct { + unsigned long machtype; + unsigned long version; + } machversions[0]; +}; + +#endif /* __ASSEMBLY__ */ + +#define AMIGA_BOOTI_VERSION MK_BI_VERSION( 1, 0 ) +#define ATARI_BOOTI_VERSION MK_BI_VERSION( 1, 0 ) + +#endif + + +#endif /* _M68K_SETUP_H */ diff --git a/include/asm-cris/shmbuf.h b/include/asm-cris/shmbuf.h new file mode 100644 index 000000000..3239e3f00 --- /dev/null +++ b/include/asm-cris/shmbuf.h @@ -0,0 +1,42 @@ +#ifndef _CRIS_SHMBUF_H +#define _CRIS_SHMBUF_H + +/* + * The shmid64_ds structure for CRIS architecture (same as for i386) + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 64-bit time_t to solve y2038 problem + * - 2 miscellaneous 32-bit values + */ + +struct shmid64_ds { + struct ipc64_perm shm_perm; /* operation perms */ + size_t shm_segsz; /* size of segment (bytes) */ + __kernel_time_t shm_atime; /* last attach time */ + unsigned long __unused1; + __kernel_time_t shm_dtime; /* last detach time */ + unsigned long __unused2; + __kernel_time_t shm_ctime; /* last change time */ + unsigned long __unused3; + __kernel_pid_t shm_cpid; /* pid of creator */ + __kernel_pid_t shm_lpid; /* pid of last operator */ + unsigned long shm_nattch; /* no. of current attaches */ + unsigned long __unused4; + unsigned long __unused5; +}; + +struct shminfo64 { + unsigned long shmmax; + unsigned long shmmin; + unsigned long shmmni; + unsigned long shmseg; + unsigned long shmall; + unsigned long __unused1; + unsigned long __unused2; + unsigned long __unused3; + unsigned long __unused4; +}; + +#endif /* _CRIS_SHMBUF_H */ diff --git a/include/asm-cris/shmparam.h b/include/asm-cris/shmparam.h new file mode 100644 index 000000000..d29d12270 --- /dev/null +++ b/include/asm-cris/shmparam.h @@ -0,0 +1,8 @@ +#ifndef _ASM_CRIS_SHMPARAM_H +#define _ASM_CRIS_SHMPARAM_H + +/* same as asm-i386/ version.. */ + +#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ + +#endif /* _ASM_CRIS_SHMPARAM_H */ diff --git a/include/asm-cris/sigcontext.h b/include/asm-cris/sigcontext.h new file mode 100644 index 000000000..a1d634e12 --- /dev/null +++ b/include/asm-cris/sigcontext.h @@ -0,0 +1,24 @@ +/* $Id: sigcontext.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $ */ + +#ifndef _ASM_CRIS_SIGCONTEXT_H +#define _ASM_CRIS_SIGCONTEXT_H + +#include <asm/ptrace.h> + +/* This struct is saved by setup_frame in signal.c, to keep the current context while + a signal handler is executed. It's restored by sys_sigreturn. + + To keep things simple, we use pt_regs here even though normally you just specify + the list of regs to save. Then we can use copy_from_user on the entire regs instead + of a bunch of get_user's as well... + +*/ + +struct sigcontext { + struct pt_regs regs; /* needs to be first */ + unsigned long oldmask; + unsigned long usp; /* usp before stacking this gunk on it */ +}; + +#endif + diff --git a/include/asm-cris/siginfo.h b/include/asm-cris/siginfo.h new file mode 100644 index 000000000..ce26ee48e --- /dev/null +++ b/include/asm-cris/siginfo.h @@ -0,0 +1,232 @@ +#ifndef _CRIS_SIGINFO_H +#define _CRIS_SIGINFO_H + +#include <linux/types.h> + +/* This is copied from asm-m68k/siginfo.h. */ + +typedef union sigval { + int sival_int; + void *sival_ptr; +} sigval_t; + +#define SI_MAX_SIZE 128 +#define SI_PAD_SIZE ((SI_MAX_SIZE/sizeof(int)) - 3) + +typedef struct siginfo { + int si_signo; + int si_errno; + int si_code; + + union { + int _pad[SI_PAD_SIZE]; + + /* kill() */ + struct { + pid_t _pid; /* sender's pid */ + uid_t _uid; /* sender's uid */ + } _kill; + + /* POSIX.1b timers */ + struct { + unsigned int _timer1; + unsigned int _timer2; + } _timer; + + /* POSIX.1b signals */ + struct { + pid_t _pid; /* sender's pid */ + uid_t _uid; /* sender's uid */ + sigval_t _sigval; + } _rt; + + /* SIGCHLD */ + struct { + pid_t _pid; /* which child */ + uid_t _uid; /* sender's uid */ + int _status; /* exit code */ + clock_t _utime; + clock_t _stime; + } _sigchld; + + /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ + struct { + void *_addr; /* faulting insn/memory ref. */ + } _sigfault; + + /* SIGPOLL */ + struct { + int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ + int _fd; + } _sigpoll; + } _sifields; +} siginfo_t; + +/* + * How these fields are to be accessed. + */ +#define si_pid _sifields._kill._pid +#define si_uid _sifields._kill._uid +#define si_status _sifields._sigchld._status +#define si_utime _sifields._sigchld._utime +#define si_stime _sifields._sigchld._stime +#define si_value _sifields._rt._sigval +#define si_int _sifields._rt._sigval.sival_int +#define si_ptr _sifields._rt._sigval.sival_ptr +#define si_addr _sifields._sigfault._addr +#define si_band _sifields._sigpoll._band +#define si_fd _sifields._sigpoll._fd + +#ifdef __KERNEL__ +#define __SI_MASK 0xffff0000 +#define __SI_KILL (0 << 16) +#define __SI_TIMER (1 << 16) +#define __SI_POLL (2 << 16) +#define __SI_FAULT (3 << 16) +#define __SI_CHLD (4 << 16) +#define __SI_RT (5 << 16) +#define __SI_CODE(T,N) ((T) << 16 | ((N) & 0xffff)) +#else +#define __SI_KILL 0 +#define __SI_TIMER 0 +#define __SI_POLL 0 +#define __SI_FAULT 0 +#define __SI_CHLD 0 +#define __SI_RT 0 +#define __SI_CODE(T,N) (N) +#endif + +/* + * si_code values + * Digital reserves positive values for kernel-generated signals. + */ +#define SI_USER 0 /* sent by kill, sigsend, raise */ +#define SI_KERNEL 0x80 /* sent by the kernel from somewhere */ +#define SI_QUEUE -1 /* sent by sigqueue */ +#define SI_TIMER __SI_CODE(__SI_TIMER,-2) /* sent by timer expiration */ +#define SI_MESGQ -3 /* sent by real time mesq state change */ +#define SI_ASYNCIO -4 /* sent by AIO completion */ +#define SI_SIGIO -5 /* sent by queued SIGIO */ + +#define SI_FROMUSER(siptr) ((siptr)->si_code <= 0) +#define SI_FROMKERNEL(siptr) ((siptr)->si_code > 0) + +/* + * SIGILL si_codes + */ +#define ILL_ILLOPC (__SI_FAULT|1) /* illegal opcode */ +#define ILL_ILLOPN (__SI_FAULT|2) /* illegal operand */ +#define ILL_ILLADR (__SI_FAULT|3) /* illegal addressing mode */ +#define ILL_ILLTRP (__SI_FAULT|4) /* illegal trap */ +#define ILL_PRVOPC (__SI_FAULT|5) /* privileged opcode */ +#define ILL_PRVREG (__SI_FAULT|6) /* privileged register */ +#define ILL_COPROC (__SI_FAULT|7) /* coprocessor error */ +#define ILL_BADSTK (__SI_FAULT|8) /* internal stack error */ +#define NSIGILL 8 + +/* + * SIGFPE si_codes + */ +#define FPE_INTDIV (__SI_FAULT|1) /* integer divide by zero */ +#define FPE_INTOVF (__SI_FAULT|2) /* integer overflow */ +#define FPE_FLTDIV (__SI_FAULT|3) /* floating point divide by zero */ +#define FPE_FLTOVF (__SI_FAULT|4) /* floating point overflow */ +#define FPE_FLTUND (__SI_FAULT|5) /* floating point underflow */ +#define FPE_FLTRES (__SI_FAULT|6) /* floating point inexact result */ +#define FPE_FLTINV (__SI_FAULT|7) /* floating point invalid operation */ +#define FPE_FLTSUB (__SI_FAULT|8) /* subscript out of range */ +#define NSIGFPE 8 + +/* + * SIGSEGV si_codes + */ +#define SEGV_MAPERR (__SI_FAULT|1) /* address not mapped to object */ +#define SEGV_ACCERR (__SI_FAULT|2) /* invalid permissions for mapped object */ +#define NSIGSEGV 2 + +/* + * SIGBUS si_codes + */ +#define BUS_ADRALN (__SI_FAULT|1) /* invalid address alignment */ +#define BUS_ADRERR (__SI_FAULT|2) /* non-existant physical address */ +#define BUS_OBJERR (__SI_FAULT|3) /* object specific hardware error */ +#define NSIGBUS 3 + +/* + * SIGTRAP si_codes + */ +#define TRAP_BRKPT (__SI_FAULT|1) /* process breakpoint */ +#define TRAP_TRACE (__SI_FAULT|2) /* process trace trap */ +#define NSIGTRAP 2 + +/* + * SIGCHLD si_codes + */ +#define CLD_EXITED (__SI_CHLD|1) /* child has exited */ +#define CLD_KILLED (__SI_CHLD|2) /* child was killed */ +#define CLD_DUMPED (__SI_CHLD|3) /* child terminated abnormally */ +#define CLD_TRAPPED (__SI_CHLD|4) /* traced child has trapped */ +#define CLD_STOPPED (__SI_CHLD|5) /* child has stopped */ +#define CLD_CONTINUED (__SI_CHLD|6) /* stopped child has continued */ +#define NSIGCHLD 6 + +/* + * SIGPOLL si_codes + */ +#define POLL_IN (__SI_POLL|1) /* data input available */ +#define POLL_OUT (__SI_POLL|2) /* output buffers available */ +#define POLL_MSG (__SI_POLL|3) /* input message available */ +#define POLL_ERR (__SI_POLL|4) /* i/o error */ +#define POLL_PRI (__SI_POLL|5) /* high priority input available */ +#define POLL_HUP (__SI_POLL|6) /* device disconnected */ +#define NSIGPOLL 6 + +/* + * sigevent definitions + * + * It seems likely that SIGEV_THREAD will have to be handled from + * userspace, libpthread transmuting it to SIGEV_SIGNAL, which the + * thread manager then catches and does the appropriate nonsense. + * However, everything is written out here so as to not get lost. + */ +#define SIGEV_SIGNAL 0 /* notify via signal */ +#define SIGEV_NONE 1 /* other notification: meaningless */ +#define SIGEV_THREAD 2 /* deliver via thread creation */ + +#define SIGEV_MAX_SIZE 64 +#define SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE/sizeof(int)) - 3) + +typedef struct sigevent { + sigval_t sigev_value; + int sigev_signo; + int sigev_notify; + union { + int _pad[SIGEV_PAD_SIZE]; + + struct { + void (*_function)(sigval_t); + void *_attribute; /* really pthread_attr_t */ + } _sigev_thread; + } _sigev_un; +} sigevent_t; + +#define sigev_notify_function _sigev_un._sigev_thread._function +#define sigev_notify_attributes _sigev_un._sigev_thread._attribute + +#ifdef __KERNEL__ +#include <linux/string.h> + +extern inline void copy_siginfo(siginfo_t *to, siginfo_t *from) +{ + if (from->si_code < 0) + memcpy(to, from, sizeof(siginfo_t)); + else + /* _sigchld is currently the largest know union member */ + memcpy(to, from, 3*sizeof(int) + sizeof(from->_sifields._sigchld)); +} + +extern int copy_siginfo_to_user(siginfo_t *to, siginfo_t *from); + +#endif /* __KERNEL__ */ + +#endif diff --git a/include/asm-cris/signal.h b/include/asm-cris/signal.h new file mode 100644 index 000000000..e33bdbf22 --- /dev/null +++ b/include/asm-cris/signal.h @@ -0,0 +1,187 @@ +#ifndef _ASM_CRIS_SIGNAL_H +#define _ASM_CRIS_SIGNAL_H + +#include <linux/types.h> + +/* Avoid too many header ordering problems. */ +struct siginfo; + +#ifdef __KERNEL__ +/* Most things should be clean enough to redefine this at will, if care + is taken to make libc match. */ + +#define _NSIG 64 +#define _NSIG_BPW 32 +#define _NSIG_WORDS (_NSIG / _NSIG_BPW) + +typedef unsigned long old_sigset_t; /* at least 32 bits */ + +typedef struct { + unsigned long sig[_NSIG_WORDS]; +} sigset_t; + +#else +/* Here we must cater to libcs that poke about in kernel headers. */ + +#define NSIG 32 +typedef unsigned long sigset_t; + +#endif /* __KERNEL__ */ + +#define SIGHUP 1 +#define SIGINT 2 +#define SIGQUIT 3 +#define SIGILL 4 +#define SIGTRAP 5 +#define SIGABRT 6 +#define SIGIOT 6 +#define SIGBUS 7 +#define SIGFPE 8 +#define SIGKILL 9 +#define SIGUSR1 10 +#define SIGSEGV 11 +#define SIGUSR2 12 +#define SIGPIPE 13 +#define SIGALRM 14 +#define SIGTERM 15 +#define SIGSTKFLT 16 +#define SIGCHLD 17 +#define SIGCONT 18 +#define SIGSTOP 19 +#define SIGTSTP 20 +#define SIGTTIN 21 +#define SIGTTOU 22 +#define SIGURG 23 +#define SIGXCPU 24 +#define SIGXFSZ 25 +#define SIGVTALRM 26 +#define SIGPROF 27 +#define SIGWINCH 28 +#define SIGIO 29 +#define SIGPOLL SIGIO +/* +#define SIGLOST 29 +*/ +#define SIGPWR 30 +#define SIGSYS 31 +#define SIGUNUSED 31 + +/* These should not be considered constants from userland. */ +#define SIGRTMIN 32 +#define SIGRTMAX (_NSIG-1) + +/* + * SA_FLAGS values: + * + * SA_ONSTACK indicates that a registered stack_t will be used. + * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the + * SA_RESTART flag to get restarting signals (which were the default long ago) + * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. + * SA_RESETHAND clears the handler when the signal is delivered. + * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. + * SA_NODEFER prevents the current signal from being masked in the handler. + * + * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single + * Unix names RESETHAND and NODEFER respectively. + */ + +#define SA_NOCLDSTOP 0x00000001 +#define SA_NOCLDWAIT 0x00000002 /* not supported yet */ +#define SA_SIGINFO 0x00000004 +#define SA_ONSTACK 0x08000000 +#define SA_RESTART 0x10000000 +#define SA_NODEFER 0x40000000 +#define SA_RESETHAND 0x80000000 + +#define SA_NOMASK SA_NODEFER +#define SA_ONESHOT SA_RESETHAND +#define SA_INTERRUPT 0x20000000 /* dummy -- ignored */ + +#define SA_RESTORER 0x04000000 + +/* + * sigaltstack controls + */ +#define SS_ONSTACK 1 +#define SS_DISABLE 2 + +#define MINSIGSTKSZ 2048 +#define SIGSTKSZ 8192 + +#ifdef __KERNEL__ + +/* + * These values of sa_flags are used only by the kernel as part of the + * irq handling routines. + * + * SA_INTERRUPT is also used by the irq handling routines. + * SA_SHIRQ is for shared interrupt support + */ +#define SA_PROBE SA_ONESHOT +#define SA_SAMPLE_RANDOM SA_RESTART +#define SA_SHIRQ 0x04000000 +#endif + +#define SIG_BLOCK 0 /* for blocking signals */ +#define SIG_UNBLOCK 1 /* for unblocking signals */ +#define SIG_SETMASK 2 /* for setting the signal mask */ + +/* Type of a signal handler. */ +typedef void (*__sighandler_t)(int); + +#define SIG_DFL ((__sighandler_t)0) /* default signal handling */ +#define SIG_IGN ((__sighandler_t)1) /* ignore signal */ +#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */ + +#ifdef __KERNEL__ +struct old_sigaction { + __sighandler_t sa_handler; + old_sigset_t sa_mask; + unsigned long sa_flags; + void (*sa_restorer)(void); +}; + +struct sigaction { + __sighandler_t sa_handler; + unsigned long sa_flags; + void (*sa_restorer)(void); + sigset_t sa_mask; /* mask last for extensibility */ +}; + +struct k_sigaction { + struct sigaction sa; +}; +#else +/* Here we must cater to libcs that poke about in kernel headers. */ + +struct sigaction { + union { + __sighandler_t _sa_handler; + void (*_sa_sigaction)(int, struct siginfo *, void *); + } _u; + sigset_t sa_mask; + unsigned long sa_flags; + void (*sa_restorer)(void); +}; + +#define sa_handler _u._sa_handler +#define sa_sigaction _u._sa_sigaction + +#endif /* __KERNEL__ */ + +typedef struct sigaltstack { + void *ss_sp; + int ss_flags; + size_t ss_size; +} stack_t; + +#ifdef __KERNEL__ +#include <asm/sigcontext.h> + +/* here we could define asm-optimized sigaddset, sigdelset etc. operations. + * if we don't, generic ones are used from linux/signal.h + */ + +#endif /* __KERNEL__ */ + +#endif diff --git a/include/asm-cris/smp.h b/include/asm-cris/smp.h new file mode 100644 index 000000000..c2f4feaa0 --- /dev/null +++ b/include/asm-cris/smp.h @@ -0,0 +1,4 @@ +#ifndef __ASM_SMP_H +#define __ASM_SMP_H + +#endif diff --git a/include/asm-cris/smp_lock.h b/include/asm-cris/smp_lock.h new file mode 100644 index 000000000..085543014 --- /dev/null +++ b/include/asm-cris/smp_lock.h @@ -0,0 +1,73 @@ +#ifndef __CRIS_SMPLOCK_H +#define __CRIS_SMPLOCK_H + +#include <linux/config.h> + +#ifdef CONFIG_SMP + +#error "SMP is not supported for CRIS" + +/* + * Locking the kernel + */ + +extern __inline void lock_kernel(void) +{ + unsigned long flags; + int proc = smp_processor_id(); + + save_flags(flags); + cli(); + /* set_bit works atomic in SMP machines */ + while(set_bit(0, (void *)&kernel_flag)) + { + /* + * We just start another level if we have the lock + */ + if (proc == active_kernel_processor) + break; + do + { +#ifdef __SMP_PROF__ + smp_spins[smp_processor_id()]++; +#endif + /* + * Doing test_bit here doesn't lock the bus + */ + if (test_bit(proc, (void *)&smp_invalidate_needed)) + if (clear_bit(proc, (void *)&smp_invalidate_needed)) + local_flush_tlb(); + } + while(test_bit(0, (void *)&kernel_flag)); + } + /* + * We got the lock, so tell the world we are here and increment + * the level counter + */ + active_kernel_processor = proc; + kernel_counter++; + restore_flags(flags); +} + +extern __inline void unlock_kernel(void) +{ + unsigned long flags; + save_flags(flags); + cli(); + /* + * If it's the last level we have in the kernel, then + * free the lock + */ + if (kernel_counter == 0) + panic("Kernel counter wrong.\n"); /* FIXME: Why is kernel_counter sometimes 0 here? */ + + if(! --kernel_counter) + { + active_kernel_processor = NO_PROC_ID; + clear_bit(0, (void *)&kernel_flag); + } + restore_flags(flags); +} + +#endif +#endif diff --git a/include/asm-cris/smplock.h b/include/asm-cris/smplock.h new file mode 100644 index 000000000..398562059 --- /dev/null +++ b/include/asm-cris/smplock.h @@ -0,0 +1,25 @@ +#ifndef __ASM_CRIS_SMPLOCK_H +#define __ASM_CRIS_SMPLOCK_H + +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include <linux/config.h> + +#ifndef CONFIG_SMP + +#define lock_kernel() do { } while(0) +#define unlock_kernel() do { } while(0) +#define release_kernel_lock(task, cpu, depth) ((depth) = 1) +#define reacquire_kernel_lock(task, cpu, depth) do { } while(0) + +#else + +#error "We do not support SMP on CRIS" + +#endif + +#endif diff --git a/include/asm-cris/socket.h b/include/asm-cris/socket.h new file mode 100644 index 000000000..5d1bd2d7a --- /dev/null +++ b/include/asm-cris/socket.h @@ -0,0 +1,64 @@ +#ifndef _ASM_SOCKET_H +#define _ASM_SOCKET_H + +/* almost the same as asm-i386/socket.h */ + +#include <asm/sockios.h> + +/* For setsockoptions(2) */ +#define SOL_SOCKET 1 + +#define SO_DEBUG 1 +#define SO_REUSEADDR 2 +#define SO_TYPE 3 +#define SO_ERROR 4 +#define SO_DONTROUTE 5 +#define SO_BROADCAST 6 +#define SO_SNDBUF 7 +#define SO_RCVBUF 8 +#define SO_KEEPALIVE 9 +#define SO_OOBINLINE 10 +#define SO_NO_CHECK 11 +#define SO_PRIORITY 12 +#define SO_LINGER 13 +#define SO_BSDCOMPAT 14 +/* To add :#define SO_REUSEPORT 15 */ +#define SO_PASSCRED 16 +#define SO_PEERCRED 17 +#define SO_RCVLOWAT 18 +#define SO_SNDLOWAT 19 +#define SO_RCVTIMEO 20 +#define SO_SNDTIMEO 21 + +/* Security levels - as per NRL IPv6 - don't actually do anything */ +#define SO_SECURITY_AUTHENTICATION 22 +#define SO_SECURITY_ENCRYPTION_TRANSPORT 23 +#define SO_SECURITY_ENCRYPTION_NETWORK 24 + +#define SO_BINDTODEVICE 25 + +/* Socket filtering */ +#define SO_ATTACH_FILTER 26 +#define SO_DETACH_FILTER 27 + +#define SO_PEERNAME 28 +#define SO_TIMESTAMP 29 +#define SCM_TIMESTAMP SO_TIMESTAMP + +#if defined(__KERNEL__) +/* Socket types. */ +#define SOCK_STREAM 1 /* stream (connection) socket */ +#define SOCK_DGRAM 2 /* datagram (conn.less) socket */ +#define SOCK_RAW 3 /* raw socket */ +#define SOCK_RDM 4 /* reliably-delivered message */ +#define SOCK_SEQPACKET 5 /* sequential packet socket */ +#define SOCK_PACKET 10 /* linux specific way of */ + /* getting packets at the dev */ + /* level. For writing rarp and */ + /* other similar things on the */ + /* user level. */ +#endif + +#endif /* _ASM_SOCKET_H */ + + diff --git a/include/asm-cris/sockios.h b/include/asm-cris/sockios.h new file mode 100644 index 000000000..6c4012f0b --- /dev/null +++ b/include/asm-cris/sockios.h @@ -0,0 +1,12 @@ +#ifndef __ARCH_CRIS_SOCKIOS__ +#define __ARCH_CRIS_SOCKIOS__ + +/* Socket-level I/O control calls. */ +#define FIOSETOWN 0x8901 +#define SIOCSPGRP 0x8902 +#define FIOGETOWN 0x8903 +#define SIOCGPGRP 0x8904 +#define SIOCATMARK 0x8905 +#define SIOCGSTAMP 0x8906 /* Get stamp */ + +#endif diff --git a/include/asm-cris/softirq.h b/include/asm-cris/softirq.h new file mode 100644 index 000000000..a88b20576 --- /dev/null +++ b/include/asm-cris/softirq.h @@ -0,0 +1,12 @@ +#ifndef __ASM_SOFTIRQ_H +#define __ASM_SOFTIRQ_H + +#include <asm/atomic.h> +#include <asm/hardirq.h> + +#define local_bh_disable() (local_bh_count(smp_processor_id())++) +#define local_bh_enable() (local_bh_count(smp_processor_id())--) + +#define in_softirq() (local_bh_count(smp_processor_id()) != 0) + +#endif /* __ASM_SOFTIRQ_H */ diff --git a/include/asm-cris/stat.h b/include/asm-cris/stat.h new file mode 100644 index 000000000..e993336af --- /dev/null +++ b/include/asm-cris/stat.h @@ -0,0 +1,79 @@ +#ifndef _CRIS_STAT_H +#define _CRIS_STAT_H + +/* verbatim copy of i386 version */ + +struct __old_kernel_stat { + unsigned short st_dev; + unsigned short st_ino; + unsigned short st_mode; + unsigned short st_nlink; + unsigned short st_uid; + unsigned short st_gid; + unsigned short st_rdev; + unsigned long st_size; + unsigned long st_atime; + unsigned long st_mtime; + unsigned long st_ctime; +}; + +struct stat { + unsigned short st_dev; + unsigned short __pad1; + unsigned long st_ino; + unsigned short st_mode; + unsigned short st_nlink; + unsigned short st_uid; + unsigned short st_gid; + unsigned short st_rdev; + unsigned short __pad2; + unsigned long st_size; + unsigned long st_blksize; + unsigned long st_blocks; + unsigned long st_atime; + unsigned long __unused1; + unsigned long st_mtime; + unsigned long __unused2; + unsigned long st_ctime; + unsigned long __unused3; + unsigned long __unused4; + unsigned long __unused5; +}; + +/* This matches struct stat64 in glibc2.1, hence the absolutely + * insane amounts of padding around dev_t's. + */ +struct stat64 { + unsigned short st_dev; + unsigned char __pad0[10]; + + unsigned long st_ino; + unsigned int st_mode; + unsigned int st_nlink; + + unsigned long st_uid; + unsigned long st_gid; + + unsigned short st_rdev; + unsigned char __pad3[10]; + + long long st_size; + unsigned long st_blksize; + + unsigned long st_blocks; /* Number 512-byte blocks allocated. */ + unsigned long __pad4; /* future possible st_blocks high bits */ + + unsigned long st_atime; + unsigned long __pad5; + + unsigned long st_mtime; + unsigned long __pad6; + + unsigned long st_ctime; + unsigned long __pad7; /* will be high 32 bits of ctime someday */ + + unsigned long __unused1; + unsigned long __unused2; +}; + +#endif diff --git a/include/asm-cris/statfs.h b/include/asm-cris/statfs.h new file mode 100644 index 000000000..9bfcc5ea2 --- /dev/null +++ b/include/asm-cris/statfs.h @@ -0,0 +1,25 @@ +#ifndef _CRIS_STATFS_H +#define _CRIS_STATFS_H + +#ifndef __KERNEL_STRICT_NAMES + +#include <linux/types.h> + +typedef __kernel_fsid_t fsid_t; + +#endif + +struct statfs { + long f_type; + long f_bsize; + long f_blocks; + long f_bfree; + long f_bavail; + long f_files; + long f_ffree; + __kernel_fsid_t f_fsid; + long f_namelen; + long f_spare[6]; +}; + +#endif diff --git a/include/asm-cris/string.h b/include/asm-cris/string.h new file mode 100644 index 000000000..691190e99 --- /dev/null +++ b/include/asm-cris/string.h @@ -0,0 +1,14 @@ +#ifndef _ASM_CRIS_STRING_H +#define _ASM_CRIS_STRING_H + +/* the optimized memcpy is in arch/cris/lib/string.c */ + +#define __HAVE_ARCH_MEMCPY +extern void *memcpy(void *, const void *, size_t); + +/* New and improved. In arch/cris/lib/memset.c */ + +#define __HAVE_ARCH_MEMSET +extern void *memset(void *, int, size_t); + +#endif diff --git a/include/asm-cris/sv_addr.agh b/include/asm-cris/sv_addr.agh new file mode 100644 index 000000000..d81aab34a --- /dev/null +++ b/include/asm-cris/sv_addr.agh @@ -0,0 +1,7008 @@ +/* +!* This file was automatically generated by /n/asic/bin/reg_macro_gen +!* from the file `etrax_ng_regs.rd'. +!* Editing within this file is thus not recommended, +!* make the changes in `etrax_ng_regs.rd' instead. +!*/ + + +/* +!* Bus interface configuration registers +!*/ + +#define R_WAITSTATES (IO_TYPECAST_UDWORD 0xb0000000) +#define R_WAITSTATES__pcs4_7_zw__BITNR 30 +#define R_WAITSTATES__pcs4_7_zw__WIDTH 2 +#define R_WAITSTATES__pcs4_7_ew__BITNR 28 +#define R_WAITSTATES__pcs4_7_ew__WIDTH 2 +#define R_WAITSTATES__pcs4_7_lw__BITNR 24 +#define R_WAITSTATES__pcs4_7_lw__WIDTH 4 +#define R_WAITSTATES__pcs0_3_zw__BITNR 22 +#define R_WAITSTATES__pcs0_3_zw__WIDTH 2 +#define R_WAITSTATES__pcs0_3_ew__BITNR 20 +#define R_WAITSTATES__pcs0_3_ew__WIDTH 2 +#define R_WAITSTATES__pcs0_3_lw__BITNR 16 +#define R_WAITSTATES__pcs0_3_lw__WIDTH 4 +#define R_WAITSTATES__sram_zw__BITNR 14 +#define R_WAITSTATES__sram_zw__WIDTH 2 +#define R_WAITSTATES__sram_ew__BITNR 12 +#define R_WAITSTATES__sram_ew__WIDTH 2 +#define R_WAITSTATES__sram_lw__BITNR 8 +#define R_WAITSTATES__sram_lw__WIDTH 4 +#define R_WAITSTATES__flash_zw__BITNR 6 +#define R_WAITSTATES__flash_zw__WIDTH 2 +#define R_WAITSTATES__flash_ew__BITNR 4 +#define R_WAITSTATES__flash_ew__WIDTH 2 +#define R_WAITSTATES__flash_lw__BITNR 0 +#define R_WAITSTATES__flash_lw__WIDTH 4 + +#define R_BUS_CONFIG (IO_TYPECAST_UDWORD 0xb0000004) +#define R_BUS_CONFIG__sram_type__BITNR 9 +#define R_BUS_CONFIG__sram_type__WIDTH 1 +#define R_BUS_CONFIG__sram_type__cwe 1 +#define R_BUS_CONFIG__sram_type__bwe 0 +#define R_BUS_CONFIG__dma_burst__BITNR 8 +#define R_BUS_CONFIG__dma_burst__WIDTH 1 +#define R_BUS_CONFIG__dma_burst__burst16 1 +#define R_BUS_CONFIG__dma_burst__burst32 0 +#define R_BUS_CONFIG__pcs4_7_wr__BITNR 7 +#define R_BUS_CONFIG__pcs4_7_wr__WIDTH 1 +#define R_BUS_CONFIG__pcs4_7_wr__ext 1 +#define R_BUS_CONFIG__pcs4_7_wr__norm 0 +#define R_BUS_CONFIG__pcs0_3_wr__BITNR 6 +#define R_BUS_CONFIG__pcs0_3_wr__WIDTH 1 +#define R_BUS_CONFIG__pcs0_3_wr__ext 1 +#define R_BUS_CONFIG__pcs0_3_wr__norm 0 +#define R_BUS_CONFIG__sram_wr__BITNR 5 +#define R_BUS_CONFIG__sram_wr__WIDTH 1 +#define R_BUS_CONFIG__sram_wr__ext 1 +#define R_BUS_CONFIG__sram_wr__norm 0 +#define R_BUS_CONFIG__flash_wr__BITNR 4 +#define R_BUS_CONFIG__flash_wr__WIDTH 1 +#define R_BUS_CONFIG__flash_wr__ext 1 +#define R_BUS_CONFIG__flash_wr__norm 0 +#define R_BUS_CONFIG__pcs4_7_bw__BITNR 3 +#define R_BUS_CONFIG__pcs4_7_bw__WIDTH 1 +#define R_BUS_CONFIG__pcs4_7_bw__bw32 1 +#define R_BUS_CONFIG__pcs4_7_bw__bw16 0 +#define R_BUS_CONFIG__pcs0_3_bw__BITNR 2 +#define R_BUS_CONFIG__pcs0_3_bw__WIDTH 1 +#define R_BUS_CONFIG__pcs0_3_bw__bw32 1 +#define R_BUS_CONFIG__pcs0_3_bw__bw16 0 +#define R_BUS_CONFIG__sram_bw__BITNR 1 +#define R_BUS_CONFIG__sram_bw__WIDTH 1 +#define R_BUS_CONFIG__sram_bw__bw32 1 +#define R_BUS_CONFIG__sram_bw__bw16 0 +#define R_BUS_CONFIG__flash_bw__BITNR 0 +#define R_BUS_CONFIG__flash_bw__WIDTH 1 +#define R_BUS_CONFIG__flash_bw__bw32 1 +#define R_BUS_CONFIG__flash_bw__bw16 0 + +#define R_BUS_STATUS (IO_TYPECAST_RO_UDWORD 0xb0000004) +#define R_BUS_STATUS__pll_lock_tm__BITNR 5 +#define R_BUS_STATUS__pll_lock_tm__WIDTH 1 +#define R_BUS_STATUS__pll_lock_tm__expired 0 +#define R_BUS_STATUS__pll_lock_tm__counting 1 +#define R_BUS_STATUS__both_faults__BITNR 4 +#define R_BUS_STATUS__both_faults__WIDTH 1 +#define R_BUS_STATUS__both_faults__no 0 +#define R_BUS_STATUS__both_faults__yes 1 +#define R_BUS_STATUS__bsen___BITNR 3 +#define R_BUS_STATUS__bsen___WIDTH 1 +#define R_BUS_STATUS__bsen___enable 0 +#define R_BUS_STATUS__bsen___disable 1 +#define R_BUS_STATUS__boot__BITNR 1 +#define R_BUS_STATUS__boot__WIDTH 2 +#define R_BUS_STATUS__boot__uncached 0 +#define R_BUS_STATUS__boot__serial 1 +#define R_BUS_STATUS__boot__network 2 +#define R_BUS_STATUS__boot__parallel 3 +#define R_BUS_STATUS__flashw__BITNR 0 +#define R_BUS_STATUS__flashw__WIDTH 1 +#define R_BUS_STATUS__flashw__bw32 1 +#define R_BUS_STATUS__flashw__bw16 0 + +#define R_DRAM_TIMING (IO_TYPECAST_UDWORD 0xb0000008) +#define R_DRAM_TIMING__ref__BITNR 14 +#define R_DRAM_TIMING__ref__WIDTH 2 +#define R_DRAM_TIMING__ref__e52us 0 +#define R_DRAM_TIMING__ref__e13us 1 +#define R_DRAM_TIMING__ref__e8700ns 2 +#define R_DRAM_TIMING__ref__disable 3 +#define R_DRAM_TIMING__rp__BITNR 12 +#define R_DRAM_TIMING__rp__WIDTH 2 +#define R_DRAM_TIMING__rs__BITNR 10 +#define R_DRAM_TIMING__rs__WIDTH 2 +#define R_DRAM_TIMING__rh__BITNR 8 +#define R_DRAM_TIMING__rh__WIDTH 2 +#define R_DRAM_TIMING__w__BITNR 7 +#define R_DRAM_TIMING__w__WIDTH 1 +#define R_DRAM_TIMING__w__norm 0 +#define R_DRAM_TIMING__w__ext 1 +#define R_DRAM_TIMING__c__BITNR 6 +#define R_DRAM_TIMING__c__WIDTH 1 +#define R_DRAM_TIMING__c__norm 0 +#define R_DRAM_TIMING__c__ext 1 +#define R_DRAM_TIMING__cz__BITNR 4 +#define R_DRAM_TIMING__cz__WIDTH 2 +#define R_DRAM_TIMING__cp__BITNR 2 +#define R_DRAM_TIMING__cp__WIDTH 2 +#define R_DRAM_TIMING__cw__BITNR 0 +#define R_DRAM_TIMING__cw__WIDTH 2 + +#define R_SDRAM_TIMING (IO_TYPECAST_UDWORD 0xb0000008) +#define R_SDRAM_TIMING__sdram__BITNR 31 +#define R_SDRAM_TIMING__sdram__WIDTH 1 +#define R_SDRAM_TIMING__sdram__enable 1 +#define R_SDRAM_TIMING__sdram__disable 0 +#define R_SDRAM_TIMING__mrs_data__BITNR 16 +#define R_SDRAM_TIMING__mrs_data__WIDTH 15 +#define R_SDRAM_TIMING__ref__BITNR 14 +#define R_SDRAM_TIMING__ref__WIDTH 2 +#define R_SDRAM_TIMING__ref__e52us 0 +#define R_SDRAM_TIMING__ref__e13us 1 +#define R_SDRAM_TIMING__ref__e6500ns 2 +#define R_SDRAM_TIMING__ref__disable 3 +#define R_SDRAM_TIMING__ddr__BITNR 13 +#define R_SDRAM_TIMING__ddr__WIDTH 1 +#define R_SDRAM_TIMING__ddr__on 1 +#define R_SDRAM_TIMING__ddr__off 0 +#define R_SDRAM_TIMING__clk100__BITNR 12 +#define R_SDRAM_TIMING__clk100__WIDTH 1 +#define R_SDRAM_TIMING__clk100__on 1 +#define R_SDRAM_TIMING__clk100__off 0 +#define R_SDRAM_TIMING__ps__BITNR 11 +#define R_SDRAM_TIMING__ps__WIDTH 1 +#define R_SDRAM_TIMING__ps__on 1 +#define R_SDRAM_TIMING__ps__off 0 +#define R_SDRAM_TIMING__cmd__BITNR 9 +#define R_SDRAM_TIMING__cmd__WIDTH 2 +#define R_SDRAM_TIMING__cmd__pre 3 +#define R_SDRAM_TIMING__cmd__ref 2 +#define R_SDRAM_TIMING__cmd__mrs 1 +#define R_SDRAM_TIMING__cmd__nop 0 +#define R_SDRAM_TIMING__pde__BITNR 8 +#define R_SDRAM_TIMING__pde__WIDTH 1 +#define R_SDRAM_TIMING__rc__BITNR 6 +#define R_SDRAM_TIMING__rc__WIDTH 2 +#define R_SDRAM_TIMING__rp__BITNR 4 +#define R_SDRAM_TIMING__rp__WIDTH 2 +#define R_SDRAM_TIMING__rcd__BITNR 2 +#define R_SDRAM_TIMING__rcd__WIDTH 2 +#define R_SDRAM_TIMING__cl__BITNR 0 +#define R_SDRAM_TIMING__cl__WIDTH 2 + +#define R_DRAM_CONFIG (IO_TYPECAST_UDWORD 0xb000000c) +#define R_DRAM_CONFIG__wmm1__BITNR 31 +#define R_DRAM_CONFIG__wmm1__WIDTH 1 +#define R_DRAM_CONFIG__wmm1__wmm 1 +#define R_DRAM_CONFIG__wmm1__norm 0 +#define R_DRAM_CONFIG__wmm0__BITNR 30 +#define R_DRAM_CONFIG__wmm0__WIDTH 1 +#define R_DRAM_CONFIG__wmm0__wmm 1 +#define R_DRAM_CONFIG__wmm0__norm 0 +#define R_DRAM_CONFIG__sh1__BITNR 27 +#define R_DRAM_CONFIG__sh1__WIDTH 3 +#define R_DRAM_CONFIG__sh0__BITNR 24 +#define R_DRAM_CONFIG__sh0__WIDTH 3 +#define R_DRAM_CONFIG__w__BITNR 23 +#define R_DRAM_CONFIG__w__WIDTH 1 +#define R_DRAM_CONFIG__w__bw16 0 +#define R_DRAM_CONFIG__w__bw32 1 +#define R_DRAM_CONFIG__c__BITNR 22 +#define R_DRAM_CONFIG__c__WIDTH 1 +#define R_DRAM_CONFIG__c__byte 0 +#define R_DRAM_CONFIG__c__bank 1 +#define R_DRAM_CONFIG__e__BITNR 21 +#define R_DRAM_CONFIG__e__WIDTH 1 +#define R_DRAM_CONFIG__e__fast 0 +#define R_DRAM_CONFIG__e__edo 1 +#define R_DRAM_CONFIG__group_sel__BITNR 16 +#define R_DRAM_CONFIG__group_sel__WIDTH 5 +#define R_DRAM_CONFIG__group_sel__grp0 0 +#define R_DRAM_CONFIG__group_sel__grp1 1 +#define R_DRAM_CONFIG__group_sel__bit9 9 +#define R_DRAM_CONFIG__group_sel__bit10 10 +#define R_DRAM_CONFIG__group_sel__bit11 11 +#define R_DRAM_CONFIG__group_sel__bit12 12 +#define R_DRAM_CONFIG__group_sel__bit13 13 +#define R_DRAM_CONFIG__group_sel__bit14 14 +#define R_DRAM_CONFIG__group_sel__bit15 15 +#define R_DRAM_CONFIG__group_sel__bit16 16 +#define R_DRAM_CONFIG__group_sel__bit17 17 +#define R_DRAM_CONFIG__group_sel__bit18 18 +#define R_DRAM_CONFIG__group_sel__bit19 19 +#define R_DRAM_CONFIG__group_sel__bit20 20 +#define R_DRAM_CONFIG__group_sel__bit21 21 +#define R_DRAM_CONFIG__group_sel__bit22 22 +#define R_DRAM_CONFIG__group_sel__bit23 23 +#define R_DRAM_CONFIG__group_sel__bit24 24 +#define R_DRAM_CONFIG__group_sel__bit25 25 +#define R_DRAM_CONFIG__group_sel__bit26 26 +#define R_DRAM_CONFIG__group_sel__bit27 27 +#define R_DRAM_CONFIG__group_sel__bit28 28 +#define R_DRAM_CONFIG__group_sel__bit29 29 +#define R_DRAM_CONFIG__ca1__BITNR 13 +#define R_DRAM_CONFIG__ca1__WIDTH 3 +#define R_DRAM_CONFIG__bank23sel__BITNR 8 +#define R_DRAM_CONFIG__bank23sel__WIDTH 5 +#define R_DRAM_CONFIG__bank23sel__bank0 0 +#define R_DRAM_CONFIG__bank23sel__bank1 1 +#define R_DRAM_CONFIG__bank23sel__bit9 9 +#define R_DRAM_CONFIG__bank23sel__bit10 10 +#define R_DRAM_CONFIG__bank23sel__bit11 11 +#define R_DRAM_CONFIG__bank23sel__bit12 12 +#define R_DRAM_CONFIG__bank23sel__bit13 13 +#define R_DRAM_CONFIG__bank23sel__bit14 14 +#define R_DRAM_CONFIG__bank23sel__bit15 15 +#define R_DRAM_CONFIG__bank23sel__bit16 16 +#define R_DRAM_CONFIG__bank23sel__bit17 17 +#define R_DRAM_CONFIG__bank23sel__bit18 18 +#define R_DRAM_CONFIG__bank23sel__bit19 19 +#define R_DRAM_CONFIG__bank23sel__bit20 20 +#define R_DRAM_CONFIG__bank23sel__bit21 21 +#define R_DRAM_CONFIG__bank23sel__bit22 22 +#define R_DRAM_CONFIG__bank23sel__bit23 23 +#define R_DRAM_CONFIG__bank23sel__bit24 24 +#define R_DRAM_CONFIG__bank23sel__bit25 25 +#define R_DRAM_CONFIG__bank23sel__bit26 26 +#define R_DRAM_CONFIG__bank23sel__bit27 27 +#define R_DRAM_CONFIG__bank23sel__bit28 28 +#define R_DRAM_CONFIG__bank23sel__bit29 29 +#define R_DRAM_CONFIG__ca0__BITNR 5 +#define R_DRAM_CONFIG__ca0__WIDTH 3 +#define R_DRAM_CONFIG__bank01sel__BITNR 0 +#define R_DRAM_CONFIG__bank01sel__WIDTH 5 +#define R_DRAM_CONFIG__bank01sel__bank0 0 +#define R_DRAM_CONFIG__bank01sel__bank1 1 +#define R_DRAM_CONFIG__bank01sel__bit9 9 +#define R_DRAM_CONFIG__bank01sel__bit10 10 +#define R_DRAM_CONFIG__bank01sel__bit11 11 +#define R_DRAM_CONFIG__bank01sel__bit12 12 +#define R_DRAM_CONFIG__bank01sel__bit13 13 +#define R_DRAM_CONFIG__bank01sel__bit14 14 +#define R_DRAM_CONFIG__bank01sel__bit15 15 +#define R_DRAM_CONFIG__bank01sel__bit16 16 +#define R_DRAM_CONFIG__bank01sel__bit17 17 +#define R_DRAM_CONFIG__bank01sel__bit18 18 +#define R_DRAM_CONFIG__bank01sel__bit19 19 +#define R_DRAM_CONFIG__bank01sel__bit20 20 +#define R_DRAM_CONFIG__bank01sel__bit21 21 +#define R_DRAM_CONFIG__bank01sel__bit22 22 +#define R_DRAM_CONFIG__bank01sel__bit23 23 +#define R_DRAM_CONFIG__bank01sel__bit24 24 +#define R_DRAM_CONFIG__bank01sel__bit25 25 +#define R_DRAM_CONFIG__bank01sel__bit26 26 +#define R_DRAM_CONFIG__bank01sel__bit27 27 +#define R_DRAM_CONFIG__bank01sel__bit28 28 +#define R_DRAM_CONFIG__bank01sel__bit29 29 + +#define R_SDRAM_CONFIG (IO_TYPECAST_UDWORD 0xb000000c) +#define R_SDRAM_CONFIG__wmm1__BITNR 31 +#define R_SDRAM_CONFIG__wmm1__WIDTH 1 +#define R_SDRAM_CONFIG__wmm1__wmm 1 +#define R_SDRAM_CONFIG__wmm1__norm 0 +#define R_SDRAM_CONFIG__wmm0__BITNR 30 +#define R_SDRAM_CONFIG__wmm0__WIDTH 1 +#define R_SDRAM_CONFIG__wmm0__wmm 1 +#define R_SDRAM_CONFIG__wmm0__norm 0 +#define R_SDRAM_CONFIG__sh1__BITNR 27 +#define R_SDRAM_CONFIG__sh1__WIDTH 3 +#define R_SDRAM_CONFIG__sh0__BITNR 24 +#define R_SDRAM_CONFIG__sh0__WIDTH 3 +#define R_SDRAM_CONFIG__w__BITNR 23 +#define R_SDRAM_CONFIG__w__WIDTH 1 +#define R_SDRAM_CONFIG__w__bw16 0 +#define R_SDRAM_CONFIG__w__bw32 1 +#define R_SDRAM_CONFIG__type1__BITNR 22 +#define R_SDRAM_CONFIG__type1__WIDTH 1 +#define R_SDRAM_CONFIG__type1__bank2 0 +#define R_SDRAM_CONFIG__type1__bank4 1 +#define R_SDRAM_CONFIG__type0__BITNR 21 +#define R_SDRAM_CONFIG__type0__WIDTH 1 +#define R_SDRAM_CONFIG__type0__bank2 0 +#define R_SDRAM_CONFIG__type0__bank4 1 +#define R_SDRAM_CONFIG__group_sel__BITNR 16 +#define R_SDRAM_CONFIG__group_sel__WIDTH 5 +#define R_SDRAM_CONFIG__group_sel__grp0 0 +#define R_SDRAM_CONFIG__group_sel__grp1 1 +#define R_SDRAM_CONFIG__group_sel__bit9 9 +#define R_SDRAM_CONFIG__group_sel__bit10 10 +#define R_SDRAM_CONFIG__group_sel__bit11 11 +#define R_SDRAM_CONFIG__group_sel__bit12 12 +#define R_SDRAM_CONFIG__group_sel__bit13 13 +#define R_SDRAM_CONFIG__group_sel__bit14 14 +#define R_SDRAM_CONFIG__group_sel__bit15 15 +#define R_SDRAM_CONFIG__group_sel__bit16 16 +#define R_SDRAM_CONFIG__group_sel__bit17 17 +#define R_SDRAM_CONFIG__group_sel__bit18 18 +#define R_SDRAM_CONFIG__group_sel__bit19 19 +#define R_SDRAM_CONFIG__group_sel__bit20 20 +#define R_SDRAM_CONFIG__group_sel__bit21 21 +#define R_SDRAM_CONFIG__group_sel__bit22 22 +#define R_SDRAM_CONFIG__group_sel__bit23 23 +#define R_SDRAM_CONFIG__group_sel__bit24 24 +#define R_SDRAM_CONFIG__group_sel__bit25 25 +#define R_SDRAM_CONFIG__group_sel__bit26 26 +#define R_SDRAM_CONFIG__group_sel__bit27 27 +#define R_SDRAM_CONFIG__group_sel__bit28 28 +#define R_SDRAM_CONFIG__group_sel__bit29 29 +#define R_SDRAM_CONFIG__ca1__BITNR 13 +#define R_SDRAM_CONFIG__ca1__WIDTH 3 +#define R_SDRAM_CONFIG__bank_sel1__BITNR 8 +#define R_SDRAM_CONFIG__bank_sel1__WIDTH 5 +#define R_SDRAM_CONFIG__bank_sel1__bit9 9 +#define R_SDRAM_CONFIG__bank_sel1__bit10 10 +#define R_SDRAM_CONFIG__bank_sel1__bit11 11 +#define R_SDRAM_CONFIG__bank_sel1__bit12 12 +#define R_SDRAM_CONFIG__bank_sel1__bit13 13 +#define R_SDRAM_CONFIG__bank_sel1__bit14 14 +#define R_SDRAM_CONFIG__bank_sel1__bit15 15 +#define R_SDRAM_CONFIG__bank_sel1__bit16 16 +#define R_SDRAM_CONFIG__bank_sel1__bit17 17 +#define R_SDRAM_CONFIG__bank_sel1__bit18 18 +#define R_SDRAM_CONFIG__bank_sel1__bit19 19 +#define R_SDRAM_CONFIG__bank_sel1__bit20 20 +#define R_SDRAM_CONFIG__bank_sel1__bit21 21 +#define R_SDRAM_CONFIG__bank_sel1__bit22 22 +#define R_SDRAM_CONFIG__bank_sel1__bit23 23 +#define R_SDRAM_CONFIG__bank_sel1__bit24 24 +#define R_SDRAM_CONFIG__bank_sel1__bit25 25 +#define R_SDRAM_CONFIG__bank_sel1__bit26 26 +#define R_SDRAM_CONFIG__bank_sel1__bit27 27 +#define R_SDRAM_CONFIG__bank_sel1__bit28 28 +#define R_SDRAM_CONFIG__bank_sel1__bit29 29 +#define R_SDRAM_CONFIG__ca0__BITNR 5 +#define R_SDRAM_CONFIG__ca0__WIDTH 3 +#define R_SDRAM_CONFIG__bank_sel0__BITNR 0 +#define R_SDRAM_CONFIG__bank_sel0__WIDTH 5 +#define R_SDRAM_CONFIG__bank_sel0__bit9 9 +#define R_SDRAM_CONFIG__bank_sel0__bit10 10 +#define R_SDRAM_CONFIG__bank_sel0__bit11 11 +#define R_SDRAM_CONFIG__bank_sel0__bit12 12 +#define R_SDRAM_CONFIG__bank_sel0__bit13 13 +#define R_SDRAM_CONFIG__bank_sel0__bit14 14 +#define R_SDRAM_CONFIG__bank_sel0__bit15 15 +#define R_SDRAM_CONFIG__bank_sel0__bit16 16 +#define R_SDRAM_CONFIG__bank_sel0__bit17 17 +#define R_SDRAM_CONFIG__bank_sel0__bit18 18 +#define R_SDRAM_CONFIG__bank_sel0__bit19 19 +#define R_SDRAM_CONFIG__bank_sel0__bit20 20 +#define R_SDRAM_CONFIG__bank_sel0__bit21 21 +#define R_SDRAM_CONFIG__bank_sel0__bit22 22 +#define R_SDRAM_CONFIG__bank_sel0__bit23 23 +#define R_SDRAM_CONFIG__bank_sel0__bit24 24 +#define R_SDRAM_CONFIG__bank_sel0__bit25 25 +#define R_SDRAM_CONFIG__bank_sel0__bit26 26 +#define R_SDRAM_CONFIG__bank_sel0__bit27 27 +#define R_SDRAM_CONFIG__bank_sel0__bit28 28 +#define R_SDRAM_CONFIG__bank_sel0__bit29 29 + +/* +!* External DMA registers +!*/ + +#define R_EXT_DMA_0_CMD (IO_TYPECAST_UDWORD 0xb0000010) +#define R_EXT_DMA_0_CMD__cnt__BITNR 23 +#define R_EXT_DMA_0_CMD__cnt__WIDTH 1 +#define R_EXT_DMA_0_CMD__cnt__enable 1 +#define R_EXT_DMA_0_CMD__cnt__disable 0 +#define R_EXT_DMA_0_CMD__rqpol__BITNR 22 +#define R_EXT_DMA_0_CMD__rqpol__WIDTH 1 +#define R_EXT_DMA_0_CMD__rqpol__ahigh 0 +#define R_EXT_DMA_0_CMD__rqpol__alow 1 +#define R_EXT_DMA_0_CMD__apol__BITNR 21 +#define R_EXT_DMA_0_CMD__apol__WIDTH 1 +#define R_EXT_DMA_0_CMD__apol__ahigh 0 +#define R_EXT_DMA_0_CMD__apol__alow 1 +#define R_EXT_DMA_0_CMD__rq_ack__BITNR 20 +#define R_EXT_DMA_0_CMD__rq_ack__WIDTH 1 +#define R_EXT_DMA_0_CMD__rq_ack__burst 0 +#define R_EXT_DMA_0_CMD__rq_ack__handsh 1 +#define R_EXT_DMA_0_CMD__wid__BITNR 18 +#define R_EXT_DMA_0_CMD__wid__WIDTH 2 +#define R_EXT_DMA_0_CMD__wid__byte 0 +#define R_EXT_DMA_0_CMD__wid__word 1 +#define R_EXT_DMA_0_CMD__wid__dword 2 +#define R_EXT_DMA_0_CMD__dir__BITNR 17 +#define R_EXT_DMA_0_CMD__dir__WIDTH 1 +#define R_EXT_DMA_0_CMD__dir__input 0 +#define R_EXT_DMA_0_CMD__dir__output 1 +#define R_EXT_DMA_0_CMD__run__BITNR 16 +#define R_EXT_DMA_0_CMD__run__WIDTH 1 +#define R_EXT_DMA_0_CMD__run__start 1 +#define R_EXT_DMA_0_CMD__run__stop 0 +#define R_EXT_DMA_0_CMD__trf_count__BITNR 0 +#define R_EXT_DMA_0_CMD__trf_count__WIDTH 16 + +#define R_EXT_DMA_0_STAT (IO_TYPECAST_RO_UDWORD 0xb0000010) +#define R_EXT_DMA_0_STAT__run__BITNR 16 +#define R_EXT_DMA_0_STAT__run__WIDTH 1 +#define R_EXT_DMA_0_STAT__run__start 1 +#define R_EXT_DMA_0_STAT__run__stop 0 +#define R_EXT_DMA_0_STAT__trf_count__BITNR 0 +#define R_EXT_DMA_0_STAT__trf_count__WIDTH 16 + +#define R_EXT_DMA_0_ADDR (IO_TYPECAST_UDWORD 0xb0000014) +#define R_EXT_DMA_0_ADDR__ext0_addr__BITNR 2 +#define R_EXT_DMA_0_ADDR__ext0_addr__WIDTH 28 + +#define R_EXT_DMA_1_CMD (IO_TYPECAST_UDWORD 0xb0000018) +#define R_EXT_DMA_1_CMD__cnt__BITNR 23 +#define R_EXT_DMA_1_CMD__cnt__WIDTH 1 +#define R_EXT_DMA_1_CMD__cnt__enable 1 +#define R_EXT_DMA_1_CMD__cnt__disable 0 +#define R_EXT_DMA_1_CMD__rqpol__BITNR 22 +#define R_EXT_DMA_1_CMD__rqpol__WIDTH 1 +#define R_EXT_DMA_1_CMD__rqpol__ahigh 0 +#define R_EXT_DMA_1_CMD__rqpol__alow 1 +#define R_EXT_DMA_1_CMD__apol__BITNR 21 +#define R_EXT_DMA_1_CMD__apol__WIDTH 1 +#define R_EXT_DMA_1_CMD__apol__ahigh 0 +#define R_EXT_DMA_1_CMD__apol__alow 1 +#define R_EXT_DMA_1_CMD__rq_ack__BITNR 20 +#define R_EXT_DMA_1_CMD__rq_ack__WIDTH 1 +#define R_EXT_DMA_1_CMD__rq_ack__burst 0 +#define R_EXT_DMA_1_CMD__rq_ack__handsh 1 +#define R_EXT_DMA_1_CMD__wid__BITNR 18 +#define R_EXT_DMA_1_CMD__wid__WIDTH 2 +#define R_EXT_DMA_1_CMD__wid__byte 0 +#define R_EXT_DMA_1_CMD__wid__word 1 +#define R_EXT_DMA_1_CMD__wid__dword 2 +#define R_EXT_DMA_1_CMD__dir__BITNR 17 +#define R_EXT_DMA_1_CMD__dir__WIDTH 1 +#define R_EXT_DMA_1_CMD__dir__input 0 +#define R_EXT_DMA_1_CMD__dir__output 1 +#define R_EXT_DMA_1_CMD__run__BITNR 16 +#define R_EXT_DMA_1_CMD__run__WIDTH 1 +#define R_EXT_DMA_1_CMD__run__start 1 +#define R_EXT_DMA_1_CMD__run__stop 0 +#define R_EXT_DMA_1_CMD__trf_count__BITNR 0 +#define R_EXT_DMA_1_CMD__trf_count__WIDTH 16 + +#define R_EXT_DMA_1_STAT (IO_TYPECAST_RO_UDWORD 0xb0000018) +#define R_EXT_DMA_1_STAT__run__BITNR 16 +#define R_EXT_DMA_1_STAT__run__WIDTH 1 +#define R_EXT_DMA_1_STAT__run__start 1 +#define R_EXT_DMA_1_STAT__run__stop 0 +#define R_EXT_DMA_1_STAT__trf_count__BITNR 0 +#define R_EXT_DMA_1_STAT__trf_count__WIDTH 16 + +#define R_EXT_DMA_1_ADDR (IO_TYPECAST_UDWORD 0xb000001c) +#define R_EXT_DMA_1_ADDR__ext0_addr__BITNR 2 +#define R_EXT_DMA_1_ADDR__ext0_addr__WIDTH 28 + +/* +!* Timer registers +!*/ + +#define R_TIMER_CTRL (IO_TYPECAST_UDWORD 0xb0000020) +#define R_TIMER_CTRL__timerdiv1__BITNR 24 +#define R_TIMER_CTRL__timerdiv1__WIDTH 8 +#define R_TIMER_CTRL__timerdiv0__BITNR 16 +#define R_TIMER_CTRL__timerdiv0__WIDTH 8 +#define R_TIMER_CTRL__presc_timer1__BITNR 15 +#define R_TIMER_CTRL__presc_timer1__WIDTH 1 +#define R_TIMER_CTRL__presc_timer1__normal 0 +#define R_TIMER_CTRL__presc_timer1__prescale 1 +#define R_TIMER_CTRL__i1__BITNR 14 +#define R_TIMER_CTRL__i1__WIDTH 1 +#define R_TIMER_CTRL__i1__clr 1 +#define R_TIMER_CTRL__i1__nop 0 +#define R_TIMER_CTRL__tm1__BITNR 12 +#define R_TIMER_CTRL__tm1__WIDTH 2 +#define R_TIMER_CTRL__tm1__stop_ld 0 +#define R_TIMER_CTRL__tm1__freeze 1 +#define R_TIMER_CTRL__tm1__run 2 +#define R_TIMER_CTRL__tm1__reserved 3 +#define R_TIMER_CTRL__clksel1__BITNR 8 +#define R_TIMER_CTRL__clksel1__WIDTH 4 +#define R_TIMER_CTRL__clksel1__c300Hz 0 +#define R_TIMER_CTRL__clksel1__c600Hz 1 +#define R_TIMER_CTRL__clksel1__c1200Hz 2 +#define R_TIMER_CTRL__clksel1__c2400Hz 3 +#define R_TIMER_CTRL__clksel1__c4800Hz 4 +#define R_TIMER_CTRL__clksel1__c9600Hz 5 +#define R_TIMER_CTRL__clksel1__c19k2Hz 6 +#define R_TIMER_CTRL__clksel1__c38k4Hz 7 +#define R_TIMER_CTRL__clksel1__c57k6Hz 8 +#define R_TIMER_CTRL__clksel1__c115k2Hz 9 +#define R_TIMER_CTRL__clksel1__c230k4Hz 10 +#define R_TIMER_CTRL__clksel1__c460k8Hz 11 +#define R_TIMER_CTRL__clksel1__c921k6Hz 12 +#define R_TIMER_CTRL__clksel1__c1843k2Hz 13 +#define R_TIMER_CTRL__clksel1__c6250kHz 14 +#define R_TIMER_CTRL__clksel1__cascade0 15 +#define R_TIMER_CTRL__presc_ext__BITNR 7 +#define R_TIMER_CTRL__presc_ext__WIDTH 1 +#define R_TIMER_CTRL__presc_ext__prescale 0 +#define R_TIMER_CTRL__presc_ext__external 1 +#define R_TIMER_CTRL__i0__BITNR 6 +#define R_TIMER_CTRL__i0__WIDTH 1 +#define R_TIMER_CTRL__i0__clr 1 +#define R_TIMER_CTRL__i0__nop 0 +#define R_TIMER_CTRL__tm0__BITNR 4 +#define R_TIMER_CTRL__tm0__WIDTH 2 +#define R_TIMER_CTRL__tm0__stop_ld 0 +#define R_TIMER_CTRL__tm0__freeze 1 +#define R_TIMER_CTRL__tm0__run 2 +#define R_TIMER_CTRL__tm0__reserved 3 +#define R_TIMER_CTRL__clksel0__BITNR 0 +#define R_TIMER_CTRL__clksel0__WIDTH 4 +#define R_TIMER_CTRL__clksel0__c300Hz 0 +#define R_TIMER_CTRL__clksel0__c600Hz 1 +#define R_TIMER_CTRL__clksel0__c1200Hz 2 +#define R_TIMER_CTRL__clksel0__c2400Hz 3 +#define R_TIMER_CTRL__clksel0__c4800Hz 4 +#define R_TIMER_CTRL__clksel0__c9600Hz 5 +#define R_TIMER_CTRL__clksel0__c19k2Hz 6 +#define R_TIMER_CTRL__clksel0__c38k4Hz 7 +#define R_TIMER_CTRL__clksel0__c57k6Hz 8 +#define R_TIMER_CTRL__clksel0__c115k2Hz 9 +#define R_TIMER_CTRL__clksel0__c230k4Hz 10 +#define R_TIMER_CTRL__clksel0__c460k8Hz 11 +#define R_TIMER_CTRL__clksel0__c921k6Hz 12 +#define R_TIMER_CTRL__clksel0__c1843k2Hz 13 +#define R_TIMER_CTRL__clksel0__c6250kHz 14 +#define R_TIMER_CTRL__clksel0__flexible 15 + +#define R_TIMER_DATA (IO_TYPECAST_RO_UDWORD 0xb0000020) +#define R_TIMER_DATA__timer1__BITNR 24 +#define R_TIMER_DATA__timer1__WIDTH 8 +#define R_TIMER_DATA__timer0__BITNR 16 +#define R_TIMER_DATA__timer0__WIDTH 8 +#define R_TIMER_DATA__clkdiv_high__BITNR 8 +#define R_TIMER_DATA__clkdiv_high__WIDTH 8 +#define R_TIMER_DATA__clkdiv_low__BITNR 0 +#define R_TIMER_DATA__clkdiv_low__WIDTH 8 + +#define R_TIMER01_DATA (IO_TYPECAST_RO_UWORD 0xb0000022) +#define R_TIMER01_DATA__count__BITNR 0 +#define R_TIMER01_DATA__count__WIDTH 16 + +#define R_TIMER0_DATA (IO_TYPECAST_RO_BYTE 0xb0000022) +#define R_TIMER0_DATA__count__BITNR 0 +#define R_TIMER0_DATA__count__WIDTH 8 + +#define R_TIMER1_DATA (IO_TYPECAST_RO_BYTE 0xb0000023) +#define R_TIMER1_DATA__count__BITNR 0 +#define R_TIMER1_DATA__count__WIDTH 8 + +#define R_WATCHDOG (IO_TYPECAST_UDWORD 0xb0000024) +#define R_WATCHDOG__key__BITNR 1 +#define R_WATCHDOG__key__WIDTH 3 +#define R_WATCHDOG__enable__BITNR 0 +#define R_WATCHDOG__enable__WIDTH 1 +#define R_WATCHDOG__enable__stop 0 +#define R_WATCHDOG__enable__start 1 + +#define R_CLOCK_PRESCALE (IO_TYPECAST_UDWORD 0xb00000f0) +#define R_CLOCK_PRESCALE__ser_presc__BITNR 16 +#define R_CLOCK_PRESCALE__ser_presc__WIDTH 16 +#define R_CLOCK_PRESCALE__tim_presc__BITNR 0 +#define R_CLOCK_PRESCALE__tim_presc__WIDTH 16 + +#define R_SERIAL_PRESCALE (IO_TYPECAST_UWORD 0xb00000f2) +#define R_SERIAL_PRESCALE__ser_presc__BITNR 0 +#define R_SERIAL_PRESCALE__ser_presc__WIDTH 16 + +#define R_TIMER_PRESCALE (IO_TYPECAST_UWORD 0xb00000f0) +#define R_TIMER_PRESCALE__tim_presc__BITNR 0 +#define R_TIMER_PRESCALE__tim_presc__WIDTH 16 + +#define R_PRESCALE_STATUS (IO_TYPECAST_RO_UDWORD 0xb00000f0) +#define R_PRESCALE_STATUS__ser_status__BITNR 16 +#define R_PRESCALE_STATUS__ser_status__WIDTH 16 +#define R_PRESCALE_STATUS__tim_status__BITNR 0 +#define R_PRESCALE_STATUS__tim_status__WIDTH 16 + +#define R_SER_PRESC_STATUS (IO_TYPECAST_RO_UWORD 0xb00000f2) +#define R_SER_PRESC_STATUS__ser_status__BITNR 0 +#define R_SER_PRESC_STATUS__ser_status__WIDTH 16 + +#define R_TIM_PRESC_STATUS (IO_TYPECAST_RO_UWORD 0xb00000f0) +#define R_TIM_PRESC_STATUS__tim_status__BITNR 0 +#define R_TIM_PRESC_STATUS__tim_status__WIDTH 16 + +#define R_SYNC_SERIAL_PRESCALE (IO_TYPECAST_UDWORD 0xb00000f4) +#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__BITNR 23 +#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__WIDTH 1 +#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__codec 0 +#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__baudrate 1 +#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__BITNR 22 +#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__WIDTH 1 +#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__external 0 +#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__internal 1 +#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__BITNR 21 +#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__WIDTH 1 +#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__codec 0 +#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__baudrate 1 +#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__BITNR 20 +#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__WIDTH 1 +#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__external 0 +#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__internal 1 +#define R_SYNC_SERIAL_PRESCALE__prescaler__BITNR 16 +#define R_SYNC_SERIAL_PRESCALE__prescaler__WIDTH 3 +#define R_SYNC_SERIAL_PRESCALE__prescaler__div1 0 +#define R_SYNC_SERIAL_PRESCALE__prescaler__div2 1 +#define R_SYNC_SERIAL_PRESCALE__prescaler__div4 2 +#define R_SYNC_SERIAL_PRESCALE__prescaler__div8 3 +#define R_SYNC_SERIAL_PRESCALE__prescaler__div16 4 +#define R_SYNC_SERIAL_PRESCALE__prescaler__div32 5 +#define R_SYNC_SERIAL_PRESCALE__prescaler__div64 6 +#define R_SYNC_SERIAL_PRESCALE__prescaler__div128 7 +#define R_SYNC_SERIAL_PRESCALE__warp_mode__BITNR 15 +#define R_SYNC_SERIAL_PRESCALE__warp_mode__WIDTH 1 +#define R_SYNC_SERIAL_PRESCALE__warp_mode__normal 0 +#define R_SYNC_SERIAL_PRESCALE__warp_mode__enabled 1 +#define R_SYNC_SERIAL_PRESCALE__frame_rate__BITNR 11 +#define R_SYNC_SERIAL_PRESCALE__frame_rate__WIDTH 4 +#define R_SYNC_SERIAL_PRESCALE__word_rate__BITNR 0 +#define R_SYNC_SERIAL_PRESCALE__word_rate__WIDTH 10 + +/* +!* Shared RAM interface registers +!*/ + +#define R_SHARED_RAM_CONFIG (IO_TYPECAST_UDWORD 0xb0000040) +#define R_SHARED_RAM_CONFIG__width__BITNR 3 +#define R_SHARED_RAM_CONFIG__width__WIDTH 1 +#define R_SHARED_RAM_CONFIG__width__byte 0 +#define R_SHARED_RAM_CONFIG__width__word 1 +#define R_SHARED_RAM_CONFIG__enable__BITNR 2 +#define R_SHARED_RAM_CONFIG__enable__WIDTH 1 +#define R_SHARED_RAM_CONFIG__enable__yes 1 +#define R_SHARED_RAM_CONFIG__enable__no 0 +#define R_SHARED_RAM_CONFIG__pint__BITNR 1 +#define R_SHARED_RAM_CONFIG__pint__WIDTH 1 +#define R_SHARED_RAM_CONFIG__pint__int 1 +#define R_SHARED_RAM_CONFIG__pint__nop 0 +#define R_SHARED_RAM_CONFIG__clri__BITNR 0 +#define R_SHARED_RAM_CONFIG__clri__WIDTH 1 +#define R_SHARED_RAM_CONFIG__clri__clr 1 +#define R_SHARED_RAM_CONFIG__clri__nop 0 + +#define R_SHARED_RAM_ADDR (IO_TYPECAST_UDWORD 0xb0000044) +#define R_SHARED_RAM_ADDR__base_addr__BITNR 8 +#define R_SHARED_RAM_ADDR__base_addr__WIDTH 22 + +/* +!* General config registers +!*/ + +#define R_GEN_CONFIG (IO_TYPECAST_UDWORD 0xb000002c) +#define R_GEN_CONFIG__par_w__BITNR 31 +#define R_GEN_CONFIG__par_w__WIDTH 1 +#define R_GEN_CONFIG__par_w__select 1 +#define R_GEN_CONFIG__par_w__disable 0 +#define R_GEN_CONFIG__usb2__BITNR 30 +#define R_GEN_CONFIG__usb2__WIDTH 1 +#define R_GEN_CONFIG__usb2__select 1 +#define R_GEN_CONFIG__usb2__disable 0 +#define R_GEN_CONFIG__usb1__BITNR 29 +#define R_GEN_CONFIG__usb1__WIDTH 1 +#define R_GEN_CONFIG__usb1__select 1 +#define R_GEN_CONFIG__usb1__disable 0 +#define R_GEN_CONFIG__p21__BITNR 28 +#define R_GEN_CONFIG__p21__WIDTH 1 +#define R_GEN_CONFIG__p21__select 1 +#define R_GEN_CONFIG__p21__disable 0 +#define R_GEN_CONFIG__g24dir__BITNR 27 +#define R_GEN_CONFIG__g24dir__WIDTH 1 +#define R_GEN_CONFIG__g24dir__in 0 +#define R_GEN_CONFIG__g24dir__out 1 +#define R_GEN_CONFIG__g16_20dir__BITNR 26 +#define R_GEN_CONFIG__g16_20dir__WIDTH 1 +#define R_GEN_CONFIG__g16_20dir__in 0 +#define R_GEN_CONFIG__g16_20dir__out 1 +#define R_GEN_CONFIG__g8_15dir__BITNR 25 +#define R_GEN_CONFIG__g8_15dir__WIDTH 1 +#define R_GEN_CONFIG__g8_15dir__in 0 +#define R_GEN_CONFIG__g8_15dir__out 1 +#define R_GEN_CONFIG__g0dir__BITNR 24 +#define R_GEN_CONFIG__g0dir__WIDTH 1 +#define R_GEN_CONFIG__g0dir__in 0 +#define R_GEN_CONFIG__g0dir__out 1 +#define R_GEN_CONFIG__dma9__BITNR 23 +#define R_GEN_CONFIG__dma9__WIDTH 1 +#define R_GEN_CONFIG__dma9__usb 0 +#define R_GEN_CONFIG__dma9__serial1 1 +#define R_GEN_CONFIG__dma8__BITNR 22 +#define R_GEN_CONFIG__dma8__WIDTH 1 +#define R_GEN_CONFIG__dma8__usb 0 +#define R_GEN_CONFIG__dma8__serial1 1 +#define R_GEN_CONFIG__dma7__BITNR 20 +#define R_GEN_CONFIG__dma7__WIDTH 2 +#define R_GEN_CONFIG__dma7__unused 0 +#define R_GEN_CONFIG__dma7__serial0 1 +#define R_GEN_CONFIG__dma7__extdma1 2 +#define R_GEN_CONFIG__dma7__intdma6 3 +#define R_GEN_CONFIG__dma6__BITNR 18 +#define R_GEN_CONFIG__dma6__WIDTH 2 +#define R_GEN_CONFIG__dma6__unused 0 +#define R_GEN_CONFIG__dma6__serial0 1 +#define R_GEN_CONFIG__dma6__extdma1 2 +#define R_GEN_CONFIG__dma6__intdma7 3 +#define R_GEN_CONFIG__dma5__BITNR 16 +#define R_GEN_CONFIG__dma5__WIDTH 2 +#define R_GEN_CONFIG__dma5__par1 0 +#define R_GEN_CONFIG__dma5__scsi1 1 +#define R_GEN_CONFIG__dma5__serial3 2 +#define R_GEN_CONFIG__dma5__extdma0 3 +#define R_GEN_CONFIG__dma4__BITNR 14 +#define R_GEN_CONFIG__dma4__WIDTH 2 +#define R_GEN_CONFIG__dma4__par1 0 +#define R_GEN_CONFIG__dma4__scsi1 1 +#define R_GEN_CONFIG__dma4__serial3 2 +#define R_GEN_CONFIG__dma4__extdma0 3 +#define R_GEN_CONFIG__dma3__BITNR 12 +#define R_GEN_CONFIG__dma3__WIDTH 2 +#define R_GEN_CONFIG__dma3__par0 0 +#define R_GEN_CONFIG__dma3__scsi0 1 +#define R_GEN_CONFIG__dma3__serial2 2 +#define R_GEN_CONFIG__dma3__ata 3 +#define R_GEN_CONFIG__dma2__BITNR 10 +#define R_GEN_CONFIG__dma2__WIDTH 2 +#define R_GEN_CONFIG__dma2__par0 0 +#define R_GEN_CONFIG__dma2__scsi0 1 +#define R_GEN_CONFIG__dma2__serial2 2 +#define R_GEN_CONFIG__dma2__ata 3 +#define R_GEN_CONFIG__mio_w__BITNR 9 +#define R_GEN_CONFIG__mio_w__WIDTH 1 +#define R_GEN_CONFIG__mio_w__select 1 +#define R_GEN_CONFIG__mio_w__disable 0 +#define R_GEN_CONFIG__ser3__BITNR 8 +#define R_GEN_CONFIG__ser3__WIDTH 1 +#define R_GEN_CONFIG__ser3__select 1 +#define R_GEN_CONFIG__ser3__disable 0 +#define R_GEN_CONFIG__par1__BITNR 7 +#define R_GEN_CONFIG__par1__WIDTH 1 +#define R_GEN_CONFIG__par1__select 1 +#define R_GEN_CONFIG__par1__disable 0 +#define R_GEN_CONFIG__scsi0w__BITNR 6 +#define R_GEN_CONFIG__scsi0w__WIDTH 1 +#define R_GEN_CONFIG__scsi0w__select 1 +#define R_GEN_CONFIG__scsi0w__disable 0 +#define R_GEN_CONFIG__scsi1__BITNR 5 +#define R_GEN_CONFIG__scsi1__WIDTH 1 +#define R_GEN_CONFIG__scsi1__select 1 +#define R_GEN_CONFIG__scsi1__disable 0 +#define R_GEN_CONFIG__mio__BITNR 4 +#define R_GEN_CONFIG__mio__WIDTH 1 +#define R_GEN_CONFIG__mio__select 1 +#define R_GEN_CONFIG__mio__disable 0 +#define R_GEN_CONFIG__ser2__BITNR 3 +#define R_GEN_CONFIG__ser2__WIDTH 1 +#define R_GEN_CONFIG__ser2__select 1 +#define R_GEN_CONFIG__ser2__disable 0 +#define R_GEN_CONFIG__par0__BITNR 2 +#define R_GEN_CONFIG__par0__WIDTH 1 +#define R_GEN_CONFIG__par0__select 1 +#define R_GEN_CONFIG__par0__disable 0 +#define R_GEN_CONFIG__ata__BITNR 1 +#define R_GEN_CONFIG__ata__WIDTH 1 +#define R_GEN_CONFIG__ata__select 1 +#define R_GEN_CONFIG__ata__disable 0 +#define R_GEN_CONFIG__scsi0__BITNR 0 +#define R_GEN_CONFIG__scsi0__WIDTH 1 +#define R_GEN_CONFIG__scsi0__select 1 +#define R_GEN_CONFIG__scsi0__disable 0 + +#define R_GEN_CONFIG_II (IO_TYPECAST_UDWORD 0xb0000034) +#define R_GEN_CONFIG_II__sermode3__BITNR 6 +#define R_GEN_CONFIG_II__sermode3__WIDTH 1 +#define R_GEN_CONFIG_II__sermode3__async 0 +#define R_GEN_CONFIG_II__sermode3__sync 1 +#define R_GEN_CONFIG_II__sermode1__BITNR 4 +#define R_GEN_CONFIG_II__sermode1__WIDTH 1 +#define R_GEN_CONFIG_II__sermode1__async 0 +#define R_GEN_CONFIG_II__sermode1__sync 1 +#define R_GEN_CONFIG_II__ext_clk__BITNR 2 +#define R_GEN_CONFIG_II__ext_clk__WIDTH 1 +#define R_GEN_CONFIG_II__ext_clk__select 1 +#define R_GEN_CONFIG_II__ext_clk__disable 0 +#define R_GEN_CONFIG_II__ser2__BITNR 1 +#define R_GEN_CONFIG_II__ser2__WIDTH 1 +#define R_GEN_CONFIG_II__ser2__select 1 +#define R_GEN_CONFIG_II__ser2__disable 0 +#define R_GEN_CONFIG_II__ser3__BITNR 0 +#define R_GEN_CONFIG_II__ser3__WIDTH 1 +#define R_GEN_CONFIG_II__ser3__select 1 +#define R_GEN_CONFIG_II__ser3__disable 0 + +#define R_PORT_G_DATA (IO_TYPECAST_UDWORD 0xb0000028) +#define R_PORT_G_DATA__data__BITNR 0 +#define R_PORT_G_DATA__data__WIDTH 32 + +/* +!* General port configuration registers +!*/ + +#define R_PORT_PA_SET (IO_TYPECAST_UDWORD 0xb0000030) +#define R_PORT_PA_SET__dir7__BITNR 15 +#define R_PORT_PA_SET__dir7__WIDTH 1 +#define R_PORT_PA_SET__dir7__input 0 +#define R_PORT_PA_SET__dir7__output 1 +#define R_PORT_PA_SET__dir6__BITNR 14 +#define R_PORT_PA_SET__dir6__WIDTH 1 +#define R_PORT_PA_SET__dir6__input 0 +#define R_PORT_PA_SET__dir6__output 1 +#define R_PORT_PA_SET__dir5__BITNR 13 +#define R_PORT_PA_SET__dir5__WIDTH 1 +#define R_PORT_PA_SET__dir5__input 0 +#define R_PORT_PA_SET__dir5__output 1 +#define R_PORT_PA_SET__dir4__BITNR 12 +#define R_PORT_PA_SET__dir4__WIDTH 1 +#define R_PORT_PA_SET__dir4__input 0 +#define R_PORT_PA_SET__dir4__output 1 +#define R_PORT_PA_SET__dir3__BITNR 11 +#define R_PORT_PA_SET__dir3__WIDTH 1 +#define R_PORT_PA_SET__dir3__input 0 +#define R_PORT_PA_SET__dir3__output 1 +#define R_PORT_PA_SET__dir2__BITNR 10 +#define R_PORT_PA_SET__dir2__WIDTH 1 +#define R_PORT_PA_SET__dir2__input 0 +#define R_PORT_PA_SET__dir2__output 1 +#define R_PORT_PA_SET__dir1__BITNR 9 +#define R_PORT_PA_SET__dir1__WIDTH 1 +#define R_PORT_PA_SET__dir1__input 0 +#define R_PORT_PA_SET__dir1__output 1 +#define R_PORT_PA_SET__dir0__BITNR 8 +#define R_PORT_PA_SET__dir0__WIDTH 1 +#define R_PORT_PA_SET__dir0__input 0 +#define R_PORT_PA_SET__dir0__output 1 +#define R_PORT_PA_SET__data_out__BITNR 0 +#define R_PORT_PA_SET__data_out__WIDTH 8 + +#define R_PORT_PA_DATA (IO_TYPECAST_BYTE 0xb0000030) +#define R_PORT_PA_DATA__data_out__BITNR 0 +#define R_PORT_PA_DATA__data_out__WIDTH 8 + +#define R_PORT_PA_DIR (IO_TYPECAST_BYTE 0xb0000031) +#define R_PORT_PA_DIR__dir7__BITNR 7 +#define R_PORT_PA_DIR__dir7__WIDTH 1 +#define R_PORT_PA_DIR__dir7__input 0 +#define R_PORT_PA_DIR__dir7__output 1 +#define R_PORT_PA_DIR__dir6__BITNR 6 +#define R_PORT_PA_DIR__dir6__WIDTH 1 +#define R_PORT_PA_DIR__dir6__input 0 +#define R_PORT_PA_DIR__dir6__output 1 +#define R_PORT_PA_DIR__dir5__BITNR 5 +#define R_PORT_PA_DIR__dir5__WIDTH 1 +#define R_PORT_PA_DIR__dir5__input 0 +#define R_PORT_PA_DIR__dir5__output 1 +#define R_PORT_PA_DIR__dir4__BITNR 4 +#define R_PORT_PA_DIR__dir4__WIDTH 1 +#define R_PORT_PA_DIR__dir4__input 0 +#define R_PORT_PA_DIR__dir4__output 1 +#define R_PORT_PA_DIR__dir3__BITNR 3 +#define R_PORT_PA_DIR__dir3__WIDTH 1 +#define R_PORT_PA_DIR__dir3__input 0 +#define R_PORT_PA_DIR__dir3__output 1 +#define R_PORT_PA_DIR__dir2__BITNR 2 +#define R_PORT_PA_DIR__dir2__WIDTH 1 +#define R_PORT_PA_DIR__dir2__input 0 +#define R_PORT_PA_DIR__dir2__output 1 +#define R_PORT_PA_DIR__dir1__BITNR 1 +#define R_PORT_PA_DIR__dir1__WIDTH 1 +#define R_PORT_PA_DIR__dir1__input 0 +#define R_PORT_PA_DIR__dir1__output 1 +#define R_PORT_PA_DIR__dir0__BITNR 0 +#define R_PORT_PA_DIR__dir0__WIDTH 1 +#define R_PORT_PA_DIR__dir0__input 0 +#define R_PORT_PA_DIR__dir0__output 1 + +#define R_PORT_PA_READ (IO_TYPECAST_RO_UDWORD 0xb0000030) +#define R_PORT_PA_READ__data_in__BITNR 0 +#define R_PORT_PA_READ__data_in__WIDTH 8 + +#define R_PORT_PB_SET (IO_TYPECAST_UDWORD 0xb0000038) +#define R_PORT_PB_SET__syncser3__BITNR 29 +#define R_PORT_PB_SET__syncser3__WIDTH 1 +#define R_PORT_PB_SET__syncser3__port_cs 0 +#define R_PORT_PB_SET__syncser3__ss3extra 1 +#define R_PORT_PB_SET__syncser1__BITNR 28 +#define R_PORT_PB_SET__syncser1__WIDTH 1 +#define R_PORT_PB_SET__syncser1__port_cs 0 +#define R_PORT_PB_SET__syncser1__ss1extra 1 +#define R_PORT_PB_SET__i2c_en__BITNR 27 +#define R_PORT_PB_SET__i2c_en__WIDTH 1 +#define R_PORT_PB_SET__i2c_en__off 0 +#define R_PORT_PB_SET__i2c_en__on 1 +#define R_PORT_PB_SET__i2c_d__BITNR 26 +#define R_PORT_PB_SET__i2c_d__WIDTH 1 +#define R_PORT_PB_SET__i2c_clk__BITNR 25 +#define R_PORT_PB_SET__i2c_clk__WIDTH 1 +#define R_PORT_PB_SET__i2c_oe___BITNR 24 +#define R_PORT_PB_SET__i2c_oe___WIDTH 1 +#define R_PORT_PB_SET__i2c_oe___enable 0 +#define R_PORT_PB_SET__i2c_oe___disable 1 +#define R_PORT_PB_SET__cs7__BITNR 23 +#define R_PORT_PB_SET__cs7__WIDTH 1 +#define R_PORT_PB_SET__cs7__port 0 +#define R_PORT_PB_SET__cs7__cs 1 +#define R_PORT_PB_SET__cs6__BITNR 22 +#define R_PORT_PB_SET__cs6__WIDTH 1 +#define R_PORT_PB_SET__cs6__port 0 +#define R_PORT_PB_SET__cs6__cs 1 +#define R_PORT_PB_SET__cs5__BITNR 21 +#define R_PORT_PB_SET__cs5__WIDTH 1 +#define R_PORT_PB_SET__cs5__port 0 +#define R_PORT_PB_SET__cs5__cs 1 +#define R_PORT_PB_SET__cs4__BITNR 20 +#define R_PORT_PB_SET__cs4__WIDTH 1 +#define R_PORT_PB_SET__cs4__port 0 +#define R_PORT_PB_SET__cs4__cs 1 +#define R_PORT_PB_SET__cs3__BITNR 19 +#define R_PORT_PB_SET__cs3__WIDTH 1 +#define R_PORT_PB_SET__cs3__port 0 +#define R_PORT_PB_SET__cs3__cs 1 +#define R_PORT_PB_SET__cs2__BITNR 18 +#define R_PORT_PB_SET__cs2__WIDTH 1 +#define R_PORT_PB_SET__cs2__port 0 +#define R_PORT_PB_SET__cs2__cs 1 +#define R_PORT_PB_SET__scsi1__BITNR 17 +#define R_PORT_PB_SET__scsi1__WIDTH 1 +#define R_PORT_PB_SET__scsi1__port_cs 0 +#define R_PORT_PB_SET__scsi1__enph 1 +#define R_PORT_PB_SET__scsi0__BITNR 16 +#define R_PORT_PB_SET__scsi0__WIDTH 1 +#define R_PORT_PB_SET__scsi0__port_cs 0 +#define R_PORT_PB_SET__scsi0__enph 1 +#define R_PORT_PB_SET__dir7__BITNR 15 +#define R_PORT_PB_SET__dir7__WIDTH 1 +#define R_PORT_PB_SET__dir7__input 0 +#define R_PORT_PB_SET__dir7__output 1 +#define R_PORT_PB_SET__dir6__BITNR 14 +#define R_PORT_PB_SET__dir6__WIDTH 1 +#define R_PORT_PB_SET__dir6__input 0 +#define R_PORT_PB_SET__dir6__output 1 +#define R_PORT_PB_SET__dir5__BITNR 13 +#define R_PORT_PB_SET__dir5__WIDTH 1 +#define R_PORT_PB_SET__dir5__input 0 +#define R_PORT_PB_SET__dir5__output 1 +#define R_PORT_PB_SET__dir4__BITNR 12 +#define R_PORT_PB_SET__dir4__WIDTH 1 +#define R_PORT_PB_SET__dir4__input 0 +#define R_PORT_PB_SET__dir4__output 1 +#define R_PORT_PB_SET__dir3__BITNR 11 +#define R_PORT_PB_SET__dir3__WIDTH 1 +#define R_PORT_PB_SET__dir3__input 0 +#define R_PORT_PB_SET__dir3__output 1 +#define R_PORT_PB_SET__dir2__BITNR 10 +#define R_PORT_PB_SET__dir2__WIDTH 1 +#define R_PORT_PB_SET__dir2__input 0 +#define R_PORT_PB_SET__dir2__output 1 +#define R_PORT_PB_SET__dir1__BITNR 9 +#define R_PORT_PB_SET__dir1__WIDTH 1 +#define R_PORT_PB_SET__dir1__input 0 +#define R_PORT_PB_SET__dir1__output 1 +#define R_PORT_PB_SET__dir0__BITNR 8 +#define R_PORT_PB_SET__dir0__WIDTH 1 +#define R_PORT_PB_SET__dir0__input 0 +#define R_PORT_PB_SET__dir0__output 1 +#define R_PORT_PB_SET__data_out__BITNR 0 +#define R_PORT_PB_SET__data_out__WIDTH 8 + +#define R_PORT_PB_DATA (IO_TYPECAST_BYTE 0xb0000038) +#define R_PORT_PB_DATA__data_out__BITNR 0 +#define R_PORT_PB_DATA__data_out__WIDTH 8 + +#define R_PORT_PB_DIR (IO_TYPECAST_BYTE 0xb0000039) +#define R_PORT_PB_DIR__dir7__BITNR 7 +#define R_PORT_PB_DIR__dir7__WIDTH 1 +#define R_PORT_PB_DIR__dir7__input 0 +#define R_PORT_PB_DIR__dir7__output 1 +#define R_PORT_PB_DIR__dir6__BITNR 6 +#define R_PORT_PB_DIR__dir6__WIDTH 1 +#define R_PORT_PB_DIR__dir6__input 0 +#define R_PORT_PB_DIR__dir6__output 1 +#define R_PORT_PB_DIR__dir5__BITNR 5 +#define R_PORT_PB_DIR__dir5__WIDTH 1 +#define R_PORT_PB_DIR__dir5__input 0 +#define R_PORT_PB_DIR__dir5__output 1 +#define R_PORT_PB_DIR__dir4__BITNR 4 +#define R_PORT_PB_DIR__dir4__WIDTH 1 +#define R_PORT_PB_DIR__dir4__input 0 +#define R_PORT_PB_DIR__dir4__output 1 +#define R_PORT_PB_DIR__dir3__BITNR 3 +#define R_PORT_PB_DIR__dir3__WIDTH 1 +#define R_PORT_PB_DIR__dir3__input 0 +#define R_PORT_PB_DIR__dir3__output 1 +#define R_PORT_PB_DIR__dir2__BITNR 2 +#define R_PORT_PB_DIR__dir2__WIDTH 1 +#define R_PORT_PB_DIR__dir2__input 0 +#define R_PORT_PB_DIR__dir2__output 1 +#define R_PORT_PB_DIR__dir1__BITNR 1 +#define R_PORT_PB_DIR__dir1__WIDTH 1 +#define R_PORT_PB_DIR__dir1__input 0 +#define R_PORT_PB_DIR__dir1__output 1 +#define R_PORT_PB_DIR__dir0__BITNR 0 +#define R_PORT_PB_DIR__dir0__WIDTH 1 +#define R_PORT_PB_DIR__dir0__input 0 +#define R_PORT_PB_DIR__dir0__output 1 + +#define R_PORT_PB_CONFIG (IO_TYPECAST_BYTE 0xb000003a) +#define R_PORT_PB_CONFIG__cs7__BITNR 7 +#define R_PORT_PB_CONFIG__cs7__WIDTH 1 +#define R_PORT_PB_CONFIG__cs7__port 0 +#define R_PORT_PB_CONFIG__cs7__cs 1 +#define R_PORT_PB_CONFIG__cs6__BITNR 6 +#define R_PORT_PB_CONFIG__cs6__WIDTH 1 +#define R_PORT_PB_CONFIG__cs6__port 0 +#define R_PORT_PB_CONFIG__cs6__cs 1 +#define R_PORT_PB_CONFIG__cs5__BITNR 5 +#define R_PORT_PB_CONFIG__cs5__WIDTH 1 +#define R_PORT_PB_CONFIG__cs5__port 0 +#define R_PORT_PB_CONFIG__cs5__cs 1 +#define R_PORT_PB_CONFIG__cs4__BITNR 4 +#define R_PORT_PB_CONFIG__cs4__WIDTH 1 +#define R_PORT_PB_CONFIG__cs4__port 0 +#define R_PORT_PB_CONFIG__cs4__cs 1 +#define R_PORT_PB_CONFIG__cs3__BITNR 3 +#define R_PORT_PB_CONFIG__cs3__WIDTH 1 +#define R_PORT_PB_CONFIG__cs3__port 0 +#define R_PORT_PB_CONFIG__cs3__cs 1 +#define R_PORT_PB_CONFIG__cs2__BITNR 2 +#define R_PORT_PB_CONFIG__cs2__WIDTH 1 +#define R_PORT_PB_CONFIG__cs2__port 0 +#define R_PORT_PB_CONFIG__cs2__cs 1 +#define R_PORT_PB_CONFIG__scsi1__BITNR 1 +#define R_PORT_PB_CONFIG__scsi1__WIDTH 1 +#define R_PORT_PB_CONFIG__scsi1__port_cs 0 +#define R_PORT_PB_CONFIG__scsi1__enph 1 +#define R_PORT_PB_CONFIG__scsi0__BITNR 0 +#define R_PORT_PB_CONFIG__scsi0__WIDTH 1 +#define R_PORT_PB_CONFIG__scsi0__port_cs 0 +#define R_PORT_PB_CONFIG__scsi0__enph 1 + +#define R_PORT_PB_I2C (IO_TYPECAST_BYTE 0xb000003b) +#define R_PORT_PB_I2C__syncser3__BITNR 5 +#define R_PORT_PB_I2C__syncser3__WIDTH 1 +#define R_PORT_PB_I2C__syncser3__port_cs 0 +#define R_PORT_PB_I2C__syncser3__ss3extra 1 +#define R_PORT_PB_I2C__syncser1__BITNR 4 +#define R_PORT_PB_I2C__syncser1__WIDTH 1 +#define R_PORT_PB_I2C__syncser1__port_cs 0 +#define R_PORT_PB_I2C__syncser1__ss1extra 1 +#define R_PORT_PB_I2C__i2c_en__BITNR 3 +#define R_PORT_PB_I2C__i2c_en__WIDTH 1 +#define R_PORT_PB_I2C__i2c_en__off 0 +#define R_PORT_PB_I2C__i2c_en__on 1 +#define R_PORT_PB_I2C__i2c_d__BITNR 2 +#define R_PORT_PB_I2C__i2c_d__WIDTH 1 +#define R_PORT_PB_I2C__i2c_clk__BITNR 1 +#define R_PORT_PB_I2C__i2c_clk__WIDTH 1 +#define R_PORT_PB_I2C__i2c_oe___BITNR 0 +#define R_PORT_PB_I2C__i2c_oe___WIDTH 1 +#define R_PORT_PB_I2C__i2c_oe___enable 0 +#define R_PORT_PB_I2C__i2c_oe___disable 1 + +#define R_PORT_PB_READ (IO_TYPECAST_RO_UDWORD 0xb0000038) +#define R_PORT_PB_READ__data_in__BITNR 0 +#define R_PORT_PB_READ__data_in__WIDTH 8 + +/* +!* Serial port registers +!*/ + +#define R_SERIAL0_CTRL (IO_TYPECAST_UDWORD 0xb0000060) +#define R_SERIAL0_CTRL__tr_baud__BITNR 28 +#define R_SERIAL0_CTRL__tr_baud__WIDTH 4 +#define R_SERIAL0_CTRL__tr_baud__c300Hz 0 +#define R_SERIAL0_CTRL__tr_baud__c600Hz 1 +#define R_SERIAL0_CTRL__tr_baud__c1200Hz 2 +#define R_SERIAL0_CTRL__tr_baud__c2400Hz 3 +#define R_SERIAL0_CTRL__tr_baud__c4800Hz 4 +#define R_SERIAL0_CTRL__tr_baud__c9600Hz 5 +#define R_SERIAL0_CTRL__tr_baud__c19k2Hz 6 +#define R_SERIAL0_CTRL__tr_baud__c38k4Hz 7 +#define R_SERIAL0_CTRL__tr_baud__c57k6Hz 8 +#define R_SERIAL0_CTRL__tr_baud__c115k2Hz 9 +#define R_SERIAL0_CTRL__tr_baud__c230k4Hz 10 +#define R_SERIAL0_CTRL__tr_baud__c460k8Hz 11 +#define R_SERIAL0_CTRL__tr_baud__c921k6Hz 12 +#define R_SERIAL0_CTRL__tr_baud__c1843k2Hz 13 +#define R_SERIAL0_CTRL__tr_baud__c6250kHz 14 +#define R_SERIAL0_CTRL__tr_baud__reserved 15 +#define R_SERIAL0_CTRL__rec_baud__BITNR 24 +#define R_SERIAL0_CTRL__rec_baud__WIDTH 4 +#define R_SERIAL0_CTRL__rec_baud__c300Hz 0 +#define R_SERIAL0_CTRL__rec_baud__c600Hz 1 +#define R_SERIAL0_CTRL__rec_baud__c1200Hz 2 +#define R_SERIAL0_CTRL__rec_baud__c2400Hz 3 +#define R_SERIAL0_CTRL__rec_baud__c4800Hz 4 +#define R_SERIAL0_CTRL__rec_baud__c9600Hz 5 +#define R_SERIAL0_CTRL__rec_baud__c19k2Hz 6 +#define R_SERIAL0_CTRL__rec_baud__c38k4Hz 7 +#define R_SERIAL0_CTRL__rec_baud__c57k6Hz 8 +#define R_SERIAL0_CTRL__rec_baud__c115k2Hz 9 +#define R_SERIAL0_CTRL__rec_baud__c230k4Hz 10 +#define R_SERIAL0_CTRL__rec_baud__c460k8Hz 11 +#define R_SERIAL0_CTRL__rec_baud__c921k6Hz 12 +#define R_SERIAL0_CTRL__rec_baud__c1843k2Hz 13 +#define R_SERIAL0_CTRL__rec_baud__c6250kHz 14 +#define R_SERIAL0_CTRL__rec_baud__reserved 15 +#define R_SERIAL0_CTRL__dma_err__BITNR 23 +#define R_SERIAL0_CTRL__dma_err__WIDTH 1 +#define R_SERIAL0_CTRL__dma_err__stop 0 +#define R_SERIAL0_CTRL__dma_err__ignore 1 +#define R_SERIAL0_CTRL__rec_enable__BITNR 22 +#define R_SERIAL0_CTRL__rec_enable__WIDTH 1 +#define R_SERIAL0_CTRL__rec_enable__disable 0 +#define R_SERIAL0_CTRL__rec_enable__enable 1 +#define R_SERIAL0_CTRL__rts___BITNR 21 +#define R_SERIAL0_CTRL__rts___WIDTH 1 +#define R_SERIAL0_CTRL__rts___active 0 +#define R_SERIAL0_CTRL__rts___inactive 1 +#define R_SERIAL0_CTRL__sampling__BITNR 20 +#define R_SERIAL0_CTRL__sampling__WIDTH 1 +#define R_SERIAL0_CTRL__sampling__middle 0 +#define R_SERIAL0_CTRL__sampling__majority 1 +#define R_SERIAL0_CTRL__rec_stick_par__BITNR 19 +#define R_SERIAL0_CTRL__rec_stick_par__WIDTH 1 +#define R_SERIAL0_CTRL__rec_stick_par__normal 0 +#define R_SERIAL0_CTRL__rec_stick_par__stick 1 +#define R_SERIAL0_CTRL__rec_par__BITNR 18 +#define R_SERIAL0_CTRL__rec_par__WIDTH 1 +#define R_SERIAL0_CTRL__rec_par__even 0 +#define R_SERIAL0_CTRL__rec_par__odd 1 +#define R_SERIAL0_CTRL__rec_par_en__BITNR 17 +#define R_SERIAL0_CTRL__rec_par_en__WIDTH 1 +#define R_SERIAL0_CTRL__rec_par_en__disable 0 +#define R_SERIAL0_CTRL__rec_par_en__enable 1 +#define R_SERIAL0_CTRL__rec_bitnr__BITNR 16 +#define R_SERIAL0_CTRL__rec_bitnr__WIDTH 1 +#define R_SERIAL0_CTRL__rec_bitnr__rec_8bit 0 +#define R_SERIAL0_CTRL__rec_bitnr__rec_7bit 1 +#define R_SERIAL0_CTRL__txd__BITNR 15 +#define R_SERIAL0_CTRL__txd__WIDTH 1 +#define R_SERIAL0_CTRL__tr_enable__BITNR 14 +#define R_SERIAL0_CTRL__tr_enable__WIDTH 1 +#define R_SERIAL0_CTRL__tr_enable__disable 0 +#define R_SERIAL0_CTRL__tr_enable__enable 1 +#define R_SERIAL0_CTRL__auto_cts__BITNR 13 +#define R_SERIAL0_CTRL__auto_cts__WIDTH 1 +#define R_SERIAL0_CTRL__auto_cts__disabled 0 +#define R_SERIAL0_CTRL__auto_cts__active 1 +#define R_SERIAL0_CTRL__stop_bits__BITNR 12 +#define R_SERIAL0_CTRL__stop_bits__WIDTH 1 +#define R_SERIAL0_CTRL__stop_bits__one_bit 0 +#define R_SERIAL0_CTRL__stop_bits__two_bits 1 +#define R_SERIAL0_CTRL__tr_stick_par__BITNR 11 +#define R_SERIAL0_CTRL__tr_stick_par__WIDTH 1 +#define R_SERIAL0_CTRL__tr_stick_par__normal 0 +#define R_SERIAL0_CTRL__tr_stick_par__stick 1 +#define R_SERIAL0_CTRL__tr_par__BITNR 10 +#define R_SERIAL0_CTRL__tr_par__WIDTH 1 +#define R_SERIAL0_CTRL__tr_par__even 0 +#define R_SERIAL0_CTRL__tr_par__odd 1 +#define R_SERIAL0_CTRL__tr_par_en__BITNR 9 +#define R_SERIAL0_CTRL__tr_par_en__WIDTH 1 +#define R_SERIAL0_CTRL__tr_par_en__disable 0 +#define R_SERIAL0_CTRL__tr_par_en__enable 1 +#define R_SERIAL0_CTRL__tr_bitnr__BITNR 8 +#define R_SERIAL0_CTRL__tr_bitnr__WIDTH 1 +#define R_SERIAL0_CTRL__tr_bitnr__tr_8bit 0 +#define R_SERIAL0_CTRL__tr_bitnr__tr_7bit 1 +#define R_SERIAL0_CTRL__data_out__BITNR 0 +#define R_SERIAL0_CTRL__data_out__WIDTH 8 + +#define R_SERIAL0_BAUD (IO_TYPECAST_BYTE 0xb0000063) +#define R_SERIAL0_BAUD__tr_baud__BITNR 4 +#define R_SERIAL0_BAUD__tr_baud__WIDTH 4 +#define R_SERIAL0_BAUD__tr_baud__c300Hz 0 +#define R_SERIAL0_BAUD__tr_baud__c600Hz 1 +#define R_SERIAL0_BAUD__tr_baud__c1200Hz 2 +#define R_SERIAL0_BAUD__tr_baud__c2400Hz 3 +#define R_SERIAL0_BAUD__tr_baud__c4800Hz 4 +#define R_SERIAL0_BAUD__tr_baud__c9600Hz 5 +#define R_SERIAL0_BAUD__tr_baud__c19k2Hz 6 +#define R_SERIAL0_BAUD__tr_baud__c38k4Hz 7 +#define R_SERIAL0_BAUD__tr_baud__c57k6Hz 8 +#define R_SERIAL0_BAUD__tr_baud__c115k2Hz 9 +#define R_SERIAL0_BAUD__tr_baud__c230k4Hz 10 +#define R_SERIAL0_BAUD__tr_baud__c460k8Hz 11 +#define R_SERIAL0_BAUD__tr_baud__c921k6Hz 12 +#define R_SERIAL0_BAUD__tr_baud__c1843k2Hz 13 +#define R_SERIAL0_BAUD__tr_baud__c6250kHz 14 +#define R_SERIAL0_BAUD__tr_baud__reserved 15 +#define R_SERIAL0_BAUD__rec_baud__BITNR 0 +#define R_SERIAL0_BAUD__rec_baud__WIDTH 4 +#define R_SERIAL0_BAUD__rec_baud__c300Hz 0 +#define R_SERIAL0_BAUD__rec_baud__c600Hz 1 +#define R_SERIAL0_BAUD__rec_baud__c1200Hz 2 +#define R_SERIAL0_BAUD__rec_baud__c2400Hz 3 +#define R_SERIAL0_BAUD__rec_baud__c4800Hz 4 +#define R_SERIAL0_BAUD__rec_baud__c9600Hz 5 +#define R_SERIAL0_BAUD__rec_baud__c19k2Hz 6 +#define R_SERIAL0_BAUD__rec_baud__c38k4Hz 7 +#define R_SERIAL0_BAUD__rec_baud__c57k6Hz 8 +#define R_SERIAL0_BAUD__rec_baud__c115k2Hz 9 +#define R_SERIAL0_BAUD__rec_baud__c230k4Hz 10 +#define R_SERIAL0_BAUD__rec_baud__c460k8Hz 11 +#define R_SERIAL0_BAUD__rec_baud__c921k6Hz 12 +#define R_SERIAL0_BAUD__rec_baud__c1843k2Hz 13 +#define R_SERIAL0_BAUD__rec_baud__c6250kHz 14 +#define R_SERIAL0_BAUD__rec_baud__reserved 15 + +#define R_SERIAL0_REC_CTRL (IO_TYPECAST_BYTE 0xb0000062) +#define R_SERIAL0_REC_CTRL__dma_err__BITNR 7 +#define R_SERIAL0_REC_CTRL__dma_err__WIDTH 1 +#define R_SERIAL0_REC_CTRL__dma_err__stop 0 +#define R_SERIAL0_REC_CTRL__dma_err__ignore 1 +#define R_SERIAL0_REC_CTRL__rec_enable__BITNR 6 +#define R_SERIAL0_REC_CTRL__rec_enable__WIDTH 1 +#define R_SERIAL0_REC_CTRL__rec_enable__disable 0 +#define R_SERIAL0_REC_CTRL__rec_enable__enable 1 +#define R_SERIAL0_REC_CTRL__rts___BITNR 5 +#define R_SERIAL0_REC_CTRL__rts___WIDTH 1 +#define R_SERIAL0_REC_CTRL__rts___active 0 +#define R_SERIAL0_REC_CTRL__rts___inactive 1 +#define R_SERIAL0_REC_CTRL__sampling__BITNR 4 +#define R_SERIAL0_REC_CTRL__sampling__WIDTH 1 +#define R_SERIAL0_REC_CTRL__sampling__middle 0 +#define R_SERIAL0_REC_CTRL__sampling__majority 1 +#define R_SERIAL0_REC_CTRL__rec_stick_par__BITNR 3 +#define R_SERIAL0_REC_CTRL__rec_stick_par__WIDTH 1 +#define R_SERIAL0_REC_CTRL__rec_stick_par__normal 0 +#define R_SERIAL0_REC_CTRL__rec_stick_par__stick 1 +#define R_SERIAL0_REC_CTRL__rec_par__BITNR 2 +#define R_SERIAL0_REC_CTRL__rec_par__WIDTH 1 +#define R_SERIAL0_REC_CTRL__rec_par__even 0 +#define R_SERIAL0_REC_CTRL__rec_par__odd 1 +#define R_SERIAL0_REC_CTRL__rec_par_en__BITNR 1 +#define R_SERIAL0_REC_CTRL__rec_par_en__WIDTH 1 +#define R_SERIAL0_REC_CTRL__rec_par_en__disable 0 +#define R_SERIAL0_REC_CTRL__rec_par_en__enable 1 +#define R_SERIAL0_REC_CTRL__rec_bitnr__BITNR 0 +#define R_SERIAL0_REC_CTRL__rec_bitnr__WIDTH 1 +#define R_SERIAL0_REC_CTRL__rec_bitnr__rec_8bit 0 +#define R_SERIAL0_REC_CTRL__rec_bitnr__rec_7bit 1 + +#define R_SERIAL0_TR_CTRL (IO_TYPECAST_BYTE 0xb0000061) +#define R_SERIAL0_TR_CTRL__txd__BITNR 7 +#define R_SERIAL0_TR_CTRL__txd__WIDTH 1 +#define R_SERIAL0_TR_CTRL__tr_enable__BITNR 6 +#define R_SERIAL0_TR_CTRL__tr_enable__WIDTH 1 +#define R_SERIAL0_TR_CTRL__tr_enable__disable 0 +#define R_SERIAL0_TR_CTRL__tr_enable__enable 1 +#define R_SERIAL0_TR_CTRL__auto_cts__BITNR 5 +#define R_SERIAL0_TR_CTRL__auto_cts__WIDTH 1 +#define R_SERIAL0_TR_CTRL__auto_cts__disabled 0 +#define R_SERIAL0_TR_CTRL__auto_cts__active 1 +#define R_SERIAL0_TR_CTRL__stop_bits__BITNR 4 +#define R_SERIAL0_TR_CTRL__stop_bits__WIDTH 1 +#define R_SERIAL0_TR_CTRL__stop_bits__one_bit 0 +#define R_SERIAL0_TR_CTRL__stop_bits__two_bits 1 +#define R_SERIAL0_TR_CTRL__tr_stick_par__BITNR 3 +#define R_SERIAL0_TR_CTRL__tr_stick_par__WIDTH 1 +#define R_SERIAL0_TR_CTRL__tr_stick_par__normal 0 +#define R_SERIAL0_TR_CTRL__tr_stick_par__stick 1 +#define R_SERIAL0_TR_CTRL__tr_par__BITNR 2 +#define R_SERIAL0_TR_CTRL__tr_par__WIDTH 1 +#define R_SERIAL0_TR_CTRL__tr_par__even 0 +#define R_SERIAL0_TR_CTRL__tr_par__odd 1 +#define R_SERIAL0_TR_CTRL__tr_par_en__BITNR 1 +#define R_SERIAL0_TR_CTRL__tr_par_en__WIDTH 1 +#define R_SERIAL0_TR_CTRL__tr_par_en__disable 0 +#define R_SERIAL0_TR_CTRL__tr_par_en__enable 1 +#define R_SERIAL0_TR_CTRL__tr_bitnr__BITNR 0 +#define R_SERIAL0_TR_CTRL__tr_bitnr__WIDTH 1 +#define R_SERIAL0_TR_CTRL__tr_bitnr__tr_8bit 0 +#define R_SERIAL0_TR_CTRL__tr_bitnr__tr_7bit 1 + +#define R_SERIAL0_TR_DATA (IO_TYPECAST_BYTE 0xb0000060) +#define R_SERIAL0_TR_DATA__data_out__BITNR 0 +#define R_SERIAL0_TR_DATA__data_out__WIDTH 8 + +#define R_SERIAL0_READ (IO_TYPECAST_RO_UDWORD 0xb0000060) +#define R_SERIAL0_READ__xoff_detect__BITNR 15 +#define R_SERIAL0_READ__xoff_detect__WIDTH 1 +#define R_SERIAL0_READ__xoff_detect__no_xoff 0 +#define R_SERIAL0_READ__xoff_detect__xoff 1 +#define R_SERIAL0_READ__cts___BITNR 14 +#define R_SERIAL0_READ__cts___WIDTH 1 +#define R_SERIAL0_READ__cts___active 0 +#define R_SERIAL0_READ__cts___inactive 1 +#define R_SERIAL0_READ__tr_ready__BITNR 13 +#define R_SERIAL0_READ__tr_ready__WIDTH 1 +#define R_SERIAL0_READ__tr_ready__full 0 +#define R_SERIAL0_READ__tr_ready__ready 1 +#define R_SERIAL0_READ__rxd__BITNR 12 +#define R_SERIAL0_READ__rxd__WIDTH 1 +#define R_SERIAL0_READ__overrun__BITNR 11 +#define R_SERIAL0_READ__overrun__WIDTH 1 +#define R_SERIAL0_READ__overrun__no 0 +#define R_SERIAL0_READ__overrun__yes 1 +#define R_SERIAL0_READ__par_err__BITNR 10 +#define R_SERIAL0_READ__par_err__WIDTH 1 +#define R_SERIAL0_READ__par_err__no 0 +#define R_SERIAL0_READ__par_err__yes 1 +#define R_SERIAL0_READ__framing_err__BITNR 9 +#define R_SERIAL0_READ__framing_err__WIDTH 1 +#define R_SERIAL0_READ__framing_err__no 0 +#define R_SERIAL0_READ__framing_err__yes 1 +#define R_SERIAL0_READ__data_avail__BITNR 8 +#define R_SERIAL0_READ__data_avail__WIDTH 1 +#define R_SERIAL0_READ__data_avail__no 0 +#define R_SERIAL0_READ__data_avail__yes 1 +#define R_SERIAL0_READ__data_in__BITNR 0 +#define R_SERIAL0_READ__data_in__WIDTH 8 + +#define R_SERIAL0_STATUS (IO_TYPECAST_RO_BYTE 0xb0000061) +#define R_SERIAL0_STATUS__xoff_detect__BITNR 7 +#define R_SERIAL0_STATUS__xoff_detect__WIDTH 1 +#define R_SERIAL0_STATUS__xoff_detect__no_xoff 0 +#define R_SERIAL0_STATUS__xoff_detect__xoff 1 +#define R_SERIAL0_STATUS__cts___BITNR 6 +#define R_SERIAL0_STATUS__cts___WIDTH 1 +#define R_SERIAL0_STATUS__cts___active 0 +#define R_SERIAL0_STATUS__cts___inactive 1 +#define R_SERIAL0_STATUS__tr_ready__BITNR 5 +#define R_SERIAL0_STATUS__tr_ready__WIDTH 1 +#define R_SERIAL0_STATUS__tr_ready__full 0 +#define R_SERIAL0_STATUS__tr_ready__ready 1 +#define R_SERIAL0_STATUS__rxd__BITNR 4 +#define R_SERIAL0_STATUS__rxd__WIDTH 1 +#define R_SERIAL0_STATUS__overrun__BITNR 3 +#define R_SERIAL0_STATUS__overrun__WIDTH 1 +#define R_SERIAL0_STATUS__overrun__no 0 +#define R_SERIAL0_STATUS__overrun__yes 1 +#define R_SERIAL0_STATUS__par_err__BITNR 2 +#define R_SERIAL0_STATUS__par_err__WIDTH 1 +#define R_SERIAL0_STATUS__par_err__no 0 +#define R_SERIAL0_STATUS__par_err__yes 1 +#define R_SERIAL0_STATUS__framing_err__BITNR 1 +#define R_SERIAL0_STATUS__framing_err__WIDTH 1 +#define R_SERIAL0_STATUS__framing_err__no 0 +#define R_SERIAL0_STATUS__framing_err__yes 1 +#define R_SERIAL0_STATUS__data_avail__BITNR 0 +#define R_SERIAL0_STATUS__data_avail__WIDTH 1 +#define R_SERIAL0_STATUS__data_avail__no 0 +#define R_SERIAL0_STATUS__data_avail__yes 1 + +#define R_SERIAL0_REC_DATA (IO_TYPECAST_RO_BYTE 0xb0000060) +#define R_SERIAL0_REC_DATA__data_in__BITNR 0 +#define R_SERIAL0_REC_DATA__data_in__WIDTH 8 + +#define R_SERIAL0_XOFF (IO_TYPECAST_UDWORD 0xb0000064) +#define R_SERIAL0_XOFF__tx_stop__BITNR 9 +#define R_SERIAL0_XOFF__tx_stop__WIDTH 1 +#define R_SERIAL0_XOFF__tx_stop__enable 0 +#define R_SERIAL0_XOFF__tx_stop__stop 1 +#define R_SERIAL0_XOFF__auto_xoff__BITNR 8 +#define R_SERIAL0_XOFF__auto_xoff__WIDTH 1 +#define R_SERIAL0_XOFF__auto_xoff__disable 0 +#define R_SERIAL0_XOFF__auto_xoff__enable 1 +#define R_SERIAL0_XOFF__xoff_char__BITNR 0 +#define R_SERIAL0_XOFF__xoff_char__WIDTH 8 + +#define R_SERIAL1_CTRL (IO_TYPECAST_UDWORD 0xb0000068) +#define R_SERIAL1_CTRL__tr_baud__BITNR 28 +#define R_SERIAL1_CTRL__tr_baud__WIDTH 4 +#define R_SERIAL1_CTRL__tr_baud__c300Hz 0 +#define R_SERIAL1_CTRL__tr_baud__c600Hz 1 +#define R_SERIAL1_CTRL__tr_baud__c1200Hz 2 +#define R_SERIAL1_CTRL__tr_baud__c2400Hz 3 +#define R_SERIAL1_CTRL__tr_baud__c4800Hz 4 +#define R_SERIAL1_CTRL__tr_baud__c9600Hz 5 +#define R_SERIAL1_CTRL__tr_baud__c19k2Hz 6 +#define R_SERIAL1_CTRL__tr_baud__c38k4Hz 7 +#define R_SERIAL1_CTRL__tr_baud__c57k6Hz 8 +#define R_SERIAL1_CTRL__tr_baud__c115k2Hz 9 +#define R_SERIAL1_CTRL__tr_baud__c230k4Hz 10 +#define R_SERIAL1_CTRL__tr_baud__c460k8Hz 11 +#define R_SERIAL1_CTRL__tr_baud__c921k6Hz 12 +#define R_SERIAL1_CTRL__tr_baud__c1843k2Hz 13 +#define R_SERIAL1_CTRL__tr_baud__c6250kHz 14 +#define R_SERIAL1_CTRL__tr_baud__reserved 15 +#define R_SERIAL1_CTRL__rec_baud__BITNR 24 +#define R_SERIAL1_CTRL__rec_baud__WIDTH 4 +#define R_SERIAL1_CTRL__rec_baud__c300Hz 0 +#define R_SERIAL1_CTRL__rec_baud__c600Hz 1 +#define R_SERIAL1_CTRL__rec_baud__c1200Hz 2 +#define R_SERIAL1_CTRL__rec_baud__c2400Hz 3 +#define R_SERIAL1_CTRL__rec_baud__c4800Hz 4 +#define R_SERIAL1_CTRL__rec_baud__c9600Hz 5 +#define R_SERIAL1_CTRL__rec_baud__c19k2Hz 6 +#define R_SERIAL1_CTRL__rec_baud__c38k4Hz 7 +#define R_SERIAL1_CTRL__rec_baud__c57k6Hz 8 +#define R_SERIAL1_CTRL__rec_baud__c115k2Hz 9 +#define R_SERIAL1_CTRL__rec_baud__c230k4Hz 10 +#define R_SERIAL1_CTRL__rec_baud__c460k8Hz 11 +#define R_SERIAL1_CTRL__rec_baud__c921k6Hz 12 +#define R_SERIAL1_CTRL__rec_baud__c1843k2Hz 13 +#define R_SERIAL1_CTRL__rec_baud__c6250kHz 14 +#define R_SERIAL1_CTRL__rec_baud__reserved 15 +#define R_SERIAL1_CTRL__dma_err__BITNR 23 +#define R_SERIAL1_CTRL__dma_err__WIDTH 1 +#define R_SERIAL1_CTRL__dma_err__stop 0 +#define R_SERIAL1_CTRL__dma_err__ignore 1 +#define R_SERIAL1_CTRL__rec_enable__BITNR 22 +#define R_SERIAL1_CTRL__rec_enable__WIDTH 1 +#define R_SERIAL1_CTRL__rec_enable__disable 0 +#define R_SERIAL1_CTRL__rec_enable__enable 1 +#define R_SERIAL1_CTRL__rts___BITNR 21 +#define R_SERIAL1_CTRL__rts___WIDTH 1 +#define R_SERIAL1_CTRL__rts___active 0 +#define R_SERIAL1_CTRL__rts___inactive 1 +#define R_SERIAL1_CTRL__sampling__BITNR 20 +#define R_SERIAL1_CTRL__sampling__WIDTH 1 +#define R_SERIAL1_CTRL__sampling__middle 0 +#define R_SERIAL1_CTRL__sampling__majority 1 +#define R_SERIAL1_CTRL__rec_stick_par__BITNR 19 +#define R_SERIAL1_CTRL__rec_stick_par__WIDTH 1 +#define R_SERIAL1_CTRL__rec_stick_par__normal 0 +#define R_SERIAL1_CTRL__rec_stick_par__stick 1 +#define R_SERIAL1_CTRL__rec_par__BITNR 18 +#define R_SERIAL1_CTRL__rec_par__WIDTH 1 +#define R_SERIAL1_CTRL__rec_par__even 0 +#define R_SERIAL1_CTRL__rec_par__odd 1 +#define R_SERIAL1_CTRL__rec_par_en__BITNR 17 +#define R_SERIAL1_CTRL__rec_par_en__WIDTH 1 +#define R_SERIAL1_CTRL__rec_par_en__disable 0 +#define R_SERIAL1_CTRL__rec_par_en__enable 1 +#define R_SERIAL1_CTRL__rec_bitnr__BITNR 16 +#define R_SERIAL1_CTRL__rec_bitnr__WIDTH 1 +#define R_SERIAL1_CTRL__rec_bitnr__rec_8bit 0 +#define R_SERIAL1_CTRL__rec_bitnr__rec_7bit 1 +#define R_SERIAL1_CTRL__txd__BITNR 15 +#define R_SERIAL1_CTRL__txd__WIDTH 1 +#define R_SERIAL1_CTRL__tr_enable__BITNR 14 +#define R_SERIAL1_CTRL__tr_enable__WIDTH 1 +#define R_SERIAL1_CTRL__tr_enable__disable 0 +#define R_SERIAL1_CTRL__tr_enable__enable 1 +#define R_SERIAL1_CTRL__auto_cts__BITNR 13 +#define R_SERIAL1_CTRL__auto_cts__WIDTH 1 +#define R_SERIAL1_CTRL__auto_cts__disabled 0 +#define R_SERIAL1_CTRL__auto_cts__active 1 +#define R_SERIAL1_CTRL__stop_bits__BITNR 12 +#define R_SERIAL1_CTRL__stop_bits__WIDTH 1 +#define R_SERIAL1_CTRL__stop_bits__one_bit 0 +#define R_SERIAL1_CTRL__stop_bits__two_bits 1 +#define R_SERIAL1_CTRL__tr_stick_par__BITNR 11 +#define R_SERIAL1_CTRL__tr_stick_par__WIDTH 1 +#define R_SERIAL1_CTRL__tr_stick_par__normal 0 +#define R_SERIAL1_CTRL__tr_stick_par__stick 1 +#define R_SERIAL1_CTRL__tr_par__BITNR 10 +#define R_SERIAL1_CTRL__tr_par__WIDTH 1 +#define R_SERIAL1_CTRL__tr_par__even 0 +#define R_SERIAL1_CTRL__tr_par__odd 1 +#define R_SERIAL1_CTRL__tr_par_en__BITNR 9 +#define R_SERIAL1_CTRL__tr_par_en__WIDTH 1 +#define R_SERIAL1_CTRL__tr_par_en__disable 0 +#define R_SERIAL1_CTRL__tr_par_en__enable 1 +#define R_SERIAL1_CTRL__tr_bitnr__BITNR 8 +#define R_SERIAL1_CTRL__tr_bitnr__WIDTH 1 +#define R_SERIAL1_CTRL__tr_bitnr__tr_8bit 0 +#define R_SERIAL1_CTRL__tr_bitnr__tr_7bit 1 +#define R_SERIAL1_CTRL__data_out__BITNR 0 +#define R_SERIAL1_CTRL__data_out__WIDTH 8 + +#define R_SERIAL1_BAUD (IO_TYPECAST_BYTE 0xb000006b) +#define R_SERIAL1_BAUD__tr_baud__BITNR 4 +#define R_SERIAL1_BAUD__tr_baud__WIDTH 4 +#define R_SERIAL1_BAUD__tr_baud__c300Hz 0 +#define R_SERIAL1_BAUD__tr_baud__c600Hz 1 +#define R_SERIAL1_BAUD__tr_baud__c1200Hz 2 +#define R_SERIAL1_BAUD__tr_baud__c2400Hz 3 +#define R_SERIAL1_BAUD__tr_baud__c4800Hz 4 +#define R_SERIAL1_BAUD__tr_baud__c9600Hz 5 +#define R_SERIAL1_BAUD__tr_baud__c19k2Hz 6 +#define R_SERIAL1_BAUD__tr_baud__c38k4Hz 7 +#define R_SERIAL1_BAUD__tr_baud__c57k6Hz 8 +#define R_SERIAL1_BAUD__tr_baud__c115k2Hz 9 +#define R_SERIAL1_BAUD__tr_baud__c230k4Hz 10 +#define R_SERIAL1_BAUD__tr_baud__c460k8Hz 11 +#define R_SERIAL1_BAUD__tr_baud__c921k6Hz 12 +#define R_SERIAL1_BAUD__tr_baud__c1843k2Hz 13 +#define R_SERIAL1_BAUD__tr_baud__c6250kHz 14 +#define R_SERIAL1_BAUD__tr_baud__reserved 15 +#define R_SERIAL1_BAUD__rec_baud__BITNR 0 +#define R_SERIAL1_BAUD__rec_baud__WIDTH 4 +#define R_SERIAL1_BAUD__rec_baud__c300Hz 0 +#define R_SERIAL1_BAUD__rec_baud__c600Hz 1 +#define R_SERIAL1_BAUD__rec_baud__c1200Hz 2 +#define R_SERIAL1_BAUD__rec_baud__c2400Hz 3 +#define R_SERIAL1_BAUD__rec_baud__c4800Hz 4 +#define R_SERIAL1_BAUD__rec_baud__c9600Hz 5 +#define R_SERIAL1_BAUD__rec_baud__c19k2Hz 6 +#define R_SERIAL1_BAUD__rec_baud__c38k4Hz 7 +#define R_SERIAL1_BAUD__rec_baud__c57k6Hz 8 +#define R_SERIAL1_BAUD__rec_baud__c115k2Hz 9 +#define R_SERIAL1_BAUD__rec_baud__c230k4Hz 10 +#define R_SERIAL1_BAUD__rec_baud__c460k8Hz 11 +#define R_SERIAL1_BAUD__rec_baud__c921k6Hz 12 +#define R_SERIAL1_BAUD__rec_baud__c1843k2Hz 13 +#define R_SERIAL1_BAUD__rec_baud__c6250kHz 14 +#define R_SERIAL1_BAUD__rec_baud__reserved 15 + +#define R_SERIAL1_REC_CTRL (IO_TYPECAST_BYTE 0xb000006a) +#define R_SERIAL1_REC_CTRL__dma_err__BITNR 7 +#define R_SERIAL1_REC_CTRL__dma_err__WIDTH 1 +#define R_SERIAL1_REC_CTRL__dma_err__stop 0 +#define R_SERIAL1_REC_CTRL__dma_err__ignore 1 +#define R_SERIAL1_REC_CTRL__rec_enable__BITNR 6 +#define R_SERIAL1_REC_CTRL__rec_enable__WIDTH 1 +#define R_SERIAL1_REC_CTRL__rec_enable__disable 0 +#define R_SERIAL1_REC_CTRL__rec_enable__enable 1 +#define R_SERIAL1_REC_CTRL__rts___BITNR 5 +#define R_SERIAL1_REC_CTRL__rts___WIDTH 1 +#define R_SERIAL1_REC_CTRL__rts___active 0 +#define R_SERIAL1_REC_CTRL__rts___inactive 1 +#define R_SERIAL1_REC_CTRL__sampling__BITNR 4 +#define R_SERIAL1_REC_CTRL__sampling__WIDTH 1 +#define R_SERIAL1_REC_CTRL__sampling__middle 0 +#define R_SERIAL1_REC_CTRL__sampling__majority 1 +#define R_SERIAL1_REC_CTRL__rec_stick_par__BITNR 3 +#define R_SERIAL1_REC_CTRL__rec_stick_par__WIDTH 1 +#define R_SERIAL1_REC_CTRL__rec_stick_par__normal 0 +#define R_SERIAL1_REC_CTRL__rec_stick_par__stick 1 +#define R_SERIAL1_REC_CTRL__rec_par__BITNR 2 +#define R_SERIAL1_REC_CTRL__rec_par__WIDTH 1 +#define R_SERIAL1_REC_CTRL__rec_par__even 0 +#define R_SERIAL1_REC_CTRL__rec_par__odd 1 +#define R_SERIAL1_REC_CTRL__rec_par_en__BITNR 1 +#define R_SERIAL1_REC_CTRL__rec_par_en__WIDTH 1 +#define R_SERIAL1_REC_CTRL__rec_par_en__disable 0 +#define R_SERIAL1_REC_CTRL__rec_par_en__enable 1 +#define R_SERIAL1_REC_CTRL__rec_bitnr__BITNR 0 +#define R_SERIAL1_REC_CTRL__rec_bitnr__WIDTH 1 +#define R_SERIAL1_REC_CTRL__rec_bitnr__rec_8bit 0 +#define R_SERIAL1_REC_CTRL__rec_bitnr__rec_7bit 1 + +#define R_SERIAL1_TR_CTRL (IO_TYPECAST_BYTE 0xb0000069) +#define R_SERIAL1_TR_CTRL__txd__BITNR 7 +#define R_SERIAL1_TR_CTRL__txd__WIDTH 1 +#define R_SERIAL1_TR_CTRL__tr_enable__BITNR 6 +#define R_SERIAL1_TR_CTRL__tr_enable__WIDTH 1 +#define R_SERIAL1_TR_CTRL__tr_enable__disable 0 +#define R_SERIAL1_TR_CTRL__tr_enable__enable 1 +#define R_SERIAL1_TR_CTRL__auto_cts__BITNR 5 +#define R_SERIAL1_TR_CTRL__auto_cts__WIDTH 1 +#define R_SERIAL1_TR_CTRL__auto_cts__disabled 0 +#define R_SERIAL1_TR_CTRL__auto_cts__active 1 +#define R_SERIAL1_TR_CTRL__stop_bits__BITNR 4 +#define R_SERIAL1_TR_CTRL__stop_bits__WIDTH 1 +#define R_SERIAL1_TR_CTRL__stop_bits__one_bit 0 +#define R_SERIAL1_TR_CTRL__stop_bits__two_bits 1 +#define R_SERIAL1_TR_CTRL__tr_stick_par__BITNR 3 +#define R_SERIAL1_TR_CTRL__tr_stick_par__WIDTH 1 +#define R_SERIAL1_TR_CTRL__tr_stick_par__normal 0 +#define R_SERIAL1_TR_CTRL__tr_stick_par__stick 1 +#define R_SERIAL1_TR_CTRL__tr_par__BITNR 2 +#define R_SERIAL1_TR_CTRL__tr_par__WIDTH 1 +#define R_SERIAL1_TR_CTRL__tr_par__even 0 +#define R_SERIAL1_TR_CTRL__tr_par__odd 1 +#define R_SERIAL1_TR_CTRL__tr_par_en__BITNR 1 +#define R_SERIAL1_TR_CTRL__tr_par_en__WIDTH 1 +#define R_SERIAL1_TR_CTRL__tr_par_en__disable 0 +#define R_SERIAL1_TR_CTRL__tr_par_en__enable 1 +#define R_SERIAL1_TR_CTRL__tr_bitnr__BITNR 0 +#define R_SERIAL1_TR_CTRL__tr_bitnr__WIDTH 1 +#define R_SERIAL1_TR_CTRL__tr_bitnr__tr_8bit 0 +#define R_SERIAL1_TR_CTRL__tr_bitnr__tr_7bit 1 + +#define R_SERIAL1_TR_DATA (IO_TYPECAST_BYTE 0xb0000068) +#define R_SERIAL1_TR_DATA__data_out__BITNR 0 +#define R_SERIAL1_TR_DATA__data_out__WIDTH 8 + +#define R_SERIAL1_READ (IO_TYPECAST_RO_UDWORD 0xb0000068) +#define R_SERIAL1_READ__xoff_detect__BITNR 15 +#define R_SERIAL1_READ__xoff_detect__WIDTH 1 +#define R_SERIAL1_READ__xoff_detect__no_xoff 0 +#define R_SERIAL1_READ__xoff_detect__xoff 1 +#define R_SERIAL1_READ__cts___BITNR 14 +#define R_SERIAL1_READ__cts___WIDTH 1 +#define R_SERIAL1_READ__cts___active 0 +#define R_SERIAL1_READ__cts___inactive 1 +#define R_SERIAL1_READ__tr_ready__BITNR 13 +#define R_SERIAL1_READ__tr_ready__WIDTH 1 +#define R_SERIAL1_READ__tr_ready__full 0 +#define R_SERIAL1_READ__tr_ready__ready 1 +#define R_SERIAL1_READ__rxd__BITNR 12 +#define R_SERIAL1_READ__rxd__WIDTH 1 +#define R_SERIAL1_READ__overrun__BITNR 11 +#define R_SERIAL1_READ__overrun__WIDTH 1 +#define R_SERIAL1_READ__overrun__no 0 +#define R_SERIAL1_READ__overrun__yes 1 +#define R_SERIAL1_READ__par_err__BITNR 10 +#define R_SERIAL1_READ__par_err__WIDTH 1 +#define R_SERIAL1_READ__par_err__no 0 +#define R_SERIAL1_READ__par_err__yes 1 +#define R_SERIAL1_READ__framing_err__BITNR 9 +#define R_SERIAL1_READ__framing_err__WIDTH 1 +#define R_SERIAL1_READ__framing_err__no 0 +#define R_SERIAL1_READ__framing_err__yes 1 +#define R_SERIAL1_READ__data_avail__BITNR 8 +#define R_SERIAL1_READ__data_avail__WIDTH 1 +#define R_SERIAL1_READ__data_avail__no 0 +#define R_SERIAL1_READ__data_avail__yes 1 +#define R_SERIAL1_READ__data_in__BITNR 0 +#define R_SERIAL1_READ__data_in__WIDTH 8 + +#define R_SERIAL1_STATUS (IO_TYPECAST_RO_BYTE 0xb0000069) +#define R_SERIAL1_STATUS__xoff_detect__BITNR 7 +#define R_SERIAL1_STATUS__xoff_detect__WIDTH 1 +#define R_SERIAL1_STATUS__xoff_detect__no_xoff 0 +#define R_SERIAL1_STATUS__xoff_detect__xoff 1 +#define R_SERIAL1_STATUS__cts___BITNR 6 +#define R_SERIAL1_STATUS__cts___WIDTH 1 +#define R_SERIAL1_STATUS__cts___active 0 +#define R_SERIAL1_STATUS__cts___inactive 1 +#define R_SERIAL1_STATUS__tr_ready__BITNR 5 +#define R_SERIAL1_STATUS__tr_ready__WIDTH 1 +#define R_SERIAL1_STATUS__tr_ready__full 0 +#define R_SERIAL1_STATUS__tr_ready__ready 1 +#define R_SERIAL1_STATUS__rxd__BITNR 4 +#define R_SERIAL1_STATUS__rxd__WIDTH 1 +#define R_SERIAL1_STATUS__overrun__BITNR 3 +#define R_SERIAL1_STATUS__overrun__WIDTH 1 +#define R_SERIAL1_STATUS__overrun__no 0 +#define R_SERIAL1_STATUS__overrun__yes 1 +#define R_SERIAL1_STATUS__par_err__BITNR 2 +#define R_SERIAL1_STATUS__par_err__WIDTH 1 +#define R_SERIAL1_STATUS__par_err__no 0 +#define R_SERIAL1_STATUS__par_err__yes 1 +#define R_SERIAL1_STATUS__framing_err__BITNR 1 +#define R_SERIAL1_STATUS__framing_err__WIDTH 1 +#define R_SERIAL1_STATUS__framing_err__no 0 +#define R_SERIAL1_STATUS__framing_err__yes 1 +#define R_SERIAL1_STATUS__data_avail__BITNR 0 +#define R_SERIAL1_STATUS__data_avail__WIDTH 1 +#define R_SERIAL1_STATUS__data_avail__no 0 +#define R_SERIAL1_STATUS__data_avail__yes 1 + +#define R_SERIAL1_REC_DATA (IO_TYPECAST_RO_BYTE 0xb0000068) +#define R_SERIAL1_REC_DATA__data_in__BITNR 0 +#define R_SERIAL1_REC_DATA__data_in__WIDTH 8 + +#define R_SERIAL1_XOFF (IO_TYPECAST_UDWORD 0xb000006c) +#define R_SERIAL1_XOFF__tx_stop__BITNR 9 +#define R_SERIAL1_XOFF__tx_stop__WIDTH 1 +#define R_SERIAL1_XOFF__tx_stop__enable 0 +#define R_SERIAL1_XOFF__tx_stop__stop 1 +#define R_SERIAL1_XOFF__auto_xoff__BITNR 8 +#define R_SERIAL1_XOFF__auto_xoff__WIDTH 1 +#define R_SERIAL1_XOFF__auto_xoff__disable 0 +#define R_SERIAL1_XOFF__auto_xoff__enable 1 +#define R_SERIAL1_XOFF__xoff_char__BITNR 0 +#define R_SERIAL1_XOFF__xoff_char__WIDTH 8 + +#define R_SERIAL2_CTRL (IO_TYPECAST_UDWORD 0xb0000070) +#define R_SERIAL2_CTRL__tr_baud__BITNR 28 +#define R_SERIAL2_CTRL__tr_baud__WIDTH 4 +#define R_SERIAL2_CTRL__tr_baud__c300Hz 0 +#define R_SERIAL2_CTRL__tr_baud__c600Hz 1 +#define R_SERIAL2_CTRL__tr_baud__c1200Hz 2 +#define R_SERIAL2_CTRL__tr_baud__c2400Hz 3 +#define R_SERIAL2_CTRL__tr_baud__c4800Hz 4 +#define R_SERIAL2_CTRL__tr_baud__c9600Hz 5 +#define R_SERIAL2_CTRL__tr_baud__c19k2Hz 6 +#define R_SERIAL2_CTRL__tr_baud__c38k4Hz 7 +#define R_SERIAL2_CTRL__tr_baud__c57k6Hz 8 +#define R_SERIAL2_CTRL__tr_baud__c115k2Hz 9 +#define R_SERIAL2_CTRL__tr_baud__c230k4Hz 10 +#define R_SERIAL2_CTRL__tr_baud__c460k8Hz 11 +#define R_SERIAL2_CTRL__tr_baud__c921k6Hz 12 +#define R_SERIAL2_CTRL__tr_baud__c1843k2Hz 13 +#define R_SERIAL2_CTRL__tr_baud__c6250kHz 14 +#define R_SERIAL2_CTRL__tr_baud__reserved 15 +#define R_SERIAL2_CTRL__rec_baud__BITNR 24 +#define R_SERIAL2_CTRL__rec_baud__WIDTH 4 +#define R_SERIAL2_CTRL__rec_baud__c300Hz 0 +#define R_SERIAL2_CTRL__rec_baud__c600Hz 1 +#define R_SERIAL2_CTRL__rec_baud__c1200Hz 2 +#define R_SERIAL2_CTRL__rec_baud__c2400Hz 3 +#define R_SERIAL2_CTRL__rec_baud__c4800Hz 4 +#define R_SERIAL2_CTRL__rec_baud__c9600Hz 5 +#define R_SERIAL2_CTRL__rec_baud__c19k2Hz 6 +#define R_SERIAL2_CTRL__rec_baud__c38k4Hz 7 +#define R_SERIAL2_CTRL__rec_baud__c57k6Hz 8 +#define R_SERIAL2_CTRL__rec_baud__c115k2Hz 9 +#define R_SERIAL2_CTRL__rec_baud__c230k4Hz 10 +#define R_SERIAL2_CTRL__rec_baud__c460k8Hz 11 +#define R_SERIAL2_CTRL__rec_baud__c921k6Hz 12 +#define R_SERIAL2_CTRL__rec_baud__c1843k2Hz 13 +#define R_SERIAL2_CTRL__rec_baud__c6250kHz 14 +#define R_SERIAL2_CTRL__rec_baud__reserved 15 +#define R_SERIAL2_CTRL__dma_err__BITNR 23 +#define R_SERIAL2_CTRL__dma_err__WIDTH 1 +#define R_SERIAL2_CTRL__dma_err__stop 0 +#define R_SERIAL2_CTRL__dma_err__ignore 1 +#define R_SERIAL2_CTRL__rec_enable__BITNR 22 +#define R_SERIAL2_CTRL__rec_enable__WIDTH 1 +#define R_SERIAL2_CTRL__rec_enable__disable 0 +#define R_SERIAL2_CTRL__rec_enable__enable 1 +#define R_SERIAL2_CTRL__rts___BITNR 21 +#define R_SERIAL2_CTRL__rts___WIDTH 1 +#define R_SERIAL2_CTRL__rts___active 0 +#define R_SERIAL2_CTRL__rts___inactive 1 +#define R_SERIAL2_CTRL__sampling__BITNR 20 +#define R_SERIAL2_CTRL__sampling__WIDTH 1 +#define R_SERIAL2_CTRL__sampling__middle 0 +#define R_SERIAL2_CTRL__sampling__majority 1 +#define R_SERIAL2_CTRL__rec_stick_par__BITNR 19 +#define R_SERIAL2_CTRL__rec_stick_par__WIDTH 1 +#define R_SERIAL2_CTRL__rec_stick_par__normal 0 +#define R_SERIAL2_CTRL__rec_stick_par__stick 1 +#define R_SERIAL2_CTRL__rec_par__BITNR 18 +#define R_SERIAL2_CTRL__rec_par__WIDTH 1 +#define R_SERIAL2_CTRL__rec_par__even 0 +#define R_SERIAL2_CTRL__rec_par__odd 1 +#define R_SERIAL2_CTRL__rec_par_en__BITNR 17 +#define R_SERIAL2_CTRL__rec_par_en__WIDTH 1 +#define R_SERIAL2_CTRL__rec_par_en__disable 0 +#define R_SERIAL2_CTRL__rec_par_en__enable 1 +#define R_SERIAL2_CTRL__rec_bitnr__BITNR 16 +#define R_SERIAL2_CTRL__rec_bitnr__WIDTH 1 +#define R_SERIAL2_CTRL__rec_bitnr__rec_8bit 0 +#define R_SERIAL2_CTRL__rec_bitnr__rec_7bit 1 +#define R_SERIAL2_CTRL__txd__BITNR 15 +#define R_SERIAL2_CTRL__txd__WIDTH 1 +#define R_SERIAL2_CTRL__tr_enable__BITNR 14 +#define R_SERIAL2_CTRL__tr_enable__WIDTH 1 +#define R_SERIAL2_CTRL__tr_enable__disable 0 +#define R_SERIAL2_CTRL__tr_enable__enable 1 +#define R_SERIAL2_CTRL__auto_cts__BITNR 13 +#define R_SERIAL2_CTRL__auto_cts__WIDTH 1 +#define R_SERIAL2_CTRL__auto_cts__disabled 0 +#define R_SERIAL2_CTRL__auto_cts__active 1 +#define R_SERIAL2_CTRL__stop_bits__BITNR 12 +#define R_SERIAL2_CTRL__stop_bits__WIDTH 1 +#define R_SERIAL2_CTRL__stop_bits__one_bit 0 +#define R_SERIAL2_CTRL__stop_bits__two_bits 1 +#define R_SERIAL2_CTRL__tr_stick_par__BITNR 11 +#define R_SERIAL2_CTRL__tr_stick_par__WIDTH 1 +#define R_SERIAL2_CTRL__tr_stick_par__normal 0 +#define R_SERIAL2_CTRL__tr_stick_par__stick 1 +#define R_SERIAL2_CTRL__tr_par__BITNR 10 +#define R_SERIAL2_CTRL__tr_par__WIDTH 1 +#define R_SERIAL2_CTRL__tr_par__even 0 +#define R_SERIAL2_CTRL__tr_par__odd 1 +#define R_SERIAL2_CTRL__tr_par_en__BITNR 9 +#define R_SERIAL2_CTRL__tr_par_en__WIDTH 1 +#define R_SERIAL2_CTRL__tr_par_en__disable 0 +#define R_SERIAL2_CTRL__tr_par_en__enable 1 +#define R_SERIAL2_CTRL__tr_bitnr__BITNR 8 +#define R_SERIAL2_CTRL__tr_bitnr__WIDTH 1 +#define R_SERIAL2_CTRL__tr_bitnr__tr_8bit 0 +#define R_SERIAL2_CTRL__tr_bitnr__tr_7bit 1 +#define R_SERIAL2_CTRL__data_out__BITNR 0 +#define R_SERIAL2_CTRL__data_out__WIDTH 8 + +#define R_SERIAL2_BAUD (IO_TYPECAST_BYTE 0xb0000073) +#define R_SERIAL2_BAUD__tr_baud__BITNR 4 +#define R_SERIAL2_BAUD__tr_baud__WIDTH 4 +#define R_SERIAL2_BAUD__tr_baud__c300Hz 0 +#define R_SERIAL2_BAUD__tr_baud__c600Hz 1 +#define R_SERIAL2_BAUD__tr_baud__c1200Hz 2 +#define R_SERIAL2_BAUD__tr_baud__c2400Hz 3 +#define R_SERIAL2_BAUD__tr_baud__c4800Hz 4 +#define R_SERIAL2_BAUD__tr_baud__c9600Hz 5 +#define R_SERIAL2_BAUD__tr_baud__c19k2Hz 6 +#define R_SERIAL2_BAUD__tr_baud__c38k4Hz 7 +#define R_SERIAL2_BAUD__tr_baud__c57k6Hz 8 +#define R_SERIAL2_BAUD__tr_baud__c115k2Hz 9 +#define R_SERIAL2_BAUD__tr_baud__c230k4Hz 10 +#define R_SERIAL2_BAUD__tr_baud__c460k8Hz 11 +#define R_SERIAL2_BAUD__tr_baud__c921k6Hz 12 +#define R_SERIAL2_BAUD__tr_baud__c1843k2Hz 13 +#define R_SERIAL2_BAUD__tr_baud__c6250kHz 14 +#define R_SERIAL2_BAUD__tr_baud__reserved 15 +#define R_SERIAL2_BAUD__rec_baud__BITNR 0 +#define R_SERIAL2_BAUD__rec_baud__WIDTH 4 +#define R_SERIAL2_BAUD__rec_baud__c300Hz 0 +#define R_SERIAL2_BAUD__rec_baud__c600Hz 1 +#define R_SERIAL2_BAUD__rec_baud__c1200Hz 2 +#define R_SERIAL2_BAUD__rec_baud__c2400Hz 3 +#define R_SERIAL2_BAUD__rec_baud__c4800Hz 4 +#define R_SERIAL2_BAUD__rec_baud__c9600Hz 5 +#define R_SERIAL2_BAUD__rec_baud__c19k2Hz 6 +#define R_SERIAL2_BAUD__rec_baud__c38k4Hz 7 +#define R_SERIAL2_BAUD__rec_baud__c57k6Hz 8 +#define R_SERIAL2_BAUD__rec_baud__c115k2Hz 9 +#define R_SERIAL2_BAUD__rec_baud__c230k4Hz 10 +#define R_SERIAL2_BAUD__rec_baud__c460k8Hz 11 +#define R_SERIAL2_BAUD__rec_baud__c921k6Hz 12 +#define R_SERIAL2_BAUD__rec_baud__c1843k2Hz 13 +#define R_SERIAL2_BAUD__rec_baud__c6250kHz 14 +#define R_SERIAL2_BAUD__rec_baud__reserved 15 + +#define R_SERIAL2_REC_CTRL (IO_TYPECAST_BYTE 0xb0000072) +#define R_SERIAL2_REC_CTRL__dma_err__BITNR 7 +#define R_SERIAL2_REC_CTRL__dma_err__WIDTH 1 +#define R_SERIAL2_REC_CTRL__dma_err__stop 0 +#define R_SERIAL2_REC_CTRL__dma_err__ignore 1 +#define R_SERIAL2_REC_CTRL__rec_enable__BITNR 6 +#define R_SERIAL2_REC_CTRL__rec_enable__WIDTH 1 +#define R_SERIAL2_REC_CTRL__rec_enable__disable 0 +#define R_SERIAL2_REC_CTRL__rec_enable__enable 1 +#define R_SERIAL2_REC_CTRL__rts___BITNR 5 +#define R_SERIAL2_REC_CTRL__rts___WIDTH 1 +#define R_SERIAL2_REC_CTRL__rts___active 0 +#define R_SERIAL2_REC_CTRL__rts___inactive 1 +#define R_SERIAL2_REC_CTRL__sampling__BITNR 4 +#define R_SERIAL2_REC_CTRL__sampling__WIDTH 1 +#define R_SERIAL2_REC_CTRL__sampling__middle 0 +#define R_SERIAL2_REC_CTRL__sampling__majority 1 +#define R_SERIAL2_REC_CTRL__rec_stick_par__BITNR 3 +#define R_SERIAL2_REC_CTRL__rec_stick_par__WIDTH 1 +#define R_SERIAL2_REC_CTRL__rec_stick_par__normal 0 +#define R_SERIAL2_REC_CTRL__rec_stick_par__stick 1 +#define R_SERIAL2_REC_CTRL__rec_par__BITNR 2 +#define R_SERIAL2_REC_CTRL__rec_par__WIDTH 1 +#define R_SERIAL2_REC_CTRL__rec_par__even 0 +#define R_SERIAL2_REC_CTRL__rec_par__odd 1 +#define R_SERIAL2_REC_CTRL__rec_par_en__BITNR 1 +#define R_SERIAL2_REC_CTRL__rec_par_en__WIDTH 1 +#define R_SERIAL2_REC_CTRL__rec_par_en__disable 0 +#define R_SERIAL2_REC_CTRL__rec_par_en__enable 1 +#define R_SERIAL2_REC_CTRL__rec_bitnr__BITNR 0 +#define R_SERIAL2_REC_CTRL__rec_bitnr__WIDTH 1 +#define R_SERIAL2_REC_CTRL__rec_bitnr__rec_8bit 0 +#define R_SERIAL2_REC_CTRL__rec_bitnr__rec_7bit 1 + +#define R_SERIAL2_TR_CTRL (IO_TYPECAST_BYTE 0xb0000071) +#define R_SERIAL2_TR_CTRL__txd__BITNR 7 +#define R_SERIAL2_TR_CTRL__txd__WIDTH 1 +#define R_SERIAL2_TR_CTRL__tr_enable__BITNR 6 +#define R_SERIAL2_TR_CTRL__tr_enable__WIDTH 1 +#define R_SERIAL2_TR_CTRL__tr_enable__disable 0 +#define R_SERIAL2_TR_CTRL__tr_enable__enable 1 +#define R_SERIAL2_TR_CTRL__auto_cts__BITNR 5 +#define R_SERIAL2_TR_CTRL__auto_cts__WIDTH 1 +#define R_SERIAL2_TR_CTRL__auto_cts__disabled 0 +#define R_SERIAL2_TR_CTRL__auto_cts__active 1 +#define R_SERIAL2_TR_CTRL__stop_bits__BITNR 4 +#define R_SERIAL2_TR_CTRL__stop_bits__WIDTH 1 +#define R_SERIAL2_TR_CTRL__stop_bits__one_bit 0 +#define R_SERIAL2_TR_CTRL__stop_bits__two_bits 1 +#define R_SERIAL2_TR_CTRL__tr_stick_par__BITNR 3 +#define R_SERIAL2_TR_CTRL__tr_stick_par__WIDTH 1 +#define R_SERIAL2_TR_CTRL__tr_stick_par__normal 0 +#define R_SERIAL2_TR_CTRL__tr_stick_par__stick 1 +#define R_SERIAL2_TR_CTRL__tr_par__BITNR 2 +#define R_SERIAL2_TR_CTRL__tr_par__WIDTH 1 +#define R_SERIAL2_TR_CTRL__tr_par__even 0 +#define R_SERIAL2_TR_CTRL__tr_par__odd 1 +#define R_SERIAL2_TR_CTRL__tr_par_en__BITNR 1 +#define R_SERIAL2_TR_CTRL__tr_par_en__WIDTH 1 +#define R_SERIAL2_TR_CTRL__tr_par_en__disable 0 +#define R_SERIAL2_TR_CTRL__tr_par_en__enable 1 +#define R_SERIAL2_TR_CTRL__tr_bitnr__BITNR 0 +#define R_SERIAL2_TR_CTRL__tr_bitnr__WIDTH 1 +#define R_SERIAL2_TR_CTRL__tr_bitnr__tr_8bit 0 +#define R_SERIAL2_TR_CTRL__tr_bitnr__tr_7bit 1 + +#define R_SERIAL2_TR_DATA (IO_TYPECAST_BYTE 0xb0000070) +#define R_SERIAL2_TR_DATA__data_out__BITNR 0 +#define R_SERIAL2_TR_DATA__data_out__WIDTH 8 + +#define R_SERIAL2_READ (IO_TYPECAST_RO_UDWORD 0xb0000070) +#define R_SERIAL2_READ__xoff_detect__BITNR 15 +#define R_SERIAL2_READ__xoff_detect__WIDTH 1 +#define R_SERIAL2_READ__xoff_detect__no_xoff 0 +#define R_SERIAL2_READ__xoff_detect__xoff 1 +#define R_SERIAL2_READ__cts___BITNR 14 +#define R_SERIAL2_READ__cts___WIDTH 1 +#define R_SERIAL2_READ__cts___active 0 +#define R_SERIAL2_READ__cts___inactive 1 +#define R_SERIAL2_READ__tr_ready__BITNR 13 +#define R_SERIAL2_READ__tr_ready__WIDTH 1 +#define R_SERIAL2_READ__tr_ready__full 0 +#define R_SERIAL2_READ__tr_ready__ready 1 +#define R_SERIAL2_READ__rxd__BITNR 12 +#define R_SERIAL2_READ__rxd__WIDTH 1 +#define R_SERIAL2_READ__overrun__BITNR 11 +#define R_SERIAL2_READ__overrun__WIDTH 1 +#define R_SERIAL2_READ__overrun__no 0 +#define R_SERIAL2_READ__overrun__yes 1 +#define R_SERIAL2_READ__par_err__BITNR 10 +#define R_SERIAL2_READ__par_err__WIDTH 1 +#define R_SERIAL2_READ__par_err__no 0 +#define R_SERIAL2_READ__par_err__yes 1 +#define R_SERIAL2_READ__framing_err__BITNR 9 +#define R_SERIAL2_READ__framing_err__WIDTH 1 +#define R_SERIAL2_READ__framing_err__no 0 +#define R_SERIAL2_READ__framing_err__yes 1 +#define R_SERIAL2_READ__data_avail__BITNR 8 +#define R_SERIAL2_READ__data_avail__WIDTH 1 +#define R_SERIAL2_READ__data_avail__no 0 +#define R_SERIAL2_READ__data_avail__yes 1 +#define R_SERIAL2_READ__data_in__BITNR 0 +#define R_SERIAL2_READ__data_in__WIDTH 8 + +#define R_SERIAL2_STATUS (IO_TYPECAST_RO_BYTE 0xb0000071) +#define R_SERIAL2_STATUS__xoff_detect__BITNR 7 +#define R_SERIAL2_STATUS__xoff_detect__WIDTH 1 +#define R_SERIAL2_STATUS__xoff_detect__no_xoff 0 +#define R_SERIAL2_STATUS__xoff_detect__xoff 1 +#define R_SERIAL2_STATUS__cts___BITNR 6 +#define R_SERIAL2_STATUS__cts___WIDTH 1 +#define R_SERIAL2_STATUS__cts___active 0 +#define R_SERIAL2_STATUS__cts___inactive 1 +#define R_SERIAL2_STATUS__tr_ready__BITNR 5 +#define R_SERIAL2_STATUS__tr_ready__WIDTH 1 +#define R_SERIAL2_STATUS__tr_ready__full 0 +#define R_SERIAL2_STATUS__tr_ready__ready 1 +#define R_SERIAL2_STATUS__rxd__BITNR 4 +#define R_SERIAL2_STATUS__rxd__WIDTH 1 +#define R_SERIAL2_STATUS__overrun__BITNR 3 +#define R_SERIAL2_STATUS__overrun__WIDTH 1 +#define R_SERIAL2_STATUS__overrun__no 0 +#define R_SERIAL2_STATUS__overrun__yes 1 +#define R_SERIAL2_STATUS__par_err__BITNR 2 +#define R_SERIAL2_STATUS__par_err__WIDTH 1 +#define R_SERIAL2_STATUS__par_err__no 0 +#define R_SERIAL2_STATUS__par_err__yes 1 +#define R_SERIAL2_STATUS__framing_err__BITNR 1 +#define R_SERIAL2_STATUS__framing_err__WIDTH 1 +#define R_SERIAL2_STATUS__framing_err__no 0 +#define R_SERIAL2_STATUS__framing_err__yes 1 +#define R_SERIAL2_STATUS__data_avail__BITNR 0 +#define R_SERIAL2_STATUS__data_avail__WIDTH 1 +#define R_SERIAL2_STATUS__data_avail__no 0 +#define R_SERIAL2_STATUS__data_avail__yes 1 + +#define R_SERIAL2_REC_DATA (IO_TYPECAST_RO_BYTE 0xb0000070) +#define R_SERIAL2_REC_DATA__data_in__BITNR 0 +#define R_SERIAL2_REC_DATA__data_in__WIDTH 8 + +#define R_SERIAL2_XOFF (IO_TYPECAST_UDWORD 0xb0000074) +#define R_SERIAL2_XOFF__tx_stop__BITNR 9 +#define R_SERIAL2_XOFF__tx_stop__WIDTH 1 +#define R_SERIAL2_XOFF__tx_stop__enable 0 +#define R_SERIAL2_XOFF__tx_stop__stop 1 +#define R_SERIAL2_XOFF__auto_xoff__BITNR 8 +#define R_SERIAL2_XOFF__auto_xoff__WIDTH 1 +#define R_SERIAL2_XOFF__auto_xoff__disable 0 +#define R_SERIAL2_XOFF__auto_xoff__enable 1 +#define R_SERIAL2_XOFF__xoff_char__BITNR 0 +#define R_SERIAL2_XOFF__xoff_char__WIDTH 8 + +#define R_SERIAL3_CTRL (IO_TYPECAST_UDWORD 0xb0000078) +#define R_SERIAL3_CTRL__tr_baud__BITNR 28 +#define R_SERIAL3_CTRL__tr_baud__WIDTH 4 +#define R_SERIAL3_CTRL__tr_baud__c300Hz 0 +#define R_SERIAL3_CTRL__tr_baud__c600Hz 1 +#define R_SERIAL3_CTRL__tr_baud__c1200Hz 2 +#define R_SERIAL3_CTRL__tr_baud__c2400Hz 3 +#define R_SERIAL3_CTRL__tr_baud__c4800Hz 4 +#define R_SERIAL3_CTRL__tr_baud__c9600Hz 5 +#define R_SERIAL3_CTRL__tr_baud__c19k2Hz 6 +#define R_SERIAL3_CTRL__tr_baud__c38k4Hz 7 +#define R_SERIAL3_CTRL__tr_baud__c57k6Hz 8 +#define R_SERIAL3_CTRL__tr_baud__c115k2Hz 9 +#define R_SERIAL3_CTRL__tr_baud__c230k4Hz 10 +#define R_SERIAL3_CTRL__tr_baud__c460k8Hz 11 +#define R_SERIAL3_CTRL__tr_baud__c921k6Hz 12 +#define R_SERIAL3_CTRL__tr_baud__c1843k2Hz 13 +#define R_SERIAL3_CTRL__tr_baud__c6250kHz 14 +#define R_SERIAL3_CTRL__tr_baud__reserved 15 +#define R_SERIAL3_CTRL__rec_baud__BITNR 24 +#define R_SERIAL3_CTRL__rec_baud__WIDTH 4 +#define R_SERIAL3_CTRL__rec_baud__c300Hz 0 +#define R_SERIAL3_CTRL__rec_baud__c600Hz 1 +#define R_SERIAL3_CTRL__rec_baud__c1200Hz 2 +#define R_SERIAL3_CTRL__rec_baud__c2400Hz 3 +#define R_SERIAL3_CTRL__rec_baud__c4800Hz 4 +#define R_SERIAL3_CTRL__rec_baud__c9600Hz 5 +#define R_SERIAL3_CTRL__rec_baud__c19k2Hz 6 +#define R_SERIAL3_CTRL__rec_baud__c38k4Hz 7 +#define R_SERIAL3_CTRL__rec_baud__c57k6Hz 8 +#define R_SERIAL3_CTRL__rec_baud__c115k2Hz 9 +#define R_SERIAL3_CTRL__rec_baud__c230k4Hz 10 +#define R_SERIAL3_CTRL__rec_baud__c460k8Hz 11 +#define R_SERIAL3_CTRL__rec_baud__c921k6Hz 12 +#define R_SERIAL3_CTRL__rec_baud__c1843k2Hz 13 +#define R_SERIAL3_CTRL__rec_baud__c6250kHz 14 +#define R_SERIAL3_CTRL__rec_baud__reserved 15 +#define R_SERIAL3_CTRL__dma_err__BITNR 23 +#define R_SERIAL3_CTRL__dma_err__WIDTH 1 +#define R_SERIAL3_CTRL__dma_err__stop 0 +#define R_SERIAL3_CTRL__dma_err__ignore 1 +#define R_SERIAL3_CTRL__rec_enable__BITNR 22 +#define R_SERIAL3_CTRL__rec_enable__WIDTH 1 +#define R_SERIAL3_CTRL__rec_enable__disable 0 +#define R_SERIAL3_CTRL__rec_enable__enable 1 +#define R_SERIAL3_CTRL__rts___BITNR 21 +#define R_SERIAL3_CTRL__rts___WIDTH 1 +#define R_SERIAL3_CTRL__rts___active 0 +#define R_SERIAL3_CTRL__rts___inactive 1 +#define R_SERIAL3_CTRL__sampling__BITNR 20 +#define R_SERIAL3_CTRL__sampling__WIDTH 1 +#define R_SERIAL3_CTRL__sampling__middle 0 +#define R_SERIAL3_CTRL__sampling__majority 1 +#define R_SERIAL3_CTRL__rec_stick_par__BITNR 19 +#define R_SERIAL3_CTRL__rec_stick_par__WIDTH 1 +#define R_SERIAL3_CTRL__rec_stick_par__normal 0 +#define R_SERIAL3_CTRL__rec_stick_par__stick 1 +#define R_SERIAL3_CTRL__rec_par__BITNR 18 +#define R_SERIAL3_CTRL__rec_par__WIDTH 1 +#define R_SERIAL3_CTRL__rec_par__even 0 +#define R_SERIAL3_CTRL__rec_par__odd 1 +#define R_SERIAL3_CTRL__rec_par_en__BITNR 17 +#define R_SERIAL3_CTRL__rec_par_en__WIDTH 1 +#define R_SERIAL3_CTRL__rec_par_en__disable 0 +#define R_SERIAL3_CTRL__rec_par_en__enable 1 +#define R_SERIAL3_CTRL__rec_bitnr__BITNR 16 +#define R_SERIAL3_CTRL__rec_bitnr__WIDTH 1 +#define R_SERIAL3_CTRL__rec_bitnr__rec_8bit 0 +#define R_SERIAL3_CTRL__rec_bitnr__rec_7bit 1 +#define R_SERIAL3_CTRL__txd__BITNR 15 +#define R_SERIAL3_CTRL__txd__WIDTH 1 +#define R_SERIAL3_CTRL__tr_enable__BITNR 14 +#define R_SERIAL3_CTRL__tr_enable__WIDTH 1 +#define R_SERIAL3_CTRL__tr_enable__disable 0 +#define R_SERIAL3_CTRL__tr_enable__enable 1 +#define R_SERIAL3_CTRL__auto_cts__BITNR 13 +#define R_SERIAL3_CTRL__auto_cts__WIDTH 1 +#define R_SERIAL3_CTRL__auto_cts__disabled 0 +#define R_SERIAL3_CTRL__auto_cts__active 1 +#define R_SERIAL3_CTRL__stop_bits__BITNR 12 +#define R_SERIAL3_CTRL__stop_bits__WIDTH 1 +#define R_SERIAL3_CTRL__stop_bits__one_bit 0 +#define R_SERIAL3_CTRL__stop_bits__two_bits 1 +#define R_SERIAL3_CTRL__tr_stick_par__BITNR 11 +#define R_SERIAL3_CTRL__tr_stick_par__WIDTH 1 +#define R_SERIAL3_CTRL__tr_stick_par__normal 0 +#define R_SERIAL3_CTRL__tr_stick_par__stick 1 +#define R_SERIAL3_CTRL__tr_par__BITNR 10 +#define R_SERIAL3_CTRL__tr_par__WIDTH 1 +#define R_SERIAL3_CTRL__tr_par__even 0 +#define R_SERIAL3_CTRL__tr_par__odd 1 +#define R_SERIAL3_CTRL__tr_par_en__BITNR 9 +#define R_SERIAL3_CTRL__tr_par_en__WIDTH 1 +#define R_SERIAL3_CTRL__tr_par_en__disable 0 +#define R_SERIAL3_CTRL__tr_par_en__enable 1 +#define R_SERIAL3_CTRL__tr_bitnr__BITNR 8 +#define R_SERIAL3_CTRL__tr_bitnr__WIDTH 1 +#define R_SERIAL3_CTRL__tr_bitnr__tr_8bit 0 +#define R_SERIAL3_CTRL__tr_bitnr__tr_7bit 1 +#define R_SERIAL3_CTRL__data_out__BITNR 0 +#define R_SERIAL3_CTRL__data_out__WIDTH 8 + +#define R_SERIAL3_BAUD (IO_TYPECAST_BYTE 0xb000007b) +#define R_SERIAL3_BAUD__tr_baud__BITNR 4 +#define R_SERIAL3_BAUD__tr_baud__WIDTH 4 +#define R_SERIAL3_BAUD__tr_baud__c300Hz 0 +#define R_SERIAL3_BAUD__tr_baud__c600Hz 1 +#define R_SERIAL3_BAUD__tr_baud__c1200Hz 2 +#define R_SERIAL3_BAUD__tr_baud__c2400Hz 3 +#define R_SERIAL3_BAUD__tr_baud__c4800Hz 4 +#define R_SERIAL3_BAUD__tr_baud__c9600Hz 5 +#define R_SERIAL3_BAUD__tr_baud__c19k2Hz 6 +#define R_SERIAL3_BAUD__tr_baud__c38k4Hz 7 +#define R_SERIAL3_BAUD__tr_baud__c57k6Hz 8 +#define R_SERIAL3_BAUD__tr_baud__c115k2Hz 9 +#define R_SERIAL3_BAUD__tr_baud__c230k4Hz 10 +#define R_SERIAL3_BAUD__tr_baud__c460k8Hz 11 +#define R_SERIAL3_BAUD__tr_baud__c921k6Hz 12 +#define R_SERIAL3_BAUD__tr_baud__c1843k2Hz 13 +#define R_SERIAL3_BAUD__tr_baud__c6250kHz 14 +#define R_SERIAL3_BAUD__tr_baud__reserved 15 +#define R_SERIAL3_BAUD__rec_baud__BITNR 0 +#define R_SERIAL3_BAUD__rec_baud__WIDTH 4 +#define R_SERIAL3_BAUD__rec_baud__c300Hz 0 +#define R_SERIAL3_BAUD__rec_baud__c600Hz 1 +#define R_SERIAL3_BAUD__rec_baud__c1200Hz 2 +#define R_SERIAL3_BAUD__rec_baud__c2400Hz 3 +#define R_SERIAL3_BAUD__rec_baud__c4800Hz 4 +#define R_SERIAL3_BAUD__rec_baud__c9600Hz 5 +#define R_SERIAL3_BAUD__rec_baud__c19k2Hz 6 +#define R_SERIAL3_BAUD__rec_baud__c38k4Hz 7 +#define R_SERIAL3_BAUD__rec_baud__c57k6Hz 8 +#define R_SERIAL3_BAUD__rec_baud__c115k2Hz 9 +#define R_SERIAL3_BAUD__rec_baud__c230k4Hz 10 +#define R_SERIAL3_BAUD__rec_baud__c460k8Hz 11 +#define R_SERIAL3_BAUD__rec_baud__c921k6Hz 12 +#define R_SERIAL3_BAUD__rec_baud__c1843k2Hz 13 +#define R_SERIAL3_BAUD__rec_baud__c6250kHz 14 +#define R_SERIAL3_BAUD__rec_baud__reserved 15 + +#define R_SERIAL3_REC_CTRL (IO_TYPECAST_BYTE 0xb000007a) +#define R_SERIAL3_REC_CTRL__dma_err__BITNR 7 +#define R_SERIAL3_REC_CTRL__dma_err__WIDTH 1 +#define R_SERIAL3_REC_CTRL__dma_err__stop 0 +#define R_SERIAL3_REC_CTRL__dma_err__ignore 1 +#define R_SERIAL3_REC_CTRL__rec_enable__BITNR 6 +#define R_SERIAL3_REC_CTRL__rec_enable__WIDTH 1 +#define R_SERIAL3_REC_CTRL__rec_enable__disable 0 +#define R_SERIAL3_REC_CTRL__rec_enable__enable 1 +#define R_SERIAL3_REC_CTRL__rts___BITNR 5 +#define R_SERIAL3_REC_CTRL__rts___WIDTH 1 +#define R_SERIAL3_REC_CTRL__rts___active 0 +#define R_SERIAL3_REC_CTRL__rts___inactive 1 +#define R_SERIAL3_REC_CTRL__sampling__BITNR 4 +#define R_SERIAL3_REC_CTRL__sampling__WIDTH 1 +#define R_SERIAL3_REC_CTRL__sampling__middle 0 +#define R_SERIAL3_REC_CTRL__sampling__majority 1 +#define R_SERIAL3_REC_CTRL__rec_stick_par__BITNR 3 +#define R_SERIAL3_REC_CTRL__rec_stick_par__WIDTH 1 +#define R_SERIAL3_REC_CTRL__rec_stick_par__normal 0 +#define R_SERIAL3_REC_CTRL__rec_stick_par__stick 1 +#define R_SERIAL3_REC_CTRL__rec_par__BITNR 2 +#define R_SERIAL3_REC_CTRL__rec_par__WIDTH 1 +#define R_SERIAL3_REC_CTRL__rec_par__even 0 +#define R_SERIAL3_REC_CTRL__rec_par__odd 1 +#define R_SERIAL3_REC_CTRL__rec_par_en__BITNR 1 +#define R_SERIAL3_REC_CTRL__rec_par_en__WIDTH 1 +#define R_SERIAL3_REC_CTRL__rec_par_en__disable 0 +#define R_SERIAL3_REC_CTRL__rec_par_en__enable 1 +#define R_SERIAL3_REC_CTRL__rec_bitnr__BITNR 0 +#define R_SERIAL3_REC_CTRL__rec_bitnr__WIDTH 1 +#define R_SERIAL3_REC_CTRL__rec_bitnr__rec_8bit 0 +#define R_SERIAL3_REC_CTRL__rec_bitnr__rec_7bit 1 + +#define R_SERIAL3_TR_CTRL (IO_TYPECAST_BYTE 0xb0000079) +#define R_SERIAL3_TR_CTRL__txd__BITNR 7 +#define R_SERIAL3_TR_CTRL__txd__WIDTH 1 +#define R_SERIAL3_TR_CTRL__tr_enable__BITNR 6 +#define R_SERIAL3_TR_CTRL__tr_enable__WIDTH 1 +#define R_SERIAL3_TR_CTRL__tr_enable__disable 0 +#define R_SERIAL3_TR_CTRL__tr_enable__enable 1 +#define R_SERIAL3_TR_CTRL__auto_cts__BITNR 5 +#define R_SERIAL3_TR_CTRL__auto_cts__WIDTH 1 +#define R_SERIAL3_TR_CTRL__auto_cts__disabled 0 +#define R_SERIAL3_TR_CTRL__auto_cts__active 1 +#define R_SERIAL3_TR_CTRL__stop_bits__BITNR 4 +#define R_SERIAL3_TR_CTRL__stop_bits__WIDTH 1 +#define R_SERIAL3_TR_CTRL__stop_bits__one_bit 0 +#define R_SERIAL3_TR_CTRL__stop_bits__two_bits 1 +#define R_SERIAL3_TR_CTRL__tr_stick_par__BITNR 3 +#define R_SERIAL3_TR_CTRL__tr_stick_par__WIDTH 1 +#define R_SERIAL3_TR_CTRL__tr_stick_par__normal 0 +#define R_SERIAL3_TR_CTRL__tr_stick_par__stick 1 +#define R_SERIAL3_TR_CTRL__tr_par__BITNR 2 +#define R_SERIAL3_TR_CTRL__tr_par__WIDTH 1 +#define R_SERIAL3_TR_CTRL__tr_par__even 0 +#define R_SERIAL3_TR_CTRL__tr_par__odd 1 +#define R_SERIAL3_TR_CTRL__tr_par_en__BITNR 1 +#define R_SERIAL3_TR_CTRL__tr_par_en__WIDTH 1 +#define R_SERIAL3_TR_CTRL__tr_par_en__disable 0 +#define R_SERIAL3_TR_CTRL__tr_par_en__enable 1 +#define R_SERIAL3_TR_CTRL__tr_bitnr__BITNR 0 +#define R_SERIAL3_TR_CTRL__tr_bitnr__WIDTH 1 +#define R_SERIAL3_TR_CTRL__tr_bitnr__tr_8bit 0 +#define R_SERIAL3_TR_CTRL__tr_bitnr__tr_7bit 1 + +#define R_SERIAL3_TR_DATA (IO_TYPECAST_BYTE 0xb0000078) +#define R_SERIAL3_TR_DATA__data_out__BITNR 0 +#define R_SERIAL3_TR_DATA__data_out__WIDTH 8 + +#define R_SERIAL3_READ (IO_TYPECAST_RO_UDWORD 0xb0000078) +#define R_SERIAL3_READ__xoff_detect__BITNR 15 +#define R_SERIAL3_READ__xoff_detect__WIDTH 1 +#define R_SERIAL3_READ__xoff_detect__no_xoff 0 +#define R_SERIAL3_READ__xoff_detect__xoff 1 +#define R_SERIAL3_READ__cts___BITNR 14 +#define R_SERIAL3_READ__cts___WIDTH 1 +#define R_SERIAL3_READ__cts___active 0 +#define R_SERIAL3_READ__cts___inactive 1 +#define R_SERIAL3_READ__tr_ready__BITNR 13 +#define R_SERIAL3_READ__tr_ready__WIDTH 1 +#define R_SERIAL3_READ__tr_ready__full 0 +#define R_SERIAL3_READ__tr_ready__ready 1 +#define R_SERIAL3_READ__rxd__BITNR 12 +#define R_SERIAL3_READ__rxd__WIDTH 1 +#define R_SERIAL3_READ__overrun__BITNR 11 +#define R_SERIAL3_READ__overrun__WIDTH 1 +#define R_SERIAL3_READ__overrun__no 0 +#define R_SERIAL3_READ__overrun__yes 1 +#define R_SERIAL3_READ__par_err__BITNR 10 +#define R_SERIAL3_READ__par_err__WIDTH 1 +#define R_SERIAL3_READ__par_err__no 0 +#define R_SERIAL3_READ__par_err__yes 1 +#define R_SERIAL3_READ__framing_err__BITNR 9 +#define R_SERIAL3_READ__framing_err__WIDTH 1 +#define R_SERIAL3_READ__framing_err__no 0 +#define R_SERIAL3_READ__framing_err__yes 1 +#define R_SERIAL3_READ__data_avail__BITNR 8 +#define R_SERIAL3_READ__data_avail__WIDTH 1 +#define R_SERIAL3_READ__data_avail__no 0 +#define R_SERIAL3_READ__data_avail__yes 1 +#define R_SERIAL3_READ__data_in__BITNR 0 +#define R_SERIAL3_READ__data_in__WIDTH 8 + +#define R_SERIAL3_STATUS (IO_TYPECAST_RO_BYTE 0xb0000079) +#define R_SERIAL3_STATUS__xoff_detect__BITNR 7 +#define R_SERIAL3_STATUS__xoff_detect__WIDTH 1 +#define R_SERIAL3_STATUS__xoff_detect__no_xoff 0 +#define R_SERIAL3_STATUS__xoff_detect__xoff 1 +#define R_SERIAL3_STATUS__cts___BITNR 6 +#define R_SERIAL3_STATUS__cts___WIDTH 1 +#define R_SERIAL3_STATUS__cts___active 0 +#define R_SERIAL3_STATUS__cts___inactive 1 +#define R_SERIAL3_STATUS__tr_ready__BITNR 5 +#define R_SERIAL3_STATUS__tr_ready__WIDTH 1 +#define R_SERIAL3_STATUS__tr_ready__full 0 +#define R_SERIAL3_STATUS__tr_ready__ready 1 +#define R_SERIAL3_STATUS__rxd__BITNR 4 +#define R_SERIAL3_STATUS__rxd__WIDTH 1 +#define R_SERIAL3_STATUS__overrun__BITNR 3 +#define R_SERIAL3_STATUS__overrun__WIDTH 1 +#define R_SERIAL3_STATUS__overrun__no 0 +#define R_SERIAL3_STATUS__overrun__yes 1 +#define R_SERIAL3_STATUS__par_err__BITNR 2 +#define R_SERIAL3_STATUS__par_err__WIDTH 1 +#define R_SERIAL3_STATUS__par_err__no 0 +#define R_SERIAL3_STATUS__par_err__yes 1 +#define R_SERIAL3_STATUS__framing_err__BITNR 1 +#define R_SERIAL3_STATUS__framing_err__WIDTH 1 +#define R_SERIAL3_STATUS__framing_err__no 0 +#define R_SERIAL3_STATUS__framing_err__yes 1 +#define R_SERIAL3_STATUS__data_avail__BITNR 0 +#define R_SERIAL3_STATUS__data_avail__WIDTH 1 +#define R_SERIAL3_STATUS__data_avail__no 0 +#define R_SERIAL3_STATUS__data_avail__yes 1 + +#define R_SERIAL3_REC_DATA (IO_TYPECAST_RO_BYTE 0xb0000078) +#define R_SERIAL3_REC_DATA__data_in__BITNR 0 +#define R_SERIAL3_REC_DATA__data_in__WIDTH 8 + +#define R_SERIAL3_XOFF (IO_TYPECAST_UDWORD 0xb000007c) +#define R_SERIAL3_XOFF__tx_stop__BITNR 9 +#define R_SERIAL3_XOFF__tx_stop__WIDTH 1 +#define R_SERIAL3_XOFF__tx_stop__enable 0 +#define R_SERIAL3_XOFF__tx_stop__stop 1 +#define R_SERIAL3_XOFF__auto_xoff__BITNR 8 +#define R_SERIAL3_XOFF__auto_xoff__WIDTH 1 +#define R_SERIAL3_XOFF__auto_xoff__disable 0 +#define R_SERIAL3_XOFF__auto_xoff__enable 1 +#define R_SERIAL3_XOFF__xoff_char__BITNR 0 +#define R_SERIAL3_XOFF__xoff_char__WIDTH 8 + +#define R_ALT_SER_BAUDRATE (IO_TYPECAST_UDWORD 0xb000005c) +#define R_ALT_SER_BAUDRATE__ser3_tr__BITNR 28 +#define R_ALT_SER_BAUDRATE__ser3_tr__WIDTH 2 +#define R_ALT_SER_BAUDRATE__ser3_tr__normal 0 +#define R_ALT_SER_BAUDRATE__ser3_tr__prescale 1 +#define R_ALT_SER_BAUDRATE__ser3_tr__extern 2 +#define R_ALT_SER_BAUDRATE__ser3_tr__timer 3 +#define R_ALT_SER_BAUDRATE__ser3_rec__BITNR 24 +#define R_ALT_SER_BAUDRATE__ser3_rec__WIDTH 2 +#define R_ALT_SER_BAUDRATE__ser3_rec__normal 0 +#define R_ALT_SER_BAUDRATE__ser3_rec__prescale 1 +#define R_ALT_SER_BAUDRATE__ser3_rec__extern 2 +#define R_ALT_SER_BAUDRATE__ser3_rec__timer 3 +#define R_ALT_SER_BAUDRATE__ser2_tr__BITNR 20 +#define R_ALT_SER_BAUDRATE__ser2_tr__WIDTH 2 +#define R_ALT_SER_BAUDRATE__ser2_tr__normal 0 +#define R_ALT_SER_BAUDRATE__ser2_tr__prescale 1 +#define R_ALT_SER_BAUDRATE__ser2_tr__extern 2 +#define R_ALT_SER_BAUDRATE__ser2_tr__timer 3 +#define R_ALT_SER_BAUDRATE__ser2_rec__BITNR 16 +#define R_ALT_SER_BAUDRATE__ser2_rec__WIDTH 2 +#define R_ALT_SER_BAUDRATE__ser2_rec__normal 0 +#define R_ALT_SER_BAUDRATE__ser2_rec__prescale 1 +#define R_ALT_SER_BAUDRATE__ser2_rec__extern 2 +#define R_ALT_SER_BAUDRATE__ser2_rec__timer 3 +#define R_ALT_SER_BAUDRATE__ser1_tr__BITNR 12 +#define R_ALT_SER_BAUDRATE__ser1_tr__WIDTH 2 +#define R_ALT_SER_BAUDRATE__ser1_tr__normal 0 +#define R_ALT_SER_BAUDRATE__ser1_tr__prescale 1 +#define R_ALT_SER_BAUDRATE__ser1_tr__extern 2 +#define R_ALT_SER_BAUDRATE__ser1_tr__timer 3 +#define R_ALT_SER_BAUDRATE__ser1_rec__BITNR 8 +#define R_ALT_SER_BAUDRATE__ser1_rec__WIDTH 2 +#define R_ALT_SER_BAUDRATE__ser1_rec__normal 0 +#define R_ALT_SER_BAUDRATE__ser1_rec__prescale 1 +#define R_ALT_SER_BAUDRATE__ser1_rec__extern 2 +#define R_ALT_SER_BAUDRATE__ser1_rec__timer 3 +#define R_ALT_SER_BAUDRATE__ser0_tr__BITNR 4 +#define R_ALT_SER_BAUDRATE__ser0_tr__WIDTH 2 +#define R_ALT_SER_BAUDRATE__ser0_tr__normal 0 +#define R_ALT_SER_BAUDRATE__ser0_tr__prescale 1 +#define R_ALT_SER_BAUDRATE__ser0_tr__extern 2 +#define R_ALT_SER_BAUDRATE__ser0_tr__timer 3 +#define R_ALT_SER_BAUDRATE__ser0_rec__BITNR 0 +#define R_ALT_SER_BAUDRATE__ser0_rec__WIDTH 2 +#define R_ALT_SER_BAUDRATE__ser0_rec__normal 0 +#define R_ALT_SER_BAUDRATE__ser0_rec__prescale 1 +#define R_ALT_SER_BAUDRATE__ser0_rec__extern 2 +#define R_ALT_SER_BAUDRATE__ser0_rec__timer 3 + +/* +!* Network interface registers +!*/ + +#define R_NETWORK_SA_0 (IO_TYPECAST_UDWORD 0xb0000080) +#define R_NETWORK_SA_0__ma0_low__BITNR 0 +#define R_NETWORK_SA_0__ma0_low__WIDTH 32 + +#define R_NETWORK_SA_1 (IO_TYPECAST_UDWORD 0xb0000084) +#define R_NETWORK_SA_1__ma1_low__BITNR 16 +#define R_NETWORK_SA_1__ma1_low__WIDTH 16 +#define R_NETWORK_SA_1__ma0_high__BITNR 0 +#define R_NETWORK_SA_1__ma0_high__WIDTH 16 + +#define R_NETWORK_SA_2 (IO_TYPECAST_UDWORD 0xb0000088) +#define R_NETWORK_SA_2__ma1_high__BITNR 0 +#define R_NETWORK_SA_2__ma1_high__WIDTH 32 + +#define R_NETWORK_GA_0 (IO_TYPECAST_UDWORD 0xb000008c) +#define R_NETWORK_GA_0__ga_low__BITNR 0 +#define R_NETWORK_GA_0__ga_low__WIDTH 32 + +#define R_NETWORK_GA_1 (IO_TYPECAST_UDWORD 0xb0000090) +#define R_NETWORK_GA_1__ga_high__BITNR 0 +#define R_NETWORK_GA_1__ga_high__WIDTH 32 + +#define R_NETWORK_REC_CONFIG (IO_TYPECAST_UDWORD 0xb0000094) +#define R_NETWORK_REC_CONFIG__duplex__BITNR 9 +#define R_NETWORK_REC_CONFIG__duplex__WIDTH 1 +#define R_NETWORK_REC_CONFIG__duplex__full 1 +#define R_NETWORK_REC_CONFIG__duplex__half 0 +#define R_NETWORK_REC_CONFIG__bad_crc__BITNR 8 +#define R_NETWORK_REC_CONFIG__bad_crc__WIDTH 1 +#define R_NETWORK_REC_CONFIG__bad_crc__receive 1 +#define R_NETWORK_REC_CONFIG__bad_crc__discard 0 +#define R_NETWORK_REC_CONFIG__oversize__BITNR 7 +#define R_NETWORK_REC_CONFIG__oversize__WIDTH 1 +#define R_NETWORK_REC_CONFIG__oversize__receive 1 +#define R_NETWORK_REC_CONFIG__oversize__discard 0 +#define R_NETWORK_REC_CONFIG__undersize__BITNR 6 +#define R_NETWORK_REC_CONFIG__undersize__WIDTH 1 +#define R_NETWORK_REC_CONFIG__undersize__receive 1 +#define R_NETWORK_REC_CONFIG__undersize__discard 0 +#define R_NETWORK_REC_CONFIG__all_roots__BITNR 5 +#define R_NETWORK_REC_CONFIG__all_roots__WIDTH 1 +#define R_NETWORK_REC_CONFIG__all_roots__receive 1 +#define R_NETWORK_REC_CONFIG__all_roots__discard 0 +#define R_NETWORK_REC_CONFIG__tr_broadcast__BITNR 4 +#define R_NETWORK_REC_CONFIG__tr_broadcast__WIDTH 1 +#define R_NETWORK_REC_CONFIG__tr_broadcast__receive 1 +#define R_NETWORK_REC_CONFIG__tr_broadcast__discard 0 +#define R_NETWORK_REC_CONFIG__broadcast__BITNR 3 +#define R_NETWORK_REC_CONFIG__broadcast__WIDTH 1 +#define R_NETWORK_REC_CONFIG__broadcast__receive 1 +#define R_NETWORK_REC_CONFIG__broadcast__discard 0 +#define R_NETWORK_REC_CONFIG__individual__BITNR 2 +#define R_NETWORK_REC_CONFIG__individual__WIDTH 1 +#define R_NETWORK_REC_CONFIG__individual__receive 1 +#define R_NETWORK_REC_CONFIG__individual__discard 0 +#define R_NETWORK_REC_CONFIG__ma1__BITNR 1 +#define R_NETWORK_REC_CONFIG__ma1__WIDTH 1 +#define R_NETWORK_REC_CONFIG__ma1__enable 1 +#define R_NETWORK_REC_CONFIG__ma1__disable 0 +#define R_NETWORK_REC_CONFIG__ma0__BITNR 0 +#define R_NETWORK_REC_CONFIG__ma0__WIDTH 1 +#define R_NETWORK_REC_CONFIG__ma0__enable 1 +#define R_NETWORK_REC_CONFIG__ma0__disable 0 + +#define R_NETWORK_GEN_CONFIG (IO_TYPECAST_UDWORD 0xb0000098) +#define R_NETWORK_GEN_CONFIG__loopback__BITNR 5 +#define R_NETWORK_GEN_CONFIG__loopback__WIDTH 1 +#define R_NETWORK_GEN_CONFIG__loopback__on 1 +#define R_NETWORK_GEN_CONFIG__loopback__off 0 +#define R_NETWORK_GEN_CONFIG__frame__BITNR 4 +#define R_NETWORK_GEN_CONFIG__frame__WIDTH 1 +#define R_NETWORK_GEN_CONFIG__frame__tokenr 1 +#define R_NETWORK_GEN_CONFIG__frame__ether 0 +#define R_NETWORK_GEN_CONFIG__vg__BITNR 3 +#define R_NETWORK_GEN_CONFIG__vg__WIDTH 1 +#define R_NETWORK_GEN_CONFIG__vg__on 1 +#define R_NETWORK_GEN_CONFIG__vg__off 0 +#define R_NETWORK_GEN_CONFIG__phy__BITNR 1 +#define R_NETWORK_GEN_CONFIG__phy__WIDTH 2 +#define R_NETWORK_GEN_CONFIG__phy__sni 0 +#define R_NETWORK_GEN_CONFIG__phy__mii_clk 1 +#define R_NETWORK_GEN_CONFIG__phy__mii_err 2 +#define R_NETWORK_GEN_CONFIG__phy__mii_req 3 +#define R_NETWORK_GEN_CONFIG__enable__BITNR 0 +#define R_NETWORK_GEN_CONFIG__enable__WIDTH 1 +#define R_NETWORK_GEN_CONFIG__enable__on 1 +#define R_NETWORK_GEN_CONFIG__enable__off 0 + +#define R_NETWORK_TR_CTRL (IO_TYPECAST_UDWORD 0xb000009c) +#define R_NETWORK_TR_CTRL__clr_error__BITNR 8 +#define R_NETWORK_TR_CTRL__clr_error__WIDTH 1 +#define R_NETWORK_TR_CTRL__clr_error__clr 1 +#define R_NETWORK_TR_CTRL__clr_error__nop 0 +#define R_NETWORK_TR_CTRL__delay__BITNR 5 +#define R_NETWORK_TR_CTRL__delay__WIDTH 1 +#define R_NETWORK_TR_CTRL__delay__d2us 1 +#define R_NETWORK_TR_CTRL__delay__none 0 +#define R_NETWORK_TR_CTRL__cancel__BITNR 4 +#define R_NETWORK_TR_CTRL__cancel__WIDTH 1 +#define R_NETWORK_TR_CTRL__cancel__do 1 +#define R_NETWORK_TR_CTRL__cancel__dont 0 +#define R_NETWORK_TR_CTRL__cd__BITNR 3 +#define R_NETWORK_TR_CTRL__cd__WIDTH 1 +#define R_NETWORK_TR_CTRL__cd__enable 0 +#define R_NETWORK_TR_CTRL__cd__disable 1 +#define R_NETWORK_TR_CTRL__cd__ack_col 0 +#define R_NETWORK_TR_CTRL__cd__ack_crs 1 +#define R_NETWORK_TR_CTRL__retry__BITNR 2 +#define R_NETWORK_TR_CTRL__retry__WIDTH 1 +#define R_NETWORK_TR_CTRL__retry__enable 0 +#define R_NETWORK_TR_CTRL__retry__disable 1 +#define R_NETWORK_TR_CTRL__pad__BITNR 1 +#define R_NETWORK_TR_CTRL__pad__WIDTH 1 +#define R_NETWORK_TR_CTRL__pad__enable 1 +#define R_NETWORK_TR_CTRL__pad__disable 0 +#define R_NETWORK_TR_CTRL__crc__BITNR 0 +#define R_NETWORK_TR_CTRL__crc__WIDTH 1 +#define R_NETWORK_TR_CTRL__crc__enable 0 +#define R_NETWORK_TR_CTRL__crc__disable 1 + +#define R_NETWORK_MGM_CTRL (IO_TYPECAST_UDWORD 0xb00000a0) +#define R_NETWORK_MGM_CTRL__txd_pins__BITNR 4 +#define R_NETWORK_MGM_CTRL__txd_pins__WIDTH 4 +#define R_NETWORK_MGM_CTRL__txer_pin__BITNR 3 +#define R_NETWORK_MGM_CTRL__txer_pin__WIDTH 1 +#define R_NETWORK_MGM_CTRL__mdck__BITNR 2 +#define R_NETWORK_MGM_CTRL__mdck__WIDTH 1 +#define R_NETWORK_MGM_CTRL__mdoe__BITNR 1 +#define R_NETWORK_MGM_CTRL__mdoe__WIDTH 1 +#define R_NETWORK_MGM_CTRL__mdoe__enable 1 +#define R_NETWORK_MGM_CTRL__mdoe__disable 0 +#define R_NETWORK_MGM_CTRL__mdio__BITNR 0 +#define R_NETWORK_MGM_CTRL__mdio__WIDTH 1 + +#define R_NETWORK_STAT (IO_TYPECAST_RO_UDWORD 0xb00000a0) +#define R_NETWORK_STAT__rxd_pins__BITNR 4 +#define R_NETWORK_STAT__rxd_pins__WIDTH 4 +#define R_NETWORK_STAT__rxer__BITNR 3 +#define R_NETWORK_STAT__rxer__WIDTH 1 +#define R_NETWORK_STAT__underrun__BITNR 2 +#define R_NETWORK_STAT__underrun__WIDTH 1 +#define R_NETWORK_STAT__underrun__yes 1 +#define R_NETWORK_STAT__underrun__no 0 +#define R_NETWORK_STAT__exc_col__BITNR 1 +#define R_NETWORK_STAT__exc_col__WIDTH 1 +#define R_NETWORK_STAT__exc_col__yes 1 +#define R_NETWORK_STAT__exc_col__no 0 +#define R_NETWORK_STAT__mdio__BITNR 0 +#define R_NETWORK_STAT__mdio__WIDTH 1 + +#define R_REC_COUNTERS (IO_TYPECAST_RO_UDWORD 0xb00000a4) +#define R_REC_COUNTERS__congestion__BITNR 24 +#define R_REC_COUNTERS__congestion__WIDTH 8 +#define R_REC_COUNTERS__oversize__BITNR 16 +#define R_REC_COUNTERS__oversize__WIDTH 8 +#define R_REC_COUNTERS__alignment_error__BITNR 8 +#define R_REC_COUNTERS__alignment_error__WIDTH 8 +#define R_REC_COUNTERS__crc_error__BITNR 0 +#define R_REC_COUNTERS__crc_error__WIDTH 8 + +#define R_TR_COUNTERS (IO_TYPECAST_RO_UDWORD 0xb00000a8) +#define R_TR_COUNTERS__deferred__BITNR 24 +#define R_TR_COUNTERS__deferred__WIDTH 8 +#define R_TR_COUNTERS__late_col__BITNR 16 +#define R_TR_COUNTERS__late_col__WIDTH 8 +#define R_TR_COUNTERS__multiple_col__BITNR 8 +#define R_TR_COUNTERS__multiple_col__WIDTH 8 +#define R_TR_COUNTERS__single_col__BITNR 0 +#define R_TR_COUNTERS__single_col__WIDTH 8 + +#define R_PHY_COUNTERS (IO_TYPECAST_RO_UDWORD 0xb00000ac) +#define R_PHY_COUNTERS__sqe_test_error__BITNR 8 +#define R_PHY_COUNTERS__sqe_test_error__WIDTH 8 +#define R_PHY_COUNTERS__carrier_loss__BITNR 0 +#define R_PHY_COUNTERS__carrier_loss__WIDTH 8 + +/* +!* Parallel printer port registers +!*/ + +#define R_PAR0_CTRL_DATA (IO_TYPECAST_UDWORD 0xb0000040) +#define R_PAR0_CTRL_DATA__peri_int__BITNR 24 +#define R_PAR0_CTRL_DATA__peri_int__WIDTH 1 +#define R_PAR0_CTRL_DATA__peri_int__ack 1 +#define R_PAR0_CTRL_DATA__peri_int__nop 0 +#define R_PAR0_CTRL_DATA__oe__BITNR 20 +#define R_PAR0_CTRL_DATA__oe__WIDTH 1 +#define R_PAR0_CTRL_DATA__oe__enable 1 +#define R_PAR0_CTRL_DATA__oe__disable 0 +#define R_PAR0_CTRL_DATA__seli__BITNR 19 +#define R_PAR0_CTRL_DATA__seli__WIDTH 1 +#define R_PAR0_CTRL_DATA__seli__active 1 +#define R_PAR0_CTRL_DATA__seli__inactive 0 +#define R_PAR0_CTRL_DATA__autofd__BITNR 18 +#define R_PAR0_CTRL_DATA__autofd__WIDTH 1 +#define R_PAR0_CTRL_DATA__autofd__active 1 +#define R_PAR0_CTRL_DATA__autofd__inactive 0 +#define R_PAR0_CTRL_DATA__strb__BITNR 17 +#define R_PAR0_CTRL_DATA__strb__WIDTH 1 +#define R_PAR0_CTRL_DATA__strb__active 1 +#define R_PAR0_CTRL_DATA__strb__inactive 0 +#define R_PAR0_CTRL_DATA__init__BITNR 16 +#define R_PAR0_CTRL_DATA__init__WIDTH 1 +#define R_PAR0_CTRL_DATA__init__active 1 +#define R_PAR0_CTRL_DATA__init__inactive 0 +#define R_PAR0_CTRL_DATA__ecp_cmd__BITNR 8 +#define R_PAR0_CTRL_DATA__ecp_cmd__WIDTH 1 +#define R_PAR0_CTRL_DATA__ecp_cmd__command 1 +#define R_PAR0_CTRL_DATA__ecp_cmd__data 0 +#define R_PAR0_CTRL_DATA__data__BITNR 0 +#define R_PAR0_CTRL_DATA__data__WIDTH 8 + +#define R_PAR0_CTRL (IO_TYPECAST_BYTE 0xb0000042) +#define R_PAR0_CTRL__ctrl__BITNR 0 +#define R_PAR0_CTRL__ctrl__WIDTH 5 + +#define R_PAR0_STATUS_DATA (IO_TYPECAST_RO_UDWORD 0xb0000040) +#define R_PAR0_STATUS_DATA__mode__BITNR 29 +#define R_PAR0_STATUS_DATA__mode__WIDTH 3 +#define R_PAR0_STATUS_DATA__mode__manual 0 +#define R_PAR0_STATUS_DATA__mode__centronics 1 +#define R_PAR0_STATUS_DATA__mode__fastbyte 2 +#define R_PAR0_STATUS_DATA__mode__nibble 3 +#define R_PAR0_STATUS_DATA__mode__byte 4 +#define R_PAR0_STATUS_DATA__mode__ecp_fwd 5 +#define R_PAR0_STATUS_DATA__mode__ecp_rev 6 +#define R_PAR0_STATUS_DATA__mode__off 7 +#define R_PAR0_STATUS_DATA__perr__BITNR 28 +#define R_PAR0_STATUS_DATA__perr__WIDTH 1 +#define R_PAR0_STATUS_DATA__perr__active 1 +#define R_PAR0_STATUS_DATA__perr__inactive 0 +#define R_PAR0_STATUS_DATA__ack__BITNR 27 +#define R_PAR0_STATUS_DATA__ack__WIDTH 1 +#define R_PAR0_STATUS_DATA__ack__active 0 +#define R_PAR0_STATUS_DATA__ack__inactive 1 +#define R_PAR0_STATUS_DATA__busy__BITNR 26 +#define R_PAR0_STATUS_DATA__busy__WIDTH 1 +#define R_PAR0_STATUS_DATA__busy__active 1 +#define R_PAR0_STATUS_DATA__busy__inactive 0 +#define R_PAR0_STATUS_DATA__fault__BITNR 25 +#define R_PAR0_STATUS_DATA__fault__WIDTH 1 +#define R_PAR0_STATUS_DATA__fault__active 0 +#define R_PAR0_STATUS_DATA__fault__inactive 1 +#define R_PAR0_STATUS_DATA__sel__BITNR 24 +#define R_PAR0_STATUS_DATA__sel__WIDTH 1 +#define R_PAR0_STATUS_DATA__sel__active 1 +#define R_PAR0_STATUS_DATA__sel__inactive 0 +#define R_PAR0_STATUS_DATA__tr_rdy__BITNR 17 +#define R_PAR0_STATUS_DATA__tr_rdy__WIDTH 1 +#define R_PAR0_STATUS_DATA__tr_rdy__ready 1 +#define R_PAR0_STATUS_DATA__tr_rdy__busy 0 +#define R_PAR0_STATUS_DATA__dav__BITNR 16 +#define R_PAR0_STATUS_DATA__dav__WIDTH 1 +#define R_PAR0_STATUS_DATA__dav__data 1 +#define R_PAR0_STATUS_DATA__dav__nodata 0 +#define R_PAR0_STATUS_DATA__ecp_cmd__BITNR 8 +#define R_PAR0_STATUS_DATA__ecp_cmd__WIDTH 1 +#define R_PAR0_STATUS_DATA__ecp_cmd__command 1 +#define R_PAR0_STATUS_DATA__ecp_cmd__data 0 +#define R_PAR0_STATUS_DATA__data__BITNR 0 +#define R_PAR0_STATUS_DATA__data__WIDTH 8 + +#define R_PAR_ECP16_DATA (IO_TYPECAST_RO_UWORD 0xb0000040) +#define R_PAR_ECP16_DATA__data__BITNR 0 +#define R_PAR_ECP16_DATA__data__WIDTH 16 + +#define R_PAR0_CONFIG (IO_TYPECAST_UDWORD 0xb0000044) +#define R_PAR0_CONFIG__ioe__BITNR 25 +#define R_PAR0_CONFIG__ioe__WIDTH 1 +#define R_PAR0_CONFIG__ioe__inv 1 +#define R_PAR0_CONFIG__ioe__noninv 0 +#define R_PAR0_CONFIG__iseli__BITNR 24 +#define R_PAR0_CONFIG__iseli__WIDTH 1 +#define R_PAR0_CONFIG__iseli__inv 1 +#define R_PAR0_CONFIG__iseli__noninv 0 +#define R_PAR0_CONFIG__iautofd__BITNR 23 +#define R_PAR0_CONFIG__iautofd__WIDTH 1 +#define R_PAR0_CONFIG__iautofd__inv 1 +#define R_PAR0_CONFIG__iautofd__noninv 0 +#define R_PAR0_CONFIG__istrb__BITNR 22 +#define R_PAR0_CONFIG__istrb__WIDTH 1 +#define R_PAR0_CONFIG__istrb__inv 1 +#define R_PAR0_CONFIG__istrb__noninv 0 +#define R_PAR0_CONFIG__iinit__BITNR 21 +#define R_PAR0_CONFIG__iinit__WIDTH 1 +#define R_PAR0_CONFIG__iinit__inv 1 +#define R_PAR0_CONFIG__iinit__noninv 0 +#define R_PAR0_CONFIG__iperr__BITNR 20 +#define R_PAR0_CONFIG__iperr__WIDTH 1 +#define R_PAR0_CONFIG__iperr__inv 1 +#define R_PAR0_CONFIG__iperr__noninv 0 +#define R_PAR0_CONFIG__iack__BITNR 19 +#define R_PAR0_CONFIG__iack__WIDTH 1 +#define R_PAR0_CONFIG__iack__inv 1 +#define R_PAR0_CONFIG__iack__noninv 0 +#define R_PAR0_CONFIG__ibusy__BITNR 18 +#define R_PAR0_CONFIG__ibusy__WIDTH 1 +#define R_PAR0_CONFIG__ibusy__inv 1 +#define R_PAR0_CONFIG__ibusy__noninv 0 +#define R_PAR0_CONFIG__ifault__BITNR 17 +#define R_PAR0_CONFIG__ifault__WIDTH 1 +#define R_PAR0_CONFIG__ifault__inv 1 +#define R_PAR0_CONFIG__ifault__noninv 0 +#define R_PAR0_CONFIG__isel__BITNR 16 +#define R_PAR0_CONFIG__isel__WIDTH 1 +#define R_PAR0_CONFIG__isel__inv 1 +#define R_PAR0_CONFIG__isel__noninv 0 +#define R_PAR0_CONFIG__ext_mode__BITNR 11 +#define R_PAR0_CONFIG__ext_mode__WIDTH 1 +#define R_PAR0_CONFIG__ext_mode__enable 1 +#define R_PAR0_CONFIG__ext_mode__disable 0 +#define R_PAR0_CONFIG__wide__BITNR 10 +#define R_PAR0_CONFIG__wide__WIDTH 1 +#define R_PAR0_CONFIG__wide__enable 1 +#define R_PAR0_CONFIG__wide__disable 0 +#define R_PAR0_CONFIG__dma__BITNR 9 +#define R_PAR0_CONFIG__dma__WIDTH 1 +#define R_PAR0_CONFIG__dma__enable 1 +#define R_PAR0_CONFIG__dma__disable 0 +#define R_PAR0_CONFIG__rle_in__BITNR 8 +#define R_PAR0_CONFIG__rle_in__WIDTH 1 +#define R_PAR0_CONFIG__rle_in__enable 1 +#define R_PAR0_CONFIG__rle_in__disable 0 +#define R_PAR0_CONFIG__rle_out__BITNR 7 +#define R_PAR0_CONFIG__rle_out__WIDTH 1 +#define R_PAR0_CONFIG__rle_out__enable 1 +#define R_PAR0_CONFIG__rle_out__disable 0 +#define R_PAR0_CONFIG__enable__BITNR 6 +#define R_PAR0_CONFIG__enable__WIDTH 1 +#define R_PAR0_CONFIG__enable__on 1 +#define R_PAR0_CONFIG__enable__reset 0 +#define R_PAR0_CONFIG__force__BITNR 5 +#define R_PAR0_CONFIG__force__WIDTH 1 +#define R_PAR0_CONFIG__force__on 1 +#define R_PAR0_CONFIG__force__off 0 +#define R_PAR0_CONFIG__ign_ack__BITNR 4 +#define R_PAR0_CONFIG__ign_ack__WIDTH 1 +#define R_PAR0_CONFIG__ign_ack__ignore 1 +#define R_PAR0_CONFIG__ign_ack__wait 0 +#define R_PAR0_CONFIG__oe_ack__BITNR 3 +#define R_PAR0_CONFIG__oe_ack__WIDTH 1 +#define R_PAR0_CONFIG__oe_ack__wait_oe 1 +#define R_PAR0_CONFIG__oe_ack__dont_wait 0 +#define R_PAR0_CONFIG__oe_ack__epp_addr 1 +#define R_PAR0_CONFIG__oe_ack__epp_data 0 +#define R_PAR0_CONFIG__epp_addr_data__BITNR 3 +#define R_PAR0_CONFIG__epp_addr_data__WIDTH 1 +#define R_PAR0_CONFIG__epp_addr_data__wait_oe 1 +#define R_PAR0_CONFIG__epp_addr_data__dont_wait 0 +#define R_PAR0_CONFIG__epp_addr_data__epp_addr 1 +#define R_PAR0_CONFIG__epp_addr_data__epp_data 0 +#define R_PAR0_CONFIG__mode__BITNR 0 +#define R_PAR0_CONFIG__mode__WIDTH 3 +#define R_PAR0_CONFIG__mode__manual 0 +#define R_PAR0_CONFIG__mode__centronics 1 +#define R_PAR0_CONFIG__mode__fastbyte 2 +#define R_PAR0_CONFIG__mode__nibble 3 +#define R_PAR0_CONFIG__mode__byte 4 +#define R_PAR0_CONFIG__mode__ecp_fwd 5 +#define R_PAR0_CONFIG__mode__ecp_rev 6 +#define R_PAR0_CONFIG__mode__off 7 + +#define R_PAR0_DELAY (IO_TYPECAST_UDWORD 0xb0000048) +#define R_PAR0_DELAY__fine_hold__BITNR 21 +#define R_PAR0_DELAY__fine_hold__WIDTH 3 +#define R_PAR0_DELAY__hold__BITNR 16 +#define R_PAR0_DELAY__hold__WIDTH 5 +#define R_PAR0_DELAY__fine_strb__BITNR 13 +#define R_PAR0_DELAY__fine_strb__WIDTH 3 +#define R_PAR0_DELAY__strobe__BITNR 8 +#define R_PAR0_DELAY__strobe__WIDTH 5 +#define R_PAR0_DELAY__fine_setup__BITNR 5 +#define R_PAR0_DELAY__fine_setup__WIDTH 3 +#define R_PAR0_DELAY__setup__BITNR 0 +#define R_PAR0_DELAY__setup__WIDTH 5 + +#define R_PAR1_CTRL_DATA (IO_TYPECAST_UDWORD 0xb0000050) +#define R_PAR1_CTRL_DATA__peri_int__BITNR 24 +#define R_PAR1_CTRL_DATA__peri_int__WIDTH 1 +#define R_PAR1_CTRL_DATA__peri_int__ack 1 +#define R_PAR1_CTRL_DATA__peri_int__nop 0 +#define R_PAR1_CTRL_DATA__oe__BITNR 20 +#define R_PAR1_CTRL_DATA__oe__WIDTH 1 +#define R_PAR1_CTRL_DATA__oe__enable 1 +#define R_PAR1_CTRL_DATA__oe__disable 0 +#define R_PAR1_CTRL_DATA__seli__BITNR 19 +#define R_PAR1_CTRL_DATA__seli__WIDTH 1 +#define R_PAR1_CTRL_DATA__seli__active 1 +#define R_PAR1_CTRL_DATA__seli__inactive 0 +#define R_PAR1_CTRL_DATA__autofd__BITNR 18 +#define R_PAR1_CTRL_DATA__autofd__WIDTH 1 +#define R_PAR1_CTRL_DATA__autofd__active 1 +#define R_PAR1_CTRL_DATA__autofd__inactive 0 +#define R_PAR1_CTRL_DATA__strb__BITNR 17 +#define R_PAR1_CTRL_DATA__strb__WIDTH 1 +#define R_PAR1_CTRL_DATA__strb__active 1 +#define R_PAR1_CTRL_DATA__strb__inactive 0 +#define R_PAR1_CTRL_DATA__init__BITNR 16 +#define R_PAR1_CTRL_DATA__init__WIDTH 1 +#define R_PAR1_CTRL_DATA__init__active 1 +#define R_PAR1_CTRL_DATA__init__inactive 0 +#define R_PAR1_CTRL_DATA__ecp_cmd__BITNR 8 +#define R_PAR1_CTRL_DATA__ecp_cmd__WIDTH 1 +#define R_PAR1_CTRL_DATA__ecp_cmd__command 1 +#define R_PAR1_CTRL_DATA__ecp_cmd__data 0 +#define R_PAR1_CTRL_DATA__data__BITNR 0 +#define R_PAR1_CTRL_DATA__data__WIDTH 8 + +#define R_PAR1_CTRL (IO_TYPECAST_BYTE 0xb0000052) +#define R_PAR1_CTRL__ctrl__BITNR 0 +#define R_PAR1_CTRL__ctrl__WIDTH 5 + +#define R_PAR1_STATUS_DATA (IO_TYPECAST_RO_UDWORD 0xb0000050) +#define R_PAR1_STATUS_DATA__mode__BITNR 29 +#define R_PAR1_STATUS_DATA__mode__WIDTH 3 +#define R_PAR1_STATUS_DATA__mode__manual 0 +#define R_PAR1_STATUS_DATA__mode__centronics 1 +#define R_PAR1_STATUS_DATA__mode__fastbyte 2 +#define R_PAR1_STATUS_DATA__mode__nibble 3 +#define R_PAR1_STATUS_DATA__mode__byte 4 +#define R_PAR1_STATUS_DATA__mode__ecp_fwd 5 +#define R_PAR1_STATUS_DATA__mode__ecp_rev 6 +#define R_PAR1_STATUS_DATA__mode__off 7 +#define R_PAR1_STATUS_DATA__perr__BITNR 28 +#define R_PAR1_STATUS_DATA__perr__WIDTH 1 +#define R_PAR1_STATUS_DATA__perr__active 1 +#define R_PAR1_STATUS_DATA__perr__inactive 0 +#define R_PAR1_STATUS_DATA__ack__BITNR 27 +#define R_PAR1_STATUS_DATA__ack__WIDTH 1 +#define R_PAR1_STATUS_DATA__ack__active 0 +#define R_PAR1_STATUS_DATA__ack__inactive 1 +#define R_PAR1_STATUS_DATA__busy__BITNR 26 +#define R_PAR1_STATUS_DATA__busy__WIDTH 1 +#define R_PAR1_STATUS_DATA__busy__active 1 +#define R_PAR1_STATUS_DATA__busy__inactive 0 +#define R_PAR1_STATUS_DATA__fault__BITNR 25 +#define R_PAR1_STATUS_DATA__fault__WIDTH 1 +#define R_PAR1_STATUS_DATA__fault__active 0 +#define R_PAR1_STATUS_DATA__fault__inactive 1 +#define R_PAR1_STATUS_DATA__sel__BITNR 24 +#define R_PAR1_STATUS_DATA__sel__WIDTH 1 +#define R_PAR1_STATUS_DATA__sel__active 1 +#define R_PAR1_STATUS_DATA__sel__inactive 0 +#define R_PAR1_STATUS_DATA__tr_rdy__BITNR 17 +#define R_PAR1_STATUS_DATA__tr_rdy__WIDTH 1 +#define R_PAR1_STATUS_DATA__tr_rdy__ready 1 +#define R_PAR1_STATUS_DATA__tr_rdy__busy 0 +#define R_PAR1_STATUS_DATA__dav__BITNR 16 +#define R_PAR1_STATUS_DATA__dav__WIDTH 1 +#define R_PAR1_STATUS_DATA__dav__data 1 +#define R_PAR1_STATUS_DATA__dav__nodata 0 +#define R_PAR1_STATUS_DATA__ecp_cmd__BITNR 8 +#define R_PAR1_STATUS_DATA__ecp_cmd__WIDTH 1 +#define R_PAR1_STATUS_DATA__ecp_cmd__command 1 +#define R_PAR1_STATUS_DATA__ecp_cmd__data 0 +#define R_PAR1_STATUS_DATA__data__BITNR 0 +#define R_PAR1_STATUS_DATA__data__WIDTH 8 + +#define R_PAR1_CONFIG (IO_TYPECAST_UDWORD 0xb0000054) +#define R_PAR1_CONFIG__ioe__BITNR 25 +#define R_PAR1_CONFIG__ioe__WIDTH 1 +#define R_PAR1_CONFIG__ioe__inv 1 +#define R_PAR1_CONFIG__ioe__noninv 0 +#define R_PAR1_CONFIG__iseli__BITNR 24 +#define R_PAR1_CONFIG__iseli__WIDTH 1 +#define R_PAR1_CONFIG__iseli__inv 1 +#define R_PAR1_CONFIG__iseli__noninv 0 +#define R_PAR1_CONFIG__iautofd__BITNR 23 +#define R_PAR1_CONFIG__iautofd__WIDTH 1 +#define R_PAR1_CONFIG__iautofd__inv 1 +#define R_PAR1_CONFIG__iautofd__noninv 0 +#define R_PAR1_CONFIG__istrb__BITNR 22 +#define R_PAR1_CONFIG__istrb__WIDTH 1 +#define R_PAR1_CONFIG__istrb__inv 1 +#define R_PAR1_CONFIG__istrb__noninv 0 +#define R_PAR1_CONFIG__iinit__BITNR 21 +#define R_PAR1_CONFIG__iinit__WIDTH 1 +#define R_PAR1_CONFIG__iinit__inv 1 +#define R_PAR1_CONFIG__iinit__noninv 0 +#define R_PAR1_CONFIG__iperr__BITNR 20 +#define R_PAR1_CONFIG__iperr__WIDTH 1 +#define R_PAR1_CONFIG__iperr__inv 1 +#define R_PAR1_CONFIG__iperr__noninv 0 +#define R_PAR1_CONFIG__iack__BITNR 19 +#define R_PAR1_CONFIG__iack__WIDTH 1 +#define R_PAR1_CONFIG__iack__inv 1 +#define R_PAR1_CONFIG__iack__noninv 0 +#define R_PAR1_CONFIG__ibusy__BITNR 18 +#define R_PAR1_CONFIG__ibusy__WIDTH 1 +#define R_PAR1_CONFIG__ibusy__inv 1 +#define R_PAR1_CONFIG__ibusy__noninv 0 +#define R_PAR1_CONFIG__ifault__BITNR 17 +#define R_PAR1_CONFIG__ifault__WIDTH 1 +#define R_PAR1_CONFIG__ifault__inv 1 +#define R_PAR1_CONFIG__ifault__noninv 0 +#define R_PAR1_CONFIG__isel__BITNR 16 +#define R_PAR1_CONFIG__isel__WIDTH 1 +#define R_PAR1_CONFIG__isel__inv 1 +#define R_PAR1_CONFIG__isel__noninv 0 +#define R_PAR1_CONFIG__ext_mode__BITNR 11 +#define R_PAR1_CONFIG__ext_mode__WIDTH 1 +#define R_PAR1_CONFIG__ext_mode__enable 1 +#define R_PAR1_CONFIG__ext_mode__disable 0 +#define R_PAR1_CONFIG__dma__BITNR 9 +#define R_PAR1_CONFIG__dma__WIDTH 1 +#define R_PAR1_CONFIG__dma__enable 1 +#define R_PAR1_CONFIG__dma__disable 0 +#define R_PAR1_CONFIG__rle_in__BITNR 8 +#define R_PAR1_CONFIG__rle_in__WIDTH 1 +#define R_PAR1_CONFIG__rle_in__enable 1 +#define R_PAR1_CONFIG__rle_in__disable 0 +#define R_PAR1_CONFIG__rle_out__BITNR 7 +#define R_PAR1_CONFIG__rle_out__WIDTH 1 +#define R_PAR1_CONFIG__rle_out__enable 1 +#define R_PAR1_CONFIG__rle_out__disable 0 +#define R_PAR1_CONFIG__enable__BITNR 6 +#define R_PAR1_CONFIG__enable__WIDTH 1 +#define R_PAR1_CONFIG__enable__on 1 +#define R_PAR1_CONFIG__enable__reset 0 +#define R_PAR1_CONFIG__force__BITNR 5 +#define R_PAR1_CONFIG__force__WIDTH 1 +#define R_PAR1_CONFIG__force__on 1 +#define R_PAR1_CONFIG__force__off 0 +#define R_PAR1_CONFIG__ign_ack__BITNR 4 +#define R_PAR1_CONFIG__ign_ack__WIDTH 1 +#define R_PAR1_CONFIG__ign_ack__ignore 1 +#define R_PAR1_CONFIG__ign_ack__wait 0 +#define R_PAR1_CONFIG__oe_ack__BITNR 3 +#define R_PAR1_CONFIG__oe_ack__WIDTH 1 +#define R_PAR1_CONFIG__oe_ack__wait_oe 1 +#define R_PAR1_CONFIG__oe_ack__dont_wait 0 +#define R_PAR1_CONFIG__oe_ack__epp_addr 1 +#define R_PAR1_CONFIG__oe_ack__epp_data 0 +#define R_PAR1_CONFIG__epp_addr_data__BITNR 3 +#define R_PAR1_CONFIG__epp_addr_data__WIDTH 1 +#define R_PAR1_CONFIG__epp_addr_data__wait_oe 1 +#define R_PAR1_CONFIG__epp_addr_data__dont_wait 0 +#define R_PAR1_CONFIG__epp_addr_data__epp_addr 1 +#define R_PAR1_CONFIG__epp_addr_data__epp_data 0 +#define R_PAR1_CONFIG__mode__BITNR 0 +#define R_PAR1_CONFIG__mode__WIDTH 3 +#define R_PAR1_CONFIG__mode__manual 0 +#define R_PAR1_CONFIG__mode__centronics 1 +#define R_PAR1_CONFIG__mode__fastbyte 2 +#define R_PAR1_CONFIG__mode__nibble 3 +#define R_PAR1_CONFIG__mode__byte 4 +#define R_PAR1_CONFIG__mode__ecp_fwd 5 +#define R_PAR1_CONFIG__mode__ecp_rev 6 +#define R_PAR1_CONFIG__mode__off 7 + +#define R_PAR1_DELAY (IO_TYPECAST_UDWORD 0xb0000058) +#define R_PAR1_DELAY__fine_hold__BITNR 21 +#define R_PAR1_DELAY__fine_hold__WIDTH 3 +#define R_PAR1_DELAY__hold__BITNR 16 +#define R_PAR1_DELAY__hold__WIDTH 5 +#define R_PAR1_DELAY__fine_strb__BITNR 13 +#define R_PAR1_DELAY__fine_strb__WIDTH 3 +#define R_PAR1_DELAY__strobe__BITNR 8 +#define R_PAR1_DELAY__strobe__WIDTH 5 +#define R_PAR1_DELAY__fine_setup__BITNR 5 +#define R_PAR1_DELAY__fine_setup__WIDTH 3 +#define R_PAR1_DELAY__setup__BITNR 0 +#define R_PAR1_DELAY__setup__WIDTH 5 + +/* +!* ATA interface registers +!*/ + +#define R_ATA_CTRL_DATA (IO_TYPECAST_UDWORD 0xb0000040) +#define R_ATA_CTRL_DATA__sel__BITNR 30 +#define R_ATA_CTRL_DATA__sel__WIDTH 2 +#define R_ATA_CTRL_DATA__cs1__BITNR 29 +#define R_ATA_CTRL_DATA__cs1__WIDTH 1 +#define R_ATA_CTRL_DATA__cs1__active 1 +#define R_ATA_CTRL_DATA__cs1__inactive 0 +#define R_ATA_CTRL_DATA__cs0__BITNR 28 +#define R_ATA_CTRL_DATA__cs0__WIDTH 1 +#define R_ATA_CTRL_DATA__cs0__active 1 +#define R_ATA_CTRL_DATA__cs0__inactive 0 +#define R_ATA_CTRL_DATA__addr__BITNR 25 +#define R_ATA_CTRL_DATA__addr__WIDTH 3 +#define R_ATA_CTRL_DATA__rw__BITNR 24 +#define R_ATA_CTRL_DATA__rw__WIDTH 1 +#define R_ATA_CTRL_DATA__rw__read 1 +#define R_ATA_CTRL_DATA__rw__write 0 +#define R_ATA_CTRL_DATA__src_dst__BITNR 23 +#define R_ATA_CTRL_DATA__src_dst__WIDTH 1 +#define R_ATA_CTRL_DATA__src_dst__dma 1 +#define R_ATA_CTRL_DATA__src_dst__register 0 +#define R_ATA_CTRL_DATA__handsh__BITNR 22 +#define R_ATA_CTRL_DATA__handsh__WIDTH 1 +#define R_ATA_CTRL_DATA__handsh__dma 1 +#define R_ATA_CTRL_DATA__handsh__pio 0 +#define R_ATA_CTRL_DATA__multi__BITNR 21 +#define R_ATA_CTRL_DATA__multi__WIDTH 1 +#define R_ATA_CTRL_DATA__multi__on 1 +#define R_ATA_CTRL_DATA__multi__off 0 +#define R_ATA_CTRL_DATA__dma_size__BITNR 20 +#define R_ATA_CTRL_DATA__dma_size__WIDTH 1 +#define R_ATA_CTRL_DATA__dma_size__byte 1 +#define R_ATA_CTRL_DATA__dma_size__word 0 +#define R_ATA_CTRL_DATA__data__BITNR 0 +#define R_ATA_CTRL_DATA__data__WIDTH 16 + +#define R_ATA_STATUS_DATA (IO_TYPECAST_RO_UDWORD 0xb0000040) +#define R_ATA_STATUS_DATA__busy__BITNR 18 +#define R_ATA_STATUS_DATA__busy__WIDTH 1 +#define R_ATA_STATUS_DATA__busy__yes 1 +#define R_ATA_STATUS_DATA__busy__no 0 +#define R_ATA_STATUS_DATA__tr_rdy__BITNR 17 +#define R_ATA_STATUS_DATA__tr_rdy__WIDTH 1 +#define R_ATA_STATUS_DATA__tr_rdy__ready 1 +#define R_ATA_STATUS_DATA__tr_rdy__busy 0 +#define R_ATA_STATUS_DATA__dav__BITNR 16 +#define R_ATA_STATUS_DATA__dav__WIDTH 1 +#define R_ATA_STATUS_DATA__dav__data 1 +#define R_ATA_STATUS_DATA__dav__nodata 0 +#define R_ATA_STATUS_DATA__data__BITNR 0 +#define R_ATA_STATUS_DATA__data__WIDTH 16 + +#define R_ATA_CONFIG (IO_TYPECAST_UDWORD 0xb0000044) +#define R_ATA_CONFIG__enable__BITNR 25 +#define R_ATA_CONFIG__enable__WIDTH 1 +#define R_ATA_CONFIG__enable__on 1 +#define R_ATA_CONFIG__enable__off 0 +#define R_ATA_CONFIG__dma_strobe__BITNR 20 +#define R_ATA_CONFIG__dma_strobe__WIDTH 5 +#define R_ATA_CONFIG__dma_hold__BITNR 15 +#define R_ATA_CONFIG__dma_hold__WIDTH 5 +#define R_ATA_CONFIG__pio_setup__BITNR 10 +#define R_ATA_CONFIG__pio_setup__WIDTH 5 +#define R_ATA_CONFIG__pio_strobe__BITNR 5 +#define R_ATA_CONFIG__pio_strobe__WIDTH 5 +#define R_ATA_CONFIG__pio_hold__BITNR 0 +#define R_ATA_CONFIG__pio_hold__WIDTH 5 + +#define R_ATA_TRANSFER_CNT (IO_TYPECAST_UDWORD 0xb0000048) +#define R_ATA_TRANSFER_CNT__count__BITNR 0 +#define R_ATA_TRANSFER_CNT__count__WIDTH 17 + +/* +!* SCSI registers +!*/ + +#define R_SCSI0_CTRL (IO_TYPECAST_UDWORD 0xb0000044) +#define R_SCSI0_CTRL__id_type__BITNR 31 +#define R_SCSI0_CTRL__id_type__WIDTH 1 +#define R_SCSI0_CTRL__id_type__software 1 +#define R_SCSI0_CTRL__id_type__hardware 0 +#define R_SCSI0_CTRL__sel_timeout__BITNR 24 +#define R_SCSI0_CTRL__sel_timeout__WIDTH 7 +#define R_SCSI0_CTRL__synch_per__BITNR 16 +#define R_SCSI0_CTRL__synch_per__WIDTH 8 +#define R_SCSI0_CTRL__rst__BITNR 15 +#define R_SCSI0_CTRL__rst__WIDTH 1 +#define R_SCSI0_CTRL__rst__yes 1 +#define R_SCSI0_CTRL__rst__no 0 +#define R_SCSI0_CTRL__atn__BITNR 14 +#define R_SCSI0_CTRL__atn__WIDTH 1 +#define R_SCSI0_CTRL__atn__yes 1 +#define R_SCSI0_CTRL__atn__no 0 +#define R_SCSI0_CTRL__my_id__BITNR 9 +#define R_SCSI0_CTRL__my_id__WIDTH 4 +#define R_SCSI0_CTRL__target_id__BITNR 4 +#define R_SCSI0_CTRL__target_id__WIDTH 4 +#define R_SCSI0_CTRL__fast_20__BITNR 3 +#define R_SCSI0_CTRL__fast_20__WIDTH 1 +#define R_SCSI0_CTRL__fast_20__yes 1 +#define R_SCSI0_CTRL__fast_20__no 0 +#define R_SCSI0_CTRL__bus_width__BITNR 2 +#define R_SCSI0_CTRL__bus_width__WIDTH 1 +#define R_SCSI0_CTRL__bus_width__wide 1 +#define R_SCSI0_CTRL__bus_width__narrow 0 +#define R_SCSI0_CTRL__synch__BITNR 1 +#define R_SCSI0_CTRL__synch__WIDTH 1 +#define R_SCSI0_CTRL__synch__synch 1 +#define R_SCSI0_CTRL__synch__asynch 0 +#define R_SCSI0_CTRL__enable__BITNR 0 +#define R_SCSI0_CTRL__enable__WIDTH 1 +#define R_SCSI0_CTRL__enable__on 1 +#define R_SCSI0_CTRL__enable__off 0 + +#define R_SCSI0_CMD_DATA (IO_TYPECAST_UDWORD 0xb0000040) +#define R_SCSI0_CMD_DATA__parity_in__BITNR 26 +#define R_SCSI0_CMD_DATA__parity_in__WIDTH 1 +#define R_SCSI0_CMD_DATA__parity_in__on 0 +#define R_SCSI0_CMD_DATA__parity_in__off 1 +#define R_SCSI0_CMD_DATA__skip__BITNR 25 +#define R_SCSI0_CMD_DATA__skip__WIDTH 1 +#define R_SCSI0_CMD_DATA__skip__on 1 +#define R_SCSI0_CMD_DATA__skip__off 0 +#define R_SCSI0_CMD_DATA__clr_status__BITNR 24 +#define R_SCSI0_CMD_DATA__clr_status__WIDTH 1 +#define R_SCSI0_CMD_DATA__clr_status__yes 1 +#define R_SCSI0_CMD_DATA__clr_status__nop 0 +#define R_SCSI0_CMD_DATA__asynch_setup__BITNR 20 +#define R_SCSI0_CMD_DATA__asynch_setup__WIDTH 4 +#define R_SCSI0_CMD_DATA__command__BITNR 16 +#define R_SCSI0_CMD_DATA__command__WIDTH 4 +#define R_SCSI0_CMD_DATA__command__full_din_1 0 +#define R_SCSI0_CMD_DATA__command__full_dout_1 1 +#define R_SCSI0_CMD_DATA__command__full_stat_1 2 +#define R_SCSI0_CMD_DATA__command__resel_din 3 +#define R_SCSI0_CMD_DATA__command__resel_dout 4 +#define R_SCSI0_CMD_DATA__command__resel_stat 5 +#define R_SCSI0_CMD_DATA__command__arb_only 6 +#define R_SCSI0_CMD_DATA__command__full_din_3 8 +#define R_SCSI0_CMD_DATA__command__full_dout_3 9 +#define R_SCSI0_CMD_DATA__command__full_stat_3 10 +#define R_SCSI0_CMD_DATA__command__man_data_in 11 +#define R_SCSI0_CMD_DATA__command__man_data_out 12 +#define R_SCSI0_CMD_DATA__command__man_rat 13 +#define R_SCSI0_CMD_DATA__data_out__BITNR 0 +#define R_SCSI0_CMD_DATA__data_out__WIDTH 16 + +#define R_SCSI0_DATA (IO_TYPECAST_UWORD 0xb0000040) +#define R_SCSI0_DATA__data_out__BITNR 0 +#define R_SCSI0_DATA__data_out__WIDTH 16 + +#define R_SCSI0_CMD (IO_TYPECAST_BYTE 0xb0000042) +#define R_SCSI0_CMD__asynch_setup__BITNR 4 +#define R_SCSI0_CMD__asynch_setup__WIDTH 4 +#define R_SCSI0_CMD__command__BITNR 0 +#define R_SCSI0_CMD__command__WIDTH 4 +#define R_SCSI0_CMD__command__full_din_1 0 +#define R_SCSI0_CMD__command__full_dout_1 1 +#define R_SCSI0_CMD__command__full_stat_1 2 +#define R_SCSI0_CMD__command__resel_din 3 +#define R_SCSI0_CMD__command__resel_dout 4 +#define R_SCSI0_CMD__command__resel_stat 5 +#define R_SCSI0_CMD__command__arb_only 6 +#define R_SCSI0_CMD__command__full_din_3 8 +#define R_SCSI0_CMD__command__full_dout_3 9 +#define R_SCSI0_CMD__command__full_stat_3 10 +#define R_SCSI0_CMD__command__man_data_in 11 +#define R_SCSI0_CMD__command__man_data_out 12 +#define R_SCSI0_CMD__command__man_rat 13 + +#define R_SCSI0_STATUS_CTRL (IO_TYPECAST_BYTE 0xb0000043) +#define R_SCSI0_STATUS_CTRL__parity_in__BITNR 2 +#define R_SCSI0_STATUS_CTRL__parity_in__WIDTH 1 +#define R_SCSI0_STATUS_CTRL__parity_in__on 0 +#define R_SCSI0_STATUS_CTRL__parity_in__off 1 +#define R_SCSI0_STATUS_CTRL__skip__BITNR 1 +#define R_SCSI0_STATUS_CTRL__skip__WIDTH 1 +#define R_SCSI0_STATUS_CTRL__skip__on 1 +#define R_SCSI0_STATUS_CTRL__skip__off 0 +#define R_SCSI0_STATUS_CTRL__clr_status__BITNR 0 +#define R_SCSI0_STATUS_CTRL__clr_status__WIDTH 1 +#define R_SCSI0_STATUS_CTRL__clr_status__yes 1 +#define R_SCSI0_STATUS_CTRL__clr_status__nop 0 + +#define R_SCSI0_STATUS (IO_TYPECAST_RO_UDWORD 0xb0000048) +#define R_SCSI0_STATUS__tst_arb_won__BITNR 23 +#define R_SCSI0_STATUS__tst_arb_won__WIDTH 1 +#define R_SCSI0_STATUS__tst_resel__BITNR 22 +#define R_SCSI0_STATUS__tst_resel__WIDTH 1 +#define R_SCSI0_STATUS__parity_error__BITNR 21 +#define R_SCSI0_STATUS__parity_error__WIDTH 1 +#define R_SCSI0_STATUS__bus_reset__BITNR 20 +#define R_SCSI0_STATUS__bus_reset__WIDTH 1 +#define R_SCSI0_STATUS__bus_reset__yes 1 +#define R_SCSI0_STATUS__bus_reset__no 0 +#define R_SCSI0_STATUS__resel_target__BITNR 15 +#define R_SCSI0_STATUS__resel_target__WIDTH 4 +#define R_SCSI0_STATUS__resel__BITNR 14 +#define R_SCSI0_STATUS__resel__WIDTH 1 +#define R_SCSI0_STATUS__resel__yes 1 +#define R_SCSI0_STATUS__resel__no 0 +#define R_SCSI0_STATUS__curr_phase__BITNR 11 +#define R_SCSI0_STATUS__curr_phase__WIDTH 3 +#define R_SCSI0_STATUS__curr_phase__ph_undef 0 +#define R_SCSI0_STATUS__curr_phase__ph_msg_in 7 +#define R_SCSI0_STATUS__curr_phase__ph_msg_out 6 +#define R_SCSI0_STATUS__curr_phase__ph_status 3 +#define R_SCSI0_STATUS__curr_phase__ph_command 2 +#define R_SCSI0_STATUS__curr_phase__ph_data_in 5 +#define R_SCSI0_STATUS__curr_phase__ph_data_out 4 +#define R_SCSI0_STATUS__curr_phase__ph_resel 1 +#define R_SCSI0_STATUS__last_seq_step__BITNR 6 +#define R_SCSI0_STATUS__last_seq_step__WIDTH 5 +#define R_SCSI0_STATUS__last_seq_step__st_bus_free 24 +#define R_SCSI0_STATUS__last_seq_step__st_arbitrate 8 +#define R_SCSI0_STATUS__last_seq_step__st_resel_req 29 +#define R_SCSI0_STATUS__last_seq_step__st_msg_1 2 +#define R_SCSI0_STATUS__last_seq_step__st_manual 28 +#define R_SCSI0_STATUS__last_seq_step__st_transf_cmd 30 +#define R_SCSI0_STATUS__last_seq_step__st_msg_2 6 +#define R_SCSI0_STATUS__last_seq_step__st_msg_3 22 +#define R_SCSI0_STATUS__last_seq_step__st_answer 3 +#define R_SCSI0_STATUS__last_seq_step__st_synch_din_perr 1 +#define R_SCSI0_STATUS__last_seq_step__st_transfer_done 15 +#define R_SCSI0_STATUS__last_seq_step__st_synch_dout 0 +#define R_SCSI0_STATUS__last_seq_step__st_asynch_dout 25 +#define R_SCSI0_STATUS__last_seq_step__st_synch_din 13 +#define R_SCSI0_STATUS__last_seq_step__st_asynch_din 9 +#define R_SCSI0_STATUS__last_seq_step__st_synch_dout_ack 4 +#define R_SCSI0_STATUS__last_seq_step__st_synch_din_ack 12 +#define R_SCSI0_STATUS__last_seq_step__st_synch_din_ack_perr 5 +#define R_SCSI0_STATUS__last_seq_step__st_asynch_dout_end 11 +#define R_SCSI0_STATUS__last_seq_step__st_iwr 27 +#define R_SCSI0_STATUS__last_seq_step__st_wait_free_disc 21 +#define R_SCSI0_STATUS__last_seq_step__st_sdp_disc 7 +#define R_SCSI0_STATUS__last_seq_step__st_cc 31 +#define R_SCSI0_STATUS__last_seq_step__st_iwr_good 14 +#define R_SCSI0_STATUS__last_seq_step__st_iwr_cc 23 +#define R_SCSI0_STATUS__last_seq_step__st_wait_free_iwr_cc 17 +#define R_SCSI0_STATUS__last_seq_step__st_wait_free_cc 20 +#define R_SCSI0_STATUS__last_seq_step__st_wait_free_sdp_disc 16 +#define R_SCSI0_STATUS__last_seq_step__st_manual_req 10 +#define R_SCSI0_STATUS__last_seq_step__st_manual_din_prot 18 +#define R_SCSI0_STATUS__valid_status__BITNR 5 +#define R_SCSI0_STATUS__valid_status__WIDTH 1 +#define R_SCSI0_STATUS__valid_status__yes 1 +#define R_SCSI0_STATUS__valid_status__no 0 +#define R_SCSI0_STATUS__seq_status__BITNR 0 +#define R_SCSI0_STATUS__seq_status__WIDTH 5 +#define R_SCSI0_STATUS__seq_status__info_seq_complete 0 +#define R_SCSI0_STATUS__seq_status__info_parity_error 1 +#define R_SCSI0_STATUS__seq_status__info_unhandled_msg_in 2 +#define R_SCSI0_STATUS__seq_status__info_unexp_ph_change 3 +#define R_SCSI0_STATUS__seq_status__info_arb_lost 4 +#define R_SCSI0_STATUS__seq_status__info_sel_timeout 5 +#define R_SCSI0_STATUS__seq_status__info_unexp_bf 6 +#define R_SCSI0_STATUS__seq_status__info_illegal_op 7 +#define R_SCSI0_STATUS__seq_status__info_rec_recvd 8 +#define R_SCSI0_STATUS__seq_status__info_reselected 9 +#define R_SCSI0_STATUS__seq_status__info_unhandled_status 10 +#define R_SCSI0_STATUS__seq_status__info_bus_reset 11 +#define R_SCSI0_STATUS__seq_status__info_illegal_bf 12 +#define R_SCSI0_STATUS__seq_status__info_bus_free 13 + +#define R_SCSI0_DATA_IN (IO_TYPECAST_RO_UWORD 0xb0000040) +#define R_SCSI0_DATA_IN__data_in__BITNR 0 +#define R_SCSI0_DATA_IN__data_in__WIDTH 16 + +#define R_SCSI1_CTRL (IO_TYPECAST_UDWORD 0xb0000054) +#define R_SCSI1_CTRL__id_type__BITNR 31 +#define R_SCSI1_CTRL__id_type__WIDTH 1 +#define R_SCSI1_CTRL__id_type__software 1 +#define R_SCSI1_CTRL__id_type__hardware 0 +#define R_SCSI1_CTRL__sel_timeout__BITNR 24 +#define R_SCSI1_CTRL__sel_timeout__WIDTH 7 +#define R_SCSI1_CTRL__synch_per__BITNR 16 +#define R_SCSI1_CTRL__synch_per__WIDTH 8 +#define R_SCSI1_CTRL__rst__BITNR 15 +#define R_SCSI1_CTRL__rst__WIDTH 1 +#define R_SCSI1_CTRL__rst__yes 1 +#define R_SCSI1_CTRL__rst__no 0 +#define R_SCSI1_CTRL__atn__BITNR 14 +#define R_SCSI1_CTRL__atn__WIDTH 1 +#define R_SCSI1_CTRL__atn__yes 1 +#define R_SCSI1_CTRL__atn__no 0 +#define R_SCSI1_CTRL__my_id__BITNR 9 +#define R_SCSI1_CTRL__my_id__WIDTH 4 +#define R_SCSI1_CTRL__target_id__BITNR 4 +#define R_SCSI1_CTRL__target_id__WIDTH 4 +#define R_SCSI1_CTRL__fast_20__BITNR 3 +#define R_SCSI1_CTRL__fast_20__WIDTH 1 +#define R_SCSI1_CTRL__fast_20__yes 1 +#define R_SCSI1_CTRL__fast_20__no 0 +#define R_SCSI1_CTRL__bus_width__BITNR 2 +#define R_SCSI1_CTRL__bus_width__WIDTH 1 +#define R_SCSI1_CTRL__bus_width__wide 1 +#define R_SCSI1_CTRL__bus_width__narrow 0 +#define R_SCSI1_CTRL__synch__BITNR 1 +#define R_SCSI1_CTRL__synch__WIDTH 1 +#define R_SCSI1_CTRL__synch__synch 1 +#define R_SCSI1_CTRL__synch__asynch 0 +#define R_SCSI1_CTRL__enable__BITNR 0 +#define R_SCSI1_CTRL__enable__WIDTH 1 +#define R_SCSI1_CTRL__enable__on 1 +#define R_SCSI1_CTRL__enable__off 0 + +#define R_SCSI1_CMD_DATA (IO_TYPECAST_UDWORD 0xb0000050) +#define R_SCSI1_CMD_DATA__parity_in__BITNR 26 +#define R_SCSI1_CMD_DATA__parity_in__WIDTH 1 +#define R_SCSI1_CMD_DATA__parity_in__on 0 +#define R_SCSI1_CMD_DATA__parity_in__off 1 +#define R_SCSI1_CMD_DATA__skip__BITNR 25 +#define R_SCSI1_CMD_DATA__skip__WIDTH 1 +#define R_SCSI1_CMD_DATA__skip__on 1 +#define R_SCSI1_CMD_DATA__skip__off 0 +#define R_SCSI1_CMD_DATA__clr_status__BITNR 24 +#define R_SCSI1_CMD_DATA__clr_status__WIDTH 1 +#define R_SCSI1_CMD_DATA__clr_status__yes 1 +#define R_SCSI1_CMD_DATA__clr_status__nop 0 +#define R_SCSI1_CMD_DATA__asynch_setup__BITNR 20 +#define R_SCSI1_CMD_DATA__asynch_setup__WIDTH 4 +#define R_SCSI1_CMD_DATA__command__BITNR 16 +#define R_SCSI1_CMD_DATA__command__WIDTH 4 +#define R_SCSI1_CMD_DATA__command__full_din_1 0 +#define R_SCSI1_CMD_DATA__command__full_dout_1 1 +#define R_SCSI1_CMD_DATA__command__full_stat_1 2 +#define R_SCSI1_CMD_DATA__command__resel_din 3 +#define R_SCSI1_CMD_DATA__command__resel_dout 4 +#define R_SCSI1_CMD_DATA__command__resel_stat 5 +#define R_SCSI1_CMD_DATA__command__arb_only 6 +#define R_SCSI1_CMD_DATA__command__full_din_3 8 +#define R_SCSI1_CMD_DATA__command__full_dout_3 9 +#define R_SCSI1_CMD_DATA__command__full_stat_3 10 +#define R_SCSI1_CMD_DATA__command__man_data_in 11 +#define R_SCSI1_CMD_DATA__command__man_data_out 12 +#define R_SCSI1_CMD_DATA__command__man_rat 13 +#define R_SCSI1_CMD_DATA__data_out__BITNR 0 +#define R_SCSI1_CMD_DATA__data_out__WIDTH 16 + +#define R_SCSI1_DATA (IO_TYPECAST_UWORD 0xb0000050) +#define R_SCSI1_DATA__data_out__BITNR 0 +#define R_SCSI1_DATA__data_out__WIDTH 16 + +#define R_SCSI1_CMD (IO_TYPECAST_BYTE 0xb0000052) +#define R_SCSI1_CMD__asynch_setup__BITNR 4 +#define R_SCSI1_CMD__asynch_setup__WIDTH 4 +#define R_SCSI1_CMD__command__BITNR 0 +#define R_SCSI1_CMD__command__WIDTH 4 +#define R_SCSI1_CMD__command__full_din_1 0 +#define R_SCSI1_CMD__command__full_dout_1 1 +#define R_SCSI1_CMD__command__full_stat_1 2 +#define R_SCSI1_CMD__command__resel_din 3 +#define R_SCSI1_CMD__command__resel_dout 4 +#define R_SCSI1_CMD__command__resel_stat 5 +#define R_SCSI1_CMD__command__arb_only 6 +#define R_SCSI1_CMD__command__full_din_3 8 +#define R_SCSI1_CMD__command__full_dout_3 9 +#define R_SCSI1_CMD__command__full_stat_3 10 +#define R_SCSI1_CMD__command__man_data_in 11 +#define R_SCSI1_CMD__command__man_data_out 12 +#define R_SCSI1_CMD__command__man_rat 13 + +#define R_SCSI1_STATUS_CTRL (IO_TYPECAST_BYTE 0xb0000053) +#define R_SCSI1_STATUS_CTRL__parity_in__BITNR 2 +#define R_SCSI1_STATUS_CTRL__parity_in__WIDTH 1 +#define R_SCSI1_STATUS_CTRL__parity_in__on 0 +#define R_SCSI1_STATUS_CTRL__parity_in__off 1 +#define R_SCSI1_STATUS_CTRL__skip__BITNR 1 +#define R_SCSI1_STATUS_CTRL__skip__WIDTH 1 +#define R_SCSI1_STATUS_CTRL__skip__on 1 +#define R_SCSI1_STATUS_CTRL__skip__off 0 +#define R_SCSI1_STATUS_CTRL__clr_status__BITNR 0 +#define R_SCSI1_STATUS_CTRL__clr_status__WIDTH 1 +#define R_SCSI1_STATUS_CTRL__clr_status__yes 1 +#define R_SCSI1_STATUS_CTRL__clr_status__nop 0 + +#define R_SCSI1_STATUS (IO_TYPECAST_RO_UDWORD 0xb0000058) +#define R_SCSI1_STATUS__tst_arb_won__BITNR 23 +#define R_SCSI1_STATUS__tst_arb_won__WIDTH 1 +#define R_SCSI1_STATUS__tst_resel__BITNR 22 +#define R_SCSI1_STATUS__tst_resel__WIDTH 1 +#define R_SCSI1_STATUS__parity_error__BITNR 21 +#define R_SCSI1_STATUS__parity_error__WIDTH 1 +#define R_SCSI1_STATUS__bus_reset__BITNR 20 +#define R_SCSI1_STATUS__bus_reset__WIDTH 1 +#define R_SCSI1_STATUS__bus_reset__yes 1 +#define R_SCSI1_STATUS__bus_reset__no 0 +#define R_SCSI1_STATUS__resel_target__BITNR 15 +#define R_SCSI1_STATUS__resel_target__WIDTH 4 +#define R_SCSI1_STATUS__resel__BITNR 14 +#define R_SCSI1_STATUS__resel__WIDTH 1 +#define R_SCSI1_STATUS__resel__yes 1 +#define R_SCSI1_STATUS__resel__no 0 +#define R_SCSI1_STATUS__curr_phase__BITNR 11 +#define R_SCSI1_STATUS__curr_phase__WIDTH 3 +#define R_SCSI1_STATUS__curr_phase__ph_undef 0 +#define R_SCSI1_STATUS__curr_phase__ph_msg_in 7 +#define R_SCSI1_STATUS__curr_phase__ph_msg_out 6 +#define R_SCSI1_STATUS__curr_phase__ph_status 3 +#define R_SCSI1_STATUS__curr_phase__ph_command 2 +#define R_SCSI1_STATUS__curr_phase__ph_data_in 5 +#define R_SCSI1_STATUS__curr_phase__ph_data_out 4 +#define R_SCSI1_STATUS__curr_phase__ph_resel 1 +#define R_SCSI1_STATUS__last_seq_step__BITNR 6 +#define R_SCSI1_STATUS__last_seq_step__WIDTH 5 +#define R_SCSI1_STATUS__last_seq_step__st_bus_free 24 +#define R_SCSI1_STATUS__last_seq_step__st_arbitrate 8 +#define R_SCSI1_STATUS__last_seq_step__st_resel_req 29 +#define R_SCSI1_STATUS__last_seq_step__st_msg_1 2 +#define R_SCSI1_STATUS__last_seq_step__st_manual 28 +#define R_SCSI1_STATUS__last_seq_step__st_transf_cmd 30 +#define R_SCSI1_STATUS__last_seq_step__st_msg_2 6 +#define R_SCSI1_STATUS__last_seq_step__st_msg_3 22 +#define R_SCSI1_STATUS__last_seq_step__st_answer 3 +#define R_SCSI1_STATUS__last_seq_step__st_synch_din_perr 1 +#define R_SCSI1_STATUS__last_seq_step__st_transfer_done 15 +#define R_SCSI1_STATUS__last_seq_step__st_synch_dout 0 +#define R_SCSI1_STATUS__last_seq_step__st_asynch_dout 25 +#define R_SCSI1_STATUS__last_seq_step__st_synch_din 13 +#define R_SCSI1_STATUS__last_seq_step__st_asynch_din 9 +#define R_SCSI1_STATUS__last_seq_step__st_synch_dout_ack 4 +#define R_SCSI1_STATUS__last_seq_step__st_synch_din_ack 12 +#define R_SCSI1_STATUS__last_seq_step__st_synch_din_ack_perr 5 +#define R_SCSI1_STATUS__last_seq_step__st_asynch_dout_end 11 +#define R_SCSI1_STATUS__last_seq_step__st_iwr 27 +#define R_SCSI1_STATUS__last_seq_step__st_wait_free_disc 21 +#define R_SCSI1_STATUS__last_seq_step__st_sdp_disc 7 +#define R_SCSI1_STATUS__last_seq_step__st_cc 31 +#define R_SCSI1_STATUS__last_seq_step__st_iwr_good 14 +#define R_SCSI1_STATUS__last_seq_step__st_iwr_cc 23 +#define R_SCSI1_STATUS__last_seq_step__st_wait_free_iwr_cc 17 +#define R_SCSI1_STATUS__last_seq_step__st_wait_free_cc 20 +#define R_SCSI1_STATUS__last_seq_step__st_wait_free_sdp_disc 16 +#define R_SCSI1_STATUS__last_seq_step__st_manual_req 10 +#define R_SCSI1_STATUS__last_seq_step__st_manual_din_prot 18 +#define R_SCSI1_STATUS__valid_status__BITNR 5 +#define R_SCSI1_STATUS__valid_status__WIDTH 1 +#define R_SCSI1_STATUS__valid_status__yes 1 +#define R_SCSI1_STATUS__valid_status__no 0 +#define R_SCSI1_STATUS__seq_status__BITNR 0 +#define R_SCSI1_STATUS__seq_status__WIDTH 5 +#define R_SCSI1_STATUS__seq_status__info_seq_complete 0 +#define R_SCSI1_STATUS__seq_status__info_parity_error 1 +#define R_SCSI1_STATUS__seq_status__info_unhandled_msg_in 2 +#define R_SCSI1_STATUS__seq_status__info_unexp_ph_change 3 +#define R_SCSI1_STATUS__seq_status__info_arb_lost 4 +#define R_SCSI1_STATUS__seq_status__info_sel_timeout 5 +#define R_SCSI1_STATUS__seq_status__info_unexp_bf 6 +#define R_SCSI1_STATUS__seq_status__info_illegal_op 7 +#define R_SCSI1_STATUS__seq_status__info_rec_recvd 8 +#define R_SCSI1_STATUS__seq_status__info_reselected 9 +#define R_SCSI1_STATUS__seq_status__info_unhandled_status 10 +#define R_SCSI1_STATUS__seq_status__info_bus_reset 11 +#define R_SCSI1_STATUS__seq_status__info_illegal_bf 12 +#define R_SCSI1_STATUS__seq_status__info_bus_free 13 + +#define R_SCSI1_DATA_IN (IO_TYPECAST_RO_UWORD 0xb0000050) +#define R_SCSI1_DATA_IN__data_in__BITNR 0 +#define R_SCSI1_DATA_IN__data_in__WIDTH 16 + +/* +!* Interrupt mask and status registers +!*/ + +#define R_IRQ_MASK0_RD (IO_TYPECAST_RO_UDWORD 0xb00000c0) +#define R_IRQ_MASK0_RD__nmi_pin__BITNR 31 +#define R_IRQ_MASK0_RD__nmi_pin__WIDTH 1 +#define R_IRQ_MASK0_RD__nmi_pin__active 1 +#define R_IRQ_MASK0_RD__nmi_pin__inactive 0 +#define R_IRQ_MASK0_RD__watchdog_nmi__BITNR 30 +#define R_IRQ_MASK0_RD__watchdog_nmi__WIDTH 1 +#define R_IRQ_MASK0_RD__watchdog_nmi__active 1 +#define R_IRQ_MASK0_RD__watchdog_nmi__inactive 0 +#define R_IRQ_MASK0_RD__sqe_test_error__BITNR 29 +#define R_IRQ_MASK0_RD__sqe_test_error__WIDTH 1 +#define R_IRQ_MASK0_RD__sqe_test_error__active 1 +#define R_IRQ_MASK0_RD__sqe_test_error__inactive 0 +#define R_IRQ_MASK0_RD__carrier_loss__BITNR 28 +#define R_IRQ_MASK0_RD__carrier_loss__WIDTH 1 +#define R_IRQ_MASK0_RD__carrier_loss__active 1 +#define R_IRQ_MASK0_RD__carrier_loss__inactive 0 +#define R_IRQ_MASK0_RD__deferred__BITNR 27 +#define R_IRQ_MASK0_RD__deferred__WIDTH 1 +#define R_IRQ_MASK0_RD__deferred__active 1 +#define R_IRQ_MASK0_RD__deferred__inactive 0 +#define R_IRQ_MASK0_RD__late_col__BITNR 26 +#define R_IRQ_MASK0_RD__late_col__WIDTH 1 +#define R_IRQ_MASK0_RD__late_col__active 1 +#define R_IRQ_MASK0_RD__late_col__inactive 0 +#define R_IRQ_MASK0_RD__multiple_col__BITNR 25 +#define R_IRQ_MASK0_RD__multiple_col__WIDTH 1 +#define R_IRQ_MASK0_RD__multiple_col__active 1 +#define R_IRQ_MASK0_RD__multiple_col__inactive 0 +#define R_IRQ_MASK0_RD__single_col__BITNR 24 +#define R_IRQ_MASK0_RD__single_col__WIDTH 1 +#define R_IRQ_MASK0_RD__single_col__active 1 +#define R_IRQ_MASK0_RD__single_col__inactive 0 +#define R_IRQ_MASK0_RD__congestion__BITNR 23 +#define R_IRQ_MASK0_RD__congestion__WIDTH 1 +#define R_IRQ_MASK0_RD__congestion__active 1 +#define R_IRQ_MASK0_RD__congestion__inactive 0 +#define R_IRQ_MASK0_RD__oversize__BITNR 22 +#define R_IRQ_MASK0_RD__oversize__WIDTH 1 +#define R_IRQ_MASK0_RD__oversize__active 1 +#define R_IRQ_MASK0_RD__oversize__inactive 0 +#define R_IRQ_MASK0_RD__alignment_error__BITNR 21 +#define R_IRQ_MASK0_RD__alignment_error__WIDTH 1 +#define R_IRQ_MASK0_RD__alignment_error__active 1 +#define R_IRQ_MASK0_RD__alignment_error__inactive 0 +#define R_IRQ_MASK0_RD__crc_error__BITNR 20 +#define R_IRQ_MASK0_RD__crc_error__WIDTH 1 +#define R_IRQ_MASK0_RD__crc_error__active 1 +#define R_IRQ_MASK0_RD__crc_error__inactive 0 +#define R_IRQ_MASK0_RD__overrun__BITNR 19 +#define R_IRQ_MASK0_RD__overrun__WIDTH 1 +#define R_IRQ_MASK0_RD__overrun__active 1 +#define R_IRQ_MASK0_RD__overrun__inactive 0 +#define R_IRQ_MASK0_RD__underrun__BITNR 18 +#define R_IRQ_MASK0_RD__underrun__WIDTH 1 +#define R_IRQ_MASK0_RD__underrun__active 1 +#define R_IRQ_MASK0_RD__underrun__inactive 0 +#define R_IRQ_MASK0_RD__excessive_col__BITNR 17 +#define R_IRQ_MASK0_RD__excessive_col__WIDTH 1 +#define R_IRQ_MASK0_RD__excessive_col__active 1 +#define R_IRQ_MASK0_RD__excessive_col__inactive 0 +#define R_IRQ_MASK0_RD__mdio__BITNR 16 +#define R_IRQ_MASK0_RD__mdio__WIDTH 1 +#define R_IRQ_MASK0_RD__mdio__active 1 +#define R_IRQ_MASK0_RD__mdio__inactive 0 +#define R_IRQ_MASK0_RD__ata_drq3__BITNR 15 +#define R_IRQ_MASK0_RD__ata_drq3__WIDTH 1 +#define R_IRQ_MASK0_RD__ata_drq3__active 1 +#define R_IRQ_MASK0_RD__ata_drq3__inactive 0 +#define R_IRQ_MASK0_RD__ata_drq2__BITNR 14 +#define R_IRQ_MASK0_RD__ata_drq2__WIDTH 1 +#define R_IRQ_MASK0_RD__ata_drq2__active 1 +#define R_IRQ_MASK0_RD__ata_drq2__inactive 0 +#define R_IRQ_MASK0_RD__ata_drq1__BITNR 13 +#define R_IRQ_MASK0_RD__ata_drq1__WIDTH 1 +#define R_IRQ_MASK0_RD__ata_drq1__active 1 +#define R_IRQ_MASK0_RD__ata_drq1__inactive 0 +#define R_IRQ_MASK0_RD__ata_drq0__BITNR 12 +#define R_IRQ_MASK0_RD__ata_drq0__WIDTH 1 +#define R_IRQ_MASK0_RD__ata_drq0__active 1 +#define R_IRQ_MASK0_RD__ata_drq0__inactive 0 +#define R_IRQ_MASK0_RD__par0_ecp_cmd__BITNR 11 +#define R_IRQ_MASK0_RD__par0_ecp_cmd__WIDTH 1 +#define R_IRQ_MASK0_RD__par0_ecp_cmd__active 1 +#define R_IRQ_MASK0_RD__par0_ecp_cmd__inactive 0 +#define R_IRQ_MASK0_RD__ata_irq3__BITNR 11 +#define R_IRQ_MASK0_RD__ata_irq3__WIDTH 1 +#define R_IRQ_MASK0_RD__ata_irq3__active 1 +#define R_IRQ_MASK0_RD__ata_irq3__inactive 0 +#define R_IRQ_MASK0_RD__par0_peri__BITNR 10 +#define R_IRQ_MASK0_RD__par0_peri__WIDTH 1 +#define R_IRQ_MASK0_RD__par0_peri__active 1 +#define R_IRQ_MASK0_RD__par0_peri__inactive 0 +#define R_IRQ_MASK0_RD__ata_irq2__BITNR 10 +#define R_IRQ_MASK0_RD__ata_irq2__WIDTH 1 +#define R_IRQ_MASK0_RD__ata_irq2__active 1 +#define R_IRQ_MASK0_RD__ata_irq2__inactive 0 +#define R_IRQ_MASK0_RD__p21_irq2__BITNR 10 +#define R_IRQ_MASK0_RD__p21_irq2__WIDTH 1 +#define R_IRQ_MASK0_RD__p21_irq2__active 1 +#define R_IRQ_MASK0_RD__p21_irq2__inactive 0 +#define R_IRQ_MASK0_RD__par0_data__BITNR 9 +#define R_IRQ_MASK0_RD__par0_data__WIDTH 1 +#define R_IRQ_MASK0_RD__par0_data__active 1 +#define R_IRQ_MASK0_RD__par0_data__inactive 0 +#define R_IRQ_MASK0_RD__ata_irq1__BITNR 9 +#define R_IRQ_MASK0_RD__ata_irq1__WIDTH 1 +#define R_IRQ_MASK0_RD__ata_irq1__active 1 +#define R_IRQ_MASK0_RD__ata_irq1__inactive 0 +#define R_IRQ_MASK0_RD__p21_irq1__BITNR 9 +#define R_IRQ_MASK0_RD__p21_irq1__WIDTH 1 +#define R_IRQ_MASK0_RD__p21_irq1__active 1 +#define R_IRQ_MASK0_RD__p21_irq1__inactive 0 +#define R_IRQ_MASK0_RD__par0_ready__BITNR 8 +#define R_IRQ_MASK0_RD__par0_ready__WIDTH 1 +#define R_IRQ_MASK0_RD__par0_ready__active 1 +#define R_IRQ_MASK0_RD__par0_ready__inactive 0 +#define R_IRQ_MASK0_RD__ata_irq0__BITNR 8 +#define R_IRQ_MASK0_RD__ata_irq0__WIDTH 1 +#define R_IRQ_MASK0_RD__ata_irq0__active 1 +#define R_IRQ_MASK0_RD__ata_irq0__inactive 0 +#define R_IRQ_MASK0_RD__mio__BITNR 8 +#define R_IRQ_MASK0_RD__mio__WIDTH 1 +#define R_IRQ_MASK0_RD__mio__active 1 +#define R_IRQ_MASK0_RD__mio__inactive 0 +#define R_IRQ_MASK0_RD__scsi0__BITNR 8 +#define R_IRQ_MASK0_RD__scsi0__WIDTH 1 +#define R_IRQ_MASK0_RD__scsi0__active 1 +#define R_IRQ_MASK0_RD__scsi0__inactive 0 +#define R_IRQ_MASK0_RD__p21_irq0__BITNR 8 +#define R_IRQ_MASK0_RD__p21_irq0__WIDTH 1 +#define R_IRQ_MASK0_RD__p21_irq0__active 1 +#define R_IRQ_MASK0_RD__p21_irq0__inactive 0 +#define R_IRQ_MASK0_RD__ata_dmaend__BITNR 7 +#define R_IRQ_MASK0_RD__ata_dmaend__WIDTH 1 +#define R_IRQ_MASK0_RD__ata_dmaend__active 1 +#define R_IRQ_MASK0_RD__ata_dmaend__inactive 0 +#define R_IRQ_MASK0_RD__irq_ext_vector_nr__BITNR 5 +#define R_IRQ_MASK0_RD__irq_ext_vector_nr__WIDTH 1 +#define R_IRQ_MASK0_RD__irq_ext_vector_nr__active 1 +#define R_IRQ_MASK0_RD__irq_ext_vector_nr__inactive 0 +#define R_IRQ_MASK0_RD__irq_int_vector_nr__BITNR 4 +#define R_IRQ_MASK0_RD__irq_int_vector_nr__WIDTH 1 +#define R_IRQ_MASK0_RD__irq_int_vector_nr__active 1 +#define R_IRQ_MASK0_RD__irq_int_vector_nr__inactive 0 +#define R_IRQ_MASK0_RD__ext_dma1__BITNR 3 +#define R_IRQ_MASK0_RD__ext_dma1__WIDTH 1 +#define R_IRQ_MASK0_RD__ext_dma1__active 1 +#define R_IRQ_MASK0_RD__ext_dma1__inactive 0 +#define R_IRQ_MASK0_RD__ext_dma0__BITNR 2 +#define R_IRQ_MASK0_RD__ext_dma0__WIDTH 1 +#define R_IRQ_MASK0_RD__ext_dma0__active 1 +#define R_IRQ_MASK0_RD__ext_dma0__inactive 0 +#define R_IRQ_MASK0_RD__timer1__BITNR 1 +#define R_IRQ_MASK0_RD__timer1__WIDTH 1 +#define R_IRQ_MASK0_RD__timer1__active 1 +#define R_IRQ_MASK0_RD__timer1__inactive 0 +#define R_IRQ_MASK0_RD__timer0__BITNR 0 +#define R_IRQ_MASK0_RD__timer0__WIDTH 1 +#define R_IRQ_MASK0_RD__timer0__active 1 +#define R_IRQ_MASK0_RD__timer0__inactive 0 + +#define R_IRQ_MASK0_CLR (IO_TYPECAST_UDWORD 0xb00000c0) +#define R_IRQ_MASK0_CLR__nmi_pin__BITNR 31 +#define R_IRQ_MASK0_CLR__nmi_pin__WIDTH 1 +#define R_IRQ_MASK0_CLR__nmi_pin__clr 1 +#define R_IRQ_MASK0_CLR__nmi_pin__nop 0 +#define R_IRQ_MASK0_CLR__watchdog_nmi__BITNR 30 +#define R_IRQ_MASK0_CLR__watchdog_nmi__WIDTH 1 +#define R_IRQ_MASK0_CLR__watchdog_nmi__clr 1 +#define R_IRQ_MASK0_CLR__watchdog_nmi__nop 0 +#define R_IRQ_MASK0_CLR__sqe_test_error__BITNR 29 +#define R_IRQ_MASK0_CLR__sqe_test_error__WIDTH 1 +#define R_IRQ_MASK0_CLR__sqe_test_error__clr 1 +#define R_IRQ_MASK0_CLR__sqe_test_error__nop 0 +#define R_IRQ_MASK0_CLR__carrier_loss__BITNR 28 +#define R_IRQ_MASK0_CLR__carrier_loss__WIDTH 1 +#define R_IRQ_MASK0_CLR__carrier_loss__clr 1 +#define R_IRQ_MASK0_CLR__carrier_loss__nop 0 +#define R_IRQ_MASK0_CLR__deferred__BITNR 27 +#define R_IRQ_MASK0_CLR__deferred__WIDTH 1 +#define R_IRQ_MASK0_CLR__deferred__clr 1 +#define R_IRQ_MASK0_CLR__deferred__nop 0 +#define R_IRQ_MASK0_CLR__late_col__BITNR 26 +#define R_IRQ_MASK0_CLR__late_col__WIDTH 1 +#define R_IRQ_MASK0_CLR__late_col__clr 1 +#define R_IRQ_MASK0_CLR__late_col__nop 0 +#define R_IRQ_MASK0_CLR__multiple_col__BITNR 25 +#define R_IRQ_MASK0_CLR__multiple_col__WIDTH 1 +#define R_IRQ_MASK0_CLR__multiple_col__clr 1 +#define R_IRQ_MASK0_CLR__multiple_col__nop 0 +#define R_IRQ_MASK0_CLR__single_col__BITNR 24 +#define R_IRQ_MASK0_CLR__single_col__WIDTH 1 +#define R_IRQ_MASK0_CLR__single_col__clr 1 +#define R_IRQ_MASK0_CLR__single_col__nop 0 +#define R_IRQ_MASK0_CLR__congestion__BITNR 23 +#define R_IRQ_MASK0_CLR__congestion__WIDTH 1 +#define R_IRQ_MASK0_CLR__congestion__clr 1 +#define R_IRQ_MASK0_CLR__congestion__nop 0 +#define R_IRQ_MASK0_CLR__oversize__BITNR 22 +#define R_IRQ_MASK0_CLR__oversize__WIDTH 1 +#define R_IRQ_MASK0_CLR__oversize__clr 1 +#define R_IRQ_MASK0_CLR__oversize__nop 0 +#define R_IRQ_MASK0_CLR__alignment_error__BITNR 21 +#define R_IRQ_MASK0_CLR__alignment_error__WIDTH 1 +#define R_IRQ_MASK0_CLR__alignment_error__clr 1 +#define R_IRQ_MASK0_CLR__alignment_error__nop 0 +#define R_IRQ_MASK0_CLR__crc_error__BITNR 20 +#define R_IRQ_MASK0_CLR__crc_error__WIDTH 1 +#define R_IRQ_MASK0_CLR__crc_error__clr 1 +#define R_IRQ_MASK0_CLR__crc_error__nop 0 +#define R_IRQ_MASK0_CLR__overrun__BITNR 19 +#define R_IRQ_MASK0_CLR__overrun__WIDTH 1 +#define R_IRQ_MASK0_CLR__overrun__clr 1 +#define R_IRQ_MASK0_CLR__overrun__nop 0 +#define R_IRQ_MASK0_CLR__underrun__BITNR 18 +#define R_IRQ_MASK0_CLR__underrun__WIDTH 1 +#define R_IRQ_MASK0_CLR__underrun__clr 1 +#define R_IRQ_MASK0_CLR__underrun__nop 0 +#define R_IRQ_MASK0_CLR__excessive_col__BITNR 17 +#define R_IRQ_MASK0_CLR__excessive_col__WIDTH 1 +#define R_IRQ_MASK0_CLR__excessive_col__clr 1 +#define R_IRQ_MASK0_CLR__excessive_col__nop 0 +#define R_IRQ_MASK0_CLR__mdio__BITNR 16 +#define R_IRQ_MASK0_CLR__mdio__WIDTH 1 +#define R_IRQ_MASK0_CLR__mdio__clr 1 +#define R_IRQ_MASK0_CLR__mdio__nop 0 +#define R_IRQ_MASK0_CLR__ata_drq3__BITNR 15 +#define R_IRQ_MASK0_CLR__ata_drq3__WIDTH 1 +#define R_IRQ_MASK0_CLR__ata_drq3__clr 1 +#define R_IRQ_MASK0_CLR__ata_drq3__nop 0 +#define R_IRQ_MASK0_CLR__ata_drq2__BITNR 14 +#define R_IRQ_MASK0_CLR__ata_drq2__WIDTH 1 +#define R_IRQ_MASK0_CLR__ata_drq2__clr 1 +#define R_IRQ_MASK0_CLR__ata_drq2__nop 0 +#define R_IRQ_MASK0_CLR__ata_drq1__BITNR 13 +#define R_IRQ_MASK0_CLR__ata_drq1__WIDTH 1 +#define R_IRQ_MASK0_CLR__ata_drq1__clr 1 +#define R_IRQ_MASK0_CLR__ata_drq1__nop 0 +#define R_IRQ_MASK0_CLR__ata_drq0__BITNR 12 +#define R_IRQ_MASK0_CLR__ata_drq0__WIDTH 1 +#define R_IRQ_MASK0_CLR__ata_drq0__clr 1 +#define R_IRQ_MASK0_CLR__ata_drq0__nop 0 +#define R_IRQ_MASK0_CLR__par0_ecp_cmd__BITNR 11 +#define R_IRQ_MASK0_CLR__par0_ecp_cmd__WIDTH 1 +#define R_IRQ_MASK0_CLR__par0_ecp_cmd__clr 1 +#define R_IRQ_MASK0_CLR__par0_ecp_cmd__nop 0 +#define R_IRQ_MASK0_CLR__ata_irq3__BITNR 11 +#define R_IRQ_MASK0_CLR__ata_irq3__WIDTH 1 +#define R_IRQ_MASK0_CLR__ata_irq3__clr 1 +#define R_IRQ_MASK0_CLR__ata_irq3__nop 0 +#define R_IRQ_MASK0_CLR__par0_peri__BITNR 10 +#define R_IRQ_MASK0_CLR__par0_peri__WIDTH 1 +#define R_IRQ_MASK0_CLR__par0_peri__clr 1 +#define R_IRQ_MASK0_CLR__par0_peri__nop 0 +#define R_IRQ_MASK0_CLR__ata_irq2__BITNR 10 +#define R_IRQ_MASK0_CLR__ata_irq2__WIDTH 1 +#define R_IRQ_MASK0_CLR__ata_irq2__clr 1 +#define R_IRQ_MASK0_CLR__ata_irq2__nop 0 +#define R_IRQ_MASK0_CLR__p21_irq2__BITNR 10 +#define R_IRQ_MASK0_CLR__p21_irq2__WIDTH 1 +#define R_IRQ_MASK0_CLR__p21_irq2__clr 1 +#define R_IRQ_MASK0_CLR__p21_irq2__nop 0 +#define R_IRQ_MASK0_CLR__par0_data__BITNR 9 +#define R_IRQ_MASK0_CLR__par0_data__WIDTH 1 +#define R_IRQ_MASK0_CLR__par0_data__clr 1 +#define R_IRQ_MASK0_CLR__par0_data__nop 0 +#define R_IRQ_MASK0_CLR__ata_irq1__BITNR 9 +#define R_IRQ_MASK0_CLR__ata_irq1__WIDTH 1 +#define R_IRQ_MASK0_CLR__ata_irq1__clr 1 +#define R_IRQ_MASK0_CLR__ata_irq1__nop 0 +#define R_IRQ_MASK0_CLR__p21_irq1__BITNR 9 +#define R_IRQ_MASK0_CLR__p21_irq1__WIDTH 1 +#define R_IRQ_MASK0_CLR__p21_irq1__clr 1 +#define R_IRQ_MASK0_CLR__p21_irq1__nop 0 +#define R_IRQ_MASK0_CLR__par0_ready__BITNR 8 +#define R_IRQ_MASK0_CLR__par0_ready__WIDTH 1 +#define R_IRQ_MASK0_CLR__par0_ready__clr 1 +#define R_IRQ_MASK0_CLR__par0_ready__nop 0 +#define R_IRQ_MASK0_CLR__ata_irq0__BITNR 8 +#define R_IRQ_MASK0_CLR__ata_irq0__WIDTH 1 +#define R_IRQ_MASK0_CLR__ata_irq0__clr 1 +#define R_IRQ_MASK0_CLR__ata_irq0__nop 0 +#define R_IRQ_MASK0_CLR__mio__BITNR 8 +#define R_IRQ_MASK0_CLR__mio__WIDTH 1 +#define R_IRQ_MASK0_CLR__mio__clr 1 +#define R_IRQ_MASK0_CLR__mio__nop 0 +#define R_IRQ_MASK0_CLR__scsi0__BITNR 8 +#define R_IRQ_MASK0_CLR__scsi0__WIDTH 1 +#define R_IRQ_MASK0_CLR__scsi0__clr 1 +#define R_IRQ_MASK0_CLR__scsi0__nop 0 +#define R_IRQ_MASK0_CLR__p21_irq0__BITNR 8 +#define R_IRQ_MASK0_CLR__p21_irq0__WIDTH 1 +#define R_IRQ_MASK0_CLR__p21_irq0__clr 1 +#define R_IRQ_MASK0_CLR__p21_irq0__nop 0 +#define R_IRQ_MASK0_CLR__ata_dmaend__BITNR 7 +#define R_IRQ_MASK0_CLR__ata_dmaend__WIDTH 1 +#define R_IRQ_MASK0_CLR__ata_dmaend__clr 1 +#define R_IRQ_MASK0_CLR__ata_dmaend__nop 0 +#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__BITNR 5 +#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__WIDTH 1 +#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__clr 1 +#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__nop 0 +#define R_IRQ_MASK0_CLR__irq_int_vector_nr__BITNR 4 +#define R_IRQ_MASK0_CLR__irq_int_vector_nr__WIDTH 1 +#define R_IRQ_MASK0_CLR__irq_int_vector_nr__clr 1 +#define R_IRQ_MASK0_CLR__irq_int_vector_nr__nop 0 +#define R_IRQ_MASK0_CLR__ext_dma1__BITNR 3 +#define R_IRQ_MASK0_CLR__ext_dma1__WIDTH 1 +#define R_IRQ_MASK0_CLR__ext_dma1__clr 1 +#define R_IRQ_MASK0_CLR__ext_dma1__nop 0 +#define R_IRQ_MASK0_CLR__ext_dma0__BITNR 2 +#define R_IRQ_MASK0_CLR__ext_dma0__WIDTH 1 +#define R_IRQ_MASK0_CLR__ext_dma0__clr 1 +#define R_IRQ_MASK0_CLR__ext_dma0__nop 0 +#define R_IRQ_MASK0_CLR__timer1__BITNR 1 +#define R_IRQ_MASK0_CLR__timer1__WIDTH 1 +#define R_IRQ_MASK0_CLR__timer1__clr 1 +#define R_IRQ_MASK0_CLR__timer1__nop 0 +#define R_IRQ_MASK0_CLR__timer0__BITNR 0 +#define R_IRQ_MASK0_CLR__timer0__WIDTH 1 +#define R_IRQ_MASK0_CLR__timer0__clr 1 +#define R_IRQ_MASK0_CLR__timer0__nop 0 + +#define R_IRQ_READ0 (IO_TYPECAST_RO_UDWORD 0xb00000c4) +#define R_IRQ_READ0__nmi_pin__BITNR 31 +#define R_IRQ_READ0__nmi_pin__WIDTH 1 +#define R_IRQ_READ0__nmi_pin__active 1 +#define R_IRQ_READ0__nmi_pin__inactive 0 +#define R_IRQ_READ0__watchdog_nmi__BITNR 30 +#define R_IRQ_READ0__watchdog_nmi__WIDTH 1 +#define R_IRQ_READ0__watchdog_nmi__active 1 +#define R_IRQ_READ0__watchdog_nmi__inactive 0 +#define R_IRQ_READ0__sqe_test_error__BITNR 29 +#define R_IRQ_READ0__sqe_test_error__WIDTH 1 +#define R_IRQ_READ0__sqe_test_error__active 1 +#define R_IRQ_READ0__sqe_test_error__inactive 0 +#define R_IRQ_READ0__carrier_loss__BITNR 28 +#define R_IRQ_READ0__carrier_loss__WIDTH 1 +#define R_IRQ_READ0__carrier_loss__active 1 +#define R_IRQ_READ0__carrier_loss__inactive 0 +#define R_IRQ_READ0__deferred__BITNR 27 +#define R_IRQ_READ0__deferred__WIDTH 1 +#define R_IRQ_READ0__deferred__active 1 +#define R_IRQ_READ0__deferred__inactive 0 +#define R_IRQ_READ0__late_col__BITNR 26 +#define R_IRQ_READ0__late_col__WIDTH 1 +#define R_IRQ_READ0__late_col__active 1 +#define R_IRQ_READ0__late_col__inactive 0 +#define R_IRQ_READ0__multiple_col__BITNR 25 +#define R_IRQ_READ0__multiple_col__WIDTH 1 +#define R_IRQ_READ0__multiple_col__active 1 +#define R_IRQ_READ0__multiple_col__inactive 0 +#define R_IRQ_READ0__single_col__BITNR 24 +#define R_IRQ_READ0__single_col__WIDTH 1 +#define R_IRQ_READ0__single_col__active 1 +#define R_IRQ_READ0__single_col__inactive 0 +#define R_IRQ_READ0__congestion__BITNR 23 +#define R_IRQ_READ0__congestion__WIDTH 1 +#define R_IRQ_READ0__congestion__active 1 +#define R_IRQ_READ0__congestion__inactive 0 +#define R_IRQ_READ0__oversize__BITNR 22 +#define R_IRQ_READ0__oversize__WIDTH 1 +#define R_IRQ_READ0__oversize__active 1 +#define R_IRQ_READ0__oversize__inactive 0 +#define R_IRQ_READ0__alignment_error__BITNR 21 +#define R_IRQ_READ0__alignment_error__WIDTH 1 +#define R_IRQ_READ0__alignment_error__active 1 +#define R_IRQ_READ0__alignment_error__inactive 0 +#define R_IRQ_READ0__crc_error__BITNR 20 +#define R_IRQ_READ0__crc_error__WIDTH 1 +#define R_IRQ_READ0__crc_error__active 1 +#define R_IRQ_READ0__crc_error__inactive 0 +#define R_IRQ_READ0__overrun__BITNR 19 +#define R_IRQ_READ0__overrun__WIDTH 1 +#define R_IRQ_READ0__overrun__active 1 +#define R_IRQ_READ0__overrun__inactive 0 +#define R_IRQ_READ0__underrun__BITNR 18 +#define R_IRQ_READ0__underrun__WIDTH 1 +#define R_IRQ_READ0__underrun__active 1 +#define R_IRQ_READ0__underrun__inactive 0 +#define R_IRQ_READ0__excessive_col__BITNR 17 +#define R_IRQ_READ0__excessive_col__WIDTH 1 +#define R_IRQ_READ0__excessive_col__active 1 +#define R_IRQ_READ0__excessive_col__inactive 0 +#define R_IRQ_READ0__mdio__BITNR 16 +#define R_IRQ_READ0__mdio__WIDTH 1 +#define R_IRQ_READ0__mdio__active 1 +#define R_IRQ_READ0__mdio__inactive 0 +#define R_IRQ_READ0__ata_drq3__BITNR 15 +#define R_IRQ_READ0__ata_drq3__WIDTH 1 +#define R_IRQ_READ0__ata_drq3__active 1 +#define R_IRQ_READ0__ata_drq3__inactive 0 +#define R_IRQ_READ0__ata_drq2__BITNR 14 +#define R_IRQ_READ0__ata_drq2__WIDTH 1 +#define R_IRQ_READ0__ata_drq2__active 1 +#define R_IRQ_READ0__ata_drq2__inactive 0 +#define R_IRQ_READ0__ata_drq1__BITNR 13 +#define R_IRQ_READ0__ata_drq1__WIDTH 1 +#define R_IRQ_READ0__ata_drq1__active 1 +#define R_IRQ_READ0__ata_drq1__inactive 0 +#define R_IRQ_READ0__ata_drq0__BITNR 12 +#define R_IRQ_READ0__ata_drq0__WIDTH 1 +#define R_IRQ_READ0__ata_drq0__active 1 +#define R_IRQ_READ0__ata_drq0__inactive 0 +#define R_IRQ_READ0__par0_ecp_cmd__BITNR 11 +#define R_IRQ_READ0__par0_ecp_cmd__WIDTH 1 +#define R_IRQ_READ0__par0_ecp_cmd__active 1 +#define R_IRQ_READ0__par0_ecp_cmd__inactive 0 +#define R_IRQ_READ0__ata_irq3__BITNR 11 +#define R_IRQ_READ0__ata_irq3__WIDTH 1 +#define R_IRQ_READ0__ata_irq3__active 1 +#define R_IRQ_READ0__ata_irq3__inactive 0 +#define R_IRQ_READ0__par0_peri__BITNR 10 +#define R_IRQ_READ0__par0_peri__WIDTH 1 +#define R_IRQ_READ0__par0_peri__active 1 +#define R_IRQ_READ0__par0_peri__inactive 0 +#define R_IRQ_READ0__ata_irq2__BITNR 10 +#define R_IRQ_READ0__ata_irq2__WIDTH 1 +#define R_IRQ_READ0__ata_irq2__active 1 +#define R_IRQ_READ0__ata_irq2__inactive 0 +#define R_IRQ_READ0__p21_irq2__BITNR 10 +#define R_IRQ_READ0__p21_irq2__WIDTH 1 +#define R_IRQ_READ0__p21_irq2__active 1 +#define R_IRQ_READ0__p21_irq2__inactive 0 +#define R_IRQ_READ0__par0_data__BITNR 9 +#define R_IRQ_READ0__par0_data__WIDTH 1 +#define R_IRQ_READ0__par0_data__active 1 +#define R_IRQ_READ0__par0_data__inactive 0 +#define R_IRQ_READ0__ata_irq1__BITNR 9 +#define R_IRQ_READ0__ata_irq1__WIDTH 1 +#define R_IRQ_READ0__ata_irq1__active 1 +#define R_IRQ_READ0__ata_irq1__inactive 0 +#define R_IRQ_READ0__p21_irq1__BITNR 9 +#define R_IRQ_READ0__p21_irq1__WIDTH 1 +#define R_IRQ_READ0__p21_irq1__active 1 +#define R_IRQ_READ0__p21_irq1__inactive 0 +#define R_IRQ_READ0__par0_ready__BITNR 8 +#define R_IRQ_READ0__par0_ready__WIDTH 1 +#define R_IRQ_READ0__par0_ready__active 1 +#define R_IRQ_READ0__par0_ready__inactive 0 +#define R_IRQ_READ0__ata_irq0__BITNR 8 +#define R_IRQ_READ0__ata_irq0__WIDTH 1 +#define R_IRQ_READ0__ata_irq0__active 1 +#define R_IRQ_READ0__ata_irq0__inactive 0 +#define R_IRQ_READ0__mio__BITNR 8 +#define R_IRQ_READ0__mio__WIDTH 1 +#define R_IRQ_READ0__mio__active 1 +#define R_IRQ_READ0__mio__inactive 0 +#define R_IRQ_READ0__scsi0__BITNR 8 +#define R_IRQ_READ0__scsi0__WIDTH 1 +#define R_IRQ_READ0__scsi0__active 1 +#define R_IRQ_READ0__scsi0__inactive 0 +#define R_IRQ_READ0__p21_irq0__BITNR 8 +#define R_IRQ_READ0__p21_irq0__WIDTH 1 +#define R_IRQ_READ0__p21_irq0__active 1 +#define R_IRQ_READ0__p21_irq0__inactive 0 +#define R_IRQ_READ0__ata_dmaend__BITNR 7 +#define R_IRQ_READ0__ata_dmaend__WIDTH 1 +#define R_IRQ_READ0__ata_dmaend__active 1 +#define R_IRQ_READ0__ata_dmaend__inactive 0 +#define R_IRQ_READ0__irq_ext_vector_nr__BITNR 5 +#define R_IRQ_READ0__irq_ext_vector_nr__WIDTH 1 +#define R_IRQ_READ0__irq_ext_vector_nr__active 1 +#define R_IRQ_READ0__irq_ext_vector_nr__inactive 0 +#define R_IRQ_READ0__irq_int_vector_nr__BITNR 4 +#define R_IRQ_READ0__irq_int_vector_nr__WIDTH 1 +#define R_IRQ_READ0__irq_int_vector_nr__active 1 +#define R_IRQ_READ0__irq_int_vector_nr__inactive 0 +#define R_IRQ_READ0__ext_dma1__BITNR 3 +#define R_IRQ_READ0__ext_dma1__WIDTH 1 +#define R_IRQ_READ0__ext_dma1__active 1 +#define R_IRQ_READ0__ext_dma1__inactive 0 +#define R_IRQ_READ0__ext_dma0__BITNR 2 +#define R_IRQ_READ0__ext_dma0__WIDTH 1 +#define R_IRQ_READ0__ext_dma0__active 1 +#define R_IRQ_READ0__ext_dma0__inactive 0 +#define R_IRQ_READ0__timer1__BITNR 1 +#define R_IRQ_READ0__timer1__WIDTH 1 +#define R_IRQ_READ0__timer1__active 1 +#define R_IRQ_READ0__timer1__inactive 0 +#define R_IRQ_READ0__timer0__BITNR 0 +#define R_IRQ_READ0__timer0__WIDTH 1 +#define R_IRQ_READ0__timer0__active 1 +#define R_IRQ_READ0__timer0__inactive 0 + +#define R_IRQ_MASK0_SET (IO_TYPECAST_UDWORD 0xb00000c4) +#define R_IRQ_MASK0_SET__nmi_pin__BITNR 31 +#define R_IRQ_MASK0_SET__nmi_pin__WIDTH 1 +#define R_IRQ_MASK0_SET__nmi_pin__set 1 +#define R_IRQ_MASK0_SET__nmi_pin__nop 0 +#define R_IRQ_MASK0_SET__watchdog_nmi__BITNR 30 +#define R_IRQ_MASK0_SET__watchdog_nmi__WIDTH 1 +#define R_IRQ_MASK0_SET__watchdog_nmi__set 1 +#define R_IRQ_MASK0_SET__watchdog_nmi__nop 0 +#define R_IRQ_MASK0_SET__sqe_test_error__BITNR 29 +#define R_IRQ_MASK0_SET__sqe_test_error__WIDTH 1 +#define R_IRQ_MASK0_SET__sqe_test_error__set 1 +#define R_IRQ_MASK0_SET__sqe_test_error__nop 0 +#define R_IRQ_MASK0_SET__carrier_loss__BITNR 28 +#define R_IRQ_MASK0_SET__carrier_loss__WIDTH 1 +#define R_IRQ_MASK0_SET__carrier_loss__set 1 +#define R_IRQ_MASK0_SET__carrier_loss__nop 0 +#define R_IRQ_MASK0_SET__deferred__BITNR 27 +#define R_IRQ_MASK0_SET__deferred__WIDTH 1 +#define R_IRQ_MASK0_SET__deferred__set 1 +#define R_IRQ_MASK0_SET__deferred__nop 0 +#define R_IRQ_MASK0_SET__late_col__BITNR 26 +#define R_IRQ_MASK0_SET__late_col__WIDTH 1 +#define R_IRQ_MASK0_SET__late_col__set 1 +#define R_IRQ_MASK0_SET__late_col__nop 0 +#define R_IRQ_MASK0_SET__multiple_col__BITNR 25 +#define R_IRQ_MASK0_SET__multiple_col__WIDTH 1 +#define R_IRQ_MASK0_SET__multiple_col__set 1 +#define R_IRQ_MASK0_SET__multiple_col__nop 0 +#define R_IRQ_MASK0_SET__single_col__BITNR 24 +#define R_IRQ_MASK0_SET__single_col__WIDTH 1 +#define R_IRQ_MASK0_SET__single_col__set 1 +#define R_IRQ_MASK0_SET__single_col__nop 0 +#define R_IRQ_MASK0_SET__congestion__BITNR 23 +#define R_IRQ_MASK0_SET__congestion__WIDTH 1 +#define R_IRQ_MASK0_SET__congestion__set 1 +#define R_IRQ_MASK0_SET__congestion__nop 0 +#define R_IRQ_MASK0_SET__oversize__BITNR 22 +#define R_IRQ_MASK0_SET__oversize__WIDTH 1 +#define R_IRQ_MASK0_SET__oversize__set 1 +#define R_IRQ_MASK0_SET__oversize__nop 0 +#define R_IRQ_MASK0_SET__alignment_error__BITNR 21 +#define R_IRQ_MASK0_SET__alignment_error__WIDTH 1 +#define R_IRQ_MASK0_SET__alignment_error__set 1 +#define R_IRQ_MASK0_SET__alignment_error__nop 0 +#define R_IRQ_MASK0_SET__crc_error__BITNR 20 +#define R_IRQ_MASK0_SET__crc_error__WIDTH 1 +#define R_IRQ_MASK0_SET__crc_error__set 1 +#define R_IRQ_MASK0_SET__crc_error__nop 0 +#define R_IRQ_MASK0_SET__overrun__BITNR 19 +#define R_IRQ_MASK0_SET__overrun__WIDTH 1 +#define R_IRQ_MASK0_SET__overrun__set 1 +#define R_IRQ_MASK0_SET__overrun__nop 0 +#define R_IRQ_MASK0_SET__underrun__BITNR 18 +#define R_IRQ_MASK0_SET__underrun__WIDTH 1 +#define R_IRQ_MASK0_SET__underrun__set 1 +#define R_IRQ_MASK0_SET__underrun__nop 0 +#define R_IRQ_MASK0_SET__excessive_col__BITNR 17 +#define R_IRQ_MASK0_SET__excessive_col__WIDTH 1 +#define R_IRQ_MASK0_SET__excessive_col__set 1 +#define R_IRQ_MASK0_SET__excessive_col__nop 0 +#define R_IRQ_MASK0_SET__mdio__BITNR 16 +#define R_IRQ_MASK0_SET__mdio__WIDTH 1 +#define R_IRQ_MASK0_SET__mdio__set 1 +#define R_IRQ_MASK0_SET__mdio__nop 0 +#define R_IRQ_MASK0_SET__ata_drq3__BITNR 15 +#define R_IRQ_MASK0_SET__ata_drq3__WIDTH 1 +#define R_IRQ_MASK0_SET__ata_drq3__set 1 +#define R_IRQ_MASK0_SET__ata_drq3__nop 0 +#define R_IRQ_MASK0_SET__ata_drq2__BITNR 14 +#define R_IRQ_MASK0_SET__ata_drq2__WIDTH 1 +#define R_IRQ_MASK0_SET__ata_drq2__set 1 +#define R_IRQ_MASK0_SET__ata_drq2__nop 0 +#define R_IRQ_MASK0_SET__ata_drq1__BITNR 13 +#define R_IRQ_MASK0_SET__ata_drq1__WIDTH 1 +#define R_IRQ_MASK0_SET__ata_drq1__set 1 +#define R_IRQ_MASK0_SET__ata_drq1__nop 0 +#define R_IRQ_MASK0_SET__ata_drq0__BITNR 12 +#define R_IRQ_MASK0_SET__ata_drq0__WIDTH 1 +#define R_IRQ_MASK0_SET__ata_drq0__set 1 +#define R_IRQ_MASK0_SET__ata_drq0__nop 0 +#define R_IRQ_MASK0_SET__par0_ecp_cmd__BITNR 11 +#define R_IRQ_MASK0_SET__par0_ecp_cmd__WIDTH 1 +#define R_IRQ_MASK0_SET__par0_ecp_cmd__set 1 +#define R_IRQ_MASK0_SET__par0_ecp_cmd__nop 0 +#define R_IRQ_MASK0_SET__ata_irq3__BITNR 11 +#define R_IRQ_MASK0_SET__ata_irq3__WIDTH 1 +#define R_IRQ_MASK0_SET__ata_irq3__set 1 +#define R_IRQ_MASK0_SET__ata_irq3__nop 0 +#define R_IRQ_MASK0_SET__par0_peri__BITNR 10 +#define R_IRQ_MASK0_SET__par0_peri__WIDTH 1 +#define R_IRQ_MASK0_SET__par0_peri__set 1 +#define R_IRQ_MASK0_SET__par0_peri__nop 0 +#define R_IRQ_MASK0_SET__ata_irq2__BITNR 10 +#define R_IRQ_MASK0_SET__ata_irq2__WIDTH 1 +#define R_IRQ_MASK0_SET__ata_irq2__set 1 +#define R_IRQ_MASK0_SET__ata_irq2__nop 0 +#define R_IRQ_MASK0_SET__p21_irq2__BITNR 10 +#define R_IRQ_MASK0_SET__p21_irq2__WIDTH 1 +#define R_IRQ_MASK0_SET__p21_irq2__set 1 +#define R_IRQ_MASK0_SET__p21_irq2__nop 0 +#define R_IRQ_MASK0_SET__par0_data__BITNR 9 +#define R_IRQ_MASK0_SET__par0_data__WIDTH 1 +#define R_IRQ_MASK0_SET__par0_data__set 1 +#define R_IRQ_MASK0_SET__par0_data__nop 0 +#define R_IRQ_MASK0_SET__ata_irq1__BITNR 9 +#define R_IRQ_MASK0_SET__ata_irq1__WIDTH 1 +#define R_IRQ_MASK0_SET__ata_irq1__set 1 +#define R_IRQ_MASK0_SET__ata_irq1__nop 0 +#define R_IRQ_MASK0_SET__p21_irq1__BITNR 9 +#define R_IRQ_MASK0_SET__p21_irq1__WIDTH 1 +#define R_IRQ_MASK0_SET__p21_irq1__set 1 +#define R_IRQ_MASK0_SET__p21_irq1__nop 0 +#define R_IRQ_MASK0_SET__par0_ready__BITNR 8 +#define R_IRQ_MASK0_SET__par0_ready__WIDTH 1 +#define R_IRQ_MASK0_SET__par0_ready__set 1 +#define R_IRQ_MASK0_SET__par0_ready__nop 0 +#define R_IRQ_MASK0_SET__ata_irq0__BITNR 8 +#define R_IRQ_MASK0_SET__ata_irq0__WIDTH 1 +#define R_IRQ_MASK0_SET__ata_irq0__set 1 +#define R_IRQ_MASK0_SET__ata_irq0__nop 0 +#define R_IRQ_MASK0_SET__mio__BITNR 8 +#define R_IRQ_MASK0_SET__mio__WIDTH 1 +#define R_IRQ_MASK0_SET__mio__set 1 +#define R_IRQ_MASK0_SET__mio__nop 0 +#define R_IRQ_MASK0_SET__scsi0__BITNR 8 +#define R_IRQ_MASK0_SET__scsi0__WIDTH 1 +#define R_IRQ_MASK0_SET__scsi0__set 1 +#define R_IRQ_MASK0_SET__scsi0__nop 0 +#define R_IRQ_MASK0_SET__p21_irq0__BITNR 8 +#define R_IRQ_MASK0_SET__p21_irq0__WIDTH 1 +#define R_IRQ_MASK0_SET__p21_irq0__set 1 +#define R_IRQ_MASK0_SET__p21_irq0__nop 0 +#define R_IRQ_MASK0_SET__ata_dmaend__BITNR 7 +#define R_IRQ_MASK0_SET__ata_dmaend__WIDTH 1 +#define R_IRQ_MASK0_SET__ata_dmaend__set 1 +#define R_IRQ_MASK0_SET__ata_dmaend__nop 0 +#define R_IRQ_MASK0_SET__irq_ext_vector_nr__BITNR 5 +#define R_IRQ_MASK0_SET__irq_ext_vector_nr__WIDTH 1 +#define R_IRQ_MASK0_SET__irq_ext_vector_nr__set 1 +#define R_IRQ_MASK0_SET__irq_ext_vector_nr__nop 0 +#define R_IRQ_MASK0_SET__irq_int_vector_nr__BITNR 4 +#define R_IRQ_MASK0_SET__irq_int_vector_nr__WIDTH 1 +#define R_IRQ_MASK0_SET__irq_int_vector_nr__set 1 +#define R_IRQ_MASK0_SET__irq_int_vector_nr__nop 0 +#define R_IRQ_MASK0_SET__ext_dma1__BITNR 3 +#define R_IRQ_MASK0_SET__ext_dma1__WIDTH 1 +#define R_IRQ_MASK0_SET__ext_dma1__set 1 +#define R_IRQ_MASK0_SET__ext_dma1__nop 0 +#define R_IRQ_MASK0_SET__ext_dma0__BITNR 2 +#define R_IRQ_MASK0_SET__ext_dma0__WIDTH 1 +#define R_IRQ_MASK0_SET__ext_dma0__set 1 +#define R_IRQ_MASK0_SET__ext_dma0__nop 0 +#define R_IRQ_MASK0_SET__timer1__BITNR 1 +#define R_IRQ_MASK0_SET__timer1__WIDTH 1 +#define R_IRQ_MASK0_SET__timer1__set 1 +#define R_IRQ_MASK0_SET__timer1__nop 0 +#define R_IRQ_MASK0_SET__timer0__BITNR 0 +#define R_IRQ_MASK0_SET__timer0__WIDTH 1 +#define R_IRQ_MASK0_SET__timer0__set 1 +#define R_IRQ_MASK0_SET__timer0__nop 0 + +#define R_IRQ_MASK1_RD (IO_TYPECAST_RO_UDWORD 0xb00000c8) +#define R_IRQ_MASK1_RD__sw_int7__BITNR 31 +#define R_IRQ_MASK1_RD__sw_int7__WIDTH 1 +#define R_IRQ_MASK1_RD__sw_int7__active 1 +#define R_IRQ_MASK1_RD__sw_int7__inactive 0 +#define R_IRQ_MASK1_RD__sw_int6__BITNR 30 +#define R_IRQ_MASK1_RD__sw_int6__WIDTH 1 +#define R_IRQ_MASK1_RD__sw_int6__active 1 +#define R_IRQ_MASK1_RD__sw_int6__inactive 0 +#define R_IRQ_MASK1_RD__sw_int5__BITNR 29 +#define R_IRQ_MASK1_RD__sw_int5__WIDTH 1 +#define R_IRQ_MASK1_RD__sw_int5__active 1 +#define R_IRQ_MASK1_RD__sw_int5__inactive 0 +#define R_IRQ_MASK1_RD__sw_int4__BITNR 28 +#define R_IRQ_MASK1_RD__sw_int4__WIDTH 1 +#define R_IRQ_MASK1_RD__sw_int4__active 1 +#define R_IRQ_MASK1_RD__sw_int4__inactive 0 +#define R_IRQ_MASK1_RD__sw_int3__BITNR 27 +#define R_IRQ_MASK1_RD__sw_int3__WIDTH 1 +#define R_IRQ_MASK1_RD__sw_int3__active 1 +#define R_IRQ_MASK1_RD__sw_int3__inactive 0 +#define R_IRQ_MASK1_RD__sw_int2__BITNR 26 +#define R_IRQ_MASK1_RD__sw_int2__WIDTH 1 +#define R_IRQ_MASK1_RD__sw_int2__active 1 +#define R_IRQ_MASK1_RD__sw_int2__inactive 0 +#define R_IRQ_MASK1_RD__sw_int1__BITNR 25 +#define R_IRQ_MASK1_RD__sw_int1__WIDTH 1 +#define R_IRQ_MASK1_RD__sw_int1__active 1 +#define R_IRQ_MASK1_RD__sw_int1__inactive 0 +#define R_IRQ_MASK1_RD__sw_int0__BITNR 24 +#define R_IRQ_MASK1_RD__sw_int0__WIDTH 1 +#define R_IRQ_MASK1_RD__sw_int0__active 1 +#define R_IRQ_MASK1_RD__sw_int0__inactive 0 +#define R_IRQ_MASK1_RD__par1_ecp_cmd__BITNR 19 +#define R_IRQ_MASK1_RD__par1_ecp_cmd__WIDTH 1 +#define R_IRQ_MASK1_RD__par1_ecp_cmd__active 1 +#define R_IRQ_MASK1_RD__par1_ecp_cmd__inactive 0 +#define R_IRQ_MASK1_RD__par1_peri__BITNR 18 +#define R_IRQ_MASK1_RD__par1_peri__WIDTH 1 +#define R_IRQ_MASK1_RD__par1_peri__active 1 +#define R_IRQ_MASK1_RD__par1_peri__inactive 0 +#define R_IRQ_MASK1_RD__par1_data__BITNR 17 +#define R_IRQ_MASK1_RD__par1_data__WIDTH 1 +#define R_IRQ_MASK1_RD__par1_data__active 1 +#define R_IRQ_MASK1_RD__par1_data__inactive 0 +#define R_IRQ_MASK1_RD__par1_ready__BITNR 16 +#define R_IRQ_MASK1_RD__par1_ready__WIDTH 1 +#define R_IRQ_MASK1_RD__par1_ready__active 1 +#define R_IRQ_MASK1_RD__par1_ready__inactive 0 +#define R_IRQ_MASK1_RD__scsi1__BITNR 16 +#define R_IRQ_MASK1_RD__scsi1__WIDTH 1 +#define R_IRQ_MASK1_RD__scsi1__active 1 +#define R_IRQ_MASK1_RD__scsi1__inactive 0 +#define R_IRQ_MASK1_RD__ser3_ready__BITNR 15 +#define R_IRQ_MASK1_RD__ser3_ready__WIDTH 1 +#define R_IRQ_MASK1_RD__ser3_ready__active 1 +#define R_IRQ_MASK1_RD__ser3_ready__inactive 0 +#define R_IRQ_MASK1_RD__ser3_data__BITNR 14 +#define R_IRQ_MASK1_RD__ser3_data__WIDTH 1 +#define R_IRQ_MASK1_RD__ser3_data__active 1 +#define R_IRQ_MASK1_RD__ser3_data__inactive 0 +#define R_IRQ_MASK1_RD__ser2_ready__BITNR 13 +#define R_IRQ_MASK1_RD__ser2_ready__WIDTH 1 +#define R_IRQ_MASK1_RD__ser2_ready__active 1 +#define R_IRQ_MASK1_RD__ser2_ready__inactive 0 +#define R_IRQ_MASK1_RD__ser2_data__BITNR 12 +#define R_IRQ_MASK1_RD__ser2_data__WIDTH 1 +#define R_IRQ_MASK1_RD__ser2_data__active 1 +#define R_IRQ_MASK1_RD__ser2_data__inactive 0 +#define R_IRQ_MASK1_RD__ser1_ready__BITNR 11 +#define R_IRQ_MASK1_RD__ser1_ready__WIDTH 1 +#define R_IRQ_MASK1_RD__ser1_ready__active 1 +#define R_IRQ_MASK1_RD__ser1_ready__inactive 0 +#define R_IRQ_MASK1_RD__ser1_data__BITNR 10 +#define R_IRQ_MASK1_RD__ser1_data__WIDTH 1 +#define R_IRQ_MASK1_RD__ser1_data__active 1 +#define R_IRQ_MASK1_RD__ser1_data__inactive 0 +#define R_IRQ_MASK1_RD__ser0_ready__BITNR 9 +#define R_IRQ_MASK1_RD__ser0_ready__WIDTH 1 +#define R_IRQ_MASK1_RD__ser0_ready__active 1 +#define R_IRQ_MASK1_RD__ser0_ready__inactive 0 +#define R_IRQ_MASK1_RD__ser0_data__BITNR 8 +#define R_IRQ_MASK1_RD__ser0_data__WIDTH 1 +#define R_IRQ_MASK1_RD__ser0_data__active 1 +#define R_IRQ_MASK1_RD__ser0_data__inactive 0 +#define R_IRQ_MASK1_RD__pa7__BITNR 7 +#define R_IRQ_MASK1_RD__pa7__WIDTH 1 +#define R_IRQ_MASK1_RD__pa7__active 1 +#define R_IRQ_MASK1_RD__pa7__inactive 0 +#define R_IRQ_MASK1_RD__pa6__BITNR 6 +#define R_IRQ_MASK1_RD__pa6__WIDTH 1 +#define R_IRQ_MASK1_RD__pa6__active 1 +#define R_IRQ_MASK1_RD__pa6__inactive 0 +#define R_IRQ_MASK1_RD__pa5__BITNR 5 +#define R_IRQ_MASK1_RD__pa5__WIDTH 1 +#define R_IRQ_MASK1_RD__pa5__active 1 +#define R_IRQ_MASK1_RD__pa5__inactive 0 +#define R_IRQ_MASK1_RD__pa4__BITNR 4 +#define R_IRQ_MASK1_RD__pa4__WIDTH 1 +#define R_IRQ_MASK1_RD__pa4__active 1 +#define R_IRQ_MASK1_RD__pa4__inactive 0 +#define R_IRQ_MASK1_RD__pa3__BITNR 3 +#define R_IRQ_MASK1_RD__pa3__WIDTH 1 +#define R_IRQ_MASK1_RD__pa3__active 1 +#define R_IRQ_MASK1_RD__pa3__inactive 0 +#define R_IRQ_MASK1_RD__pa2__BITNR 2 +#define R_IRQ_MASK1_RD__pa2__WIDTH 1 +#define R_IRQ_MASK1_RD__pa2__active 1 +#define R_IRQ_MASK1_RD__pa2__inactive 0 +#define R_IRQ_MASK1_RD__pa1__BITNR 1 +#define R_IRQ_MASK1_RD__pa1__WIDTH 1 +#define R_IRQ_MASK1_RD__pa1__active 1 +#define R_IRQ_MASK1_RD__pa1__inactive 0 +#define R_IRQ_MASK1_RD__pa0__BITNR 0 +#define R_IRQ_MASK1_RD__pa0__WIDTH 1 +#define R_IRQ_MASK1_RD__pa0__active 1 +#define R_IRQ_MASK1_RD__pa0__inactive 0 + +#define R_IRQ_MASK1_CLR (IO_TYPECAST_UDWORD 0xb00000c8) +#define R_IRQ_MASK1_CLR__sw_int7__BITNR 31 +#define R_IRQ_MASK1_CLR__sw_int7__WIDTH 1 +#define R_IRQ_MASK1_CLR__sw_int7__clr 1 +#define R_IRQ_MASK1_CLR__sw_int7__nop 0 +#define R_IRQ_MASK1_CLR__sw_int6__BITNR 30 +#define R_IRQ_MASK1_CLR__sw_int6__WIDTH 1 +#define R_IRQ_MASK1_CLR__sw_int6__clr 1 +#define R_IRQ_MASK1_CLR__sw_int6__nop 0 +#define R_IRQ_MASK1_CLR__sw_int5__BITNR 29 +#define R_IRQ_MASK1_CLR__sw_int5__WIDTH 1 +#define R_IRQ_MASK1_CLR__sw_int5__clr 1 +#define R_IRQ_MASK1_CLR__sw_int5__nop 0 +#define R_IRQ_MASK1_CLR__sw_int4__BITNR 28 +#define R_IRQ_MASK1_CLR__sw_int4__WIDTH 1 +#define R_IRQ_MASK1_CLR__sw_int4__clr 1 +#define R_IRQ_MASK1_CLR__sw_int4__nop 0 +#define R_IRQ_MASK1_CLR__sw_int3__BITNR 27 +#define R_IRQ_MASK1_CLR__sw_int3__WIDTH 1 +#define R_IRQ_MASK1_CLR__sw_int3__clr 1 +#define R_IRQ_MASK1_CLR__sw_int3__nop 0 +#define R_IRQ_MASK1_CLR__sw_int2__BITNR 26 +#define R_IRQ_MASK1_CLR__sw_int2__WIDTH 1 +#define R_IRQ_MASK1_CLR__sw_int2__clr 1 +#define R_IRQ_MASK1_CLR__sw_int2__nop 0 +#define R_IRQ_MASK1_CLR__sw_int1__BITNR 25 +#define R_IRQ_MASK1_CLR__sw_int1__WIDTH 1 +#define R_IRQ_MASK1_CLR__sw_int1__clr 1 +#define R_IRQ_MASK1_CLR__sw_int1__nop 0 +#define R_IRQ_MASK1_CLR__sw_int0__BITNR 24 +#define R_IRQ_MASK1_CLR__sw_int0__WIDTH 1 +#define R_IRQ_MASK1_CLR__sw_int0__clr 1 +#define R_IRQ_MASK1_CLR__sw_int0__nop 0 +#define R_IRQ_MASK1_CLR__par1_ecp_cmd__BITNR 19 +#define R_IRQ_MASK1_CLR__par1_ecp_cmd__WIDTH 1 +#define R_IRQ_MASK1_CLR__par1_ecp_cmd__clr 1 +#define R_IRQ_MASK1_CLR__par1_ecp_cmd__nop 0 +#define R_IRQ_MASK1_CLR__par1_peri__BITNR 18 +#define R_IRQ_MASK1_CLR__par1_peri__WIDTH 1 +#define R_IRQ_MASK1_CLR__par1_peri__clr 1 +#define R_IRQ_MASK1_CLR__par1_peri__nop 0 +#define R_IRQ_MASK1_CLR__par1_data__BITNR 17 +#define R_IRQ_MASK1_CLR__par1_data__WIDTH 1 +#define R_IRQ_MASK1_CLR__par1_data__clr 1 +#define R_IRQ_MASK1_CLR__par1_data__nop 0 +#define R_IRQ_MASK1_CLR__par1_ready__BITNR 16 +#define R_IRQ_MASK1_CLR__par1_ready__WIDTH 1 +#define R_IRQ_MASK1_CLR__par1_ready__clr 1 +#define R_IRQ_MASK1_CLR__par1_ready__nop 0 +#define R_IRQ_MASK1_CLR__scsi1__BITNR 16 +#define R_IRQ_MASK1_CLR__scsi1__WIDTH 1 +#define R_IRQ_MASK1_CLR__scsi1__clr 1 +#define R_IRQ_MASK1_CLR__scsi1__nop 0 +#define R_IRQ_MASK1_CLR__ser3_ready__BITNR 15 +#define R_IRQ_MASK1_CLR__ser3_ready__WIDTH 1 +#define R_IRQ_MASK1_CLR__ser3_ready__clr 1 +#define R_IRQ_MASK1_CLR__ser3_ready__nop 0 +#define R_IRQ_MASK1_CLR__ser3_data__BITNR 14 +#define R_IRQ_MASK1_CLR__ser3_data__WIDTH 1 +#define R_IRQ_MASK1_CLR__ser3_data__clr 1 +#define R_IRQ_MASK1_CLR__ser3_data__nop 0 +#define R_IRQ_MASK1_CLR__ser2_ready__BITNR 13 +#define R_IRQ_MASK1_CLR__ser2_ready__WIDTH 1 +#define R_IRQ_MASK1_CLR__ser2_ready__clr 1 +#define R_IRQ_MASK1_CLR__ser2_ready__nop 0 +#define R_IRQ_MASK1_CLR__ser2_data__BITNR 12 +#define R_IRQ_MASK1_CLR__ser2_data__WIDTH 1 +#define R_IRQ_MASK1_CLR__ser2_data__clr 1 +#define R_IRQ_MASK1_CLR__ser2_data__nop 0 +#define R_IRQ_MASK1_CLR__ser1_ready__BITNR 11 +#define R_IRQ_MASK1_CLR__ser1_ready__WIDTH 1 +#define R_IRQ_MASK1_CLR__ser1_ready__clr 1 +#define R_IRQ_MASK1_CLR__ser1_ready__nop 0 +#define R_IRQ_MASK1_CLR__ser1_data__BITNR 10 +#define R_IRQ_MASK1_CLR__ser1_data__WIDTH 1 +#define R_IRQ_MASK1_CLR__ser1_data__clr 1 +#define R_IRQ_MASK1_CLR__ser1_data__nop 0 +#define R_IRQ_MASK1_CLR__ser0_ready__BITNR 9 +#define R_IRQ_MASK1_CLR__ser0_ready__WIDTH 1 +#define R_IRQ_MASK1_CLR__ser0_ready__clr 1 +#define R_IRQ_MASK1_CLR__ser0_ready__nop 0 +#define R_IRQ_MASK1_CLR__ser0_data__BITNR 8 +#define R_IRQ_MASK1_CLR__ser0_data__WIDTH 1 +#define R_IRQ_MASK1_CLR__ser0_data__clr 1 +#define R_IRQ_MASK1_CLR__ser0_data__nop 0 +#define R_IRQ_MASK1_CLR__pa7__BITNR 7 +#define R_IRQ_MASK1_CLR__pa7__WIDTH 1 +#define R_IRQ_MASK1_CLR__pa7__clr 1 +#define R_IRQ_MASK1_CLR__pa7__nop 0 +#define R_IRQ_MASK1_CLR__pa6__BITNR 6 +#define R_IRQ_MASK1_CLR__pa6__WIDTH 1 +#define R_IRQ_MASK1_CLR__pa6__clr 1 +#define R_IRQ_MASK1_CLR__pa6__nop 0 +#define R_IRQ_MASK1_CLR__pa5__BITNR 5 +#define R_IRQ_MASK1_CLR__pa5__WIDTH 1 +#define R_IRQ_MASK1_CLR__pa5__clr 1 +#define R_IRQ_MASK1_CLR__pa5__nop 0 +#define R_IRQ_MASK1_CLR__pa4__BITNR 4 +#define R_IRQ_MASK1_CLR__pa4__WIDTH 1 +#define R_IRQ_MASK1_CLR__pa4__clr 1 +#define R_IRQ_MASK1_CLR__pa4__nop 0 +#define R_IRQ_MASK1_CLR__pa3__BITNR 3 +#define R_IRQ_MASK1_CLR__pa3__WIDTH 1 +#define R_IRQ_MASK1_CLR__pa3__clr 1 +#define R_IRQ_MASK1_CLR__pa3__nop 0 +#define R_IRQ_MASK1_CLR__pa2__BITNR 2 +#define R_IRQ_MASK1_CLR__pa2__WIDTH 1 +#define R_IRQ_MASK1_CLR__pa2__clr 1 +#define R_IRQ_MASK1_CLR__pa2__nop 0 +#define R_IRQ_MASK1_CLR__pa1__BITNR 1 +#define R_IRQ_MASK1_CLR__pa1__WIDTH 1 +#define R_IRQ_MASK1_CLR__pa1__clr 1 +#define R_IRQ_MASK1_CLR__pa1__nop 0 +#define R_IRQ_MASK1_CLR__pa0__BITNR 0 +#define R_IRQ_MASK1_CLR__pa0__WIDTH 1 +#define R_IRQ_MASK1_CLR__pa0__clr 1 +#define R_IRQ_MASK1_CLR__pa0__nop 0 + +#define R_IRQ_READ1 (IO_TYPECAST_RO_UDWORD 0xb00000cc) +#define R_IRQ_READ1__sw_int7__BITNR 31 +#define R_IRQ_READ1__sw_int7__WIDTH 1 +#define R_IRQ_READ1__sw_int7__active 1 +#define R_IRQ_READ1__sw_int7__inactive 0 +#define R_IRQ_READ1__sw_int6__BITNR 30 +#define R_IRQ_READ1__sw_int6__WIDTH 1 +#define R_IRQ_READ1__sw_int6__active 1 +#define R_IRQ_READ1__sw_int6__inactive 0 +#define R_IRQ_READ1__sw_int5__BITNR 29 +#define R_IRQ_READ1__sw_int5__WIDTH 1 +#define R_IRQ_READ1__sw_int5__active 1 +#define R_IRQ_READ1__sw_int5__inactive 0 +#define R_IRQ_READ1__sw_int4__BITNR 28 +#define R_IRQ_READ1__sw_int4__WIDTH 1 +#define R_IRQ_READ1__sw_int4__active 1 +#define R_IRQ_READ1__sw_int4__inactive 0 +#define R_IRQ_READ1__sw_int3__BITNR 27 +#define R_IRQ_READ1__sw_int3__WIDTH 1 +#define R_IRQ_READ1__sw_int3__active 1 +#define R_IRQ_READ1__sw_int3__inactive 0 +#define R_IRQ_READ1__sw_int2__BITNR 26 +#define R_IRQ_READ1__sw_int2__WIDTH 1 +#define R_IRQ_READ1__sw_int2__active 1 +#define R_IRQ_READ1__sw_int2__inactive 0 +#define R_IRQ_READ1__sw_int1__BITNR 25 +#define R_IRQ_READ1__sw_int1__WIDTH 1 +#define R_IRQ_READ1__sw_int1__active 1 +#define R_IRQ_READ1__sw_int1__inactive 0 +#define R_IRQ_READ1__sw_int0__BITNR 24 +#define R_IRQ_READ1__sw_int0__WIDTH 1 +#define R_IRQ_READ1__sw_int0__active 1 +#define R_IRQ_READ1__sw_int0__inactive 0 +#define R_IRQ_READ1__par1_ecp_cmd__BITNR 19 +#define R_IRQ_READ1__par1_ecp_cmd__WIDTH 1 +#define R_IRQ_READ1__par1_ecp_cmd__active 1 +#define R_IRQ_READ1__par1_ecp_cmd__inactive 0 +#define R_IRQ_READ1__par1_peri__BITNR 18 +#define R_IRQ_READ1__par1_peri__WIDTH 1 +#define R_IRQ_READ1__par1_peri__active 1 +#define R_IRQ_READ1__par1_peri__inactive 0 +#define R_IRQ_READ1__par1_data__BITNR 17 +#define R_IRQ_READ1__par1_data__WIDTH 1 +#define R_IRQ_READ1__par1_data__active 1 +#define R_IRQ_READ1__par1_data__inactive 0 +#define R_IRQ_READ1__par1_ready__BITNR 16 +#define R_IRQ_READ1__par1_ready__WIDTH 1 +#define R_IRQ_READ1__par1_ready__active 1 +#define R_IRQ_READ1__par1_ready__inactive 0 +#define R_IRQ_READ1__scsi1__BITNR 16 +#define R_IRQ_READ1__scsi1__WIDTH 1 +#define R_IRQ_READ1__scsi1__active 1 +#define R_IRQ_READ1__scsi1__inactive 0 +#define R_IRQ_READ1__ser3_ready__BITNR 15 +#define R_IRQ_READ1__ser3_ready__WIDTH 1 +#define R_IRQ_READ1__ser3_ready__active 1 +#define R_IRQ_READ1__ser3_ready__inactive 0 +#define R_IRQ_READ1__ser3_data__BITNR 14 +#define R_IRQ_READ1__ser3_data__WIDTH 1 +#define R_IRQ_READ1__ser3_data__active 1 +#define R_IRQ_READ1__ser3_data__inactive 0 +#define R_IRQ_READ1__ser2_ready__BITNR 13 +#define R_IRQ_READ1__ser2_ready__WIDTH 1 +#define R_IRQ_READ1__ser2_ready__active 1 +#define R_IRQ_READ1__ser2_ready__inactive 0 +#define R_IRQ_READ1__ser2_data__BITNR 12 +#define R_IRQ_READ1__ser2_data__WIDTH 1 +#define R_IRQ_READ1__ser2_data__active 1 +#define R_IRQ_READ1__ser2_data__inactive 0 +#define R_IRQ_READ1__ser1_ready__BITNR 11 +#define R_IRQ_READ1__ser1_ready__WIDTH 1 +#define R_IRQ_READ1__ser1_ready__active 1 +#define R_IRQ_READ1__ser1_ready__inactive 0 +#define R_IRQ_READ1__ser1_data__BITNR 10 +#define R_IRQ_READ1__ser1_data__WIDTH 1 +#define R_IRQ_READ1__ser1_data__active 1 +#define R_IRQ_READ1__ser1_data__inactive 0 +#define R_IRQ_READ1__ser0_ready__BITNR 9 +#define R_IRQ_READ1__ser0_ready__WIDTH 1 +#define R_IRQ_READ1__ser0_ready__active 1 +#define R_IRQ_READ1__ser0_ready__inactive 0 +#define R_IRQ_READ1__ser0_data__BITNR 8 +#define R_IRQ_READ1__ser0_data__WIDTH 1 +#define R_IRQ_READ1__ser0_data__active 1 +#define R_IRQ_READ1__ser0_data__inactive 0 +#define R_IRQ_READ1__pa7__BITNR 7 +#define R_IRQ_READ1__pa7__WIDTH 1 +#define R_IRQ_READ1__pa7__active 1 +#define R_IRQ_READ1__pa7__inactive 0 +#define R_IRQ_READ1__pa6__BITNR 6 +#define R_IRQ_READ1__pa6__WIDTH 1 +#define R_IRQ_READ1__pa6__active 1 +#define R_IRQ_READ1__pa6__inactive 0 +#define R_IRQ_READ1__pa5__BITNR 5 +#define R_IRQ_READ1__pa5__WIDTH 1 +#define R_IRQ_READ1__pa5__active 1 +#define R_IRQ_READ1__pa5__inactive 0 +#define R_IRQ_READ1__pa4__BITNR 4 +#define R_IRQ_READ1__pa4__WIDTH 1 +#define R_IRQ_READ1__pa4__active 1 +#define R_IRQ_READ1__pa4__inactive 0 +#define R_IRQ_READ1__pa3__BITNR 3 +#define R_IRQ_READ1__pa3__WIDTH 1 +#define R_IRQ_READ1__pa3__active 1 +#define R_IRQ_READ1__pa3__inactive 0 +#define R_IRQ_READ1__pa2__BITNR 2 +#define R_IRQ_READ1__pa2__WIDTH 1 +#define R_IRQ_READ1__pa2__active 1 +#define R_IRQ_READ1__pa2__inactive 0 +#define R_IRQ_READ1__pa1__BITNR 1 +#define R_IRQ_READ1__pa1__WIDTH 1 +#define R_IRQ_READ1__pa1__active 1 +#define R_IRQ_READ1__pa1__inactive 0 +#define R_IRQ_READ1__pa0__BITNR 0 +#define R_IRQ_READ1__pa0__WIDTH 1 +#define R_IRQ_READ1__pa0__active 1 +#define R_IRQ_READ1__pa0__inactive 0 + +#define R_IRQ_MASK1_SET (IO_TYPECAST_UDWORD 0xb00000cc) +#define R_IRQ_MASK1_SET__sw_int7__BITNR 31 +#define R_IRQ_MASK1_SET__sw_int7__WIDTH 1 +#define R_IRQ_MASK1_SET__sw_int7__set 1 +#define R_IRQ_MASK1_SET__sw_int7__nop 0 +#define R_IRQ_MASK1_SET__sw_int6__BITNR 30 +#define R_IRQ_MASK1_SET__sw_int6__WIDTH 1 +#define R_IRQ_MASK1_SET__sw_int6__set 1 +#define R_IRQ_MASK1_SET__sw_int6__nop 0 +#define R_IRQ_MASK1_SET__sw_int5__BITNR 29 +#define R_IRQ_MASK1_SET__sw_int5__WIDTH 1 +#define R_IRQ_MASK1_SET__sw_int5__set 1 +#define R_IRQ_MASK1_SET__sw_int5__nop 0 +#define R_IRQ_MASK1_SET__sw_int4__BITNR 28 +#define R_IRQ_MASK1_SET__sw_int4__WIDTH 1 +#define R_IRQ_MASK1_SET__sw_int4__set 1 +#define R_IRQ_MASK1_SET__sw_int4__nop 0 +#define R_IRQ_MASK1_SET__sw_int3__BITNR 27 +#define R_IRQ_MASK1_SET__sw_int3__WIDTH 1 +#define R_IRQ_MASK1_SET__sw_int3__set 1 +#define R_IRQ_MASK1_SET__sw_int3__nop 0 +#define R_IRQ_MASK1_SET__sw_int2__BITNR 26 +#define R_IRQ_MASK1_SET__sw_int2__WIDTH 1 +#define R_IRQ_MASK1_SET__sw_int2__set 1 +#define R_IRQ_MASK1_SET__sw_int2__nop 0 +#define R_IRQ_MASK1_SET__sw_int1__BITNR 25 +#define R_IRQ_MASK1_SET__sw_int1__WIDTH 1 +#define R_IRQ_MASK1_SET__sw_int1__set 1 +#define R_IRQ_MASK1_SET__sw_int1__nop 0 +#define R_IRQ_MASK1_SET__sw_int0__BITNR 24 +#define R_IRQ_MASK1_SET__sw_int0__WIDTH 1 +#define R_IRQ_MASK1_SET__sw_int0__set 1 +#define R_IRQ_MASK1_SET__sw_int0__nop 0 +#define R_IRQ_MASK1_SET__par1_ecp_cmd__BITNR 19 +#define R_IRQ_MASK1_SET__par1_ecp_cmd__WIDTH 1 +#define R_IRQ_MASK1_SET__par1_ecp_cmd__set 1 +#define R_IRQ_MASK1_SET__par1_ecp_cmd__nop 0 +#define R_IRQ_MASK1_SET__par1_peri__BITNR 18 +#define R_IRQ_MASK1_SET__par1_peri__WIDTH 1 +#define R_IRQ_MASK1_SET__par1_peri__set 1 +#define R_IRQ_MASK1_SET__par1_peri__nop 0 +#define R_IRQ_MASK1_SET__par1_data__BITNR 17 +#define R_IRQ_MASK1_SET__par1_data__WIDTH 1 +#define R_IRQ_MASK1_SET__par1_data__set 1 +#define R_IRQ_MASK1_SET__par1_data__nop 0 +#define R_IRQ_MASK1_SET__par1_ready__BITNR 16 +#define R_IRQ_MASK1_SET__par1_ready__WIDTH 1 +#define R_IRQ_MASK1_SET__par1_ready__set 1 +#define R_IRQ_MASK1_SET__par1_ready__nop 0 +#define R_IRQ_MASK1_SET__scsi1__BITNR 16 +#define R_IRQ_MASK1_SET__scsi1__WIDTH 1 +#define R_IRQ_MASK1_SET__scsi1__set 1 +#define R_IRQ_MASK1_SET__scsi1__nop 0 +#define R_IRQ_MASK1_SET__ser3_ready__BITNR 15 +#define R_IRQ_MASK1_SET__ser3_ready__WIDTH 1 +#define R_IRQ_MASK1_SET__ser3_ready__set 1 +#define R_IRQ_MASK1_SET__ser3_ready__nop 0 +#define R_IRQ_MASK1_SET__ser3_data__BITNR 14 +#define R_IRQ_MASK1_SET__ser3_data__WIDTH 1 +#define R_IRQ_MASK1_SET__ser3_data__set 1 +#define R_IRQ_MASK1_SET__ser3_data__nop 0 +#define R_IRQ_MASK1_SET__ser2_ready__BITNR 13 +#define R_IRQ_MASK1_SET__ser2_ready__WIDTH 1 +#define R_IRQ_MASK1_SET__ser2_ready__set 1 +#define R_IRQ_MASK1_SET__ser2_ready__nop 0 +#define R_IRQ_MASK1_SET__ser2_data__BITNR 12 +#define R_IRQ_MASK1_SET__ser2_data__WIDTH 1 +#define R_IRQ_MASK1_SET__ser2_data__set 1 +#define R_IRQ_MASK1_SET__ser2_data__nop 0 +#define R_IRQ_MASK1_SET__ser1_ready__BITNR 11 +#define R_IRQ_MASK1_SET__ser1_ready__WIDTH 1 +#define R_IRQ_MASK1_SET__ser1_ready__set 1 +#define R_IRQ_MASK1_SET__ser1_ready__nop 0 +#define R_IRQ_MASK1_SET__ser1_data__BITNR 10 +#define R_IRQ_MASK1_SET__ser1_data__WIDTH 1 +#define R_IRQ_MASK1_SET__ser1_data__set 1 +#define R_IRQ_MASK1_SET__ser1_data__nop 0 +#define R_IRQ_MASK1_SET__ser0_ready__BITNR 9 +#define R_IRQ_MASK1_SET__ser0_ready__WIDTH 1 +#define R_IRQ_MASK1_SET__ser0_ready__set 1 +#define R_IRQ_MASK1_SET__ser0_ready__nop 0 +#define R_IRQ_MASK1_SET__ser0_data__BITNR 8 +#define R_IRQ_MASK1_SET__ser0_data__WIDTH 1 +#define R_IRQ_MASK1_SET__ser0_data__set 1 +#define R_IRQ_MASK1_SET__ser0_data__nop 0 +#define R_IRQ_MASK1_SET__pa7__BITNR 7 +#define R_IRQ_MASK1_SET__pa7__WIDTH 1 +#define R_IRQ_MASK1_SET__pa7__set 1 +#define R_IRQ_MASK1_SET__pa7__nop 0 +#define R_IRQ_MASK1_SET__pa6__BITNR 6 +#define R_IRQ_MASK1_SET__pa6__WIDTH 1 +#define R_IRQ_MASK1_SET__pa6__set 1 +#define R_IRQ_MASK1_SET__pa6__nop 0 +#define R_IRQ_MASK1_SET__pa5__BITNR 5 +#define R_IRQ_MASK1_SET__pa5__WIDTH 1 +#define R_IRQ_MASK1_SET__pa5__set 1 +#define R_IRQ_MASK1_SET__pa5__nop 0 +#define R_IRQ_MASK1_SET__pa4__BITNR 4 +#define R_IRQ_MASK1_SET__pa4__WIDTH 1 +#define R_IRQ_MASK1_SET__pa4__set 1 +#define R_IRQ_MASK1_SET__pa4__nop 0 +#define R_IRQ_MASK1_SET__pa3__BITNR 3 +#define R_IRQ_MASK1_SET__pa3__WIDTH 1 +#define R_IRQ_MASK1_SET__pa3__set 1 +#define R_IRQ_MASK1_SET__pa3__nop 0 +#define R_IRQ_MASK1_SET__pa2__BITNR 2 +#define R_IRQ_MASK1_SET__pa2__WIDTH 1 +#define R_IRQ_MASK1_SET__pa2__set 1 +#define R_IRQ_MASK1_SET__pa2__nop 0 +#define R_IRQ_MASK1_SET__pa1__BITNR 1 +#define R_IRQ_MASK1_SET__pa1__WIDTH 1 +#define R_IRQ_MASK1_SET__pa1__set 1 +#define R_IRQ_MASK1_SET__pa1__nop 0 +#define R_IRQ_MASK1_SET__pa0__BITNR 0 +#define R_IRQ_MASK1_SET__pa0__WIDTH 1 +#define R_IRQ_MASK1_SET__pa0__set 1 +#define R_IRQ_MASK1_SET__pa0__nop 0 + +#define R_IRQ_MASK2_RD (IO_TYPECAST_RO_UDWORD 0xb00000d0) +#define R_IRQ_MASK2_RD__dma8_sub3_descr__BITNR 23 +#define R_IRQ_MASK2_RD__dma8_sub3_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma8_sub3_descr__active 1 +#define R_IRQ_MASK2_RD__dma8_sub3_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma8_sub2_descr__BITNR 22 +#define R_IRQ_MASK2_RD__dma8_sub2_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma8_sub2_descr__active 1 +#define R_IRQ_MASK2_RD__dma8_sub2_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma8_sub1_descr__BITNR 21 +#define R_IRQ_MASK2_RD__dma8_sub1_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma8_sub1_descr__active 1 +#define R_IRQ_MASK2_RD__dma8_sub1_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma8_sub0_descr__BITNR 20 +#define R_IRQ_MASK2_RD__dma8_sub0_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma8_sub0_descr__active 1 +#define R_IRQ_MASK2_RD__dma8_sub0_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma9_eop__BITNR 19 +#define R_IRQ_MASK2_RD__dma9_eop__WIDTH 1 +#define R_IRQ_MASK2_RD__dma9_eop__active 1 +#define R_IRQ_MASK2_RD__dma9_eop__inactive 0 +#define R_IRQ_MASK2_RD__dma9_descr__BITNR 18 +#define R_IRQ_MASK2_RD__dma9_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma9_descr__active 1 +#define R_IRQ_MASK2_RD__dma9_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma8_eop__BITNR 17 +#define R_IRQ_MASK2_RD__dma8_eop__WIDTH 1 +#define R_IRQ_MASK2_RD__dma8_eop__active 1 +#define R_IRQ_MASK2_RD__dma8_eop__inactive 0 +#define R_IRQ_MASK2_RD__dma8_descr__BITNR 16 +#define R_IRQ_MASK2_RD__dma8_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma8_descr__active 1 +#define R_IRQ_MASK2_RD__dma8_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma7_eop__BITNR 15 +#define R_IRQ_MASK2_RD__dma7_eop__WIDTH 1 +#define R_IRQ_MASK2_RD__dma7_eop__active 1 +#define R_IRQ_MASK2_RD__dma7_eop__inactive 0 +#define R_IRQ_MASK2_RD__dma7_descr__BITNR 14 +#define R_IRQ_MASK2_RD__dma7_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma7_descr__active 1 +#define R_IRQ_MASK2_RD__dma7_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma6_eop__BITNR 13 +#define R_IRQ_MASK2_RD__dma6_eop__WIDTH 1 +#define R_IRQ_MASK2_RD__dma6_eop__active 1 +#define R_IRQ_MASK2_RD__dma6_eop__inactive 0 +#define R_IRQ_MASK2_RD__dma6_descr__BITNR 12 +#define R_IRQ_MASK2_RD__dma6_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma6_descr__active 1 +#define R_IRQ_MASK2_RD__dma6_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma5_eop__BITNR 11 +#define R_IRQ_MASK2_RD__dma5_eop__WIDTH 1 +#define R_IRQ_MASK2_RD__dma5_eop__active 1 +#define R_IRQ_MASK2_RD__dma5_eop__inactive 0 +#define R_IRQ_MASK2_RD__dma5_descr__BITNR 10 +#define R_IRQ_MASK2_RD__dma5_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma5_descr__active 1 +#define R_IRQ_MASK2_RD__dma5_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma4_eop__BITNR 9 +#define R_IRQ_MASK2_RD__dma4_eop__WIDTH 1 +#define R_IRQ_MASK2_RD__dma4_eop__active 1 +#define R_IRQ_MASK2_RD__dma4_eop__inactive 0 +#define R_IRQ_MASK2_RD__dma4_descr__BITNR 8 +#define R_IRQ_MASK2_RD__dma4_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma4_descr__active 1 +#define R_IRQ_MASK2_RD__dma4_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma3_eop__BITNR 7 +#define R_IRQ_MASK2_RD__dma3_eop__WIDTH 1 +#define R_IRQ_MASK2_RD__dma3_eop__active 1 +#define R_IRQ_MASK2_RD__dma3_eop__inactive 0 +#define R_IRQ_MASK2_RD__dma3_descr__BITNR 6 +#define R_IRQ_MASK2_RD__dma3_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma3_descr__active 1 +#define R_IRQ_MASK2_RD__dma3_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma2_eop__BITNR 5 +#define R_IRQ_MASK2_RD__dma2_eop__WIDTH 1 +#define R_IRQ_MASK2_RD__dma2_eop__active 1 +#define R_IRQ_MASK2_RD__dma2_eop__inactive 0 +#define R_IRQ_MASK2_RD__dma2_descr__BITNR 4 +#define R_IRQ_MASK2_RD__dma2_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma2_descr__active 1 +#define R_IRQ_MASK2_RD__dma2_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma1_eop__BITNR 3 +#define R_IRQ_MASK2_RD__dma1_eop__WIDTH 1 +#define R_IRQ_MASK2_RD__dma1_eop__active 1 +#define R_IRQ_MASK2_RD__dma1_eop__inactive 0 +#define R_IRQ_MASK2_RD__dma1_descr__BITNR 2 +#define R_IRQ_MASK2_RD__dma1_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma1_descr__active 1 +#define R_IRQ_MASK2_RD__dma1_descr__inactive 0 +#define R_IRQ_MASK2_RD__dma0_eop__BITNR 1 +#define R_IRQ_MASK2_RD__dma0_eop__WIDTH 1 +#define R_IRQ_MASK2_RD__dma0_eop__active 1 +#define R_IRQ_MASK2_RD__dma0_eop__inactive 0 +#define R_IRQ_MASK2_RD__dma0_descr__BITNR 0 +#define R_IRQ_MASK2_RD__dma0_descr__WIDTH 1 +#define R_IRQ_MASK2_RD__dma0_descr__active 1 +#define R_IRQ_MASK2_RD__dma0_descr__inactive 0 + +#define R_IRQ_MASK2_CLR (IO_TYPECAST_UDWORD 0xb00000d0) +#define R_IRQ_MASK2_CLR__dma8_sub3_descr__BITNR 23 +#define R_IRQ_MASK2_CLR__dma8_sub3_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma8_sub3_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma8_sub3_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma8_sub2_descr__BITNR 22 +#define R_IRQ_MASK2_CLR__dma8_sub2_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma8_sub2_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma8_sub2_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma8_sub1_descr__BITNR 21 +#define R_IRQ_MASK2_CLR__dma8_sub1_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma8_sub1_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma8_sub1_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma8_sub0_descr__BITNR 20 +#define R_IRQ_MASK2_CLR__dma8_sub0_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma8_sub0_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma8_sub0_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma9_eop__BITNR 19 +#define R_IRQ_MASK2_CLR__dma9_eop__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma9_eop__clr 1 +#define R_IRQ_MASK2_CLR__dma9_eop__nop 0 +#define R_IRQ_MASK2_CLR__dma9_descr__BITNR 18 +#define R_IRQ_MASK2_CLR__dma9_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma9_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma9_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma8_eop__BITNR 17 +#define R_IRQ_MASK2_CLR__dma8_eop__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma8_eop__clr 1 +#define R_IRQ_MASK2_CLR__dma8_eop__nop 0 +#define R_IRQ_MASK2_CLR__dma8_descr__BITNR 16 +#define R_IRQ_MASK2_CLR__dma8_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma8_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma8_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma7_eop__BITNR 15 +#define R_IRQ_MASK2_CLR__dma7_eop__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma7_eop__clr 1 +#define R_IRQ_MASK2_CLR__dma7_eop__nop 0 +#define R_IRQ_MASK2_CLR__dma7_descr__BITNR 14 +#define R_IRQ_MASK2_CLR__dma7_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma7_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma7_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma6_eop__BITNR 13 +#define R_IRQ_MASK2_CLR__dma6_eop__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma6_eop__clr 1 +#define R_IRQ_MASK2_CLR__dma6_eop__nop 0 +#define R_IRQ_MASK2_CLR__dma6_descr__BITNR 12 +#define R_IRQ_MASK2_CLR__dma6_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma6_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma6_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma5_eop__BITNR 11 +#define R_IRQ_MASK2_CLR__dma5_eop__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma5_eop__clr 1 +#define R_IRQ_MASK2_CLR__dma5_eop__nop 0 +#define R_IRQ_MASK2_CLR__dma5_descr__BITNR 10 +#define R_IRQ_MASK2_CLR__dma5_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma5_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma5_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma4_eop__BITNR 9 +#define R_IRQ_MASK2_CLR__dma4_eop__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma4_eop__clr 1 +#define R_IRQ_MASK2_CLR__dma4_eop__nop 0 +#define R_IRQ_MASK2_CLR__dma4_descr__BITNR 8 +#define R_IRQ_MASK2_CLR__dma4_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma4_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma4_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma3_eop__BITNR 7 +#define R_IRQ_MASK2_CLR__dma3_eop__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma3_eop__clr 1 +#define R_IRQ_MASK2_CLR__dma3_eop__nop 0 +#define R_IRQ_MASK2_CLR__dma3_descr__BITNR 6 +#define R_IRQ_MASK2_CLR__dma3_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma3_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma3_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma2_eop__BITNR 5 +#define R_IRQ_MASK2_CLR__dma2_eop__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma2_eop__clr 1 +#define R_IRQ_MASK2_CLR__dma2_eop__nop 0 +#define R_IRQ_MASK2_CLR__dma2_descr__BITNR 4 +#define R_IRQ_MASK2_CLR__dma2_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma2_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma2_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma1_eop__BITNR 3 +#define R_IRQ_MASK2_CLR__dma1_eop__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma1_eop__clr 1 +#define R_IRQ_MASK2_CLR__dma1_eop__nop 0 +#define R_IRQ_MASK2_CLR__dma1_descr__BITNR 2 +#define R_IRQ_MASK2_CLR__dma1_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma1_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma1_descr__nop 0 +#define R_IRQ_MASK2_CLR__dma0_eop__BITNR 1 +#define R_IRQ_MASK2_CLR__dma0_eop__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma0_eop__clr 1 +#define R_IRQ_MASK2_CLR__dma0_eop__nop 0 +#define R_IRQ_MASK2_CLR__dma0_descr__BITNR 0 +#define R_IRQ_MASK2_CLR__dma0_descr__WIDTH 1 +#define R_IRQ_MASK2_CLR__dma0_descr__clr 1 +#define R_IRQ_MASK2_CLR__dma0_descr__nop 0 + +#define R_IRQ_READ2 (IO_TYPECAST_RO_UDWORD 0xb00000d4) +#define R_IRQ_READ2__dma8_sub3_descr__BITNR 23 +#define R_IRQ_READ2__dma8_sub3_descr__WIDTH 1 +#define R_IRQ_READ2__dma8_sub3_descr__active 1 +#define R_IRQ_READ2__dma8_sub3_descr__inactive 0 +#define R_IRQ_READ2__dma8_sub2_descr__BITNR 22 +#define R_IRQ_READ2__dma8_sub2_descr__WIDTH 1 +#define R_IRQ_READ2__dma8_sub2_descr__active 1 +#define R_IRQ_READ2__dma8_sub2_descr__inactive 0 +#define R_IRQ_READ2__dma8_sub1_descr__BITNR 21 +#define R_IRQ_READ2__dma8_sub1_descr__WIDTH 1 +#define R_IRQ_READ2__dma8_sub1_descr__active 1 +#define R_IRQ_READ2__dma8_sub1_descr__inactive 0 +#define R_IRQ_READ2__dma8_sub0_descr__BITNR 20 +#define R_IRQ_READ2__dma8_sub0_descr__WIDTH 1 +#define R_IRQ_READ2__dma8_sub0_descr__active 1 +#define R_IRQ_READ2__dma8_sub0_descr__inactive 0 +#define R_IRQ_READ2__dma9_eop__BITNR 19 +#define R_IRQ_READ2__dma9_eop__WIDTH 1 +#define R_IRQ_READ2__dma9_eop__active 1 +#define R_IRQ_READ2__dma9_eop__inactive 0 +#define R_IRQ_READ2__dma9_descr__BITNR 18 +#define R_IRQ_READ2__dma9_descr__WIDTH 1 +#define R_IRQ_READ2__dma9_descr__active 1 +#define R_IRQ_READ2__dma9_descr__inactive 0 +#define R_IRQ_READ2__dma8_eop__BITNR 17 +#define R_IRQ_READ2__dma8_eop__WIDTH 1 +#define R_IRQ_READ2__dma8_eop__active 1 +#define R_IRQ_READ2__dma8_eop__inactive 0 +#define R_IRQ_READ2__dma8_descr__BITNR 16 +#define R_IRQ_READ2__dma8_descr__WIDTH 1 +#define R_IRQ_READ2__dma8_descr__active 1 +#define R_IRQ_READ2__dma8_descr__inactive 0 +#define R_IRQ_READ2__dma7_eop__BITNR 15 +#define R_IRQ_READ2__dma7_eop__WIDTH 1 +#define R_IRQ_READ2__dma7_eop__active 1 +#define R_IRQ_READ2__dma7_eop__inactive 0 +#define R_IRQ_READ2__dma7_descr__BITNR 14 +#define R_IRQ_READ2__dma7_descr__WIDTH 1 +#define R_IRQ_READ2__dma7_descr__active 1 +#define R_IRQ_READ2__dma7_descr__inactive 0 +#define R_IRQ_READ2__dma6_eop__BITNR 13 +#define R_IRQ_READ2__dma6_eop__WIDTH 1 +#define R_IRQ_READ2__dma6_eop__active 1 +#define R_IRQ_READ2__dma6_eop__inactive 0 +#define R_IRQ_READ2__dma6_descr__BITNR 12 +#define R_IRQ_READ2__dma6_descr__WIDTH 1 +#define R_IRQ_READ2__dma6_descr__active 1 +#define R_IRQ_READ2__dma6_descr__inactive 0 +#define R_IRQ_READ2__dma5_eop__BITNR 11 +#define R_IRQ_READ2__dma5_eop__WIDTH 1 +#define R_IRQ_READ2__dma5_eop__active 1 +#define R_IRQ_READ2__dma5_eop__inactive 0 +#define R_IRQ_READ2__dma5_descr__BITNR 10 +#define R_IRQ_READ2__dma5_descr__WIDTH 1 +#define R_IRQ_READ2__dma5_descr__active 1 +#define R_IRQ_READ2__dma5_descr__inactive 0 +#define R_IRQ_READ2__dma4_eop__BITNR 9 +#define R_IRQ_READ2__dma4_eop__WIDTH 1 +#define R_IRQ_READ2__dma4_eop__active 1 +#define R_IRQ_READ2__dma4_eop__inactive 0 +#define R_IRQ_READ2__dma4_descr__BITNR 8 +#define R_IRQ_READ2__dma4_descr__WIDTH 1 +#define R_IRQ_READ2__dma4_descr__active 1 +#define R_IRQ_READ2__dma4_descr__inactive 0 +#define R_IRQ_READ2__dma3_eop__BITNR 7 +#define R_IRQ_READ2__dma3_eop__WIDTH 1 +#define R_IRQ_READ2__dma3_eop__active 1 +#define R_IRQ_READ2__dma3_eop__inactive 0 +#define R_IRQ_READ2__dma3_descr__BITNR 6 +#define R_IRQ_READ2__dma3_descr__WIDTH 1 +#define R_IRQ_READ2__dma3_descr__active 1 +#define R_IRQ_READ2__dma3_descr__inactive 0 +#define R_IRQ_READ2__dma2_eop__BITNR 5 +#define R_IRQ_READ2__dma2_eop__WIDTH 1 +#define R_IRQ_READ2__dma2_eop__active 1 +#define R_IRQ_READ2__dma2_eop__inactive 0 +#define R_IRQ_READ2__dma2_descr__BITNR 4 +#define R_IRQ_READ2__dma2_descr__WIDTH 1 +#define R_IRQ_READ2__dma2_descr__active 1 +#define R_IRQ_READ2__dma2_descr__inactive 0 +#define R_IRQ_READ2__dma1_eop__BITNR 3 +#define R_IRQ_READ2__dma1_eop__WIDTH 1 +#define R_IRQ_READ2__dma1_eop__active 1 +#define R_IRQ_READ2__dma1_eop__inactive 0 +#define R_IRQ_READ2__dma1_descr__BITNR 2 +#define R_IRQ_READ2__dma1_descr__WIDTH 1 +#define R_IRQ_READ2__dma1_descr__active 1 +#define R_IRQ_READ2__dma1_descr__inactive 0 +#define R_IRQ_READ2__dma0_eop__BITNR 1 +#define R_IRQ_READ2__dma0_eop__WIDTH 1 +#define R_IRQ_READ2__dma0_eop__active 1 +#define R_IRQ_READ2__dma0_eop__inactive 0 +#define R_IRQ_READ2__dma0_descr__BITNR 0 +#define R_IRQ_READ2__dma0_descr__WIDTH 1 +#define R_IRQ_READ2__dma0_descr__active 1 +#define R_IRQ_READ2__dma0_descr__inactive 0 + +#define R_IRQ_MASK2_SET (IO_TYPECAST_UDWORD 0xb00000d4) +#define R_IRQ_MASK2_SET__dma8_sub3_descr__BITNR 23 +#define R_IRQ_MASK2_SET__dma8_sub3_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma8_sub3_descr__set 1 +#define R_IRQ_MASK2_SET__dma8_sub3_descr__nop 0 +#define R_IRQ_MASK2_SET__dma8_sub2_descr__BITNR 22 +#define R_IRQ_MASK2_SET__dma8_sub2_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma8_sub2_descr__set 1 +#define R_IRQ_MASK2_SET__dma8_sub2_descr__nop 0 +#define R_IRQ_MASK2_SET__dma8_sub1_descr__BITNR 21 +#define R_IRQ_MASK2_SET__dma8_sub1_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma8_sub1_descr__set 1 +#define R_IRQ_MASK2_SET__dma8_sub1_descr__nop 0 +#define R_IRQ_MASK2_SET__dma8_sub0_descr__BITNR 20 +#define R_IRQ_MASK2_SET__dma8_sub0_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma8_sub0_descr__set 1 +#define R_IRQ_MASK2_SET__dma8_sub0_descr__nop 0 +#define R_IRQ_MASK2_SET__dma9_eop__BITNR 19 +#define R_IRQ_MASK2_SET__dma9_eop__WIDTH 1 +#define R_IRQ_MASK2_SET__dma9_eop__set 1 +#define R_IRQ_MASK2_SET__dma9_eop__nop 0 +#define R_IRQ_MASK2_SET__dma9_descr__BITNR 18 +#define R_IRQ_MASK2_SET__dma9_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma9_descr__set 1 +#define R_IRQ_MASK2_SET__dma9_descr__nop 0 +#define R_IRQ_MASK2_SET__dma8_eop__BITNR 17 +#define R_IRQ_MASK2_SET__dma8_eop__WIDTH 1 +#define R_IRQ_MASK2_SET__dma8_eop__set 1 +#define R_IRQ_MASK2_SET__dma8_eop__nop 0 +#define R_IRQ_MASK2_SET__dma8_descr__BITNR 16 +#define R_IRQ_MASK2_SET__dma8_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma8_descr__set 1 +#define R_IRQ_MASK2_SET__dma8_descr__nop 0 +#define R_IRQ_MASK2_SET__dma7_eop__BITNR 15 +#define R_IRQ_MASK2_SET__dma7_eop__WIDTH 1 +#define R_IRQ_MASK2_SET__dma7_eop__set 1 +#define R_IRQ_MASK2_SET__dma7_eop__nop 0 +#define R_IRQ_MASK2_SET__dma7_descr__BITNR 14 +#define R_IRQ_MASK2_SET__dma7_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma7_descr__set 1 +#define R_IRQ_MASK2_SET__dma7_descr__nop 0 +#define R_IRQ_MASK2_SET__dma6_eop__BITNR 13 +#define R_IRQ_MASK2_SET__dma6_eop__WIDTH 1 +#define R_IRQ_MASK2_SET__dma6_eop__set 1 +#define R_IRQ_MASK2_SET__dma6_eop__nop 0 +#define R_IRQ_MASK2_SET__dma6_descr__BITNR 12 +#define R_IRQ_MASK2_SET__dma6_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma6_descr__set 1 +#define R_IRQ_MASK2_SET__dma6_descr__nop 0 +#define R_IRQ_MASK2_SET__dma5_eop__BITNR 11 +#define R_IRQ_MASK2_SET__dma5_eop__WIDTH 1 +#define R_IRQ_MASK2_SET__dma5_eop__set 1 +#define R_IRQ_MASK2_SET__dma5_eop__nop 0 +#define R_IRQ_MASK2_SET__dma5_descr__BITNR 10 +#define R_IRQ_MASK2_SET__dma5_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma5_descr__set 1 +#define R_IRQ_MASK2_SET__dma5_descr__nop 0 +#define R_IRQ_MASK2_SET__dma4_eop__BITNR 9 +#define R_IRQ_MASK2_SET__dma4_eop__WIDTH 1 +#define R_IRQ_MASK2_SET__dma4_eop__set 1 +#define R_IRQ_MASK2_SET__dma4_eop__nop 0 +#define R_IRQ_MASK2_SET__dma4_descr__BITNR 8 +#define R_IRQ_MASK2_SET__dma4_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma4_descr__set 1 +#define R_IRQ_MASK2_SET__dma4_descr__nop 0 +#define R_IRQ_MASK2_SET__dma3_eop__BITNR 7 +#define R_IRQ_MASK2_SET__dma3_eop__WIDTH 1 +#define R_IRQ_MASK2_SET__dma3_eop__set 1 +#define R_IRQ_MASK2_SET__dma3_eop__nop 0 +#define R_IRQ_MASK2_SET__dma3_descr__BITNR 6 +#define R_IRQ_MASK2_SET__dma3_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma3_descr__set 1 +#define R_IRQ_MASK2_SET__dma3_descr__nop 0 +#define R_IRQ_MASK2_SET__dma2_eop__BITNR 5 +#define R_IRQ_MASK2_SET__dma2_eop__WIDTH 1 +#define R_IRQ_MASK2_SET__dma2_eop__set 1 +#define R_IRQ_MASK2_SET__dma2_eop__nop 0 +#define R_IRQ_MASK2_SET__dma2_descr__BITNR 4 +#define R_IRQ_MASK2_SET__dma2_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma2_descr__set 1 +#define R_IRQ_MASK2_SET__dma2_descr__nop 0 +#define R_IRQ_MASK2_SET__dma1_eop__BITNR 3 +#define R_IRQ_MASK2_SET__dma1_eop__WIDTH 1 +#define R_IRQ_MASK2_SET__dma1_eop__set 1 +#define R_IRQ_MASK2_SET__dma1_eop__nop 0 +#define R_IRQ_MASK2_SET__dma1_descr__BITNR 2 +#define R_IRQ_MASK2_SET__dma1_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma1_descr__set 1 +#define R_IRQ_MASK2_SET__dma1_descr__nop 0 +#define R_IRQ_MASK2_SET__dma0_eop__BITNR 1 +#define R_IRQ_MASK2_SET__dma0_eop__WIDTH 1 +#define R_IRQ_MASK2_SET__dma0_eop__set 1 +#define R_IRQ_MASK2_SET__dma0_eop__nop 0 +#define R_IRQ_MASK2_SET__dma0_descr__BITNR 0 +#define R_IRQ_MASK2_SET__dma0_descr__WIDTH 1 +#define R_IRQ_MASK2_SET__dma0_descr__set 1 +#define R_IRQ_MASK2_SET__dma0_descr__nop 0 + +#define R_VECT_MASK_RD (IO_TYPECAST_RO_UDWORD 0xb00000d8) +#define R_VECT_MASK_RD__usb__BITNR 31 +#define R_VECT_MASK_RD__usb__WIDTH 1 +#define R_VECT_MASK_RD__usb__active 1 +#define R_VECT_MASK_RD__usb__inactive 0 +#define R_VECT_MASK_RD__dma9__BITNR 25 +#define R_VECT_MASK_RD__dma9__WIDTH 1 +#define R_VECT_MASK_RD__dma9__active 1 +#define R_VECT_MASK_RD__dma9__inactive 0 +#define R_VECT_MASK_RD__dma8__BITNR 24 +#define R_VECT_MASK_RD__dma8__WIDTH 1 +#define R_VECT_MASK_RD__dma8__active 1 +#define R_VECT_MASK_RD__dma8__inactive 0 +#define R_VECT_MASK_RD__dma7__BITNR 23 +#define R_VECT_MASK_RD__dma7__WIDTH 1 +#define R_VECT_MASK_RD__dma7__active 1 +#define R_VECT_MASK_RD__dma7__inactive 0 +#define R_VECT_MASK_RD__dma6__BITNR 22 +#define R_VECT_MASK_RD__dma6__WIDTH 1 +#define R_VECT_MASK_RD__dma6__active 1 +#define R_VECT_MASK_RD__dma6__inactive 0 +#define R_VECT_MASK_RD__dma5__BITNR 21 +#define R_VECT_MASK_RD__dma5__WIDTH 1 +#define R_VECT_MASK_RD__dma5__active 1 +#define R_VECT_MASK_RD__dma5__inactive 0 +#define R_VECT_MASK_RD__dma4__BITNR 20 +#define R_VECT_MASK_RD__dma4__WIDTH 1 +#define R_VECT_MASK_RD__dma4__active 1 +#define R_VECT_MASK_RD__dma4__inactive 0 +#define R_VECT_MASK_RD__dma3__BITNR 19 +#define R_VECT_MASK_RD__dma3__WIDTH 1 +#define R_VECT_MASK_RD__dma3__active 1 +#define R_VECT_MASK_RD__dma3__inactive 0 +#define R_VECT_MASK_RD__dma2__BITNR 18 +#define R_VECT_MASK_RD__dma2__WIDTH 1 +#define R_VECT_MASK_RD__dma2__active 1 +#define R_VECT_MASK_RD__dma2__inactive 0 +#define R_VECT_MASK_RD__dma1__BITNR 17 +#define R_VECT_MASK_RD__dma1__WIDTH 1 +#define R_VECT_MASK_RD__dma1__active 1 +#define R_VECT_MASK_RD__dma1__inactive 0 +#define R_VECT_MASK_RD__dma0__BITNR 16 +#define R_VECT_MASK_RD__dma0__WIDTH 1 +#define R_VECT_MASK_RD__dma0__active 1 +#define R_VECT_MASK_RD__dma0__inactive 0 +#define R_VECT_MASK_RD__ext_dma1__BITNR 13 +#define R_VECT_MASK_RD__ext_dma1__WIDTH 1 +#define R_VECT_MASK_RD__ext_dma1__active 1 +#define R_VECT_MASK_RD__ext_dma1__inactive 0 +#define R_VECT_MASK_RD__ext_dma0__BITNR 12 +#define R_VECT_MASK_RD__ext_dma0__WIDTH 1 +#define R_VECT_MASK_RD__ext_dma0__active 1 +#define R_VECT_MASK_RD__ext_dma0__inactive 0 +#define R_VECT_MASK_RD__pa__BITNR 11 +#define R_VECT_MASK_RD__pa__WIDTH 1 +#define R_VECT_MASK_RD__pa__active 1 +#define R_VECT_MASK_RD__pa__inactive 0 +#define R_VECT_MASK_RD__irq_intnr__BITNR 10 +#define R_VECT_MASK_RD__irq_intnr__WIDTH 1 +#define R_VECT_MASK_RD__irq_intnr__active 1 +#define R_VECT_MASK_RD__irq_intnr__inactive 0 +#define R_VECT_MASK_RD__sw__BITNR 9 +#define R_VECT_MASK_RD__sw__WIDTH 1 +#define R_VECT_MASK_RD__sw__active 1 +#define R_VECT_MASK_RD__sw__inactive 0 +#define R_VECT_MASK_RD__serial__BITNR 8 +#define R_VECT_MASK_RD__serial__WIDTH 1 +#define R_VECT_MASK_RD__serial__active 1 +#define R_VECT_MASK_RD__serial__inactive 0 +#define R_VECT_MASK_RD__snmp__BITNR 7 +#define R_VECT_MASK_RD__snmp__WIDTH 1 +#define R_VECT_MASK_RD__snmp__active 1 +#define R_VECT_MASK_RD__snmp__inactive 0 +#define R_VECT_MASK_RD__network__BITNR 6 +#define R_VECT_MASK_RD__network__WIDTH 1 +#define R_VECT_MASK_RD__network__active 1 +#define R_VECT_MASK_RD__network__inactive 0 +#define R_VECT_MASK_RD__scsi1__BITNR 5 +#define R_VECT_MASK_RD__scsi1__WIDTH 1 +#define R_VECT_MASK_RD__scsi1__active 1 +#define R_VECT_MASK_RD__scsi1__inactive 0 +#define R_VECT_MASK_RD__par1__BITNR 5 +#define R_VECT_MASK_RD__par1__WIDTH 1 +#define R_VECT_MASK_RD__par1__active 1 +#define R_VECT_MASK_RD__par1__inactive 0 +#define R_VECT_MASK_RD__scsi0__BITNR 4 +#define R_VECT_MASK_RD__scsi0__WIDTH 1 +#define R_VECT_MASK_RD__scsi0__active 1 +#define R_VECT_MASK_RD__scsi0__inactive 0 +#define R_VECT_MASK_RD__par0__BITNR 4 +#define R_VECT_MASK_RD__par0__WIDTH 1 +#define R_VECT_MASK_RD__par0__active 1 +#define R_VECT_MASK_RD__par0__inactive 0 +#define R_VECT_MASK_RD__ata__BITNR 4 +#define R_VECT_MASK_RD__ata__WIDTH 1 +#define R_VECT_MASK_RD__ata__active 1 +#define R_VECT_MASK_RD__ata__inactive 0 +#define R_VECT_MASK_RD__mio__BITNR 4 +#define R_VECT_MASK_RD__mio__WIDTH 1 +#define R_VECT_MASK_RD__mio__active 1 +#define R_VECT_MASK_RD__mio__inactive 0 +#define R_VECT_MASK_RD__p21__BITNR 4 +#define R_VECT_MASK_RD__p21__WIDTH 1 +#define R_VECT_MASK_RD__p21__active 1 +#define R_VECT_MASK_RD__p21__inactive 0 +#define R_VECT_MASK_RD__timer1__BITNR 3 +#define R_VECT_MASK_RD__timer1__WIDTH 1 +#define R_VECT_MASK_RD__timer1__active 1 +#define R_VECT_MASK_RD__timer1__inactive 0 +#define R_VECT_MASK_RD__timer0__BITNR 2 +#define R_VECT_MASK_RD__timer0__WIDTH 1 +#define R_VECT_MASK_RD__timer0__active 1 +#define R_VECT_MASK_RD__timer0__inactive 0 +#define R_VECT_MASK_RD__nmi__BITNR 1 +#define R_VECT_MASK_RD__nmi__WIDTH 1 +#define R_VECT_MASK_RD__nmi__active 1 +#define R_VECT_MASK_RD__nmi__inactive 0 +#define R_VECT_MASK_RD__some__BITNR 0 +#define R_VECT_MASK_RD__some__WIDTH 1 +#define R_VECT_MASK_RD__some__active 1 +#define R_VECT_MASK_RD__some__inactive 0 + +#define R_VECT_MASK_CLR (IO_TYPECAST_UDWORD 0xb00000d8) +#define R_VECT_MASK_CLR__usb__BITNR 31 +#define R_VECT_MASK_CLR__usb__WIDTH 1 +#define R_VECT_MASK_CLR__usb__clr 1 +#define R_VECT_MASK_CLR__usb__nop 0 +#define R_VECT_MASK_CLR__dma9__BITNR 25 +#define R_VECT_MASK_CLR__dma9__WIDTH 1 +#define R_VECT_MASK_CLR__dma9__clr 1 +#define R_VECT_MASK_CLR__dma9__nop 0 +#define R_VECT_MASK_CLR__dma8__BITNR 24 +#define R_VECT_MASK_CLR__dma8__WIDTH 1 +#define R_VECT_MASK_CLR__dma8__clr 1 +#define R_VECT_MASK_CLR__dma8__nop 0 +#define R_VECT_MASK_CLR__dma7__BITNR 23 +#define R_VECT_MASK_CLR__dma7__WIDTH 1 +#define R_VECT_MASK_CLR__dma7__clr 1 +#define R_VECT_MASK_CLR__dma7__nop 0 +#define R_VECT_MASK_CLR__dma6__BITNR 22 +#define R_VECT_MASK_CLR__dma6__WIDTH 1 +#define R_VECT_MASK_CLR__dma6__clr 1 +#define R_VECT_MASK_CLR__dma6__nop 0 +#define R_VECT_MASK_CLR__dma5__BITNR 21 +#define R_VECT_MASK_CLR__dma5__WIDTH 1 +#define R_VECT_MASK_CLR__dma5__clr 1 +#define R_VECT_MASK_CLR__dma5__nop 0 +#define R_VECT_MASK_CLR__dma4__BITNR 20 +#define R_VECT_MASK_CLR__dma4__WIDTH 1 +#define R_VECT_MASK_CLR__dma4__clr 1 +#define R_VECT_MASK_CLR__dma4__nop 0 +#define R_VECT_MASK_CLR__dma3__BITNR 19 +#define R_VECT_MASK_CLR__dma3__WIDTH 1 +#define R_VECT_MASK_CLR__dma3__clr 1 +#define R_VECT_MASK_CLR__dma3__nop 0 +#define R_VECT_MASK_CLR__dma2__BITNR 18 +#define R_VECT_MASK_CLR__dma2__WIDTH 1 +#define R_VECT_MASK_CLR__dma2__clr 1 +#define R_VECT_MASK_CLR__dma2__nop 0 +#define R_VECT_MASK_CLR__dma1__BITNR 17 +#define R_VECT_MASK_CLR__dma1__WIDTH 1 +#define R_VECT_MASK_CLR__dma1__clr 1 +#define R_VECT_MASK_CLR__dma1__nop 0 +#define R_VECT_MASK_CLR__dma0__BITNR 16 +#define R_VECT_MASK_CLR__dma0__WIDTH 1 +#define R_VECT_MASK_CLR__dma0__clr 1 +#define R_VECT_MASK_CLR__dma0__nop 0 +#define R_VECT_MASK_CLR__ext_dma1__BITNR 13 +#define R_VECT_MASK_CLR__ext_dma1__WIDTH 1 +#define R_VECT_MASK_CLR__ext_dma1__clr 1 +#define R_VECT_MASK_CLR__ext_dma1__nop 0 +#define R_VECT_MASK_CLR__ext_dma0__BITNR 12 +#define R_VECT_MASK_CLR__ext_dma0__WIDTH 1 +#define R_VECT_MASK_CLR__ext_dma0__clr 1 +#define R_VECT_MASK_CLR__ext_dma0__nop 0 +#define R_VECT_MASK_CLR__pa__BITNR 11 +#define R_VECT_MASK_CLR__pa__WIDTH 1 +#define R_VECT_MASK_CLR__pa__clr 1 +#define R_VECT_MASK_CLR__pa__nop 0 +#define R_VECT_MASK_CLR__irq_intnr__BITNR 10 +#define R_VECT_MASK_CLR__irq_intnr__WIDTH 1 +#define R_VECT_MASK_CLR__irq_intnr__clr 1 +#define R_VECT_MASK_CLR__irq_intnr__nop 0 +#define R_VECT_MASK_CLR__sw__BITNR 9 +#define R_VECT_MASK_CLR__sw__WIDTH 1 +#define R_VECT_MASK_CLR__sw__clr 1 +#define R_VECT_MASK_CLR__sw__nop 0 +#define R_VECT_MASK_CLR__serial__BITNR 8 +#define R_VECT_MASK_CLR__serial__WIDTH 1 +#define R_VECT_MASK_CLR__serial__clr 1 +#define R_VECT_MASK_CLR__serial__nop 0 +#define R_VECT_MASK_CLR__snmp__BITNR 7 +#define R_VECT_MASK_CLR__snmp__WIDTH 1 +#define R_VECT_MASK_CLR__snmp__clr 1 +#define R_VECT_MASK_CLR__snmp__nop 0 +#define R_VECT_MASK_CLR__network__BITNR 6 +#define R_VECT_MASK_CLR__network__WIDTH 1 +#define R_VECT_MASK_CLR__network__clr 1 +#define R_VECT_MASK_CLR__network__nop 0 +#define R_VECT_MASK_CLR__scsi1__BITNR 5 +#define R_VECT_MASK_CLR__scsi1__WIDTH 1 +#define R_VECT_MASK_CLR__scsi1__clr 1 +#define R_VECT_MASK_CLR__scsi1__nop 0 +#define R_VECT_MASK_CLR__par1__BITNR 5 +#define R_VECT_MASK_CLR__par1__WIDTH 1 +#define R_VECT_MASK_CLR__par1__clr 1 +#define R_VECT_MASK_CLR__par1__nop 0 +#define R_VECT_MASK_CLR__scsi0__BITNR 4 +#define R_VECT_MASK_CLR__scsi0__WIDTH 1 +#define R_VECT_MASK_CLR__scsi0__clr 1 +#define R_VECT_MASK_CLR__scsi0__nop 0 +#define R_VECT_MASK_CLR__par0__BITNR 4 +#define R_VECT_MASK_CLR__par0__WIDTH 1 +#define R_VECT_MASK_CLR__par0__clr 1 +#define R_VECT_MASK_CLR__par0__nop 0 +#define R_VECT_MASK_CLR__ata__BITNR 4 +#define R_VECT_MASK_CLR__ata__WIDTH 1 +#define R_VECT_MASK_CLR__ata__clr 1 +#define R_VECT_MASK_CLR__ata__nop 0 +#define R_VECT_MASK_CLR__mio__BITNR 4 +#define R_VECT_MASK_CLR__mio__WIDTH 1 +#define R_VECT_MASK_CLR__mio__clr 1 +#define R_VECT_MASK_CLR__mio__nop 0 +#define R_VECT_MASK_CLR__p21__BITNR 4 +#define R_VECT_MASK_CLR__p21__WIDTH 1 +#define R_VECT_MASK_CLR__p21__clr 1 +#define R_VECT_MASK_CLR__p21__nop 0 +#define R_VECT_MASK_CLR__timer1__BITNR 3 +#define R_VECT_MASK_CLR__timer1__WIDTH 1 +#define R_VECT_MASK_CLR__timer1__clr 1 +#define R_VECT_MASK_CLR__timer1__nop 0 +#define R_VECT_MASK_CLR__timer0__BITNR 2 +#define R_VECT_MASK_CLR__timer0__WIDTH 1 +#define R_VECT_MASK_CLR__timer0__clr 1 +#define R_VECT_MASK_CLR__timer0__nop 0 +#define R_VECT_MASK_CLR__nmi__BITNR 1 +#define R_VECT_MASK_CLR__nmi__WIDTH 1 +#define R_VECT_MASK_CLR__nmi__clr 1 +#define R_VECT_MASK_CLR__nmi__nop 0 +#define R_VECT_MASK_CLR__some__BITNR 0 +#define R_VECT_MASK_CLR__some__WIDTH 1 +#define R_VECT_MASK_CLR__some__clr 1 +#define R_VECT_MASK_CLR__some__nop 0 + +#define R_VECT_READ (IO_TYPECAST_RO_UDWORD 0xb00000dc) +#define R_VECT_READ__usb__BITNR 31 +#define R_VECT_READ__usb__WIDTH 1 +#define R_VECT_READ__usb__active 1 +#define R_VECT_READ__usb__inactive 0 +#define R_VECT_READ__dma9__BITNR 25 +#define R_VECT_READ__dma9__WIDTH 1 +#define R_VECT_READ__dma9__active 1 +#define R_VECT_READ__dma9__inactive 0 +#define R_VECT_READ__dma8__BITNR 24 +#define R_VECT_READ__dma8__WIDTH 1 +#define R_VECT_READ__dma8__active 1 +#define R_VECT_READ__dma8__inactive 0 +#define R_VECT_READ__dma7__BITNR 23 +#define R_VECT_READ__dma7__WIDTH 1 +#define R_VECT_READ__dma7__active 1 +#define R_VECT_READ__dma7__inactive 0 +#define R_VECT_READ__dma6__BITNR 22 +#define R_VECT_READ__dma6__WIDTH 1 +#define R_VECT_READ__dma6__active 1 +#define R_VECT_READ__dma6__inactive 0 +#define R_VECT_READ__dma5__BITNR 21 +#define R_VECT_READ__dma5__WIDTH 1 +#define R_VECT_READ__dma5__active 1 +#define R_VECT_READ__dma5__inactive 0 +#define R_VECT_READ__dma4__BITNR 20 +#define R_VECT_READ__dma4__WIDTH 1 +#define R_VECT_READ__dma4__active 1 +#define R_VECT_READ__dma4__inactive 0 +#define R_VECT_READ__dma3__BITNR 19 +#define R_VECT_READ__dma3__WIDTH 1 +#define R_VECT_READ__dma3__active 1 +#define R_VECT_READ__dma3__inactive 0 +#define R_VECT_READ__dma2__BITNR 18 +#define R_VECT_READ__dma2__WIDTH 1 +#define R_VECT_READ__dma2__active 1 +#define R_VECT_READ__dma2__inactive 0 +#define R_VECT_READ__dma1__BITNR 17 +#define R_VECT_READ__dma1__WIDTH 1 +#define R_VECT_READ__dma1__active 1 +#define R_VECT_READ__dma1__inactive 0 +#define R_VECT_READ__dma0__BITNR 16 +#define R_VECT_READ__dma0__WIDTH 1 +#define R_VECT_READ__dma0__active 1 +#define R_VECT_READ__dma0__inactive 0 +#define R_VECT_READ__ext_dma1__BITNR 13 +#define R_VECT_READ__ext_dma1__WIDTH 1 +#define R_VECT_READ__ext_dma1__active 1 +#define R_VECT_READ__ext_dma1__inactive 0 +#define R_VECT_READ__ext_dma0__BITNR 12 +#define R_VECT_READ__ext_dma0__WIDTH 1 +#define R_VECT_READ__ext_dma0__active 1 +#define R_VECT_READ__ext_dma0__inactive 0 +#define R_VECT_READ__pa__BITNR 11 +#define R_VECT_READ__pa__WIDTH 1 +#define R_VECT_READ__pa__active 1 +#define R_VECT_READ__pa__inactive 0 +#define R_VECT_READ__irq_intnr__BITNR 10 +#define R_VECT_READ__irq_intnr__WIDTH 1 +#define R_VECT_READ__irq_intnr__active 1 +#define R_VECT_READ__irq_intnr__inactive 0 +#define R_VECT_READ__sw__BITNR 9 +#define R_VECT_READ__sw__WIDTH 1 +#define R_VECT_READ__sw__active 1 +#define R_VECT_READ__sw__inactive 0 +#define R_VECT_READ__serial__BITNR 8 +#define R_VECT_READ__serial__WIDTH 1 +#define R_VECT_READ__serial__active 1 +#define R_VECT_READ__serial__inactive 0 +#define R_VECT_READ__snmp__BITNR 7 +#define R_VECT_READ__snmp__WIDTH 1 +#define R_VECT_READ__snmp__active 1 +#define R_VECT_READ__snmp__inactive 0 +#define R_VECT_READ__network__BITNR 6 +#define R_VECT_READ__network__WIDTH 1 +#define R_VECT_READ__network__active 1 +#define R_VECT_READ__network__inactive 0 +#define R_VECT_READ__scsi1__BITNR 5 +#define R_VECT_READ__scsi1__WIDTH 1 +#define R_VECT_READ__scsi1__active 1 +#define R_VECT_READ__scsi1__inactive 0 +#define R_VECT_READ__par1__BITNR 5 +#define R_VECT_READ__par1__WIDTH 1 +#define R_VECT_READ__par1__active 1 +#define R_VECT_READ__par1__inactive 0 +#define R_VECT_READ__scsi0__BITNR 4 +#define R_VECT_READ__scsi0__WIDTH 1 +#define R_VECT_READ__scsi0__active 1 +#define R_VECT_READ__scsi0__inactive 0 +#define R_VECT_READ__par0__BITNR 4 +#define R_VECT_READ__par0__WIDTH 1 +#define R_VECT_READ__par0__active 1 +#define R_VECT_READ__par0__inactive 0 +#define R_VECT_READ__ata__BITNR 4 +#define R_VECT_READ__ata__WIDTH 1 +#define R_VECT_READ__ata__active 1 +#define R_VECT_READ__ata__inactive 0 +#define R_VECT_READ__mio__BITNR 4 +#define R_VECT_READ__mio__WIDTH 1 +#define R_VECT_READ__mio__active 1 +#define R_VECT_READ__mio__inactive 0 +#define R_VECT_READ__p21__BITNR 4 +#define R_VECT_READ__p21__WIDTH 1 +#define R_VECT_READ__p21__active 1 +#define R_VECT_READ__p21__inactive 0 +#define R_VECT_READ__timer1__BITNR 3 +#define R_VECT_READ__timer1__WIDTH 1 +#define R_VECT_READ__timer1__active 1 +#define R_VECT_READ__timer1__inactive 0 +#define R_VECT_READ__timer0__BITNR 2 +#define R_VECT_READ__timer0__WIDTH 1 +#define R_VECT_READ__timer0__active 1 +#define R_VECT_READ__timer0__inactive 0 +#define R_VECT_READ__nmi__BITNR 1 +#define R_VECT_READ__nmi__WIDTH 1 +#define R_VECT_READ__nmi__active 1 +#define R_VECT_READ__nmi__inactive 0 +#define R_VECT_READ__some__BITNR 0 +#define R_VECT_READ__some__WIDTH 1 +#define R_VECT_READ__some__active 1 +#define R_VECT_READ__some__inactive 0 + +#define R_VECT_MASK_SET (IO_TYPECAST_UDWORD 0xb00000dc) +#define R_VECT_MASK_SET__usb__BITNR 31 +#define R_VECT_MASK_SET__usb__WIDTH 1 +#define R_VECT_MASK_SET__usb__set 1 +#define R_VECT_MASK_SET__usb__nop 0 +#define R_VECT_MASK_SET__dma9__BITNR 25 +#define R_VECT_MASK_SET__dma9__WIDTH 1 +#define R_VECT_MASK_SET__dma9__set 1 +#define R_VECT_MASK_SET__dma9__nop 0 +#define R_VECT_MASK_SET__dma8__BITNR 24 +#define R_VECT_MASK_SET__dma8__WIDTH 1 +#define R_VECT_MASK_SET__dma8__set 1 +#define R_VECT_MASK_SET__dma8__nop 0 +#define R_VECT_MASK_SET__dma7__BITNR 23 +#define R_VECT_MASK_SET__dma7__WIDTH 1 +#define R_VECT_MASK_SET__dma7__set 1 +#define R_VECT_MASK_SET__dma7__nop 0 +#define R_VECT_MASK_SET__dma6__BITNR 22 +#define R_VECT_MASK_SET__dma6__WIDTH 1 +#define R_VECT_MASK_SET__dma6__set 1 +#define R_VECT_MASK_SET__dma6__nop 0 +#define R_VECT_MASK_SET__dma5__BITNR 21 +#define R_VECT_MASK_SET__dma5__WIDTH 1 +#define R_VECT_MASK_SET__dma5__set 1 +#define R_VECT_MASK_SET__dma5__nop 0 +#define R_VECT_MASK_SET__dma4__BITNR 20 +#define R_VECT_MASK_SET__dma4__WIDTH 1 +#define R_VECT_MASK_SET__dma4__set 1 +#define R_VECT_MASK_SET__dma4__nop 0 +#define R_VECT_MASK_SET__dma3__BITNR 19 +#define R_VECT_MASK_SET__dma3__WIDTH 1 +#define R_VECT_MASK_SET__dma3__set 1 +#define R_VECT_MASK_SET__dma3__nop 0 +#define R_VECT_MASK_SET__dma2__BITNR 18 +#define R_VECT_MASK_SET__dma2__WIDTH 1 +#define R_VECT_MASK_SET__dma2__set 1 +#define R_VECT_MASK_SET__dma2__nop 0 +#define R_VECT_MASK_SET__dma1__BITNR 17 +#define R_VECT_MASK_SET__dma1__WIDTH 1 +#define R_VECT_MASK_SET__dma1__set 1 +#define R_VECT_MASK_SET__dma1__nop 0 +#define R_VECT_MASK_SET__dma0__BITNR 16 +#define R_VECT_MASK_SET__dma0__WIDTH 1 +#define R_VECT_MASK_SET__dma0__set 1 +#define R_VECT_MASK_SET__dma0__nop 0 +#define R_VECT_MASK_SET__ext_dma1__BITNR 13 +#define R_VECT_MASK_SET__ext_dma1__WIDTH 1 +#define R_VECT_MASK_SET__ext_dma1__set 1 +#define R_VECT_MASK_SET__ext_dma1__nop 0 +#define R_VECT_MASK_SET__ext_dma0__BITNR 12 +#define R_VECT_MASK_SET__ext_dma0__WIDTH 1 +#define R_VECT_MASK_SET__ext_dma0__set 1 +#define R_VECT_MASK_SET__ext_dma0__nop 0 +#define R_VECT_MASK_SET__pa__BITNR 11 +#define R_VECT_MASK_SET__pa__WIDTH 1 +#define R_VECT_MASK_SET__pa__set 1 +#define R_VECT_MASK_SET__pa__nop 0 +#define R_VECT_MASK_SET__irq_intnr__BITNR 10 +#define R_VECT_MASK_SET__irq_intnr__WIDTH 1 +#define R_VECT_MASK_SET__irq_intnr__set 1 +#define R_VECT_MASK_SET__irq_intnr__nop 0 +#define R_VECT_MASK_SET__sw__BITNR 9 +#define R_VECT_MASK_SET__sw__WIDTH 1 +#define R_VECT_MASK_SET__sw__set 1 +#define R_VECT_MASK_SET__sw__nop 0 +#define R_VECT_MASK_SET__serial__BITNR 8 +#define R_VECT_MASK_SET__serial__WIDTH 1 +#define R_VECT_MASK_SET__serial__set 1 +#define R_VECT_MASK_SET__serial__nop 0 +#define R_VECT_MASK_SET__snmp__BITNR 7 +#define R_VECT_MASK_SET__snmp__WIDTH 1 +#define R_VECT_MASK_SET__snmp__set 1 +#define R_VECT_MASK_SET__snmp__nop 0 +#define R_VECT_MASK_SET__network__BITNR 6 +#define R_VECT_MASK_SET__network__WIDTH 1 +#define R_VECT_MASK_SET__network__set 1 +#define R_VECT_MASK_SET__network__nop 0 +#define R_VECT_MASK_SET__scsi1__BITNR 5 +#define R_VECT_MASK_SET__scsi1__WIDTH 1 +#define R_VECT_MASK_SET__scsi1__set 1 +#define R_VECT_MASK_SET__scsi1__nop 0 +#define R_VECT_MASK_SET__par1__BITNR 5 +#define R_VECT_MASK_SET__par1__WIDTH 1 +#define R_VECT_MASK_SET__par1__set 1 +#define R_VECT_MASK_SET__par1__nop 0 +#define R_VECT_MASK_SET__scsi0__BITNR 4 +#define R_VECT_MASK_SET__scsi0__WIDTH 1 +#define R_VECT_MASK_SET__scsi0__set 1 +#define R_VECT_MASK_SET__scsi0__nop 0 +#define R_VECT_MASK_SET__par0__BITNR 4 +#define R_VECT_MASK_SET__par0__WIDTH 1 +#define R_VECT_MASK_SET__par0__set 1 +#define R_VECT_MASK_SET__par0__nop 0 +#define R_VECT_MASK_SET__ata__BITNR 4 +#define R_VECT_MASK_SET__ata__WIDTH 1 +#define R_VECT_MASK_SET__ata__set 1 +#define R_VECT_MASK_SET__ata__nop 0 +#define R_VECT_MASK_SET__mio__BITNR 4 +#define R_VECT_MASK_SET__mio__WIDTH 1 +#define R_VECT_MASK_SET__mio__set 1 +#define R_VECT_MASK_SET__mio__nop 0 +#define R_VECT_MASK_SET__p21__BITNR 4 +#define R_VECT_MASK_SET__p21__WIDTH 1 +#define R_VECT_MASK_SET__p21__set 1 +#define R_VECT_MASK_SET__p21__nop 0 +#define R_VECT_MASK_SET__timer1__BITNR 3 +#define R_VECT_MASK_SET__timer1__WIDTH 1 +#define R_VECT_MASK_SET__timer1__set 1 +#define R_VECT_MASK_SET__timer1__nop 0 +#define R_VECT_MASK_SET__timer0__BITNR 2 +#define R_VECT_MASK_SET__timer0__WIDTH 1 +#define R_VECT_MASK_SET__timer0__set 1 +#define R_VECT_MASK_SET__timer0__nop 0 +#define R_VECT_MASK_SET__nmi__BITNR 1 +#define R_VECT_MASK_SET__nmi__WIDTH 1 +#define R_VECT_MASK_SET__nmi__set 1 +#define R_VECT_MASK_SET__nmi__nop 0 +#define R_VECT_MASK_SET__some__BITNR 0 +#define R_VECT_MASK_SET__some__WIDTH 1 +#define R_VECT_MASK_SET__some__set 1 +#define R_VECT_MASK_SET__some__nop 0 + +/* +!* DMA registers +!*/ + +#define R_SET_EOP (IO_TYPECAST_UDWORD 0xb000003c) +#define R_SET_EOP__ch9_eop__BITNR 3 +#define R_SET_EOP__ch9_eop__WIDTH 1 +#define R_SET_EOP__ch9_eop__set 1 +#define R_SET_EOP__ch9_eop__nop 0 +#define R_SET_EOP__ch7_eop__BITNR 2 +#define R_SET_EOP__ch7_eop__WIDTH 1 +#define R_SET_EOP__ch7_eop__set 1 +#define R_SET_EOP__ch7_eop__nop 0 +#define R_SET_EOP__ch5_eop__BITNR 1 +#define R_SET_EOP__ch5_eop__WIDTH 1 +#define R_SET_EOP__ch5_eop__set 1 +#define R_SET_EOP__ch5_eop__nop 0 +#define R_SET_EOP__ch3_eop__BITNR 0 +#define R_SET_EOP__ch3_eop__WIDTH 1 +#define R_SET_EOP__ch3_eop__set 1 +#define R_SET_EOP__ch3_eop__nop 0 + +#define R_DMA_CH0_HWSW (IO_TYPECAST_UDWORD 0xb0000100) +#define R_DMA_CH0_HWSW__hw__BITNR 16 +#define R_DMA_CH0_HWSW__hw__WIDTH 16 +#define R_DMA_CH0_HWSW__sw__BITNR 0 +#define R_DMA_CH0_HWSW__sw__WIDTH 16 + +#define R_DMA_CH0_DESCR (IO_TYPECAST_UDWORD 0xb000010c) +#define R_DMA_CH0_DESCR__descr__BITNR 0 +#define R_DMA_CH0_DESCR__descr__WIDTH 32 + +#define R_DMA_CH0_NEXT (IO_TYPECAST_UDWORD 0xb0000104) +#define R_DMA_CH0_NEXT__next__BITNR 0 +#define R_DMA_CH0_NEXT__next__WIDTH 32 + +#define R_DMA_CH0_BUF (IO_TYPECAST_UDWORD 0xb0000108) +#define R_DMA_CH0_BUF__buf__BITNR 0 +#define R_DMA_CH0_BUF__buf__WIDTH 32 + +#define R_DMA_CH0_FIRST (IO_TYPECAST_UDWORD 0xb00001a0) +#define R_DMA_CH0_FIRST__first__BITNR 0 +#define R_DMA_CH0_FIRST__first__WIDTH 32 + +#define R_DMA_CH0_CMD (IO_TYPECAST_BYTE 0xb00001d0) +#define R_DMA_CH0_CMD__cmd__BITNR 0 +#define R_DMA_CH0_CMD__cmd__WIDTH 3 +#define R_DMA_CH0_CMD__cmd__hold 0 +#define R_DMA_CH0_CMD__cmd__start 1 +#define R_DMA_CH0_CMD__cmd__restart 3 +#define R_DMA_CH0_CMD__cmd__continue 3 +#define R_DMA_CH0_CMD__cmd__reset 4 + +#define R_DMA_CH0_CLR_INTR (IO_TYPECAST_BYTE 0xb00001d1) +#define R_DMA_CH0_CLR_INTR__clr_eop__BITNR 1 +#define R_DMA_CH0_CLR_INTR__clr_eop__WIDTH 1 +#define R_DMA_CH0_CLR_INTR__clr_eop__do 1 +#define R_DMA_CH0_CLR_INTR__clr_eop__dont 0 +#define R_DMA_CH0_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH0_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH0_CLR_INTR__clr_descr__do 1 +#define R_DMA_CH0_CLR_INTR__clr_descr__dont 0 + +#define R_DMA_CH0_STATUS (IO_TYPECAST_RO_BYTE 0xb00001d2) +#define R_DMA_CH0_STATUS__avail__BITNR 0 +#define R_DMA_CH0_STATUS__avail__WIDTH 7 + +#define R_DMA_CH1_HWSW (IO_TYPECAST_UDWORD 0xb0000110) +#define R_DMA_CH1_HWSW__hw__BITNR 16 +#define R_DMA_CH1_HWSW__hw__WIDTH 16 +#define R_DMA_CH1_HWSW__sw__BITNR 0 +#define R_DMA_CH1_HWSW__sw__WIDTH 16 + +#define R_DMA_CH1_DESCR (IO_TYPECAST_UDWORD 0xb000011c) +#define R_DMA_CH1_DESCR__descr__BITNR 0 +#define R_DMA_CH1_DESCR__descr__WIDTH 32 + +#define R_DMA_CH1_NEXT (IO_TYPECAST_UDWORD 0xb0000114) +#define R_DMA_CH1_NEXT__next__BITNR 0 +#define R_DMA_CH1_NEXT__next__WIDTH 32 + +#define R_DMA_CH1_BUF (IO_TYPECAST_UDWORD 0xb0000118) +#define R_DMA_CH1_BUF__buf__BITNR 0 +#define R_DMA_CH1_BUF__buf__WIDTH 32 + +#define R_DMA_CH1_FIRST (IO_TYPECAST_UDWORD 0xb00001a4) +#define R_DMA_CH1_FIRST__first__BITNR 0 +#define R_DMA_CH1_FIRST__first__WIDTH 32 + +#define R_DMA_CH1_CMD (IO_TYPECAST_BYTE 0xb00001d4) +#define R_DMA_CH1_CMD__cmd__BITNR 0 +#define R_DMA_CH1_CMD__cmd__WIDTH 3 +#define R_DMA_CH1_CMD__cmd__hold 0 +#define R_DMA_CH1_CMD__cmd__start 1 +#define R_DMA_CH1_CMD__cmd__restart 3 +#define R_DMA_CH1_CMD__cmd__continue 3 +#define R_DMA_CH1_CMD__cmd__reset 4 + +#define R_DMA_CH1_CLR_INTR (IO_TYPECAST_BYTE 0xb00001d5) +#define R_DMA_CH1_CLR_INTR__clr_eop__BITNR 1 +#define R_DMA_CH1_CLR_INTR__clr_eop__WIDTH 1 +#define R_DMA_CH1_CLR_INTR__clr_eop__do 1 +#define R_DMA_CH1_CLR_INTR__clr_eop__dont 0 +#define R_DMA_CH1_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH1_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH1_CLR_INTR__clr_descr__do 1 +#define R_DMA_CH1_CLR_INTR__clr_descr__dont 0 + +#define R_DMA_CH1_STATUS (IO_TYPECAST_RO_BYTE 0xb00001d6) +#define R_DMA_CH1_STATUS__avail__BITNR 0 +#define R_DMA_CH1_STATUS__avail__WIDTH 7 + +#define R_DMA_CH2_HWSW (IO_TYPECAST_UDWORD 0xb0000120) +#define R_DMA_CH2_HWSW__hw__BITNR 16 +#define R_DMA_CH2_HWSW__hw__WIDTH 16 +#define R_DMA_CH2_HWSW__sw__BITNR 0 +#define R_DMA_CH2_HWSW__sw__WIDTH 16 + +#define R_DMA_CH2_DESCR (IO_TYPECAST_UDWORD 0xb000012c) +#define R_DMA_CH2_DESCR__descr__BITNR 0 +#define R_DMA_CH2_DESCR__descr__WIDTH 32 + +#define R_DMA_CH2_NEXT (IO_TYPECAST_UDWORD 0xb0000124) +#define R_DMA_CH2_NEXT__next__BITNR 0 +#define R_DMA_CH2_NEXT__next__WIDTH 32 + +#define R_DMA_CH2_BUF (IO_TYPECAST_UDWORD 0xb0000128) +#define R_DMA_CH2_BUF__buf__BITNR 0 +#define R_DMA_CH2_BUF__buf__WIDTH 32 + +#define R_DMA_CH2_FIRST (IO_TYPECAST_UDWORD 0xb00001a8) +#define R_DMA_CH2_FIRST__first__BITNR 0 +#define R_DMA_CH2_FIRST__first__WIDTH 32 + +#define R_DMA_CH2_CMD (IO_TYPECAST_BYTE 0xb00001d8) +#define R_DMA_CH2_CMD__cmd__BITNR 0 +#define R_DMA_CH2_CMD__cmd__WIDTH 3 +#define R_DMA_CH2_CMD__cmd__hold 0 +#define R_DMA_CH2_CMD__cmd__start 1 +#define R_DMA_CH2_CMD__cmd__restart 3 +#define R_DMA_CH2_CMD__cmd__continue 3 +#define R_DMA_CH2_CMD__cmd__reset 4 + +#define R_DMA_CH2_CLR_INTR (IO_TYPECAST_BYTE 0xb00001d9) +#define R_DMA_CH2_CLR_INTR__clr_eop__BITNR 1 +#define R_DMA_CH2_CLR_INTR__clr_eop__WIDTH 1 +#define R_DMA_CH2_CLR_INTR__clr_eop__do 1 +#define R_DMA_CH2_CLR_INTR__clr_eop__dont 0 +#define R_DMA_CH2_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH2_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH2_CLR_INTR__clr_descr__do 1 +#define R_DMA_CH2_CLR_INTR__clr_descr__dont 0 + +#define R_DMA_CH2_STATUS (IO_TYPECAST_RO_BYTE 0xb00001da) +#define R_DMA_CH2_STATUS__avail__BITNR 0 +#define R_DMA_CH2_STATUS__avail__WIDTH 7 + +#define R_DMA_CH3_HWSW (IO_TYPECAST_UDWORD 0xb0000130) +#define R_DMA_CH3_HWSW__hw__BITNR 16 +#define R_DMA_CH3_HWSW__hw__WIDTH 16 +#define R_DMA_CH3_HWSW__sw__BITNR 0 +#define R_DMA_CH3_HWSW__sw__WIDTH 16 + +#define R_DMA_CH3_DESCR (IO_TYPECAST_UDWORD 0xb000013c) +#define R_DMA_CH3_DESCR__descr__BITNR 0 +#define R_DMA_CH3_DESCR__descr__WIDTH 32 + +#define R_DMA_CH3_NEXT (IO_TYPECAST_UDWORD 0xb0000134) +#define R_DMA_CH3_NEXT__next__BITNR 0 +#define R_DMA_CH3_NEXT__next__WIDTH 32 + +#define R_DMA_CH3_BUF (IO_TYPECAST_UDWORD 0xb0000138) +#define R_DMA_CH3_BUF__buf__BITNR 0 +#define R_DMA_CH3_BUF__buf__WIDTH 32 + +#define R_DMA_CH3_FIRST (IO_TYPECAST_UDWORD 0xb00001ac) +#define R_DMA_CH3_FIRST__first__BITNR 0 +#define R_DMA_CH3_FIRST__first__WIDTH 32 + +#define R_DMA_CH3_CMD (IO_TYPECAST_BYTE 0xb00001dc) +#define R_DMA_CH3_CMD__cmd__BITNR 0 +#define R_DMA_CH3_CMD__cmd__WIDTH 3 +#define R_DMA_CH3_CMD__cmd__hold 0 +#define R_DMA_CH3_CMD__cmd__start 1 +#define R_DMA_CH3_CMD__cmd__restart 3 +#define R_DMA_CH3_CMD__cmd__continue 3 +#define R_DMA_CH3_CMD__cmd__reset 4 + +#define R_DMA_CH3_CLR_INTR (IO_TYPECAST_BYTE 0xb00001dd) +#define R_DMA_CH3_CLR_INTR__clr_eop__BITNR 1 +#define R_DMA_CH3_CLR_INTR__clr_eop__WIDTH 1 +#define R_DMA_CH3_CLR_INTR__clr_eop__do 1 +#define R_DMA_CH3_CLR_INTR__clr_eop__dont 0 +#define R_DMA_CH3_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH3_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH3_CLR_INTR__clr_descr__do 1 +#define R_DMA_CH3_CLR_INTR__clr_descr__dont 0 + +#define R_DMA_CH3_STATUS (IO_TYPECAST_RO_BYTE 0xb00001de) +#define R_DMA_CH3_STATUS__avail__BITNR 0 +#define R_DMA_CH3_STATUS__avail__WIDTH 7 + +#define R_DMA_CH4_HWSW (IO_TYPECAST_UDWORD 0xb0000140) +#define R_DMA_CH4_HWSW__hw__BITNR 16 +#define R_DMA_CH4_HWSW__hw__WIDTH 16 +#define R_DMA_CH4_HWSW__sw__BITNR 0 +#define R_DMA_CH4_HWSW__sw__WIDTH 16 + +#define R_DMA_CH4_DESCR (IO_TYPECAST_UDWORD 0xb000014c) +#define R_DMA_CH4_DESCR__descr__BITNR 0 +#define R_DMA_CH4_DESCR__descr__WIDTH 32 + +#define R_DMA_CH4_NEXT (IO_TYPECAST_UDWORD 0xb0000144) +#define R_DMA_CH4_NEXT__next__BITNR 0 +#define R_DMA_CH4_NEXT__next__WIDTH 32 + +#define R_DMA_CH4_BUF (IO_TYPECAST_UDWORD 0xb0000148) +#define R_DMA_CH4_BUF__buf__BITNR 0 +#define R_DMA_CH4_BUF__buf__WIDTH 32 + +#define R_DMA_CH4_FIRST (IO_TYPECAST_UDWORD 0xb00001b0) +#define R_DMA_CH4_FIRST__first__BITNR 0 +#define R_DMA_CH4_FIRST__first__WIDTH 32 + +#define R_DMA_CH4_CMD (IO_TYPECAST_BYTE 0xb00001e0) +#define R_DMA_CH4_CMD__cmd__BITNR 0 +#define R_DMA_CH4_CMD__cmd__WIDTH 3 +#define R_DMA_CH4_CMD__cmd__hold 0 +#define R_DMA_CH4_CMD__cmd__start 1 +#define R_DMA_CH4_CMD__cmd__restart 3 +#define R_DMA_CH4_CMD__cmd__continue 3 +#define R_DMA_CH4_CMD__cmd__reset 4 + +#define R_DMA_CH4_CLR_INTR (IO_TYPECAST_BYTE 0xb00001e1) +#define R_DMA_CH4_CLR_INTR__clr_eop__BITNR 1 +#define R_DMA_CH4_CLR_INTR__clr_eop__WIDTH 1 +#define R_DMA_CH4_CLR_INTR__clr_eop__do 1 +#define R_DMA_CH4_CLR_INTR__clr_eop__dont 0 +#define R_DMA_CH4_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH4_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH4_CLR_INTR__clr_descr__do 1 +#define R_DMA_CH4_CLR_INTR__clr_descr__dont 0 + +#define R_DMA_CH4_STATUS (IO_TYPECAST_RO_BYTE 0xb00001e2) +#define R_DMA_CH4_STATUS__avail__BITNR 0 +#define R_DMA_CH4_STATUS__avail__WIDTH 7 + +#define R_DMA_CH5_HWSW (IO_TYPECAST_UDWORD 0xb0000150) +#define R_DMA_CH5_HWSW__hw__BITNR 16 +#define R_DMA_CH5_HWSW__hw__WIDTH 16 +#define R_DMA_CH5_HWSW__sw__BITNR 0 +#define R_DMA_CH5_HWSW__sw__WIDTH 16 + +#define R_DMA_CH5_DESCR (IO_TYPECAST_UDWORD 0xb000015c) +#define R_DMA_CH5_DESCR__descr__BITNR 0 +#define R_DMA_CH5_DESCR__descr__WIDTH 32 + +#define R_DMA_CH5_NEXT (IO_TYPECAST_UDWORD 0xb0000154) +#define R_DMA_CH5_NEXT__next__BITNR 0 +#define R_DMA_CH5_NEXT__next__WIDTH 32 + +#define R_DMA_CH5_BUF (IO_TYPECAST_UDWORD 0xb0000158) +#define R_DMA_CH5_BUF__buf__BITNR 0 +#define R_DMA_CH5_BUF__buf__WIDTH 32 + +#define R_DMA_CH5_FIRST (IO_TYPECAST_UDWORD 0xb00001b4) +#define R_DMA_CH5_FIRST__first__BITNR 0 +#define R_DMA_CH5_FIRST__first__WIDTH 32 + +#define R_DMA_CH5_CMD (IO_TYPECAST_BYTE 0xb00001e4) +#define R_DMA_CH5_CMD__cmd__BITNR 0 +#define R_DMA_CH5_CMD__cmd__WIDTH 3 +#define R_DMA_CH5_CMD__cmd__hold 0 +#define R_DMA_CH5_CMD__cmd__start 1 +#define R_DMA_CH5_CMD__cmd__restart 3 +#define R_DMA_CH5_CMD__cmd__continue 3 +#define R_DMA_CH5_CMD__cmd__reset 4 + +#define R_DMA_CH5_CLR_INTR (IO_TYPECAST_BYTE 0xb00001e5) +#define R_DMA_CH5_CLR_INTR__clr_eop__BITNR 1 +#define R_DMA_CH5_CLR_INTR__clr_eop__WIDTH 1 +#define R_DMA_CH5_CLR_INTR__clr_eop__do 1 +#define R_DMA_CH5_CLR_INTR__clr_eop__dont 0 +#define R_DMA_CH5_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH5_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH5_CLR_INTR__clr_descr__do 1 +#define R_DMA_CH5_CLR_INTR__clr_descr__dont 0 + +#define R_DMA_CH5_STATUS (IO_TYPECAST_RO_BYTE 0xb00001e6) +#define R_DMA_CH5_STATUS__avail__BITNR 0 +#define R_DMA_CH5_STATUS__avail__WIDTH 7 + +#define R_DMA_CH6_HWSW (IO_TYPECAST_UDWORD 0xb0000160) +#define R_DMA_CH6_HWSW__hw__BITNR 16 +#define R_DMA_CH6_HWSW__hw__WIDTH 16 +#define R_DMA_CH6_HWSW__sw__BITNR 0 +#define R_DMA_CH6_HWSW__sw__WIDTH 16 + +#define R_DMA_CH6_DESCR (IO_TYPECAST_UDWORD 0xb000016c) +#define R_DMA_CH6_DESCR__descr__BITNR 0 +#define R_DMA_CH6_DESCR__descr__WIDTH 32 + +#define R_DMA_CH6_NEXT (IO_TYPECAST_UDWORD 0xb0000164) +#define R_DMA_CH6_NEXT__next__BITNR 0 +#define R_DMA_CH6_NEXT__next__WIDTH 32 + +#define R_DMA_CH6_BUF (IO_TYPECAST_UDWORD 0xb0000168) +#define R_DMA_CH6_BUF__buf__BITNR 0 +#define R_DMA_CH6_BUF__buf__WIDTH 32 + +#define R_DMA_CH6_FIRST (IO_TYPECAST_UDWORD 0xb00001b8) +#define R_DMA_CH6_FIRST__first__BITNR 0 +#define R_DMA_CH6_FIRST__first__WIDTH 32 + +#define R_DMA_CH6_CMD (IO_TYPECAST_BYTE 0xb00001e8) +#define R_DMA_CH6_CMD__cmd__BITNR 0 +#define R_DMA_CH6_CMD__cmd__WIDTH 3 +#define R_DMA_CH6_CMD__cmd__hold 0 +#define R_DMA_CH6_CMD__cmd__start 1 +#define R_DMA_CH6_CMD__cmd__restart 3 +#define R_DMA_CH6_CMD__cmd__continue 3 +#define R_DMA_CH6_CMD__cmd__reset 4 + +#define R_DMA_CH6_CLR_INTR (IO_TYPECAST_BYTE 0xb00001e9) +#define R_DMA_CH6_CLR_INTR__clr_eop__BITNR 1 +#define R_DMA_CH6_CLR_INTR__clr_eop__WIDTH 1 +#define R_DMA_CH6_CLR_INTR__clr_eop__do 1 +#define R_DMA_CH6_CLR_INTR__clr_eop__dont 0 +#define R_DMA_CH6_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH6_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH6_CLR_INTR__clr_descr__do 1 +#define R_DMA_CH6_CLR_INTR__clr_descr__dont 0 + +#define R_DMA_CH6_STATUS (IO_TYPECAST_RO_BYTE 0xb00001ea) +#define R_DMA_CH6_STATUS__avail__BITNR 0 +#define R_DMA_CH6_STATUS__avail__WIDTH 7 + +#define R_DMA_CH7_HWSW (IO_TYPECAST_UDWORD 0xb0000170) +#define R_DMA_CH7_HWSW__hw__BITNR 16 +#define R_DMA_CH7_HWSW__hw__WIDTH 16 +#define R_DMA_CH7_HWSW__sw__BITNR 0 +#define R_DMA_CH7_HWSW__sw__WIDTH 16 + +#define R_DMA_CH7_DESCR (IO_TYPECAST_UDWORD 0xb000017c) +#define R_DMA_CH7_DESCR__descr__BITNR 0 +#define R_DMA_CH7_DESCR__descr__WIDTH 32 + +#define R_DMA_CH7_NEXT (IO_TYPECAST_UDWORD 0xb0000174) +#define R_DMA_CH7_NEXT__next__BITNR 0 +#define R_DMA_CH7_NEXT__next__WIDTH 32 + +#define R_DMA_CH7_BUF (IO_TYPECAST_UDWORD 0xb0000178) +#define R_DMA_CH7_BUF__buf__BITNR 0 +#define R_DMA_CH7_BUF__buf__WIDTH 32 + +#define R_DMA_CH7_FIRST (IO_TYPECAST_UDWORD 0xb00001bc) +#define R_DMA_CH7_FIRST__first__BITNR 0 +#define R_DMA_CH7_FIRST__first__WIDTH 32 + +#define R_DMA_CH7_CMD (IO_TYPECAST_BYTE 0xb00001ec) +#define R_DMA_CH7_CMD__cmd__BITNR 0 +#define R_DMA_CH7_CMD__cmd__WIDTH 3 +#define R_DMA_CH7_CMD__cmd__hold 0 +#define R_DMA_CH7_CMD__cmd__start 1 +#define R_DMA_CH7_CMD__cmd__restart 3 +#define R_DMA_CH7_CMD__cmd__continue 3 +#define R_DMA_CH7_CMD__cmd__reset 4 + +#define R_DMA_CH7_CLR_INTR (IO_TYPECAST_BYTE 0xb00001ed) +#define R_DMA_CH7_CLR_INTR__clr_eop__BITNR 1 +#define R_DMA_CH7_CLR_INTR__clr_eop__WIDTH 1 +#define R_DMA_CH7_CLR_INTR__clr_eop__do 1 +#define R_DMA_CH7_CLR_INTR__clr_eop__dont 0 +#define R_DMA_CH7_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH7_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH7_CLR_INTR__clr_descr__do 1 +#define R_DMA_CH7_CLR_INTR__clr_descr__dont 0 + +#define R_DMA_CH7_STATUS (IO_TYPECAST_RO_BYTE 0xb00001ee) +#define R_DMA_CH7_STATUS__avail__BITNR 0 +#define R_DMA_CH7_STATUS__avail__WIDTH 7 + +#define R_DMA_CH8_HWSW (IO_TYPECAST_UDWORD 0xb0000180) +#define R_DMA_CH8_HWSW__hw__BITNR 16 +#define R_DMA_CH8_HWSW__hw__WIDTH 16 +#define R_DMA_CH8_HWSW__sw__BITNR 0 +#define R_DMA_CH8_HWSW__sw__WIDTH 16 + +#define R_DMA_CH8_DESCR (IO_TYPECAST_UDWORD 0xb000018c) +#define R_DMA_CH8_DESCR__descr__BITNR 0 +#define R_DMA_CH8_DESCR__descr__WIDTH 32 + +#define R_DMA_CH8_NEXT (IO_TYPECAST_UDWORD 0xb0000184) +#define R_DMA_CH8_NEXT__next__BITNR 0 +#define R_DMA_CH8_NEXT__next__WIDTH 32 + +#define R_DMA_CH8_BUF (IO_TYPECAST_UDWORD 0xb0000188) +#define R_DMA_CH8_BUF__buf__BITNR 0 +#define R_DMA_CH8_BUF__buf__WIDTH 32 + +#define R_DMA_CH8_FIRST (IO_TYPECAST_UDWORD 0xb00001c0) +#define R_DMA_CH8_FIRST__first__BITNR 0 +#define R_DMA_CH8_FIRST__first__WIDTH 32 + +#define R_DMA_CH8_CMD (IO_TYPECAST_BYTE 0xb00001f0) +#define R_DMA_CH8_CMD__cmd__BITNR 0 +#define R_DMA_CH8_CMD__cmd__WIDTH 3 +#define R_DMA_CH8_CMD__cmd__hold 0 +#define R_DMA_CH8_CMD__cmd__start 1 +#define R_DMA_CH8_CMD__cmd__restart 3 +#define R_DMA_CH8_CMD__cmd__continue 3 +#define R_DMA_CH8_CMD__cmd__reset 4 + +#define R_DMA_CH8_CLR_INTR (IO_TYPECAST_BYTE 0xb00001f1) +#define R_DMA_CH8_CLR_INTR__clr_eop__BITNR 1 +#define R_DMA_CH8_CLR_INTR__clr_eop__WIDTH 1 +#define R_DMA_CH8_CLR_INTR__clr_eop__do 1 +#define R_DMA_CH8_CLR_INTR__clr_eop__dont 0 +#define R_DMA_CH8_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH8_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH8_CLR_INTR__clr_descr__do 1 +#define R_DMA_CH8_CLR_INTR__clr_descr__dont 0 + +#define R_DMA_CH8_STATUS (IO_TYPECAST_RO_BYTE 0xb00001f2) +#define R_DMA_CH8_STATUS__avail__BITNR 0 +#define R_DMA_CH8_STATUS__avail__WIDTH 7 + +#define R_DMA_CH8_SUB (IO_TYPECAST_UDWORD 0xb000018c) +#define R_DMA_CH8_SUB__sub__BITNR 0 +#define R_DMA_CH8_SUB__sub__WIDTH 32 + +#define R_DMA_CH8_NEP (IO_TYPECAST_UDWORD 0xb00001c0) +#define R_DMA_CH8_NEP__nep__BITNR 0 +#define R_DMA_CH8_NEP__nep__WIDTH 32 + +#define R_DMA_CH8_SUB0_EP (IO_TYPECAST_UDWORD 0xb00001c8) +#define R_DMA_CH8_SUB0_EP__ep__BITNR 0 +#define R_DMA_CH8_SUB0_EP__ep__WIDTH 32 + +#define R_DMA_CH8_SUB0_CMD (IO_TYPECAST_BYTE 0xb00001d3) +#define R_DMA_CH8_SUB0_CMD__cmd__BITNR 0 +#define R_DMA_CH8_SUB0_CMD__cmd__WIDTH 1 +#define R_DMA_CH8_SUB0_CMD__cmd__stop 0 +#define R_DMA_CH8_SUB0_CMD__cmd__start 1 + +#define R_DMA_CH8_SUB0_CLR_INTR (IO_TYPECAST_BYTE 0xb00001e3) +#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__dont 0 +#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__do 1 + +#define R_DMA_CH8_SUB1_EP (IO_TYPECAST_UDWORD 0xb00001cc) +#define R_DMA_CH8_SUB1_EP__ep__BITNR 0 +#define R_DMA_CH8_SUB1_EP__ep__WIDTH 32 + +#define R_DMA_CH8_SUB1_CMD (IO_TYPECAST_BYTE 0xb00001d7) +#define R_DMA_CH8_SUB1_CMD__cmd__BITNR 0 +#define R_DMA_CH8_SUB1_CMD__cmd__WIDTH 1 +#define R_DMA_CH8_SUB1_CMD__cmd__stop 0 +#define R_DMA_CH8_SUB1_CMD__cmd__start 1 + +#define R_DMA_CH8_SUB1_CLR_INTR (IO_TYPECAST_BYTE 0xb00001e7) +#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__dont 0 +#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__do 1 + +#define R_DMA_CH8_SUB2_EP (IO_TYPECAST_UDWORD 0xb00001f8) +#define R_DMA_CH8_SUB2_EP__ep__BITNR 0 +#define R_DMA_CH8_SUB2_EP__ep__WIDTH 32 + +#define R_DMA_CH8_SUB2_CMD (IO_TYPECAST_BYTE 0xb00001db) +#define R_DMA_CH8_SUB2_CMD__cmd__BITNR 0 +#define R_DMA_CH8_SUB2_CMD__cmd__WIDTH 1 +#define R_DMA_CH8_SUB2_CMD__cmd__stop 0 +#define R_DMA_CH8_SUB2_CMD__cmd__start 1 + +#define R_DMA_CH8_SUB2_CLR_INTR (IO_TYPECAST_BYTE 0xb00001eb) +#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__dont 0 +#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__do 1 + +#define R_DMA_CH8_SUB3_EP (IO_TYPECAST_UDWORD 0xb00001fc) +#define R_DMA_CH8_SUB3_EP__ep__BITNR 0 +#define R_DMA_CH8_SUB3_EP__ep__WIDTH 32 + +#define R_DMA_CH8_SUB3_CMD (IO_TYPECAST_BYTE 0xb00001df) +#define R_DMA_CH8_SUB3_CMD__cmd__BITNR 0 +#define R_DMA_CH8_SUB3_CMD__cmd__WIDTH 1 +#define R_DMA_CH8_SUB3_CMD__cmd__stop 0 +#define R_DMA_CH8_SUB3_CMD__cmd__start 1 + +#define R_DMA_CH8_SUB3_CLR_INTR (IO_TYPECAST_BYTE 0xb00001ef) +#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__dont 0 +#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__do 1 + +#define R_DMA_CH9_HWSW (IO_TYPECAST_UDWORD 0xb0000190) +#define R_DMA_CH9_HWSW__hw__BITNR 16 +#define R_DMA_CH9_HWSW__hw__WIDTH 16 +#define R_DMA_CH9_HWSW__sw__BITNR 0 +#define R_DMA_CH9_HWSW__sw__WIDTH 16 + +#define R_DMA_CH9_DESCR (IO_TYPECAST_UDWORD 0xb000019c) +#define R_DMA_CH9_DESCR__descr__BITNR 0 +#define R_DMA_CH9_DESCR__descr__WIDTH 32 + +#define R_DMA_CH9_NEXT (IO_TYPECAST_UDWORD 0xb0000194) +#define R_DMA_CH9_NEXT__next__BITNR 0 +#define R_DMA_CH9_NEXT__next__WIDTH 32 + +#define R_DMA_CH9_BUF (IO_TYPECAST_UDWORD 0xb0000198) +#define R_DMA_CH9_BUF__buf__BITNR 0 +#define R_DMA_CH9_BUF__buf__WIDTH 32 + +#define R_DMA_CH9_FIRST (IO_TYPECAST_UDWORD 0xb00001c4) +#define R_DMA_CH9_FIRST__first__BITNR 0 +#define R_DMA_CH9_FIRST__first__WIDTH 32 + +#define R_DMA_CH9_CMD (IO_TYPECAST_BYTE 0xb00001f4) +#define R_DMA_CH9_CMD__cmd__BITNR 0 +#define R_DMA_CH9_CMD__cmd__WIDTH 3 +#define R_DMA_CH9_CMD__cmd__hold 0 +#define R_DMA_CH9_CMD__cmd__start 1 +#define R_DMA_CH9_CMD__cmd__restart 3 +#define R_DMA_CH9_CMD__cmd__continue 3 +#define R_DMA_CH9_CMD__cmd__reset 4 + +#define R_DMA_CH9_CLR_INTR (IO_TYPECAST_BYTE 0xb00001f5) +#define R_DMA_CH9_CLR_INTR__clr_eop__BITNR 1 +#define R_DMA_CH9_CLR_INTR__clr_eop__WIDTH 1 +#define R_DMA_CH9_CLR_INTR__clr_eop__do 1 +#define R_DMA_CH9_CLR_INTR__clr_eop__dont 0 +#define R_DMA_CH9_CLR_INTR__clr_descr__BITNR 0 +#define R_DMA_CH9_CLR_INTR__clr_descr__WIDTH 1 +#define R_DMA_CH9_CLR_INTR__clr_descr__do 1 +#define R_DMA_CH9_CLR_INTR__clr_descr__dont 0 + +#define R_DMA_CH9_STATUS (IO_TYPECAST_RO_BYTE 0xb00001f6) +#define R_DMA_CH9_STATUS__avail__BITNR 0 +#define R_DMA_CH9_STATUS__avail__WIDTH 7 + +/* +!* Test mode registers +!*/ + +#define R_TEST_MODE (IO_TYPECAST_UDWORD 0xb00000fc) +#define R_TEST_MODE__single_step__BITNR 19 +#define R_TEST_MODE__single_step__WIDTH 1 +#define R_TEST_MODE__single_step__on 1 +#define R_TEST_MODE__single_step__off 0 +#define R_TEST_MODE__step_wr__BITNR 18 +#define R_TEST_MODE__step_wr__WIDTH 1 +#define R_TEST_MODE__step_wr__on 1 +#define R_TEST_MODE__step_wr__off 0 +#define R_TEST_MODE__step_rd__BITNR 17 +#define R_TEST_MODE__step_rd__WIDTH 1 +#define R_TEST_MODE__step_rd__on 1 +#define R_TEST_MODE__step_rd__off 0 +#define R_TEST_MODE__step_fetch__BITNR 16 +#define R_TEST_MODE__step_fetch__WIDTH 1 +#define R_TEST_MODE__step_fetch__on 1 +#define R_TEST_MODE__step_fetch__off 0 +#define R_TEST_MODE__mmu_test__BITNR 12 +#define R_TEST_MODE__mmu_test__WIDTH 1 +#define R_TEST_MODE__mmu_test__on 1 +#define R_TEST_MODE__mmu_test__off 0 +#define R_TEST_MODE__usb_test__BITNR 11 +#define R_TEST_MODE__usb_test__WIDTH 1 +#define R_TEST_MODE__usb_test__on 1 +#define R_TEST_MODE__usb_test__off 0 +#define R_TEST_MODE__scsi_timer_test__BITNR 10 +#define R_TEST_MODE__scsi_timer_test__WIDTH 1 +#define R_TEST_MODE__scsi_timer_test__on 1 +#define R_TEST_MODE__scsi_timer_test__off 0 +#define R_TEST_MODE__backoff__BITNR 9 +#define R_TEST_MODE__backoff__WIDTH 1 +#define R_TEST_MODE__backoff__on 1 +#define R_TEST_MODE__backoff__off 0 +#define R_TEST_MODE__snmp_test__BITNR 8 +#define R_TEST_MODE__snmp_test__WIDTH 1 +#define R_TEST_MODE__snmp_test__on 1 +#define R_TEST_MODE__snmp_test__off 0 +#define R_TEST_MODE__snmp_inc__BITNR 7 +#define R_TEST_MODE__snmp_inc__WIDTH 1 +#define R_TEST_MODE__snmp_inc__do 1 +#define R_TEST_MODE__snmp_inc__dont 0 +#define R_TEST_MODE__ser_loop__BITNR 6 +#define R_TEST_MODE__ser_loop__WIDTH 1 +#define R_TEST_MODE__ser_loop__on 1 +#define R_TEST_MODE__ser_loop__off 0 +#define R_TEST_MODE__baudrate__BITNR 5 +#define R_TEST_MODE__baudrate__WIDTH 1 +#define R_TEST_MODE__baudrate__on 1 +#define R_TEST_MODE__baudrate__off 0 +#define R_TEST_MODE__timer__BITNR 3 +#define R_TEST_MODE__timer__WIDTH 2 +#define R_TEST_MODE__timer__off 0 +#define R_TEST_MODE__timer__even 1 +#define R_TEST_MODE__timer__odd 2 +#define R_TEST_MODE__timer__all 3 +#define R_TEST_MODE__cache_test__BITNR 2 +#define R_TEST_MODE__cache_test__WIDTH 1 +#define R_TEST_MODE__cache_test__normal 0 +#define R_TEST_MODE__cache_test__test 1 +#define R_TEST_MODE__tag_test__BITNR 1 +#define R_TEST_MODE__tag_test__WIDTH 1 +#define R_TEST_MODE__tag_test__normal 0 +#define R_TEST_MODE__tag_test__test 1 +#define R_TEST_MODE__cache_enable__BITNR 0 +#define R_TEST_MODE__cache_enable__WIDTH 1 +#define R_TEST_MODE__cache_enable__enable 1 +#define R_TEST_MODE__cache_enable__disable 0 + +#define R_SINGLE_STEP (IO_TYPECAST_BYTE 0xb00000fe) +#define R_SINGLE_STEP__single_step__BITNR 3 +#define R_SINGLE_STEP__single_step__WIDTH 1 +#define R_SINGLE_STEP__single_step__on 1 +#define R_SINGLE_STEP__single_step__off 0 +#define R_SINGLE_STEP__step_wr__BITNR 2 +#define R_SINGLE_STEP__step_wr__WIDTH 1 +#define R_SINGLE_STEP__step_wr__on 1 +#define R_SINGLE_STEP__step_wr__off 0 +#define R_SINGLE_STEP__step_rd__BITNR 1 +#define R_SINGLE_STEP__step_rd__WIDTH 1 +#define R_SINGLE_STEP__step_rd__on 1 +#define R_SINGLE_STEP__step_rd__off 0 +#define R_SINGLE_STEP__step_fetch__BITNR 0 +#define R_SINGLE_STEP__step_fetch__WIDTH 1 +#define R_SINGLE_STEP__step_fetch__on 1 +#define R_SINGLE_STEP__step_fetch__off 0 + +/* +!* USB interface control registers +!*/ + +#define R_USB_REVISION (IO_TYPECAST_RO_BYTE 0xb0000200) +#define R_USB_REVISION__major__BITNR 4 +#define R_USB_REVISION__major__WIDTH 4 +#define R_USB_REVISION__minor__BITNR 0 +#define R_USB_REVISION__minor__WIDTH 4 + +#define R_USB_COMMAND (IO_TYPECAST_BYTE 0xb0000201) +#define R_USB_COMMAND__port_sel__BITNR 6 +#define R_USB_COMMAND__port_sel__WIDTH 2 +#define R_USB_COMMAND__port_sel__nop 0 +#define R_USB_COMMAND__port_sel__port1 1 +#define R_USB_COMMAND__port_sel__port2 2 +#define R_USB_COMMAND__port_sel__both 3 +#define R_USB_COMMAND__port_cmd__BITNR 4 +#define R_USB_COMMAND__port_cmd__WIDTH 2 +#define R_USB_COMMAND__port_cmd__reset 0 +#define R_USB_COMMAND__port_cmd__disable 1 +#define R_USB_COMMAND__port_cmd__suspend 2 +#define R_USB_COMMAND__port_cmd__resume 3 +#define R_USB_COMMAND__ctrl_cmd__BITNR 0 +#define R_USB_COMMAND__ctrl_cmd__WIDTH 3 +#define R_USB_COMMAND__ctrl_cmd__nop 0 +#define R_USB_COMMAND__ctrl_cmd__reset 1 +#define R_USB_COMMAND__ctrl_cmd__deconfig 2 +#define R_USB_COMMAND__ctrl_cmd__host_config 3 +#define R_USB_COMMAND__ctrl_cmd__dev_config 4 +#define R_USB_COMMAND__ctrl_cmd__host_reset 5 +#define R_USB_COMMAND__ctrl_cmd__host_run 6 +#define R_USB_COMMAND__ctrl_cmd__host_stop 7 + +#define R_USB_STATUS (IO_TYPECAST_RO_BYTE 0xb0000202) +#define R_USB_STATUS__busy__BITNR 7 +#define R_USB_STATUS__busy__WIDTH 1 +#define R_USB_STATUS__busy__no 0 +#define R_USB_STATUS__busy__yes 1 +#define R_USB_STATUS__device_mode__BITNR 3 +#define R_USB_STATUS__device_mode__WIDTH 1 +#define R_USB_STATUS__device_mode__no 0 +#define R_USB_STATUS__device_mode__yes 1 +#define R_USB_STATUS__host_mode__BITNR 2 +#define R_USB_STATUS__host_mode__WIDTH 1 +#define R_USB_STATUS__host_mode__no 0 +#define R_USB_STATUS__host_mode__yes 1 +#define R_USB_STATUS__started__BITNR 1 +#define R_USB_STATUS__started__WIDTH 1 +#define R_USB_STATUS__started__no 0 +#define R_USB_STATUS__started__yes 1 +#define R_USB_STATUS__running__BITNR 0 +#define R_USB_STATUS__running__WIDTH 1 +#define R_USB_STATUS__running__no 0 +#define R_USB_STATUS__running__yes 1 + +#define R_USB_IRQ_MASK_SET (IO_TYPECAST_UWORD 0xb0000204) +#define R_USB_IRQ_MASK_SET__intr_eof__BITNR 13 +#define R_USB_IRQ_MASK_SET__intr_eof__WIDTH 1 +#define R_USB_IRQ_MASK_SET__intr_eof__nop 0 +#define R_USB_IRQ_MASK_SET__intr_eof__set 1 +#define R_USB_IRQ_MASK_SET__iso_eof__BITNR 12 +#define R_USB_IRQ_MASK_SET__iso_eof__WIDTH 1 +#define R_USB_IRQ_MASK_SET__iso_eof__nop 0 +#define R_USB_IRQ_MASK_SET__iso_eof__set 1 +#define R_USB_IRQ_MASK_SET__bulk_eot__BITNR 11 +#define R_USB_IRQ_MASK_SET__bulk_eot__WIDTH 1 +#define R_USB_IRQ_MASK_SET__bulk_eot__nop 0 +#define R_USB_IRQ_MASK_SET__bulk_eot__set 1 +#define R_USB_IRQ_MASK_SET__ctl_eot__BITNR 10 +#define R_USB_IRQ_MASK_SET__ctl_eot__WIDTH 1 +#define R_USB_IRQ_MASK_SET__ctl_eot__nop 0 +#define R_USB_IRQ_MASK_SET__ctl_eot__set 1 +#define R_USB_IRQ_MASK_SET__intr_eot__BITNR 9 +#define R_USB_IRQ_MASK_SET__intr_eot__WIDTH 1 +#define R_USB_IRQ_MASK_SET__intr_eot__nop 0 +#define R_USB_IRQ_MASK_SET__intr_eot__set 1 +#define R_USB_IRQ_MASK_SET__iso_eot__BITNR 8 +#define R_USB_IRQ_MASK_SET__iso_eot__WIDTH 1 +#define R_USB_IRQ_MASK_SET__iso_eot__nop 0 +#define R_USB_IRQ_MASK_SET__iso_eot__set 1 +#define R_USB_IRQ_MASK_SET__sof__BITNR 2 +#define R_USB_IRQ_MASK_SET__sof__WIDTH 1 +#define R_USB_IRQ_MASK_SET__sof__nop 0 +#define R_USB_IRQ_MASK_SET__sof__set 1 +#define R_USB_IRQ_MASK_SET__port_status__BITNR 1 +#define R_USB_IRQ_MASK_SET__port_status__WIDTH 1 +#define R_USB_IRQ_MASK_SET__port_status__nop 0 +#define R_USB_IRQ_MASK_SET__port_status__set 1 +#define R_USB_IRQ_MASK_SET__ctl_status__BITNR 0 +#define R_USB_IRQ_MASK_SET__ctl_status__WIDTH 1 +#define R_USB_IRQ_MASK_SET__ctl_status__nop 0 +#define R_USB_IRQ_MASK_SET__ctl_status__set 1 + +#define R_USB_IRQ_MASK_READ (IO_TYPECAST_RO_UWORD 0xb0000204) +#define R_USB_IRQ_MASK_READ__intr_eof__BITNR 13 +#define R_USB_IRQ_MASK_READ__intr_eof__WIDTH 1 +#define R_USB_IRQ_MASK_READ__intr_eof__no_pend 0 +#define R_USB_IRQ_MASK_READ__intr_eof__pend 1 +#define R_USB_IRQ_MASK_READ__iso_eof__BITNR 12 +#define R_USB_IRQ_MASK_READ__iso_eof__WIDTH 1 +#define R_USB_IRQ_MASK_READ__iso_eof__no_pend 0 +#define R_USB_IRQ_MASK_READ__iso_eof__pend 1 +#define R_USB_IRQ_MASK_READ__bulk_eot__BITNR 11 +#define R_USB_IRQ_MASK_READ__bulk_eot__WIDTH 1 +#define R_USB_IRQ_MASK_READ__bulk_eot__no_pend 0 +#define R_USB_IRQ_MASK_READ__bulk_eot__pend 1 +#define R_USB_IRQ_MASK_READ__ctl_eot__BITNR 10 +#define R_USB_IRQ_MASK_READ__ctl_eot__WIDTH 1 +#define R_USB_IRQ_MASK_READ__ctl_eot__no_pend 0 +#define R_USB_IRQ_MASK_READ__ctl_eot__pend 1 +#define R_USB_IRQ_MASK_READ__intr_eot__BITNR 9 +#define R_USB_IRQ_MASK_READ__intr_eot__WIDTH 1 +#define R_USB_IRQ_MASK_READ__intr_eot__no_pend 0 +#define R_USB_IRQ_MASK_READ__intr_eot__pend 1 +#define R_USB_IRQ_MASK_READ__iso_eot__BITNR 8 +#define R_USB_IRQ_MASK_READ__iso_eot__WIDTH 1 +#define R_USB_IRQ_MASK_READ__iso_eot__no_pend 0 +#define R_USB_IRQ_MASK_READ__iso_eot__pend 1 +#define R_USB_IRQ_MASK_READ__sof__BITNR 2 +#define R_USB_IRQ_MASK_READ__sof__WIDTH 1 +#define R_USB_IRQ_MASK_READ__sof__no_pend 0 +#define R_USB_IRQ_MASK_READ__sof__pend 1 +#define R_USB_IRQ_MASK_READ__port_status__BITNR 1 +#define R_USB_IRQ_MASK_READ__port_status__WIDTH 1 +#define R_USB_IRQ_MASK_READ__port_status__no_pend 0 +#define R_USB_IRQ_MASK_READ__port_status__pend 1 +#define R_USB_IRQ_MASK_READ__ctl_status__BITNR 0 +#define R_USB_IRQ_MASK_READ__ctl_status__WIDTH 1 +#define R_USB_IRQ_MASK_READ__ctl_status__no_pend 0 +#define R_USB_IRQ_MASK_READ__ctl_status__pend 1 + +#define R_USB_IRQ_MASK_CLR (IO_TYPECAST_UWORD 0xb0000206) +#define R_USB_IRQ_MASK_CLR__intr_eof__BITNR 13 +#define R_USB_IRQ_MASK_CLR__intr_eof__WIDTH 1 +#define R_USB_IRQ_MASK_CLR__intr_eof__nop 0 +#define R_USB_IRQ_MASK_CLR__intr_eof__clr 1 +#define R_USB_IRQ_MASK_CLR__iso_eof__BITNR 12 +#define R_USB_IRQ_MASK_CLR__iso_eof__WIDTH 1 +#define R_USB_IRQ_MASK_CLR__iso_eof__nop 0 +#define R_USB_IRQ_MASK_CLR__iso_eof__clr 1 +#define R_USB_IRQ_MASK_CLR__bulk_eot__BITNR 11 +#define R_USB_IRQ_MASK_CLR__bulk_eot__WIDTH 1 +#define R_USB_IRQ_MASK_CLR__bulk_eot__nop 0 +#define R_USB_IRQ_MASK_CLR__bulk_eot__clr 1 +#define R_USB_IRQ_MASK_CLR__ctl_eot__BITNR 10 +#define R_USB_IRQ_MASK_CLR__ctl_eot__WIDTH 1 +#define R_USB_IRQ_MASK_CLR__ctl_eot__nop 0 +#define R_USB_IRQ_MASK_CLR__ctl_eot__clr 1 +#define R_USB_IRQ_MASK_CLR__intr_eot__BITNR 9 +#define R_USB_IRQ_MASK_CLR__intr_eot__WIDTH 1 +#define R_USB_IRQ_MASK_CLR__intr_eot__nop 0 +#define R_USB_IRQ_MASK_CLR__intr_eot__clr 1 +#define R_USB_IRQ_MASK_CLR__iso_eot__BITNR 8 +#define R_USB_IRQ_MASK_CLR__iso_eot__WIDTH 1 +#define R_USB_IRQ_MASK_CLR__iso_eot__nop 0 +#define R_USB_IRQ_MASK_CLR__iso_eot__clr 1 +#define R_USB_IRQ_MASK_CLR__sof__BITNR 2 +#define R_USB_IRQ_MASK_CLR__sof__WIDTH 1 +#define R_USB_IRQ_MASK_CLR__sof__nop 0 +#define R_USB_IRQ_MASK_CLR__sof__clr 1 +#define R_USB_IRQ_MASK_CLR__port_status__BITNR 1 +#define R_USB_IRQ_MASK_CLR__port_status__WIDTH 1 +#define R_USB_IRQ_MASK_CLR__port_status__nop 0 +#define R_USB_IRQ_MASK_CLR__port_status__clr 1 +#define R_USB_IRQ_MASK_CLR__ctl_status__BITNR 0 +#define R_USB_IRQ_MASK_CLR__ctl_status__WIDTH 1 +#define R_USB_IRQ_MASK_CLR__ctl_status__nop 0 +#define R_USB_IRQ_MASK_CLR__ctl_status__clr 1 + +#define R_USB_IRQ_READ (IO_TYPECAST_RO_UWORD 0xb0000206) +#define R_USB_IRQ_READ__intr_eof__BITNR 13 +#define R_USB_IRQ_READ__intr_eof__WIDTH 1 +#define R_USB_IRQ_READ__intr_eof__no_pend 0 +#define R_USB_IRQ_READ__intr_eof__pend 1 +#define R_USB_IRQ_READ__iso_eof__BITNR 12 +#define R_USB_IRQ_READ__iso_eof__WIDTH 1 +#define R_USB_IRQ_READ__iso_eof__no_pend 0 +#define R_USB_IRQ_READ__iso_eof__pend 1 +#define R_USB_IRQ_READ__bulk_eot__BITNR 11 +#define R_USB_IRQ_READ__bulk_eot__WIDTH 1 +#define R_USB_IRQ_READ__bulk_eot__no_pend 0 +#define R_USB_IRQ_READ__bulk_eot__pend 1 +#define R_USB_IRQ_READ__ctl_eot__BITNR 10 +#define R_USB_IRQ_READ__ctl_eot__WIDTH 1 +#define R_USB_IRQ_READ__ctl_eot__no_pend 0 +#define R_USB_IRQ_READ__ctl_eot__pend 1 +#define R_USB_IRQ_READ__intr_eot__BITNR 9 +#define R_USB_IRQ_READ__intr_eot__WIDTH 1 +#define R_USB_IRQ_READ__intr_eot__no_pend 0 +#define R_USB_IRQ_READ__intr_eot__pend 1 +#define R_USB_IRQ_READ__iso_eot__BITNR 8 +#define R_USB_IRQ_READ__iso_eot__WIDTH 1 +#define R_USB_IRQ_READ__iso_eot__no_pend 0 +#define R_USB_IRQ_READ__iso_eot__pend 1 +#define R_USB_IRQ_READ__sof__BITNR 2 +#define R_USB_IRQ_READ__sof__WIDTH 1 +#define R_USB_IRQ_READ__sof__no_pend 0 +#define R_USB_IRQ_READ__sof__pend 1 +#define R_USB_IRQ_READ__port_status__BITNR 1 +#define R_USB_IRQ_READ__port_status__WIDTH 1 +#define R_USB_IRQ_READ__port_status__no_pend 0 +#define R_USB_IRQ_READ__port_status__pend 1 +#define R_USB_IRQ_READ__ctl_status__BITNR 0 +#define R_USB_IRQ_READ__ctl_status__WIDTH 1 +#define R_USB_IRQ_READ__ctl_status__no_pend 0 +#define R_USB_IRQ_READ__ctl_status__pend 1 + +#define R_USB_FM_NUMBER (IO_TYPECAST_RO_UDWORD 0xb000020c) +#define R_USB_FM_NUMBER__value__BITNR 0 +#define R_USB_FM_NUMBER__value__WIDTH 32 + +#define R_USB_FM_INTERVAL (IO_TYPECAST_UWORD 0xb0000210) +#define R_USB_FM_INTERVAL__fixed__BITNR 6 +#define R_USB_FM_INTERVAL__fixed__WIDTH 8 +#define R_USB_FM_INTERVAL__adj__BITNR 0 +#define R_USB_FM_INTERVAL__adj__WIDTH 6 + +#define R_USB_FM_REMAINING (IO_TYPECAST_RO_UWORD 0xb0000212) +#define R_USB_FM_REMAINING__value__BITNR 0 +#define R_USB_FM_REMAINING__value__WIDTH 14 + +#define R_USB_FM_PSTART (IO_TYPECAST_UWORD 0xb0000214) +#define R_USB_FM_PSTART__value__BITNR 0 +#define R_USB_FM_PSTART__value__WIDTH 14 + +#define R_USB_LS_THRESHOLD (IO_TYPECAST_UWORD 0xb0000216) +#define R_USB_LS_THRESHOLD__value__BITNR 0 +#define R_USB_LS_THRESHOLD__value__WIDTH 14 + +#define R_USB_RH_STATUS (IO_TYPECAST_RO_BYTE 0xb0000203) +#define R_USB_RH_STATUS__bus1__BITNR 4 +#define R_USB_RH_STATUS__bus1__WIDTH 2 +#define R_USB_RH_STATUS__bus1__SE0 0 +#define R_USB_RH_STATUS__bus1__Diff0 1 +#define R_USB_RH_STATUS__bus1__Diff1 1 +#define R_USB_RH_STATUS__bus1__SE1 3 +#define R_USB_RH_STATUS__bus2__BITNR 2 +#define R_USB_RH_STATUS__bus2__WIDTH 2 +#define R_USB_RH_STATUS__bus2__SE0 0 +#define R_USB_RH_STATUS__bus2__Diff0 1 +#define R_USB_RH_STATUS__bus2__Diff1 1 +#define R_USB_RH_STATUS__bus2__SE1 3 +#define R_USB_RH_STATUS__nports__BITNR 0 +#define R_USB_RH_STATUS__nports__WIDTH 2 + +#define R_USB_RH_PORT_STATUS_1 (IO_TYPECAST_RO_UWORD 0xb0000218) +#define R_USB_RH_PORT_STATUS_1__speed__BITNR 9 +#define R_USB_RH_PORT_STATUS_1__speed__WIDTH 1 +#define R_USB_RH_PORT_STATUS_1__speed__full 0 +#define R_USB_RH_PORT_STATUS_1__speed__low 1 +#define R_USB_RH_PORT_STATUS_1__power__BITNR 8 +#define R_USB_RH_PORT_STATUS_1__power__WIDTH 1 +#define R_USB_RH_PORT_STATUS_1__reset__BITNR 4 +#define R_USB_RH_PORT_STATUS_1__reset__WIDTH 1 +#define R_USB_RH_PORT_STATUS_1__reset__no 0 +#define R_USB_RH_PORT_STATUS_1__reset__yes 1 +#define R_USB_RH_PORT_STATUS_1__overcurent__BITNR 3 +#define R_USB_RH_PORT_STATUS_1__overcurent__WIDTH 1 +#define R_USB_RH_PORT_STATUS_1__overcurent__no 0 +#define R_USB_RH_PORT_STATUS_1__overcurent__yes 1 +#define R_USB_RH_PORT_STATUS_1__suspended__BITNR 2 +#define R_USB_RH_PORT_STATUS_1__suspended__WIDTH 1 +#define R_USB_RH_PORT_STATUS_1__suspended__no 0 +#define R_USB_RH_PORT_STATUS_1__suspended__yes 1 +#define R_USB_RH_PORT_STATUS_1__enabled__BITNR 1 +#define R_USB_RH_PORT_STATUS_1__enabled__WIDTH 1 +#define R_USB_RH_PORT_STATUS_1__enabled__no 0 +#define R_USB_RH_PORT_STATUS_1__enabled__yes 1 +#define R_USB_RH_PORT_STATUS_1__connected__BITNR 0 +#define R_USB_RH_PORT_STATUS_1__connected__WIDTH 1 +#define R_USB_RH_PORT_STATUS_1__connected__no 0 +#define R_USB_RH_PORT_STATUS_1__connected__yes 1 + +#define R_USB_RH_PORT_STATUS_2 (IO_TYPECAST_RO_UWORD 0xb000021a) +#define R_USB_RH_PORT_STATUS_2__speed__BITNR 9 +#define R_USB_RH_PORT_STATUS_2__speed__WIDTH 1 +#define R_USB_RH_PORT_STATUS_2__speed__full 0 +#define R_USB_RH_PORT_STATUS_2__speed__low 1 +#define R_USB_RH_PORT_STATUS_2__power__BITNR 8 +#define R_USB_RH_PORT_STATUS_2__power__WIDTH 1 +#define R_USB_RH_PORT_STATUS_2__reset__BITNR 4 +#define R_USB_RH_PORT_STATUS_2__reset__WIDTH 1 +#define R_USB_RH_PORT_STATUS_2__reset__no 0 +#define R_USB_RH_PORT_STATUS_2__reset__yes 1 +#define R_USB_RH_PORT_STATUS_2__overcurent__BITNR 3 +#define R_USB_RH_PORT_STATUS_2__overcurent__WIDTH 1 +#define R_USB_RH_PORT_STATUS_2__overcurent__no 0 +#define R_USB_RH_PORT_STATUS_2__overcurent__yes 1 +#define R_USB_RH_PORT_STATUS_2__suspended__BITNR 2 +#define R_USB_RH_PORT_STATUS_2__suspended__WIDTH 1 +#define R_USB_RH_PORT_STATUS_2__suspended__no 0 +#define R_USB_RH_PORT_STATUS_2__suspended__yes 1 +#define R_USB_RH_PORT_STATUS_2__enabled__BITNR 1 +#define R_USB_RH_PORT_STATUS_2__enabled__WIDTH 1 +#define R_USB_RH_PORT_STATUS_2__enabled__no 0 +#define R_USB_RH_PORT_STATUS_2__enabled__yes 1 +#define R_USB_RH_PORT_STATUS_2__connected__BITNR 0 +#define R_USB_RH_PORT_STATUS_2__connected__WIDTH 1 +#define R_USB_RH_PORT_STATUS_2__connected__no 0 +#define R_USB_RH_PORT_STATUS_2__connected__yes 1 + +#define R_USB_EPT_INDEX (IO_TYPECAST_BYTE 0xb0000208) +#define R_USB_EPT_INDEX__value__BITNR 0 +#define R_USB_EPT_INDEX__value__WIDTH 5 + +#define R_USB_EPT_DATA (IO_TYPECAST_UDWORD 0xb000021c) +#define R_USB_EPT_DATA__valid__BITNR 31 +#define R_USB_EPT_DATA__valid__WIDTH 1 +#define R_USB_EPT_DATA__valid__no 0 +#define R_USB_EPT_DATA__valid__yes 1 +#define R_USB_EPT_DATA__hold__BITNR 30 +#define R_USB_EPT_DATA__hold__WIDTH 1 +#define R_USB_EPT_DATA__hold__no 0 +#define R_USB_EPT_DATA__hold__yes 1 +#define R_USB_EPT_DATA__error_count_in__BITNR 28 +#define R_USB_EPT_DATA__error_count_in__WIDTH 2 +#define R_USB_EPT_DATA__t_in__BITNR 27 +#define R_USB_EPT_DATA__t_in__WIDTH 1 +#define R_USB_EPT_DATA__low_speed__BITNR 26 +#define R_USB_EPT_DATA__low_speed__WIDTH 1 +#define R_USB_EPT_DATA__low_speed__no 0 +#define R_USB_EPT_DATA__low_speed__yes 1 +#define R_USB_EPT_DATA__port__BITNR 24 +#define R_USB_EPT_DATA__port__WIDTH 2 +#define R_USB_EPT_DATA__port__any 0 +#define R_USB_EPT_DATA__port__p1 1 +#define R_USB_EPT_DATA__port__p2 2 +#define R_USB_EPT_DATA__port__undef 3 +#define R_USB_EPT_DATA__error_code__BITNR 22 +#define R_USB_EPT_DATA__error_code__WIDTH 2 +#define R_USB_EPT_DATA__error_code__no_error 0 +#define R_USB_EPT_DATA__error_code__stall 1 +#define R_USB_EPT_DATA__error_code__bus_error 2 +#define R_USB_EPT_DATA__error_code__TBD3 3 +#define R_USB_EPT_DATA__t_out__BITNR 21 +#define R_USB_EPT_DATA__t_out__WIDTH 1 +#define R_USB_EPT_DATA__error_count_out__BITNR 19 +#define R_USB_EPT_DATA__error_count_out__WIDTH 2 +#define R_USB_EPT_DATA__max_len__BITNR 11 +#define R_USB_EPT_DATA__max_len__WIDTH 7 +#define R_USB_EPT_DATA__ep__BITNR 7 +#define R_USB_EPT_DATA__ep__WIDTH 4 +#define R_USB_EPT_DATA__dev__BITNR 0 +#define R_USB_EPT_DATA__dev__WIDTH 7 + +#define R_USB_EPT_DATA_ISO (IO_TYPECAST_UDWORD 0xb000021c) +#define R_USB_EPT_DATA_ISO__valid__BITNR 31 +#define R_USB_EPT_DATA_ISO__valid__WIDTH 1 +#define R_USB_EPT_DATA_ISO__valid__no 0 +#define R_USB_EPT_DATA_ISO__valid__yes 1 +#define R_USB_EPT_DATA_ISO__port__BITNR 24 +#define R_USB_EPT_DATA_ISO__port__WIDTH 2 +#define R_USB_EPT_DATA_ISO__port__any 0 +#define R_USB_EPT_DATA_ISO__port__p1 1 +#define R_USB_EPT_DATA_ISO__port__p2 2 +#define R_USB_EPT_DATA_ISO__port__undef 3 +#define R_USB_EPT_DATA_ISO__error_code__BITNR 22 +#define R_USB_EPT_DATA_ISO__error_code__WIDTH 2 +#define R_USB_EPT_DATA_ISO__error_code__no_error 0 +#define R_USB_EPT_DATA_ISO__error_code__stall 1 +#define R_USB_EPT_DATA_ISO__error_code__bus_error 2 +#define R_USB_EPT_DATA_ISO__error_code__TBD3 3 +#define R_USB_EPT_DATA_ISO__max_len__BITNR 11 +#define R_USB_EPT_DATA_ISO__max_len__WIDTH 10 +#define R_USB_EPT_DATA_ISO__ep__BITNR 7 +#define R_USB_EPT_DATA_ISO__ep__WIDTH 4 +#define R_USB_EPT_DATA_ISO__dev__BITNR 0 +#define R_USB_EPT_DATA_ISO__dev__WIDTH 7 + +#define R_USB_EPT_DATA_DEV (IO_TYPECAST_UDWORD 0xb000021c) +#define R_USB_EPT_DATA_DEV__valid__BITNR 31 +#define R_USB_EPT_DATA_DEV__valid__WIDTH 1 +#define R_USB_EPT_DATA_DEV__valid__no 0 +#define R_USB_EPT_DATA_DEV__valid__yes 1 +#define R_USB_EPT_DATA_DEV__hold__BITNR 30 +#define R_USB_EPT_DATA_DEV__hold__WIDTH 1 +#define R_USB_EPT_DATA_DEV__hold__no 0 +#define R_USB_EPT_DATA_DEV__hold__yes 1 +#define R_USB_EPT_DATA_DEV__stall__BITNR 29 +#define R_USB_EPT_DATA_DEV__stall__WIDTH 1 +#define R_USB_EPT_DATA_DEV__stall__no 0 +#define R_USB_EPT_DATA_DEV__stall__yes 1 +#define R_USB_EPT_DATA_DEV__quiet__BITNR 28 +#define R_USB_EPT_DATA_DEV__quiet__WIDTH 1 +#define R_USB_EPT_DATA_DEV__quiet__no 0 +#define R_USB_EPT_DATA_DEV__quiet__yes 1 +#define R_USB_EPT_DATA_DEV__ctrl__BITNR 27 +#define R_USB_EPT_DATA_DEV__ctrl__WIDTH 1 +#define R_USB_EPT_DATA_DEV__ctrl__no 0 +#define R_USB_EPT_DATA_DEV__ctrl__yes 1 +#define R_USB_EPT_DATA_DEV__iso__BITNR 26 +#define R_USB_EPT_DATA_DEV__iso__WIDTH 1 +#define R_USB_EPT_DATA_DEV__iso__no 0 +#define R_USB_EPT_DATA_DEV__iso__yes 1 +#define R_USB_EPT_DATA_DEV__port__BITNR 24 +#define R_USB_EPT_DATA_DEV__port__WIDTH 2 +#define R_USB_EPT_DATA_DEV__t__BITNR 21 +#define R_USB_EPT_DATA_DEV__t__WIDTH 1 +#define R_USB_EPT_DATA_DEV__max_len__BITNR 11 +#define R_USB_EPT_DATA_DEV__max_len__WIDTH 10 +#define R_USB_EPT_DATA_DEV__ep__BITNR 7 +#define R_USB_EPT_DATA_DEV__ep__WIDTH 4 +#define R_USB_EPT_DATA_DEV__dev__BITNR 0 +#define R_USB_EPT_DATA_DEV__dev__WIDTH 7 + +#define R_USB_SNMP_TERROR (IO_TYPECAST_UDWORD 0xb0000220) +#define R_USB_SNMP_TERROR__value__BITNR 0 +#define R_USB_SNMP_TERROR__value__WIDTH 32 + +/* +!* MMU registers +!*/ + +#define R_MMU_CONFIG (IO_TYPECAST_UDWORD 0xb0000240) +#define R_MMU_CONFIG__mmu_enable__BITNR 31 +#define R_MMU_CONFIG__mmu_enable__WIDTH 1 +#define R_MMU_CONFIG__mmu_enable__enable 1 +#define R_MMU_CONFIG__mmu_enable__disable 0 +#define R_MMU_CONFIG__inv_excp__BITNR 18 +#define R_MMU_CONFIG__inv_excp__WIDTH 1 +#define R_MMU_CONFIG__inv_excp__enable 1 +#define R_MMU_CONFIG__inv_excp__disable 0 +#define R_MMU_CONFIG__acc_excp__BITNR 17 +#define R_MMU_CONFIG__acc_excp__WIDTH 1 +#define R_MMU_CONFIG__acc_excp__enable 1 +#define R_MMU_CONFIG__acc_excp__disable 0 +#define R_MMU_CONFIG__we_excp__BITNR 16 +#define R_MMU_CONFIG__we_excp__WIDTH 1 +#define R_MMU_CONFIG__we_excp__enable 1 +#define R_MMU_CONFIG__we_excp__disable 0 +#define R_MMU_CONFIG__seg_f__BITNR 15 +#define R_MMU_CONFIG__seg_f__WIDTH 1 +#define R_MMU_CONFIG__seg_f__seg 1 +#define R_MMU_CONFIG__seg_f__page 0 +#define R_MMU_CONFIG__seg_e__BITNR 14 +#define R_MMU_CONFIG__seg_e__WIDTH 1 +#define R_MMU_CONFIG__seg_e__seg 1 +#define R_MMU_CONFIG__seg_e__page 0 +#define R_MMU_CONFIG__seg_d__BITNR 13 +#define R_MMU_CONFIG__seg_d__WIDTH 1 +#define R_MMU_CONFIG__seg_d__seg 1 +#define R_MMU_CONFIG__seg_d__page 0 +#define R_MMU_CONFIG__seg_c__BITNR 12 +#define R_MMU_CONFIG__seg_c__WIDTH 1 +#define R_MMU_CONFIG__seg_c__seg 1 +#define R_MMU_CONFIG__seg_c__page 0 +#define R_MMU_CONFIG__seg_b__BITNR 11 +#define R_MMU_CONFIG__seg_b__WIDTH 1 +#define R_MMU_CONFIG__seg_b__seg 1 +#define R_MMU_CONFIG__seg_b__page 0 +#define R_MMU_CONFIG__seg_a__BITNR 10 +#define R_MMU_CONFIG__seg_a__WIDTH 1 +#define R_MMU_CONFIG__seg_a__seg 1 +#define R_MMU_CONFIG__seg_a__page 0 +#define R_MMU_CONFIG__seg_9__BITNR 9 +#define R_MMU_CONFIG__seg_9__WIDTH 1 +#define R_MMU_CONFIG__seg_9__seg 1 +#define R_MMU_CONFIG__seg_9__page 0 +#define R_MMU_CONFIG__seg_8__BITNR 8 +#define R_MMU_CONFIG__seg_8__WIDTH 1 +#define R_MMU_CONFIG__seg_8__seg 1 +#define R_MMU_CONFIG__seg_8__page 0 +#define R_MMU_CONFIG__seg_7__BITNR 7 +#define R_MMU_CONFIG__seg_7__WIDTH 1 +#define R_MMU_CONFIG__seg_7__seg 1 +#define R_MMU_CONFIG__seg_7__page 0 +#define R_MMU_CONFIG__seg_6__BITNR 6 +#define R_MMU_CONFIG__seg_6__WIDTH 1 +#define R_MMU_CONFIG__seg_6__seg 1 +#define R_MMU_CONFIG__seg_6__page 0 +#define R_MMU_CONFIG__seg_5__BITNR 5 +#define R_MMU_CONFIG__seg_5__WIDTH 1 +#define R_MMU_CONFIG__seg_5__seg 1 +#define R_MMU_CONFIG__seg_5__page 0 +#define R_MMU_CONFIG__seg_4__BITNR 4 +#define R_MMU_CONFIG__seg_4__WIDTH 1 +#define R_MMU_CONFIG__seg_4__seg 1 +#define R_MMU_CONFIG__seg_4__page 0 +#define R_MMU_CONFIG__seg_3__BITNR 3 +#define R_MMU_CONFIG__seg_3__WIDTH 1 +#define R_MMU_CONFIG__seg_3__seg 1 +#define R_MMU_CONFIG__seg_3__page 0 +#define R_MMU_CONFIG__seg_2__BITNR 2 +#define R_MMU_CONFIG__seg_2__WIDTH 1 +#define R_MMU_CONFIG__seg_2__seg 1 +#define R_MMU_CONFIG__seg_2__page 0 +#define R_MMU_CONFIG__seg_1__BITNR 1 +#define R_MMU_CONFIG__seg_1__WIDTH 1 +#define R_MMU_CONFIG__seg_1__seg 1 +#define R_MMU_CONFIG__seg_1__page 0 +#define R_MMU_CONFIG__seg_0__BITNR 0 +#define R_MMU_CONFIG__seg_0__WIDTH 1 +#define R_MMU_CONFIG__seg_0__seg 1 +#define R_MMU_CONFIG__seg_0__page 0 + +#define R_MMU_KSEG (IO_TYPECAST_UWORD 0xb0000240) +#define R_MMU_KSEG__seg_f__BITNR 15 +#define R_MMU_KSEG__seg_f__WIDTH 1 +#define R_MMU_KSEG__seg_f__seg 1 +#define R_MMU_KSEG__seg_f__page 0 +#define R_MMU_KSEG__seg_e__BITNR 14 +#define R_MMU_KSEG__seg_e__WIDTH 1 +#define R_MMU_KSEG__seg_e__seg 1 +#define R_MMU_KSEG__seg_e__page 0 +#define R_MMU_KSEG__seg_d__BITNR 13 +#define R_MMU_KSEG__seg_d__WIDTH 1 +#define R_MMU_KSEG__seg_d__seg 1 +#define R_MMU_KSEG__seg_d__page 0 +#define R_MMU_KSEG__seg_c__BITNR 12 +#define R_MMU_KSEG__seg_c__WIDTH 1 +#define R_MMU_KSEG__seg_c__seg 1 +#define R_MMU_KSEG__seg_c__page 0 +#define R_MMU_KSEG__seg_b__BITNR 11 +#define R_MMU_KSEG__seg_b__WIDTH 1 +#define R_MMU_KSEG__seg_b__seg 1 +#define R_MMU_KSEG__seg_b__page 0 +#define R_MMU_KSEG__seg_a__BITNR 10 +#define R_MMU_KSEG__seg_a__WIDTH 1 +#define R_MMU_KSEG__seg_a__seg 1 +#define R_MMU_KSEG__seg_a__page 0 +#define R_MMU_KSEG__seg_9__BITNR 9 +#define R_MMU_KSEG__seg_9__WIDTH 1 +#define R_MMU_KSEG__seg_9__seg 1 +#define R_MMU_KSEG__seg_9__page 0 +#define R_MMU_KSEG__seg_8__BITNR 8 +#define R_MMU_KSEG__seg_8__WIDTH 1 +#define R_MMU_KSEG__seg_8__seg 1 +#define R_MMU_KSEG__seg_8__page 0 +#define R_MMU_KSEG__seg_7__BITNR 7 +#define R_MMU_KSEG__seg_7__WIDTH 1 +#define R_MMU_KSEG__seg_7__seg 1 +#define R_MMU_KSEG__seg_7__page 0 +#define R_MMU_KSEG__seg_6__BITNR 6 +#define R_MMU_KSEG__seg_6__WIDTH 1 +#define R_MMU_KSEG__seg_6__seg 1 +#define R_MMU_KSEG__seg_6__page 0 +#define R_MMU_KSEG__seg_5__BITNR 5 +#define R_MMU_KSEG__seg_5__WIDTH 1 +#define R_MMU_KSEG__seg_5__seg 1 +#define R_MMU_KSEG__seg_5__page 0 +#define R_MMU_KSEG__seg_4__BITNR 4 +#define R_MMU_KSEG__seg_4__WIDTH 1 +#define R_MMU_KSEG__seg_4__seg 1 +#define R_MMU_KSEG__seg_4__page 0 +#define R_MMU_KSEG__seg_3__BITNR 3 +#define R_MMU_KSEG__seg_3__WIDTH 1 +#define R_MMU_KSEG__seg_3__seg 1 +#define R_MMU_KSEG__seg_3__page 0 +#define R_MMU_KSEG__seg_2__BITNR 2 +#define R_MMU_KSEG__seg_2__WIDTH 1 +#define R_MMU_KSEG__seg_2__seg 1 +#define R_MMU_KSEG__seg_2__page 0 +#define R_MMU_KSEG__seg_1__BITNR 1 +#define R_MMU_KSEG__seg_1__WIDTH 1 +#define R_MMU_KSEG__seg_1__seg 1 +#define R_MMU_KSEG__seg_1__page 0 +#define R_MMU_KSEG__seg_0__BITNR 0 +#define R_MMU_KSEG__seg_0__WIDTH 1 +#define R_MMU_KSEG__seg_0__seg 1 +#define R_MMU_KSEG__seg_0__page 0 + +#define R_MMU_CTRL (IO_TYPECAST_BYTE 0xb0000242) +#define R_MMU_CTRL__inv_excp__BITNR 2 +#define R_MMU_CTRL__inv_excp__WIDTH 1 +#define R_MMU_CTRL__inv_excp__enable 1 +#define R_MMU_CTRL__inv_excp__disable 0 +#define R_MMU_CTRL__acc_excp__BITNR 1 +#define R_MMU_CTRL__acc_excp__WIDTH 1 +#define R_MMU_CTRL__acc_excp__enable 1 +#define R_MMU_CTRL__acc_excp__disable 0 +#define R_MMU_CTRL__we_excp__BITNR 0 +#define R_MMU_CTRL__we_excp__WIDTH 1 +#define R_MMU_CTRL__we_excp__enable 1 +#define R_MMU_CTRL__we_excp__disable 0 + +#define R_MMU_ENABLE (IO_TYPECAST_BYTE 0xb0000243) +#define R_MMU_ENABLE__mmu_enable__BITNR 7 +#define R_MMU_ENABLE__mmu_enable__WIDTH 1 +#define R_MMU_ENABLE__mmu_enable__enable 1 +#define R_MMU_ENABLE__mmu_enable__disable 0 + +#define R_MMU_KBASE_LO (IO_TYPECAST_UDWORD 0xb0000244) +#define R_MMU_KBASE_LO__base_7__BITNR 28 +#define R_MMU_KBASE_LO__base_7__WIDTH 4 +#define R_MMU_KBASE_LO__base_6__BITNR 24 +#define R_MMU_KBASE_LO__base_6__WIDTH 4 +#define R_MMU_KBASE_LO__base_5__BITNR 20 +#define R_MMU_KBASE_LO__base_5__WIDTH 4 +#define R_MMU_KBASE_LO__base_4__BITNR 16 +#define R_MMU_KBASE_LO__base_4__WIDTH 4 +#define R_MMU_KBASE_LO__base_3__BITNR 12 +#define R_MMU_KBASE_LO__base_3__WIDTH 4 +#define R_MMU_KBASE_LO__base_2__BITNR 8 +#define R_MMU_KBASE_LO__base_2__WIDTH 4 +#define R_MMU_KBASE_LO__base_1__BITNR 4 +#define R_MMU_KBASE_LO__base_1__WIDTH 4 +#define R_MMU_KBASE_LO__base_0__BITNR 0 +#define R_MMU_KBASE_LO__base_0__WIDTH 4 + +#define R_MMU_KBASE_HI (IO_TYPECAST_UDWORD 0xb0000248) +#define R_MMU_KBASE_HI__base_f__BITNR 28 +#define R_MMU_KBASE_HI__base_f__WIDTH 4 +#define R_MMU_KBASE_HI__base_e__BITNR 24 +#define R_MMU_KBASE_HI__base_e__WIDTH 4 +#define R_MMU_KBASE_HI__base_d__BITNR 20 +#define R_MMU_KBASE_HI__base_d__WIDTH 4 +#define R_MMU_KBASE_HI__base_c__BITNR 16 +#define R_MMU_KBASE_HI__base_c__WIDTH 4 +#define R_MMU_KBASE_HI__base_b__BITNR 12 +#define R_MMU_KBASE_HI__base_b__WIDTH 4 +#define R_MMU_KBASE_HI__base_a__BITNR 8 +#define R_MMU_KBASE_HI__base_a__WIDTH 4 +#define R_MMU_KBASE_HI__base_9__BITNR 4 +#define R_MMU_KBASE_HI__base_9__WIDTH 4 +#define R_MMU_KBASE_HI__base_8__BITNR 0 +#define R_MMU_KBASE_HI__base_8__WIDTH 4 + +#define R_MMU_CONTEXT (IO_TYPECAST_BYTE 0xb000024c) +#define R_MMU_CONTEXT__page_id__BITNR 0 +#define R_MMU_CONTEXT__page_id__WIDTH 6 + +#define R_MMU_CAUSE (IO_TYPECAST_RO_UDWORD 0xb0000250) +#define R_MMU_CAUSE__vpn__BITNR 13 +#define R_MMU_CAUSE__vpn__WIDTH 19 +#define R_MMU_CAUSE__miss_excp__BITNR 12 +#define R_MMU_CAUSE__miss_excp__WIDTH 1 +#define R_MMU_CAUSE__miss_excp__yes 1 +#define R_MMU_CAUSE__miss_excp__no 0 +#define R_MMU_CAUSE__inv_excp__BITNR 11 +#define R_MMU_CAUSE__inv_excp__WIDTH 1 +#define R_MMU_CAUSE__inv_excp__yes 1 +#define R_MMU_CAUSE__inv_excp__no 0 +#define R_MMU_CAUSE__acc_excp__BITNR 10 +#define R_MMU_CAUSE__acc_excp__WIDTH 1 +#define R_MMU_CAUSE__acc_excp__yes 1 +#define R_MMU_CAUSE__acc_excp__no 0 +#define R_MMU_CAUSE__we_excp__BITNR 9 +#define R_MMU_CAUSE__we_excp__WIDTH 1 +#define R_MMU_CAUSE__we_excp__yes 1 +#define R_MMU_CAUSE__we_excp__no 0 +#define R_MMU_CAUSE__page_id__BITNR 0 +#define R_MMU_CAUSE__page_id__WIDTH 6 + +#define R_TLB_SELECT (IO_TYPECAST_BYTE 0xb0000254) +#define R_TLB_SELECT__index__BITNR 0 +#define R_TLB_SELECT__index__WIDTH 6 + +#define R_TLB_LO (IO_TYPECAST_UDWORD 0xb0000258) +#define R_TLB_LO__pfn__BITNR 13 +#define R_TLB_LO__pfn__WIDTH 19 +#define R_TLB_LO__global__BITNR 3 +#define R_TLB_LO__global__WIDTH 1 +#define R_TLB_LO__global__yes 1 +#define R_TLB_LO__global__no 0 +#define R_TLB_LO__valid__BITNR 2 +#define R_TLB_LO__valid__WIDTH 1 +#define R_TLB_LO__valid__yes 1 +#define R_TLB_LO__valid__no 0 +#define R_TLB_LO__kernel__BITNR 1 +#define R_TLB_LO__kernel__WIDTH 1 +#define R_TLB_LO__kernel__yes 1 +#define R_TLB_LO__kernel__no 0 +#define R_TLB_LO__we__BITNR 0 +#define R_TLB_LO__we__WIDTH 1 +#define R_TLB_LO__we__yes 1 +#define R_TLB_LO__we__no 0 + +#define R_TLB_HI (IO_TYPECAST_UDWORD 0xb000025c) +#define R_TLB_HI__vpn__BITNR 13 +#define R_TLB_HI__vpn__WIDTH 19 +#define R_TLB_HI__page_id__BITNR 0 +#define R_TLB_HI__page_id__WIDTH 6 + +/* +!* Syncrounous serial port registers +!*/ + +#define R_SYNC_SERIAL1_REC_DATA (IO_TYPECAST_RO_UDWORD 0xb000006c) +#define R_SYNC_SERIAL1_REC_DATA__data_in__BITNR 0 +#define R_SYNC_SERIAL1_REC_DATA__data_in__WIDTH 32 + +#define R_SYNC_SERIAL1_REC_WORD (IO_TYPECAST_RO_UWORD 0xb000006c) +#define R_SYNC_SERIAL1_REC_WORD__data_in__BITNR 0 +#define R_SYNC_SERIAL1_REC_WORD__data_in__WIDTH 16 + +#define R_SYNC_SERIAL1_REC_BYTE (IO_TYPECAST_RO_BYTE 0xb000006c) +#define R_SYNC_SERIAL1_REC_BYTE__data_in__BITNR 0 +#define R_SYNC_SERIAL1_REC_BYTE__data_in__WIDTH 8 + +#define R_SYNC_SERIAL1_STATUS (IO_TYPECAST_RO_UDWORD 0xb0000068) +#define R_SYNC_SERIAL1_STATUS__rec_status__BITNR 15 +#define R_SYNC_SERIAL1_STATUS__rec_status__WIDTH 1 +#define R_SYNC_SERIAL1_STATUS__rec_status__running 0 +#define R_SYNC_SERIAL1_STATUS__rec_status__idle 1 +#define R_SYNC_SERIAL1_STATUS__tr_empty__BITNR 14 +#define R_SYNC_SERIAL1_STATUS__tr_empty__WIDTH 1 +#define R_SYNC_SERIAL1_STATUS__tr_empty__empty 1 +#define R_SYNC_SERIAL1_STATUS__tr_empty__not_empty 0 +#define R_SYNC_SERIAL1_STATUS__tr_ready__BITNR 13 +#define R_SYNC_SERIAL1_STATUS__tr_ready__WIDTH 1 +#define R_SYNC_SERIAL1_STATUS__tr_ready__full 0 +#define R_SYNC_SERIAL1_STATUS__tr_ready__ready 1 +#define R_SYNC_SERIAL1_STATUS__pin_1__BITNR 12 +#define R_SYNC_SERIAL1_STATUS__pin_1__WIDTH 1 +#define R_SYNC_SERIAL1_STATUS__pin_1__low 0 +#define R_SYNC_SERIAL1_STATUS__pin_1__high 1 +#define R_SYNC_SERIAL1_STATUS__pin_0__BITNR 11 +#define R_SYNC_SERIAL1_STATUS__pin_0__WIDTH 1 +#define R_SYNC_SERIAL1_STATUS__pin_0__low 0 +#define R_SYNC_SERIAL1_STATUS__pin_0__high 1 +#define R_SYNC_SERIAL1_STATUS__underflow__BITNR 10 +#define R_SYNC_SERIAL1_STATUS__underflow__WIDTH 1 +#define R_SYNC_SERIAL1_STATUS__underflow__no 0 +#define R_SYNC_SERIAL1_STATUS__underflow__yes 1 +#define R_SYNC_SERIAL1_STATUS__overrun__BITNR 9 +#define R_SYNC_SERIAL1_STATUS__overrun__WIDTH 1 +#define R_SYNC_SERIAL1_STATUS__overrun__no 0 +#define R_SYNC_SERIAL1_STATUS__overrun__yes 1 +#define R_SYNC_SERIAL1_STATUS__data_avail__BITNR 8 +#define R_SYNC_SERIAL1_STATUS__data_avail__WIDTH 1 +#define R_SYNC_SERIAL1_STATUS__data_avail__no 0 +#define R_SYNC_SERIAL1_STATUS__data_avail__yes 1 +#define R_SYNC_SERIAL1_STATUS__data__BITNR 0 +#define R_SYNC_SERIAL1_STATUS__data__WIDTH 8 + +#define R_SYNC_SERIAL1_TR_DATA (IO_TYPECAST_UDWORD 0xb000006c) +#define R_SYNC_SERIAL1_TR_DATA__data_out__BITNR 0 +#define R_SYNC_SERIAL1_TR_DATA__data_out__WIDTH 32 + +#define R_SYNC_SERIAL1_TR_WORD (IO_TYPECAST_UWORD 0xb000006c) +#define R_SYNC_SERIAL1_TR_WORD__data_out__BITNR 0 +#define R_SYNC_SERIAL1_TR_WORD__data_out__WIDTH 16 + +#define R_SYNC_SERIAL1_TR_BYTE (IO_TYPECAST_BYTE 0xb000006c) +#define R_SYNC_SERIAL1_TR_BYTE__data_out__BITNR 0 +#define R_SYNC_SERIAL1_TR_BYTE__data_out__WIDTH 8 + +#define R_SYNC_SERIAL1_CTRL (IO_TYPECAST_UDWORD 0xb0000068) +#define R_SYNC_SERIAL1_CTRL__tr_baud__BITNR 28 +#define R_SYNC_SERIAL1_CTRL__tr_baud__WIDTH 4 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c150Hz 0 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c300Hz 1 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c600Hz 2 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c1200Hz 3 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c2400Hz 4 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c4800Hz 5 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c9600Hz 6 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c19k2Hz 7 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c28k8Hz 8 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c57k6Hz 9 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c115k2Hz 10 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c230k4Hz 11 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c460k8Hz 12 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c921k6Hz 13 +#define R_SYNC_SERIAL1_CTRL__tr_baud__c3125kHz 14 +#define R_SYNC_SERIAL1_CTRL__tr_baud__reserved 15 +#define R_SYNC_SERIAL1_CTRL__dma_enable__BITNR 27 +#define R_SYNC_SERIAL1_CTRL__dma_enable__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__dma_enable__on 1 +#define R_SYNC_SERIAL1_CTRL__dma_enable__off 0 +#define R_SYNC_SERIAL1_CTRL__mode__BITNR 24 +#define R_SYNC_SERIAL1_CTRL__mode__WIDTH 3 +#define R_SYNC_SERIAL1_CTRL__mode__master_output 0 +#define R_SYNC_SERIAL1_CTRL__mode__slave_output 1 +#define R_SYNC_SERIAL1_CTRL__mode__master_input 2 +#define R_SYNC_SERIAL1_CTRL__mode__slave_input 3 +#define R_SYNC_SERIAL1_CTRL__mode__master_bidir 4 +#define R_SYNC_SERIAL1_CTRL__mode__slave_bidir 5 +#define R_SYNC_SERIAL1_CTRL__error__BITNR 23 +#define R_SYNC_SERIAL1_CTRL__error__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__error__normal 0 +#define R_SYNC_SERIAL1_CTRL__error__ignore 1 +#define R_SYNC_SERIAL1_CTRL__rec_enable__BITNR 22 +#define R_SYNC_SERIAL1_CTRL__rec_enable__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__rec_enable__disable 0 +#define R_SYNC_SERIAL1_CTRL__rec_enable__enable 1 +#define R_SYNC_SERIAL1_CTRL__f_synctype__BITNR 21 +#define R_SYNC_SERIAL1_CTRL__f_synctype__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__f_synctype__normal 0 +#define R_SYNC_SERIAL1_CTRL__f_synctype__early 1 +#define R_SYNC_SERIAL1_CTRL__f_syncsize__BITNR 19 +#define R_SYNC_SERIAL1_CTRL__f_syncsize__WIDTH 2 +#define R_SYNC_SERIAL1_CTRL__f_syncsize__bit 0 +#define R_SYNC_SERIAL1_CTRL__f_syncsize__word 1 +#define R_SYNC_SERIAL1_CTRL__f_syncsize__extended 2 +#define R_SYNC_SERIAL1_CTRL__f_syncsize__reserved 3 +#define R_SYNC_SERIAL1_CTRL__f_sync__BITNR 18 +#define R_SYNC_SERIAL1_CTRL__f_sync__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__f_sync__on 0 +#define R_SYNC_SERIAL1_CTRL__f_sync__off 1 +#define R_SYNC_SERIAL1_CTRL__clk_mode__BITNR 17 +#define R_SYNC_SERIAL1_CTRL__clk_mode__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__clk_mode__normal 0 +#define R_SYNC_SERIAL1_CTRL__clk_mode__gated 1 +#define R_SYNC_SERIAL1_CTRL__clk_halt__BITNR 16 +#define R_SYNC_SERIAL1_CTRL__clk_halt__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__clk_halt__running 0 +#define R_SYNC_SERIAL1_CTRL__clk_halt__stopped 1 +#define R_SYNC_SERIAL1_CTRL__bitorder__BITNR 15 +#define R_SYNC_SERIAL1_CTRL__bitorder__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__bitorder__lsb 0 +#define R_SYNC_SERIAL1_CTRL__bitorder__msb 1 +#define R_SYNC_SERIAL1_CTRL__tr_enable__BITNR 14 +#define R_SYNC_SERIAL1_CTRL__tr_enable__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__tr_enable__disable 0 +#define R_SYNC_SERIAL1_CTRL__tr_enable__enable 1 +#define R_SYNC_SERIAL1_CTRL__wordsize__BITNR 11 +#define R_SYNC_SERIAL1_CTRL__wordsize__WIDTH 3 +#define R_SYNC_SERIAL1_CTRL__wordsize__size8bit 0 +#define R_SYNC_SERIAL1_CTRL__wordsize__size12bit 1 +#define R_SYNC_SERIAL1_CTRL__wordsize__size16bit 2 +#define R_SYNC_SERIAL1_CTRL__wordsize__size24bit 3 +#define R_SYNC_SERIAL1_CTRL__wordsize__size32bit 4 +#define R_SYNC_SERIAL1_CTRL__buf_empty__BITNR 10 +#define R_SYNC_SERIAL1_CTRL__buf_empty__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__buf_empty__lmt_8 0 +#define R_SYNC_SERIAL1_CTRL__buf_empty__lmt_0 1 +#define R_SYNC_SERIAL1_CTRL__buf_full__BITNR 9 +#define R_SYNC_SERIAL1_CTRL__buf_full__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__buf_full__lmt_32 0 +#define R_SYNC_SERIAL1_CTRL__buf_full__lmt_8 1 +#define R_SYNC_SERIAL1_CTRL__flow_ctrl__BITNR 8 +#define R_SYNC_SERIAL1_CTRL__flow_ctrl__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__flow_ctrl__disabled 0 +#define R_SYNC_SERIAL1_CTRL__flow_ctrl__enabled 1 +#define R_SYNC_SERIAL1_CTRL__clk_polarity__BITNR 6 +#define R_SYNC_SERIAL1_CTRL__clk_polarity__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__clk_polarity__pos 0 +#define R_SYNC_SERIAL1_CTRL__clk_polarity__neg 1 +#define R_SYNC_SERIAL1_CTRL__frame_polarity__BITNR 5 +#define R_SYNC_SERIAL1_CTRL__frame_polarity__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__frame_polarity__normal 0 +#define R_SYNC_SERIAL1_CTRL__frame_polarity__inverted 1 +#define R_SYNC_SERIAL1_CTRL__status_polarity__BITNR 4 +#define R_SYNC_SERIAL1_CTRL__status_polarity__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__status_polarity__normal 0 +#define R_SYNC_SERIAL1_CTRL__status_polarity__inverted 1 +#define R_SYNC_SERIAL1_CTRL__clk_driver__BITNR 3 +#define R_SYNC_SERIAL1_CTRL__clk_driver__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__clk_driver__normal 0 +#define R_SYNC_SERIAL1_CTRL__clk_driver__inverted 1 +#define R_SYNC_SERIAL1_CTRL__frame_driver__BITNR 2 +#define R_SYNC_SERIAL1_CTRL__frame_driver__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__frame_driver__normal 0 +#define R_SYNC_SERIAL1_CTRL__frame_driver__inverted 1 +#define R_SYNC_SERIAL1_CTRL__status_driver__BITNR 1 +#define R_SYNC_SERIAL1_CTRL__status_driver__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__status_driver__normal 0 +#define R_SYNC_SERIAL1_CTRL__status_driver__inverted 1 +#define R_SYNC_SERIAL1_CTRL__def_out0__BITNR 0 +#define R_SYNC_SERIAL1_CTRL__def_out0__WIDTH 1 +#define R_SYNC_SERIAL1_CTRL__def_out0__high 1 +#define R_SYNC_SERIAL1_CTRL__def_out0__low 0 + +#define R_SYNC_SERIAL3_REC_DATA (IO_TYPECAST_RO_UDWORD 0xb000007c) +#define R_SYNC_SERIAL3_REC_DATA__data_in__BITNR 0 +#define R_SYNC_SERIAL3_REC_DATA__data_in__WIDTH 32 + +#define R_SYNC_SERIAL3_REC_WORD (IO_TYPECAST_RO_UWORD 0xb000007c) +#define R_SYNC_SERIAL3_REC_WORD__data_in__BITNR 0 +#define R_SYNC_SERIAL3_REC_WORD__data_in__WIDTH 16 + +#define R_SYNC_SERIAL3_REC_BYTE (IO_TYPECAST_RO_BYTE 0xb000007c) +#define R_SYNC_SERIAL3_REC_BYTE__data_in__BITNR 0 +#define R_SYNC_SERIAL3_REC_BYTE__data_in__WIDTH 8 + +#define R_SYNC_SERIAL3_STATUS (IO_TYPECAST_RO_UDWORD 0xb0000078) +#define R_SYNC_SERIAL3_STATUS__rec_status__BITNR 15 +#define R_SYNC_SERIAL3_STATUS__rec_status__WIDTH 1 +#define R_SYNC_SERIAL3_STATUS__rec_status__running 0 +#define R_SYNC_SERIAL3_STATUS__rec_status__idle 1 +#define R_SYNC_SERIAL3_STATUS__tr_empty__BITNR 14 +#define R_SYNC_SERIAL3_STATUS__tr_empty__WIDTH 1 +#define R_SYNC_SERIAL3_STATUS__tr_empty__empty 1 +#define R_SYNC_SERIAL3_STATUS__tr_empty__not_empty 0 +#define R_SYNC_SERIAL3_STATUS__tr_ready__BITNR 13 +#define R_SYNC_SERIAL3_STATUS__tr_ready__WIDTH 1 +#define R_SYNC_SERIAL3_STATUS__tr_ready__full 0 +#define R_SYNC_SERIAL3_STATUS__tr_ready__ready 1 +#define R_SYNC_SERIAL3_STATUS__pin_1__BITNR 12 +#define R_SYNC_SERIAL3_STATUS__pin_1__WIDTH 1 +#define R_SYNC_SERIAL3_STATUS__pin_1__low 0 +#define R_SYNC_SERIAL3_STATUS__pin_1__high 1 +#define R_SYNC_SERIAL3_STATUS__pin_0__BITNR 11 +#define R_SYNC_SERIAL3_STATUS__pin_0__WIDTH 1 +#define R_SYNC_SERIAL3_STATUS__pin_0__low 0 +#define R_SYNC_SERIAL3_STATUS__pin_0__high 1 +#define R_SYNC_SERIAL3_STATUS__underflow__BITNR 10 +#define R_SYNC_SERIAL3_STATUS__underflow__WIDTH 1 +#define R_SYNC_SERIAL3_STATUS__underflow__no 0 +#define R_SYNC_SERIAL3_STATUS__underflow__yes 1 +#define R_SYNC_SERIAL3_STATUS__overrun__BITNR 9 +#define R_SYNC_SERIAL3_STATUS__overrun__WIDTH 1 +#define R_SYNC_SERIAL3_STATUS__overrun__no 0 +#define R_SYNC_SERIAL3_STATUS__overrun__yes 1 +#define R_SYNC_SERIAL3_STATUS__data_avail__BITNR 8 +#define R_SYNC_SERIAL3_STATUS__data_avail__WIDTH 1 +#define R_SYNC_SERIAL3_STATUS__data_avail__no 0 +#define R_SYNC_SERIAL3_STATUS__data_avail__yes 1 +#define R_SYNC_SERIAL3_STATUS__data__BITNR 0 +#define R_SYNC_SERIAL3_STATUS__data__WIDTH 8 + +#define R_SYNC_SERIAL3_TR_DATA (IO_TYPECAST_UDWORD 0xb000007c) +#define R_SYNC_SERIAL3_TR_DATA__data_out__BITNR 0 +#define R_SYNC_SERIAL3_TR_DATA__data_out__WIDTH 32 + +#define R_SYNC_SERIAL3_TR_WORD (IO_TYPECAST_UWORD 0xb000007c) +#define R_SYNC_SERIAL3_TR_WORD__data_out__BITNR 0 +#define R_SYNC_SERIAL3_TR_WORD__data_out__WIDTH 16 + +#define R_SYNC_SERIAL3_TR_BYTE (IO_TYPECAST_BYTE 0xb000007c) +#define R_SYNC_SERIAL3_TR_BYTE__data_out__BITNR 0 +#define R_SYNC_SERIAL3_TR_BYTE__data_out__WIDTH 8 + +#define R_SYNC_SERIAL3_CTRL (IO_TYPECAST_UDWORD 0xb0000078) +#define R_SYNC_SERIAL3_CTRL__tr_baud__BITNR 28 +#define R_SYNC_SERIAL3_CTRL__tr_baud__WIDTH 4 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c150Hz 0 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c300Hz 1 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c600Hz 2 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c1200Hz 3 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c2400Hz 4 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c4800Hz 5 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c9600Hz 6 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c19k2Hz 7 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c28k8Hz 8 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c57k6Hz 9 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c115k2Hz 10 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c230k4Hz 11 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c460k8Hz 12 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c921k6Hz 13 +#define R_SYNC_SERIAL3_CTRL__tr_baud__c3125kHz 14 +#define R_SYNC_SERIAL3_CTRL__tr_baud__reserved 15 +#define R_SYNC_SERIAL3_CTRL__dma_enable__BITNR 27 +#define R_SYNC_SERIAL3_CTRL__dma_enable__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__dma_enable__on 1 +#define R_SYNC_SERIAL3_CTRL__dma_enable__off 0 +#define R_SYNC_SERIAL3_CTRL__mode__BITNR 24 +#define R_SYNC_SERIAL3_CTRL__mode__WIDTH 3 +#define R_SYNC_SERIAL3_CTRL__mode__master_output 0 +#define R_SYNC_SERIAL3_CTRL__mode__slave_output 1 +#define R_SYNC_SERIAL3_CTRL__mode__master_input 2 +#define R_SYNC_SERIAL3_CTRL__mode__slave_input 3 +#define R_SYNC_SERIAL3_CTRL__mode__master_bidir 4 +#define R_SYNC_SERIAL3_CTRL__mode__slave_bidir 5 +#define R_SYNC_SERIAL3_CTRL__error__BITNR 23 +#define R_SYNC_SERIAL3_CTRL__error__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__error__normal 0 +#define R_SYNC_SERIAL3_CTRL__error__ignore 1 +#define R_SYNC_SERIAL3_CTRL__rec_enable__BITNR 22 +#define R_SYNC_SERIAL3_CTRL__rec_enable__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__rec_enable__disable 0 +#define R_SYNC_SERIAL3_CTRL__rec_enable__enable 1 +#define R_SYNC_SERIAL3_CTRL__f_synctype__BITNR 21 +#define R_SYNC_SERIAL3_CTRL__f_synctype__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__f_synctype__normal 0 +#define R_SYNC_SERIAL3_CTRL__f_synctype__early 1 +#define R_SYNC_SERIAL3_CTRL__f_syncsize__BITNR 19 +#define R_SYNC_SERIAL3_CTRL__f_syncsize__WIDTH 2 +#define R_SYNC_SERIAL3_CTRL__f_syncsize__bit 0 +#define R_SYNC_SERIAL3_CTRL__f_syncsize__word 1 +#define R_SYNC_SERIAL3_CTRL__f_syncsize__extended 2 +#define R_SYNC_SERIAL3_CTRL__f_syncsize__reserved 3 +#define R_SYNC_SERIAL3_CTRL__f_sync__BITNR 18 +#define R_SYNC_SERIAL3_CTRL__f_sync__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__f_sync__on 0 +#define R_SYNC_SERIAL3_CTRL__f_sync__off 1 +#define R_SYNC_SERIAL3_CTRL__clk_mode__BITNR 17 +#define R_SYNC_SERIAL3_CTRL__clk_mode__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__clk_mode__normal 0 +#define R_SYNC_SERIAL3_CTRL__clk_mode__gated 1 +#define R_SYNC_SERIAL3_CTRL__clk_halt__BITNR 16 +#define R_SYNC_SERIAL3_CTRL__clk_halt__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__clk_halt__running 0 +#define R_SYNC_SERIAL3_CTRL__clk_halt__stopped 1 +#define R_SYNC_SERIAL3_CTRL__bitorder__BITNR 15 +#define R_SYNC_SERIAL3_CTRL__bitorder__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__bitorder__lsb 0 +#define R_SYNC_SERIAL3_CTRL__bitorder__msb 1 +#define R_SYNC_SERIAL3_CTRL__tr_enable__BITNR 14 +#define R_SYNC_SERIAL3_CTRL__tr_enable__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__tr_enable__disable 0 +#define R_SYNC_SERIAL3_CTRL__tr_enable__enable 1 +#define R_SYNC_SERIAL3_CTRL__wordsize__BITNR 11 +#define R_SYNC_SERIAL3_CTRL__wordsize__WIDTH 3 +#define R_SYNC_SERIAL3_CTRL__wordsize__size8bit 0 +#define R_SYNC_SERIAL3_CTRL__wordsize__size12bit 1 +#define R_SYNC_SERIAL3_CTRL__wordsize__size16bit 2 +#define R_SYNC_SERIAL3_CTRL__wordsize__size24bit 3 +#define R_SYNC_SERIAL3_CTRL__wordsize__size32bit 4 +#define R_SYNC_SERIAL3_CTRL__buf_empty__BITNR 10 +#define R_SYNC_SERIAL3_CTRL__buf_empty__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__buf_empty__lmt_8 0 +#define R_SYNC_SERIAL3_CTRL__buf_empty__lmt_0 1 +#define R_SYNC_SERIAL3_CTRL__buf_full__BITNR 9 +#define R_SYNC_SERIAL3_CTRL__buf_full__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__buf_full__lmt_32 0 +#define R_SYNC_SERIAL3_CTRL__buf_full__lmt_8 1 +#define R_SYNC_SERIAL3_CTRL__flow_ctrl__BITNR 8 +#define R_SYNC_SERIAL3_CTRL__flow_ctrl__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__flow_ctrl__disabled 0 +#define R_SYNC_SERIAL3_CTRL__flow_ctrl__enabled 1 +#define R_SYNC_SERIAL3_CTRL__clk_polarity__BITNR 6 +#define R_SYNC_SERIAL3_CTRL__clk_polarity__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__clk_polarity__pos 0 +#define R_SYNC_SERIAL3_CTRL__clk_polarity__neg 1 +#define R_SYNC_SERIAL3_CTRL__frame_polarity__BITNR 5 +#define R_SYNC_SERIAL3_CTRL__frame_polarity__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__frame_polarity__normal 0 +#define R_SYNC_SERIAL3_CTRL__frame_polarity__inverted 1 +#define R_SYNC_SERIAL3_CTRL__status_polarity__BITNR 4 +#define R_SYNC_SERIAL3_CTRL__status_polarity__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__status_polarity__normal 0 +#define R_SYNC_SERIAL3_CTRL__status_polarity__inverted 1 +#define R_SYNC_SERIAL3_CTRL__clk_driver__BITNR 3 +#define R_SYNC_SERIAL3_CTRL__clk_driver__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__clk_driver__normal 0 +#define R_SYNC_SERIAL3_CTRL__clk_driver__inverted 1 +#define R_SYNC_SERIAL3_CTRL__frame_driver__BITNR 2 +#define R_SYNC_SERIAL3_CTRL__frame_driver__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__frame_driver__normal 0 +#define R_SYNC_SERIAL3_CTRL__frame_driver__inverted 1 +#define R_SYNC_SERIAL3_CTRL__status_driver__BITNR 1 +#define R_SYNC_SERIAL3_CTRL__status_driver__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__status_driver__normal 0 +#define R_SYNC_SERIAL3_CTRL__status_driver__inverted 1 +#define R_SYNC_SERIAL3_CTRL__def_out0__BITNR 0 +#define R_SYNC_SERIAL3_CTRL__def_out0__WIDTH 1 +#define R_SYNC_SERIAL3_CTRL__def_out0__high 1 +#define R_SYNC_SERIAL3_CTRL__def_out0__low 0 + diff --git a/include/asm-cris/sv_addr_ag.h b/include/asm-cris/sv_addr_ag.h new file mode 100644 index 000000000..c80826bf9 --- /dev/null +++ b/include/asm-cris/sv_addr_ag.h @@ -0,0 +1,129 @@ +/*!************************************************************************** +*! +*! MACROS: +*! IO_MASK(reg,field) +*! IO_STATE(reg,field,state) +*! IO_EXTRACT(reg,field,val) +*! IO_STATE_VALUE(reg,field,state) +*! IO_BITNR(reg,field) +*! IO_WIDTH(reg,field) +*! IO_FIELD(reg,field,val) +*! IO_RD(reg) +*! All moderegister addresses and fields of these. +*! +*!**************************************************************************/ + +#ifndef __sv_addr_ag_h__ +#define __sv_addr_ag_h__ + + +#define __test_sv_addr__ 0 + +/*------------------------------------------------------------ +!* General macros to manipulate moderegisters. +!*-----------------------------------------------------------*/ + +/* IO_MASK returns a mask for a specified bitfield in a register. + Note that this macro doesn't work when field width is 32 bits. */ +#define IO_MASK(reg,field) \ + ( ( ( 1 << reg##__##field##__WIDTH ) - 1 ) << reg##__##field##__BITNR ) + +/* IO_STATE returns a constant corresponding to a one of the symbolic + states that the bitfield can have. (Shifted to correct position) */ +#define IO_STATE(reg,field,state) \ + ( reg##__##field##__##state << reg##__##field##__BITNR ) + +/* IO_EXTRACT returns the masked and shifted value corresponding to the + bitfield can have. */ +#define IO_EXTRACT(reg,field,val) ( (( ( ( 1 << reg##__##field##__WIDTH ) \ + - 1 ) << reg##__##field##__BITNR ) & (val)) >> reg##__##field##__BITNR ) + +/* IO_STATE_VALUE returns a constant corresponding to a one of the symbolic + states that the bitfield can have. (Not shifted) */ +#define IO_STATE_VALUE(reg,field,state) ( reg##__##field##__##state ) + +/* IO_FIELD shifts the val parameter to be aligned with the bitfield + specified. */ +#define IO_FIELD(reg,field,val) ((val) << reg##__##field##__BITNR) + +/* IO_BITNR returns the starting bitnumber of a bitfield. Bit 0 is + LSB and the returned bitnumber is LSB of the field. */ +#define IO_BITNR(reg,field) (reg##__##field##__BITNR) + +/* IO_WIDTH returns the width, in bits, of a bitfield. */ +#define IO_WIDTH(reg,field) (reg##__##field##__WIDTH) + +/*--- Obsolete. Kept for backw compatibility. ---*/ +/* Reads (or writes) a byte/uword/udword from the specified mode + register. */ +#define IO_RD(reg) (*(volatile u32*)(reg)) +#define IO_RD_B(reg) (*(volatile u8*)(reg)) +#define IO_RD_W(reg) (*(volatile u16*)(reg)) +#define IO_RD_D(reg) (*(volatile u32*)(reg)) + +/*------------------------------------------------------------ +!* Start addresses of the different memory areas. +!*-----------------------------------------------------------*/ + +#define MEM_CSE0_START (0x00000000) +#define MEM_CSE1_START (0x04000000) +#define MEM_CSR0_START (0x08000000) +#define MEM_CSR1_START (0x0c000000) +#define MEM_CSP0_START (0x10000000) +#define MEM_CSP1_START (0x14000000) +#define MEM_CSP2_START (0x18000000) +#define MEM_CSP3_START (0x1c000000) +#define MEM_CSP4_START (0x20000000) +#define MEM_CSP5_START (0x24000000) +#define MEM_CSP6_START (0x28000000) +#define MEM_CSP7_START (0x2c000000) +#define MEM_DRAM_START (0x40000000) + +#define MEM_NON_CACHEABLE (0x80000000) + +/*------------------------------------------------------------ +!* Type casts used in mode register macros, making pointer +!* dereferencing possible. Empty in assembler. +!*-----------------------------------------------------------*/ + +#ifndef __ASSEMBLER__ +# define IO_TYPECAST_UDWORD (volatile u32*) +# define IO_TYPECAST_RO_UDWORD (const volatile u32*) +# define IO_TYPECAST_UWORD (volatile u16*) +# define IO_TYPECAST_RO_UWORD (const volatile u16*) +# define IO_TYPECAST_BYTE (volatile u8*) +# define IO_TYPECAST_RO_BYTE (const volatile u8*) +#else +# define IO_TYPECAST_UDWORD +# define IO_TYPECAST_RO_UDWORD +# define IO_TYPECAST_UWORD +# define IO_TYPECAST_RO_UWORD +# define IO_TYPECAST_BYTE +# define IO_TYPECAST_RO_BYTE +#endif + +/*------------------------------------------------------------*/ + +#include "sv_addr.agh" + +#if __test_sv_addr__ +/* IO_MASK( R_BUS_CONFIG , CE ) */ +IO_MASK( R_WAITSTATES , SRAM_WS ) +IO_MASK( R_TEST , W32 ) + +IO_STATE( R_BUS_CONFIG, CE, DISABLE ) +IO_STATE( R_BUS_CONFIG, CE, ENABLE ) + +IO_STATE( R_DRAM_TIMING, REF, IVAL2 ) + +IO_MASK( R_DRAM_TIMING, REF ) + +IO_MASK( R_EXT_DMA_0_STAT, TFR_COUNT ) >> IO_BITNR( R_EXT_DMA_0_STAT, TFR_COUNT ) + +IO_RD(R_EXT_DMA_0_STAT) & IO_MASK( R_EXT_DMA_0_STAT, S ) + == IO_STATE( R_EXT_DMA_0_STAT, S, STARTED ) +#endif + + +#endif /* ifndef __sv_addr_ag_h__ */ + diff --git a/include/asm-cris/svinto.h b/include/asm-cris/svinto.h new file mode 100644 index 000000000..444bc3ca5 --- /dev/null +++ b/include/asm-cris/svinto.h @@ -0,0 +1,46 @@ +#ifndef _ASM_CRIS_SVINTO_H +#define _ASM_CRIS_SVINTO_H + +#include "sv_addr_ag.h" + +extern unsigned int genconfig_shadow; /* defined and set in head.S */ + +/* dma stuff */ + +enum { /* Available in: */ + d_eol = (1 << 0), /* flags */ + d_eop = (1 << 1), /* flags & status */ + d_wait = (1 << 2), /* flags */ + d_int = (1 << 3), /* flags */ + d_txerr = (1 << 4), /* flags */ + d_stop = (1 << 4), /* status */ + d_ecp = (1 << 4), /* flags & status */ + d_pri = (1 << 5), /* flags & status */ + d_alignerr = (1 << 6), /* status */ + d_crcerr = (1 << 7) /* status */ +}; + +/* Do remember that DMA does not go through the MMU and needs + * a real physical address, not an address virtually mapped or + * paged. Therefore the buf/next ptrs below are unsigned long instead + * of void * to give a warning if you try to put a pointer directly + * to them instead of going through virt_to_phys/phys_to_virt. + */ + +typedef struct etrax_dma_descr { + unsigned short sw_len; /* 0-1 */ + unsigned short ctrl; /* 2-3 */ + unsigned long next; /* 4-7 */ + unsigned long buf; /* 8-11 */ + unsigned short hw_len; /* 12-13 */ + unsigned short status; /* 14-15 */ +} etrax_dma_descr; + +#define RESET_DMA( n ) \ + *R_DMA_CH##n##_CMD = IO_STATE( R_DMA_CH0_CMD, cmd, reset ) + +#define WAIT_DMA( n ) \ + while( (*R_DMA_CH##n##_CMD & IO_MASK( R_DMA_CH0_CMD, cmd )) != \ + IO_STATE( R_DMA_CH0_CMD, cmd, hold ) ) + +#endif diff --git a/include/asm-cris/system.h b/include/asm-cris/system.h new file mode 100644 index 000000000..05b60efcb --- /dev/null +++ b/include/asm-cris/system.h @@ -0,0 +1,170 @@ +/* $Id: system.h,v 1.3 2000/10/17 14:56:27 bjornw Exp $ */ + +#ifndef __ASM_CRIS_SYSTEM_H +#define __ASM_CRIS_SYSTEM_H + +#include <asm/segment.h> + +/* I need a task-specific debug struct (and the define for #ifdef + RELOC_DEBUG) to kludge into task_struct. */ +#include <linux/config.h> +#include <asm/eshlibld.h> + +/* the switch_to macro calls resume, an asm function in entry.S which does the actual + * task switching. + */ + +extern struct task_struct *resume(struct task_struct *prev, struct task_struct *next, int); +#define prepare_to_switch() do { } while(0) +#define switch_to(prev,next,last) last = resume(prev,next, \ + (int)&((struct task_struct *)0)->thread) + +/* read/write the user-mode stackpointer */ + +extern inline unsigned long rdusp(void) { + unsigned long usp; + __asm__ __volatile__("move usp,%0" : "=rm" (usp)); + return usp; +} + +#define wrusp(usp) \ + __asm__ __volatile__("move %0,usp" : /* no outputs */ : "rm" (usp)) + +/* read the current stackpointer */ + +extern inline unsigned long rdsp(void) { + unsigned long sp; + __asm__ __volatile__("move.d sp,%0" : "=rm" (sp)); + return sp; +} + +static inline unsigned long _get_base(char * addr) +{ + return 0; +} + +#define nop() __asm__ __volatile__ ("nop"); + +#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) +#define tas(ptr) (xchg((ptr),1)) + +struct __xchg_dummy { unsigned long a[100]; }; +#define __xg(x) ((struct __xchg_dummy *)(x)) + +#if 0 +/* use these and an oscilloscope to see the fraction of time we're running with IRQ's disabled */ +/* it assumes the LED's are on port 0x90000000 of course. */ +#define sti() __asm__ __volatile__ ( "ei\n\tpush r0\n\tmoveq 0,r0\n\tmove.d r0,[0x90000000]\n\tpop r0" ); +#define cli() __asm__ __volatile__ ( "di\n\tpush r0\n\tmove.d 0x40000,r0\n\tmove.d r0,[0x90000000]\n\tpop r0"); +#define save_flags(x) __asm__ __volatile__ ("move ccr,%0" : "=rm" (x) : : "memory"); +#define restore_flags(x) __asm__ __volatile__ ("move %0,ccr\n\tbtstq 5,%0\n\tbpl 1f\n\tnop\n\tpush r0\n\tmoveq 0,r0\n\tmove.d r0,[0x90000000]\n\tpop r0\n1:\n" : : "r" (x) : "memory"); +#else +#define __cli() __asm__ __volatile__ ( "di"); +#define __sti() __asm__ __volatile__ ( "ei" ); +#define __save_flags(x) __asm__ __volatile__ ("move ccr,%0" : "=rm" (x) : : "memory"); +#define __restore_flags(x) __asm__ __volatile__ ("move %0,ccr" : : "rm" (x) : "memory"); + +/* For spinlocks etc */ +#define local_irq_save(x) __asm__ __volatile__ ("move ccr,%0\n\tdi" : "=rm" (x) : : "memory"); +#define local_irq_restore(x) restore_flags(x) + +#define local_irq_disable() cli() +#define local_irq_enable() sti() + +#endif + +#define cli() __cli() +#define sti() __sti() +#define save_flags(x) __save_flags(x) +#define restore_flags(x) __restore_flags(x) +#define save_and_cli(x) do { __save_flags(x); cli(); } while(0) + +static inline unsigned long __xchg(unsigned long x, void * ptr, int size) +{ + /* since Etrax doesn't have any atomic xchg instructions, we need to disable + irq's (if enabled) and do it with move.d's */ +#if 0 + unsigned int flags; + save_flags(flags); /* save flags, including irq enable bit */ + cli(); /* shut off irq's */ + switch (size) { + case 1: + __asm__ __volatile__ ( + "move.b %0,r0\n\t" + "move.b %1,%0\n\t" + "move.b r0,%1\n\t" + : "=r" (x) + : "m" (*__xg(ptr)), "r" (x) + : "memory","r0"); + break; + case 2: + __asm__ __volatile__ ( + "move.w %0,r0\n\t" + "move.w %1,%0\n\t" + "move.w r0,%1\n\t" + : "=r" (x) + : "m" (*__xg(ptr)), "r" (x) + : "memory","r0"); + break; + case 4: + __asm__ __volatile__ ( + "move.d %0,r0\n\t" + "move.d %1,%0\n\t" + "move.d r0,%1\n\t" + : "=r" (x) + : "m" (*__xg(ptr)), "r" (x) + : "memory","r0"); + break; + } + restore_flags(flags); /* restore irq enable bit */ + return x; +#else + unsigned long flags,temp; + save_flags(flags); /* save flags, including irq enable bit */ + cli(); /* shut off irq's */ + switch (size) { + case 1: + *((unsigned char *)&temp) = x; + x = *(unsigned char *)ptr; + *(unsigned char *)ptr = *((unsigned char *)&temp); + break; + case 2: + *((unsigned short *)&temp) = x; + x = *(unsigned short *)ptr; + *(unsigned short *)ptr = *((unsigned short *)&temp); + break; + case 4: + temp = x; + x = *(unsigned long *)ptr; + *(unsigned long *)ptr = temp; + break; + } + restore_flags(flags); /* restore irq enable bit */ + return x; +#endif +} + +#define mb() __asm__ __volatile__ ("" : : : "memory") +#define rmb() mb() +#define wmb() mb() + +#ifdef CONFIG_SMP +#define smp_mb() mb() +#define smp_rmb() rmb() +#define smp_wmb() wmb() +#else +#define smp_mb() barrier() +#define smp_rmb() barrier() +#define smp_wmb() barrier() +#endif + +#define iret() + +/* + * disable hlt during certain critical i/o operations + */ +#define HAVE_DISABLE_HLT +void disable_hlt(void); +void enable_hlt(void); + +#endif diff --git a/include/asm-cris/termbits.h b/include/asm-cris/termbits.h new file mode 100644 index 000000000..cea712a63 --- /dev/null +++ b/include/asm-cris/termbits.h @@ -0,0 +1,166 @@ +/* $Id: termbits.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $ */ + +#ifndef __ARCH_ETRAX100_TERMBITS_H__ +#define __ARCH_ETRAX100_TERMBITS_H__ + +#include <linux/posix_types.h> + +typedef unsigned char cc_t; +typedef unsigned int speed_t; +typedef unsigned int tcflag_t; + +#define NCCS 19 +struct termios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ +}; + +/* c_cc characters */ +#define VINTR 0 +#define VQUIT 1 +#define VERASE 2 +#define VKILL 3 +#define VEOF 4 +#define VTIME 5 +#define VMIN 6 +#define VSWTC 7 +#define VSTART 8 +#define VSTOP 9 +#define VSUSP 10 +#define VEOL 11 +#define VREPRINT 12 +#define VDISCARD 13 +#define VWERASE 14 +#define VLNEXT 15 +#define VEOL2 16 + +/* c_iflag bits */ +#define IGNBRK 0000001 +#define BRKINT 0000002 +#define IGNPAR 0000004 +#define PARMRK 0000010 +#define INPCK 0000020 +#define ISTRIP 0000040 +#define INLCR 0000100 +#define IGNCR 0000200 +#define ICRNL 0000400 +#define IUCLC 0001000 +#define IXON 0002000 +#define IXANY 0004000 +#define IXOFF 0010000 +#define IMAXBEL 0020000 + +/* c_oflag bits */ +#define OPOST 0000001 +#define OLCUC 0000002 +#define ONLCR 0000004 +#define OCRNL 0000010 +#define ONOCR 0000020 +#define ONLRET 0000040 +#define OFILL 0000100 +#define OFDEL 0000200 +#define NLDLY 0000400 +#define NL0 0000000 +#define NL1 0000400 +#define CRDLY 0003000 +#define CR0 0000000 +#define CR1 0001000 +#define CR2 0002000 +#define CR3 0003000 +#define TABDLY 0014000 +#define TAB0 0000000 +#define TAB1 0004000 +#define TAB2 0010000 +#define TAB3 0014000 +#define XTABS 0014000 +#define BSDLY 0020000 +#define BS0 0000000 +#define BS1 0020000 +#define VTDLY 0040000 +#define VT0 0000000 +#define VT1 0040000 +#define FFDLY 0100000 +#define FF0 0000000 +#define FF1 0100000 + +/* c_cflag bit meaning */ +#define CBAUD 0010017 +#define B0 0000000 /* hang up */ +#define B50 0000001 +#define B75 0000002 +#define B110 0000003 +#define B134 0000004 +#define B150 0000005 +#define B200 0000006 +#define B300 0000007 +#define B600 0000010 +#define B1200 0000011 +#define B1800 0000012 +#define B2400 0000013 +#define B4800 0000014 +#define B9600 0000015 +#define B19200 0000016 +#define B38400 0000017 +#define EXTA B19200 +#define EXTB B38400 +#define CSIZE 0000060 +#define CS5 0000000 +#define CS6 0000020 +#define CS7 0000040 +#define CS8 0000060 +#define CSTOPB 0000100 +#define CREAD 0000200 +#define PARENB 0000400 +#define PARODD 0001000 +#define HUPCL 0002000 +#define CLOCAL 0004000 +#define CBAUDEX 0010000 +#define B57600 0010001 +#define B115200 0010002 +#define B230400 0010003 +#define B460800 0010004 +/* etrax100 supports these additional three baud rates */ +#define B921600 0010005 +#define B1843200 0010006 +#define B6250000 0010007 +#define CIBAUD 002003600000 /* input baud rate (not used) */ +#define CRTSCTS 020000000000 /* flow control */ + +/* c_lflag bits */ +#define ISIG 0000001 +#define ICANON 0000002 +#define XCASE 0000004 +#define ECHO 0000010 +#define ECHOE 0000020 +#define ECHOK 0000040 +#define ECHONL 0000100 +#define NOFLSH 0000200 +#define TOSTOP 0000400 +#define ECHOCTL 0001000 +#define ECHOPRT 0002000 +#define ECHOKE 0004000 +#define FLUSHO 0010000 +#define PENDIN 0040000 +#define IEXTEN 0100000 + +/* tcflow() and TCXONC use these */ +#define TCOOFF 0 +#define TCOON 1 +#define TCIOFF 2 +#define TCION 3 + +/* tcflush() and TCFLSH use these */ +#define TCIFLUSH 0 +#define TCOFLUSH 1 +#define TCIOFLUSH 2 + +/* tcsetattr uses these */ +#define TCSANOW 0 +#define TCSADRAIN 1 +#define TCSAFLUSH 2 + +#endif diff --git a/include/asm-cris/termios.h b/include/asm-cris/termios.h new file mode 100644 index 000000000..90cb33c4a --- /dev/null +++ b/include/asm-cris/termios.h @@ -0,0 +1,106 @@ +#ifndef _CRIS_TERMIOS_H +#define _CRIS_TERMIOS_H + +#include <asm/termbits.h> +#include <asm/ioctls.h> + +struct winsize { + unsigned short ws_row; + unsigned short ws_col; + unsigned short ws_xpixel; + unsigned short ws_ypixel; +}; + +#define NCC 8 +struct termio { + unsigned short c_iflag; /* input mode flags */ + unsigned short c_oflag; /* output mode flags */ + unsigned short c_cflag; /* control mode flags */ + unsigned short c_lflag; /* local mode flags */ + unsigned char c_line; /* line discipline */ + unsigned char c_cc[NCC]; /* control characters */ +}; + +/* modem lines */ +#define TIOCM_LE 0x001 +#define TIOCM_DTR 0x002 +#define TIOCM_RTS 0x004 +#define TIOCM_ST 0x008 +#define TIOCM_SR 0x010 +#define TIOCM_CTS 0x020 +#define TIOCM_CAR 0x040 +#define TIOCM_RNG 0x080 +#define TIOCM_DSR 0x100 +#define TIOCM_CD TIOCM_CAR +#define TIOCM_RI TIOCM_RNG +#define TIOCM_OUT1 0x2000 +#define TIOCM_OUT2 0x4000 +#define TIOCM_LOOP 0x8000 + +/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ + +/* line disciplines */ +#define N_TTY 0 +#define N_SLIP 1 +#define N_MOUSE 2 +#define N_PPP 3 +#define N_STRIP 4 +#define N_AX25 5 +#define N_X25 6 /* X.25 async */ +#define N_6PACK 7 +#define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ +#define N_R3964 9 /* Reserved for Simatic R3964 module */ +#define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ +#define N_IRDA 11 /* Linux IR - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ +#define N_HDLC 13 /* synchronous HDLC */ +#define N_SYNC_PPP 14 /* synchronous PPP */ +#define N_BT 15 /* bluetooth */ + +#ifdef __KERNEL__ + +/* intr=^C quit=^\ erase=del kill=^U + eof=^D vtime=\0 vmin=\1 sxtc=\0 + start=^Q stop=^S susp=^Z eol=\0 + reprint=^R discard=^U werase=^W lnext=^V + eol2=\0 +*/ +#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" + +/* + * Translate a "termio" structure into a "termios". Ugh. + */ +#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ + unsigned short __tmp; \ + get_user(__tmp,&(termio)->x); \ + *(unsigned short *) &(termios)->x = __tmp; \ +} + +#define user_termio_to_kernel_termios(termios, termio) \ +({ \ + SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ + SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ + SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ + SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ + copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ +}) + +/* + * Translate a "termios" structure into a "termio". Ugh. + */ +#define kernel_termios_to_user_termio(termio, termios) \ +({ \ + put_user((termios)->c_iflag, &(termio)->c_iflag); \ + put_user((termios)->c_oflag, &(termio)->c_oflag); \ + put_user((termios)->c_cflag, &(termio)->c_cflag); \ + put_user((termios)->c_lflag, &(termio)->c_lflag); \ + put_user((termios)->c_line, &(termio)->c_line); \ + copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ +}) + +#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios)) +#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios)) + +#endif /* __KERNEL__ */ + +#endif /* _CRIS_TERMIOS_H */ diff --git a/include/asm-cris/timex.h b/include/asm-cris/timex.h new file mode 100644 index 000000000..30ed7ce4e --- /dev/null +++ b/include/asm-cris/timex.h @@ -0,0 +1,23 @@ +/* + * linux/include/asm-cris/timex.h + * + * CRIS architecture timex specifications + */ +#ifndef _ASM_CRIS_TIMEX_H +#define _ASM_CRIS_TIMEX_H + +#define CLOCK_TICK_RATE 9600 /* Underlying frequency of the HZ timer */ + +/* + * We don't have a cycle-counter.. but we do not support SMP anyway where this is + * used so it does not matter. + */ + +typedef unsigned int cycles_t; + +static inline cycles_t get_cycles(void) +{ + return 0; +} + +#endif diff --git a/include/asm-cris/types.h b/include/asm-cris/types.h new file mode 100644 index 000000000..787ff7b1d --- /dev/null +++ b/include/asm-cris/types.h @@ -0,0 +1,50 @@ +#ifndef _ETRAX_TYPES_H +#define _ETRAX_TYPES_H + +typedef unsigned short umode_t; + +/* + * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the + * header files exported to user space + */ + +typedef __signed__ char __s8; +typedef unsigned char __u8; + +typedef __signed__ short __s16; +typedef unsigned short __u16; + +typedef __signed__ int __s32; +typedef unsigned int __u32; + +#if defined(__GNUC__) && !defined(__STRICT_ANSI__) +typedef __signed__ long long __s64; +typedef unsigned long long __u64; +#endif + +/* + * These aren't exported outside the kernel to avoid name space clashes + */ +#ifdef __KERNEL__ + +typedef signed char s8; +typedef unsigned char u8; + +typedef signed short s16; +typedef unsigned short u16; + +typedef signed int s32; +typedef unsigned int u32; + +typedef signed long long s64; +typedef unsigned long long u64; + +#define BITS_PER_LONG 32 + +/* Dma addresses are 32-bits wide, just like our other addresses. */ + +typedef u32 dma_addr_t; + +#endif /* __KERNEL__ */ + +#endif diff --git a/include/asm-cris/uaccess.h b/include/asm-cris/uaccess.h new file mode 100644 index 000000000..d506983b1 --- /dev/null +++ b/include/asm-cris/uaccess.h @@ -0,0 +1,1075 @@ +/* + * Authors: Bjorn Wesen (bjornw@axis.com) + * Hans-Peter Nilsson (hp@axis.com) + * + * $Log: uaccess.h,v $ + * Revision 1.5 2000/10/25 03:33:21 hp + * - Provide implementation for everything else but get_user and put_user; + * copying inline to/from user for constant length 0..16, 20, 24, and + * clearing for 0..4, 8, 12, 16, 20, 24, strncpy_from_user and strnlen_user + * always inline. + * - Constraints for destination addr in get_user cannot be memory, only reg. + * - Correct labels for PC at expected fault points. + * - Nits with assembly code. + * - Don't use statement expressions without value; use "do {} while (0)". + * - Return correct values from __generic_... functions. + * + * Revision 1.4 2000/09/12 16:28:25 bjornw + * * Removed comments from the get/put user asm code + * * Constrains for destination addr in put_user cannot be memory, only reg + * + * Revision 1.3 2000/09/12 14:30:20 bjornw + * MAX_ADDR_USER does not exist anymore + * + * Revision 1.2 2000/07/13 15:52:48 bjornw + * New user-access functions + * + * Revision 1.1.1.1 2000/07/10 16:32:31 bjornw + * CRIS architecture, working draft + * + * + * + */ + +/* Asm:s have been tweaked (within the domain of correctness) to give + satisfactory results for "gcc version 2.96 20000427 (experimental)". + + Check regularly... + + Register r9 is chosen for temporaries, being a call-clobbered register + first in line to be used (notably for local blocks), not colliding with + parameter registers. */ + +#ifndef _CRIS_UACCESS_H +#define _CRIS_UACCESS_H + +#ifndef __ASSEMBLY__ +#include <linux/sched.h> +#include <linux/errno.h> +#include <asm/processor.h> +#include <asm/page.h> + +#define VERIFY_READ 0 +#define VERIFY_WRITE 1 + +/* + * The fs value determines whether argument validity checking should be + * performed or not. If get_fs() == USER_DS, checking is performed, with + * get_fs() == KERNEL_DS, checking is bypassed. + * + * For historical reasons, these macros are grossly misnamed. + */ + +#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) + +/* addr_limit is the maximum accessible address for the task. we misuse + * the KERNEL_DS and USER_DS values to both assign and compare the + * addr_limit values through the equally misnamed get/set_fs macros. + * (see above) + */ + +#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF) +#define USER_DS MAKE_MM_SEG(TASK_SIZE) + +#define get_ds() (KERNEL_DS) +#define get_fs() (current->addr_limit) +#define set_fs(x) (current->addr_limit = (x)) + +#define segment_eq(a,b) ((a).seg == (b).seg) + +#define __kernel_ok (segment_eq(get_fs(), KERNEL_DS)) +#define __user_ok(addr,size) (((size) <= TASK_SIZE)&&((addr) <= TASK_SIZE-(size))) +#define __access_ok(addr,size) (__kernel_ok || __user_ok((addr),(size))) +#define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size)) + +extern inline int verify_area(int type, const void * addr, unsigned long size) +{ + return access_ok(type,addr,size) ? 0 : -EFAULT; +} + + +/* + * The exception table consists of pairs of addresses: the first is the + * address of an instruction that is allowed to fault, and the second is + * the address at which the program should continue. No registers are + * modified, so it is entirely up to the continuation code to figure out + * what to do. + * + * All the routines below use bits of fixup code that are out of line + * with the main instruction path. This means when everything is well, + * we don't even have to jump over them. Further, they do not intrude + * on our cache or tlb entries. + */ + +struct exception_table_entry +{ + unsigned long insn, fixup; +}; + +/* Returns 0 if exception not found and fixup otherwise. */ +extern unsigned long search_exception_table(unsigned long); + + +/* + * These are the main single-value transfer routines. They automatically + * use the right size if we just have the right pointer type. + * + * This gets kind of ugly. We want to return _two_ values in "get_user()" + * and yet we don't want to do any pointers, because that is too much + * of a performance impact. Thus we have a few rather ugly macros here, + * and hide all the uglyness from the user. + * + * The "__xxx" versions of the user access functions are versions that + * do not verify the address space, that must have been done previously + * with a separate "access_ok()" call (this is used when we do multiple + * accesses to the same area of user memory). + * + * As we use the same address space for kernel and user data on + * CRIS, we can just do these as direct assignments. (Of course, the + * exception handling means that it's no longer "just"...) + */ +#define get_user(x,ptr) \ + __get_user_check((x),(ptr),sizeof(*(ptr))) +#define put_user(x,ptr) \ + __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) + +#define __get_user(x,ptr) \ + __get_user_nocheck((x),(ptr),sizeof(*(ptr))) +#define __put_user(x,ptr) \ + __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) + +/* + * The "xxx_ret" versions return constant specified in third argument, if + * something bad happens. These macros can be optimized for the + * case of just returning from the function xxx_ret is used. + */ + +#define put_user_ret(x,ptr,ret) \ + do { if (put_user(x,ptr)) return ret; } while (0) + +#define get_user_ret(x,ptr,ret) \ + do { if (get_user(x,ptr)) return ret; } while (0) + +#define __put_user_ret(x,ptr,ret) \ + do { if (__put_user(x,ptr)) return ret; } while (0) + +#define __get_user_ret(x,ptr,ret) \ + do { if (__get_user(x,ptr)) return ret; } while (0) + + +extern long __put_user_bad(void); + +#define __put_user_nocheck(x,ptr,size) \ +({ \ + long __pu_err; \ + __put_user_size((x),(ptr),(size),__pu_err); \ + __pu_err; \ +}) + +#define __put_user_check(x,ptr,size) \ +({ \ + long __pu_err = -EFAULT; \ + __typeof__(*(ptr)) *__pu_addr = (ptr); \ + if (access_ok(VERIFY_WRITE,__pu_addr,size)) \ + __put_user_size((x),__pu_addr,(size),__pu_err); \ + __pu_err; \ +}) + +#define __put_user_size(x,ptr,size,retval) \ +do { \ + retval = 0; \ + switch (size) { \ + case 1: __put_user_asm(x,ptr,retval,"move.b"); break; \ + case 2: __put_user_asm(x,ptr,retval,"move.w"); break; \ + case 4: __put_user_asm(x,ptr,retval,"move.d"); break; \ + default: __put_user_bad(); \ + } \ +} while (0) + +struct __large_struct { unsigned long buf[100]; }; +#define __m(x) (*(struct __large_struct *)(x)) + +/* + * We don't tell gcc that we are accessing memory, but this is OK + * because we do not write to any memory gcc knows about, so there + * are no aliasing issues. + * + * Note that PC at a fault is the address *after* the faulting + * instruction. + */ +#define __put_user_asm(x, addr, err, op) \ + __asm__ __volatile__( \ + " "op" %1,[%2]\n" \ + "2:\n" \ + " .section .fixup,\"ax\"\n" \ + "3: move.d %3,%0\n" \ + " jump 2b\n" \ + " .previous\n" \ + " .section __ex_table,\"a\"\n" \ + " .dword 2b,3b\n" \ + " .previous\n" \ + : "=r" (err) \ + : "r" (x), "r" (addr), "g" (-EFAULT), "0" (err)) + + +#define __get_user_nocheck(x,ptr,size) \ +({ \ + long __gu_err, __gu_val; \ + __get_user_size(__gu_val,(ptr),(size),__gu_err); \ + (x) = (__typeof__(*(ptr)))__gu_val; \ + __gu_err; \ +}) + +#define __get_user_check(x,ptr,size) \ +({ \ + long __gu_err = -EFAULT, __gu_val = 0; \ + const __typeof__(*(ptr)) *__gu_addr = (ptr); \ + if (access_ok(VERIFY_READ,__gu_addr,size)) \ + __get_user_size(__gu_val,__gu_addr,(size),__gu_err); \ + (x) = (__typeof__(*(ptr)))__gu_val; \ + __gu_err; \ +}) + +extern long __get_user_bad(void); + +#define __get_user_size(x,ptr,size,retval) \ +do { \ + retval = 0; \ + switch (size) { \ + case 1: __get_user_asm(x,ptr,retval,"move.b"); break; \ + case 2: __get_user_asm(x,ptr,retval,"move.w"); break; \ + case 4: __get_user_asm(x,ptr,retval,"move.d"); break; \ + default: (x) = __get_user_bad(); \ + } \ +} while (0) + +/* See comment before __put_user_asm. */ + +#define __get_user_asm(x, addr, err, op) \ + __asm__ __volatile__( \ + " "op" [%2],%1\n" \ + "2:\n" \ + " .section .fixup,\"ax\"\n" \ + "3: move.d %3,%0\n" \ + " moveq 0,%1\n" \ + " jump 2b\n" \ + " .previous\n" \ + " .section __ex_table,\"a\"\n" \ + " .dword 2b,3b\n" \ + " .previous\n" \ + : "=r" (err), "=r" (x) \ + : "r" (addr), "g" (-EFAULT), "0" (err)) + +/* More complex functions. Most are inline, but some call functions that + live in lib/usercopy.c */ + +extern unsigned long __copy_user(void *to, const void *from, unsigned long n); +extern unsigned long __copy_user_zeroing(void *to, const void *from, unsigned long n); +extern unsigned long __do_clear_user(void *to, unsigned long n); + +/* + * Copy a null terminated string from userspace. + * + * Must return: + * -EFAULT for an exception + * count if we hit the buffer limit + * bytes copied if we hit a null byte + * (without the null byte) + */ + +static inline long +__do_strncpy_from_user(char *dst, const char *src, long count) +{ + long res; + + if (count == 0) + return 0; + + /* + * Currently, in 2.4.0-test9, most ports use a simple byte-copy loop. + * So do we. + * + * This code is deduced from: + * + * char tmp2; + * long tmp1, tmp3 + * tmp1 = count; + * while ((*dst++ = (tmp2 = *src++)) != 0 + * && --tmp1) + * ; + * + * res = count - tmp1; + * + * with tweaks. + */ + + __asm__ __volatile__ ( + " move.d %3,%0\n" + " move.b [%2+],r9\n" + "1: beq 2f\n" + " move.b r9,[%1+]\n" + + " subq 1,%0\n" + " bne 1b\n" + " move.b [%2+],r9\n" + + "2: sub.d %3,%0\n" + " neg.d %0,%0\n" + "3:\n" + " .section .fixup,\"ax\"\n" + "4: move.d %7,%0\n" + " jump 3b\n" + + /* There's one address for a fault at the first move, and + two possible PC values for a fault at the second move, + being a delay-slot filler. However, the branch-target + for the second move is the same as the first address. + Just so you don't get confused... */ + " .previous\n" + " .section __ex_table,\"a\"\n" + " .dword 1b,4b\n" + " .dword 2b,4b\n" + " .previous" + : "=r" (res), "=r" (dst), "=r" (src), "=r" (count) + : "3" (count), "1" (dst), "2" (src), "g" (-EFAULT) + : "r9"); + + return res; +} + +static inline unsigned long +__generic_copy_to_user(void *to, const void *from, unsigned long n) +{ + if (access_ok(VERIFY_WRITE, to, n)) + return __copy_user(to,from,n); + return n; +} + +static inline unsigned long +__generic_copy_from_user(void *to, const void *from, unsigned long n) +{ + if (access_ok(VERIFY_READ, from, n)) + return __copy_user_zeroing(to,from,n); + return n; +} + +static inline unsigned long +__generic_clear_user(void *to, unsigned long n) +{ + if (access_ok(VERIFY_WRITE, to, n)) + return __do_clear_user(to,n); + return n; +} + +static inline long +__strncpy_from_user(char *dst, const char *src, long count) +{ + return __do_strncpy_from_user(dst, src, count); +} + +static inline long +strncpy_from_user(char *dst, const char *src, long count) +{ + long res = -EFAULT; + if (access_ok(VERIFY_READ, src, 1)) + res = __do_strncpy_from_user(dst, src, count); + return res; +} + +/* A few copy asms to build up the more complex ones from. + + Note again, a post-increment is performed regardless of whether a bus + fault occurred in that instruction, and PC for a faulted insn is the + address *after* the insn. */ + +#define __asm_copy_user_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm__ __volatile__ ( \ + COPY \ + "1:\n" \ + " .section .fixup,\"ax\"\n" \ + FIXUP \ + " jump 1b\n" \ + " .previous\n" \ + " .section __ex_table,\"a\"\n" \ + TENTRY \ + " .previous\n" \ + : "=r" (to), "=r" (from), "=r" (ret) \ + : "0" (to), "1" (from), "2" (ret) \ + : "r9", "memory") + +#define __asm_copy_from_user_1(to, from, ret) \ + __asm_copy_user_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + "2: move.b r9,[%0+]\n", \ + "3: addq 1,%2\n" \ + " clear.b [%0+]\n", \ + " .dword 2b,3b\n") + +#define __asm_copy_from_user_2x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_user_cont(to, from, ret, \ + " move.w [%1+],r9\n" \ + "2: move.w r9,[%0+]\n" COPY, \ + "3: addq 2,%2\n" \ + " clear.w [%0+]\n" FIXUP, \ + " .dword 2b,3b\n" TENTRY) + +#define __asm_copy_from_user_2(to, from, ret) \ + __asm_copy_from_user_2x_cont(to, from, ret, "", "", "") + +#define __asm_copy_from_user_3(to, from, ret) \ + __asm_copy_from_user_2x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + "4: move.b r9,[%0+]\n", \ + "5: addq 1,%2\n" \ + " clear.b [%0+]\n", \ + " .dword 4b,5b\n") + +#define __asm_copy_from_user_4x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_user_cont(to, from, ret, \ + " move.d [%1+],r9\n" \ + "2: move.d r9,[%0+]\n" COPY, \ + "3: addq 4,%2\n" \ + " clear.d [%0+]\n" FIXUP, \ + " .dword 2b,3b\n" TENTRY) + +#define __asm_copy_from_user_4(to, from, ret) \ + __asm_copy_from_user_4x_cont(to, from, ret, "", "", "") + +#define __asm_copy_from_user_5(to, from, ret) \ + __asm_copy_from_user_4x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + "4: move.b r9,[%0+]\n", \ + "5: addq 1,%2\n" \ + " clear.b [%0+]\n", \ + " .dword 4b,5b\n") + +#define __asm_copy_from_user_6x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_from_user_4x_cont(to, from, ret, \ + " move.w [%1+],r9\n" \ + "4: move.w r9,[%0+]\n" COPY, \ + "5: addq 2,%2\n" \ + " clear.w [%0+]\n" FIXUP, \ + " .dword 4b,5b\n" TENTRY) + +#define __asm_copy_from_user_6(to, from, ret) \ + __asm_copy_from_user_6x_cont(to, from, ret, "", "", "") + +#define __asm_copy_from_user_7(to, from, ret) \ + __asm_copy_from_user_6x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + "6: move.b r9,[%0+]\n", \ + "7: addq 1,%2\n" \ + " clear.b [%0+]\n", \ + " .dword 6b,7b\n") + +#define __asm_copy_from_user_8x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_from_user_4x_cont(to, from, ret, \ + " move.d [%1+],r9\n" \ + "4: move.d r9,[%0+]\n" COPY, \ + "5: addq 4,%2\n" \ + " clear.d [%0+]\n" FIXUP, \ + " .dword 4b,5b\n" TENTRY) + +#define __asm_copy_from_user_8(to, from, ret) \ + __asm_copy_from_user_8x_cont(to, from, ret, "", "", "") + +#define __asm_copy_from_user_9(to, from, ret) \ + __asm_copy_from_user_8x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + "6: move.b r9,[%0+]\n", \ + "7: addq 1,%2\n" \ + " clear.b [%0+]\n", \ + " .dword 6b,7b\n") + +#define __asm_copy_from_user_10x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_from_user_8x_cont(to, from, ret, \ + " move.w [%1+],r9\n" \ + "6: move.w r9,[%0+]\n" COPY, \ + "7: addq 2,%2\n" \ + " clear.w [%0+]\n" FIXUP, \ + " .dword 6b,7b\n" TENTRY) + +#define __asm_copy_from_user_10(to, from, ret) \ + __asm_copy_from_user_10x_cont(to, from, ret, "", "", "") + +#define __asm_copy_from_user_11(to, from, ret) \ + __asm_copy_from_user_10x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + "8: move.b r9,[%0+]\n", \ + "9: addq 1,%2\n" \ + " clear.b [%0+]\n", \ + " .dword 8b,9b\n") + +#define __asm_copy_from_user_12x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_from_user_8x_cont(to, from, ret, \ + " move.d [%1+],r9\n" \ + "6: move.d r9,[%0+]\n" COPY, \ + "7: addq 4,%2\n" \ + " clear.d [%0+]\n" FIXUP, \ + " .dword 6b,7b\n" TENTRY) + +#define __asm_copy_from_user_12(to, from, ret) \ + __asm_copy_from_user_12x_cont(to, from, ret, "", "", "") + +#define __asm_copy_from_user_13(to, from, ret) \ + __asm_copy_from_user_12x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + "8: move.b r9,[%0+]\n", \ + "9: addq 1,%2\n" \ + " clear.b [%0+]\n", \ + " .dword 8b,9b\n") + +#define __asm_copy_from_user_14x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_from_user_12x_cont(to, from, ret, \ + " move.w [%1+],r9\n" \ + "8: move.w r9,[%0+]\n" COPY, \ + "9: addq 2,%2\n" \ + " clear.w [%0+]\n" FIXUP, \ + " .dword 8b,9b\n" TENTRY) + +#define __asm_copy_from_user_14(to, from, ret) \ + __asm_copy_from_user_14x_cont(to, from, ret, "", "", "") + +#define __asm_copy_from_user_15(to, from, ret) \ + __asm_copy_from_user_14x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + "10: move.b r9,[%0+]\n", \ + "11: addq 1,%2\n" \ + " clear.b [%0+]\n", \ + " .dword 10b,11b\n") + +#define __asm_copy_from_user_16x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_from_user_12x_cont(to, from, ret, \ + " move.d [%1+],r9\n" \ + "8: move.d r9,[%0+]\n" COPY, \ + "9: addq 4,%2\n" \ + " clear.d [%0+]\n" FIXUP, \ + " .dword 8b,9b\n" TENTRY) + +#define __asm_copy_from_user_16(to, from, ret) \ + __asm_copy_from_user_16x_cont(to, from, ret, "", "", "") + +#define __asm_copy_from_user_20x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_from_user_16x_cont(to, from, ret, \ + " move.d [%1+],r9\n" \ + "10: move.d r9,[%0+]\n" COPY, \ + "11: addq 4,%2\n" \ + " clear.d [%0+]\n" FIXUP, \ + " .dword 10b,11b\n" TENTRY) + +#define __asm_copy_from_user_20(to, from, ret) \ + __asm_copy_from_user_20x_cont(to, from, ret, "", "", "") + +#define __asm_copy_from_user_24x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_from_user_20x_cont(to, from, ret, \ + " move.d [%1+],r9\n" \ + "12: move.d r9,[%0+]\n" COPY, \ + "13: addq 4,%2\n" \ + " clear.d [%0+]\n" FIXUP, \ + " .dword 12b,13b\n" TENTRY) + +#define __asm_copy_from_user_24(to, from, ret) \ + __asm_copy_from_user_24x_cont(to, from, ret, "", "", "") + +/* And now, the to-user ones. */ + +#define __asm_copy_to_user_1(to, from, ret) \ + __asm_copy_user_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + " move.b r9,[%0+]\n2:\n", \ + "3: addq 1,%2\n", \ + " .dword 2b,3b\n") + +#define __asm_copy_to_user_2x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_user_cont(to, from, ret, \ + " move.w [%1+],r9\n" \ + " move.w r9,[%0+]\n2:\n" COPY, \ + "3: addq 2,%2\n" FIXUP, \ + " .dword 2b,3b\n" TENTRY) + +#define __asm_copy_to_user_2(to, from, ret) \ + __asm_copy_to_user_2x_cont(to, from, ret, "", "", "") + +#define __asm_copy_to_user_3(to, from, ret) \ + __asm_copy_to_user_2x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + " move.b r9,[%0+]\n4:\n", \ + "5: addq 1,%2\n", \ + " .dword 4b,5b\n") + +#define __asm_copy_to_user_4x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_user_cont(to, from, ret, \ + " move.d [%1+],r9\n" \ + " move.d r9,[%0+]\n2:\n" COPY, \ + "3: addq 4,%2\n" FIXUP, \ + " .dword 2b,3b\n" TENTRY) + +#define __asm_copy_to_user_4(to, from, ret) \ + __asm_copy_to_user_4x_cont(to, from, ret, "", "", "") + +#define __asm_copy_to_user_5(to, from, ret) \ + __asm_copy_to_user_4x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + " move.b r9,[%0+]\n4:\n", \ + "5: addq 1,%2\n", \ + " .dword 4b,5b\n") + +#define __asm_copy_to_user_6x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_to_user_4x_cont(to, from, ret, \ + " move.w [%1+],r9\n" \ + " move.w r9,[%0+]\n4:\n" COPY, \ + "5: addq 2,%2\n" FIXUP, \ + " .dword 4b,5b\n" TENTRY) + +#define __asm_copy_to_user_6(to, from, ret) \ + __asm_copy_to_user_6x_cont(to, from, ret, "", "", "") + +#define __asm_copy_to_user_7(to, from, ret) \ + __asm_copy_to_user_6x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + " move.b r9,[%0+]\n6:\n", \ + "7: addq 1,%2\n", \ + " .dword 6b,7b\n") + +#define __asm_copy_to_user_8x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_to_user_4x_cont(to, from, ret, \ + " move.d [%1+],r9\n" \ + " move.d r9,[%0+]\n4:\n" COPY, \ + "5: addq 4,%2\n" FIXUP, \ + " .dword 4b,5b\n" TENTRY) + +#define __asm_copy_to_user_8(to, from, ret) \ + __asm_copy_to_user_8x_cont(to, from, ret, "", "", "") + +#define __asm_copy_to_user_9(to, from, ret) \ + __asm_copy_to_user_8x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + " move.b r9,[%0+]\n6:\n", \ + "7: addq 1,%2\n", \ + " .dword 6b,7b\n") + +#define __asm_copy_to_user_10x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_to_user_8x_cont(to, from, ret, \ + " move.w [%1+],r9\n" \ + " move.w r9,[%0+]\n6:\n" COPY, \ + "7: addq 2,%2\n" FIXUP, \ + " .dword 6b,7b\n" TENTRY) + +#define __asm_copy_to_user_10(to, from, ret) \ + __asm_copy_to_user_10x_cont(to, from, ret, "", "", "") + +#define __asm_copy_to_user_11(to, from, ret) \ + __asm_copy_to_user_10x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + " move.b r9,[%0+]\n8:\n", \ + "9: addq 1,%2\n", \ + " .dword 8b,9b\n") + +#define __asm_copy_to_user_12x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_to_user_8x_cont(to, from, ret, \ + " move.d [%1+],r9\n" \ + " move.d r9,[%0+]\n6:\n" COPY, \ + "7: addq 4,%2\n" FIXUP, \ + " .dword 6b,7b\n" TENTRY) + +#define __asm_copy_to_user_12(to, from, ret) \ + __asm_copy_to_user_12x_cont(to, from, ret, "", "", "") + +#define __asm_copy_to_user_13(to, from, ret) \ + __asm_copy_to_user_12x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + " move.b r9,[%0+]\n8:\n", \ + "9: addq 1,%2\n", \ + " .dword 8b,9b\n") + +#define __asm_copy_to_user_14x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_to_user_12x_cont(to, from, ret, \ + " move.w [%1+],r9\n" \ + " move.w r9,[%0+]\n8:\n" COPY, \ + "9: addq 2,%2\n" FIXUP, \ + " .dword 8b,9b\n" TENTRY) + +#define __asm_copy_to_user_14(to, from, ret) \ + __asm_copy_to_user_14x_cont(to, from, ret, "", "", "") + +#define __asm_copy_to_user_15(to, from, ret) \ + __asm_copy_to_user_14x_cont(to, from, ret, \ + " move.b [%1+],r9\n" \ + " move.b r9,[%0+]\n10:\n", \ + "11: addq 1,%2\n", \ + " .dword 10b,11b\n") + +#define __asm_copy_to_user_16x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_to_user_12x_cont(to, from, ret, \ + " move.d [%1+],r9\n" \ + " move.d r9,[%0+]\n8:\n" COPY, \ + "9: addq 4,%2\n" FIXUP, \ + " .dword 8b,9b\n" TENTRY) + +#define __asm_copy_to_user_16(to, from, ret) \ + __asm_copy_to_user_16x_cont(to, from, ret, "", "", "") + +#define __asm_copy_to_user_20x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_to_user_16x_cont(to, from, ret, \ + " move.d [%1+],r9\n" \ + " move.d r9,[%0+]\n10:\n" COPY, \ + "11: addq 4,%2\n" FIXUP, \ + " .dword 10b,11b\n" TENTRY) + +#define __asm_copy_to_user_20(to, from, ret) \ + __asm_copy_to_user_20x_cont(to, from, ret, "", "", "") + +#define __asm_copy_to_user_24x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ + __asm_copy_to_user_20x_cont(to, from, ret, \ + " move.d [%1+],r9\n" \ + " move.d r9,[%0+]\n12:\n" COPY, \ + "13: addq 4,%2\n" FIXUP, \ + " .dword 12b,13b\n" TENTRY) + +#define __asm_copy_to_user_24(to, from, ret) \ + __asm_copy_to_user_24x_cont(to, from, ret, "", "", "") + +/* Define a few clearing asms with exception handlers. */ + +/* This frame-asm is like the __asm_copy_user_cont one, but has one less + input. */ + +#define __asm_clear(to, ret, CLEAR, FIXUP, TENTRY) \ + __asm__ __volatile__ ( \ + CLEAR \ + "1:\n" \ + " .section .fixup,\"ax\"\n" \ + FIXUP \ + " jump 1b\n" \ + " .previous\n" \ + " .section __ex_table,\"a\"\n" \ + TENTRY \ + " .previous" \ + : "=r" (to), "=r" (ret) \ + : "0" (to), "1" (ret) \ + : "r9", "memory") + +#define __asm_clear_1(to, ret) \ + __asm_clear(to, ret, \ + " clear.b [%0+]\n2:\n", \ + "3: addq 1,%1\n", \ + " .dword 2b,3b\n") + +#define __asm_clear_2(to, ret) \ + __asm_clear(to, ret, \ + " clear.w [%0+]\n2:\n", \ + "3: addq 2,%1\n", \ + " .dword 2b,3b\n") + +#define __asm_clear_3(to, ret) \ + __asm_clear(to, ret, \ + " clear.w [%0+]\n" \ + "2: clear.b [%0+]\n3:\n", \ + "4: addq 2,%1\n" \ + "5: addq 1,%1\n", \ + " .dword 2b,4b\n" \ + " .dword 3b,5b\n") + +#define __asm_clear_4x_cont(to, ret, CLEAR, FIXUP, TENTRY) \ + __asm_clear(to, ret, \ + " clear.d [%0+]\n2:\n" CLEAR, \ + "3: addq 4,%1\n" FIXUP, \ + " .dword 2b,3b\n" TENTRY) + +#define __asm_clear_4(to, ret) \ + __asm_clear_4x_cont(to, ret, "", "", "") + +#define __asm_clear_8x_cont(to, ret, CLEAR, FIXUP, TENTRY) \ + __asm_clear_4x_cont(to, ret, \ + " clear.d [%0+]\n4:\n" CLEAR, \ + "5: addq 4,%1\n" FIXUP, \ + " .dword 4b,5b\n" TENTRY) + +#define __asm_clear_8(to, ret) \ + __asm_clear_8x_cont(to, ret, "", "", "") + +#define __asm_clear_12x_cont(to, ret, CLEAR, FIXUP, TENTRY) \ + __asm_clear_8x_cont(to, ret, \ + " clear.d [%0+]\n6:\n" CLEAR, \ + "7: addq 4,%1\n" FIXUP, \ + " .dword 6b,7b\n" TENTRY) + +#define __asm_clear_12(to, ret) \ + __asm_clear_12x_cont(to, ret, "", "", "") + +#define __asm_clear_16x_cont(to, ret, CLEAR, FIXUP, TENTRY) \ + __asm_clear_12x_cont(to, ret, \ + " clear.d [%0+]\n8:\n" CLEAR, \ + "9: addq 4,%1\n" FIXUP, \ + " .dword 8b,9b\n" TENTRY) + +#define __asm_clear_16(to, ret) \ + __asm_clear_16x_cont(to, ret, "", "", "") + +#define __asm_clear_20x_cont(to, ret, CLEAR, FIXUP, TENTRY) \ + __asm_clear_16x_cont(to, ret, \ + " clear.d [%0+]\n10:\n" CLEAR, \ + "11: addq 4,%1\n" FIXUP, \ + " .dword 10b,11b\n" TENTRY) + +#define __asm_clear_20(to, ret) \ + __asm_clear_20x_cont(to, ret, "", "", "") + +#define __asm_clear_24x_cont(to, ret, CLEAR, FIXUP, TENTRY) \ + __asm_clear_20x_cont(to, ret, \ + " clear.d [%0+]\n12:\n" CLEAR, \ + "13: addq 4,%1\n" FIXUP, \ + " .dword 12b,13b\n" TENTRY) + +#define __asm_clear_24(to, ret) \ + __asm_clear_24x_cont(to, ret, "", "", "") + +/* Note that if these expand awfully if made into switch constructs, so + don't do that. */ + +static inline unsigned long +__constant_copy_from_user(void *to, const void *from, unsigned long n) +{ + unsigned long ret = 0; + if (n == 0) + ; + else if (n == 1) + __asm_copy_from_user_1(to, from, ret); + else if (n == 2) + __asm_copy_from_user_2(to, from, ret); + else if (n == 3) + __asm_copy_from_user_3(to, from, ret); + else if (n == 4) + __asm_copy_from_user_4(to, from, ret); + else if (n == 5) + __asm_copy_from_user_5(to, from, ret); + else if (n == 6) + __asm_copy_from_user_6(to, from, ret); + else if (n == 7) + __asm_copy_from_user_7(to, from, ret); + else if (n == 8) + __asm_copy_from_user_8(to, from, ret); + else if (n == 9) + __asm_copy_from_user_9(to, from, ret); + else if (n == 10) + __asm_copy_from_user_10(to, from, ret); + else if (n == 11) + __asm_copy_from_user_11(to, from, ret); + else if (n == 12) + __asm_copy_from_user_12(to, from, ret); + else if (n == 13) + __asm_copy_from_user_13(to, from, ret); + else if (n == 14) + __asm_copy_from_user_14(to, from, ret); + else if (n == 15) + __asm_copy_from_user_15(to, from, ret); + else if (n == 16) + __asm_copy_from_user_16(to, from, ret); + else if (n == 20) + __asm_copy_from_user_20(to, from, ret); + else if (n == 24) + __asm_copy_from_user_24(to, from, ret); + else + ret = __generic_copy_from_user(to, from, n); + + return ret; +} + +/* Ditto, don't make a switch out of this. */ + +static inline unsigned long +__constant_copy_to_user(void *to, const void *from, unsigned long n) +{ + unsigned long ret = 0; + if (n == 0) + ; + else if (n == 1) + __asm_copy_to_user_1(to, from, ret); + else if (n == 2) + __asm_copy_to_user_2(to, from, ret); + else if (n == 3) + __asm_copy_to_user_3(to, from, ret); + else if (n == 4) + __asm_copy_to_user_4(to, from, ret); + else if (n == 5) + __asm_copy_to_user_5(to, from, ret); + else if (n == 6) + __asm_copy_to_user_6(to, from, ret); + else if (n == 7) + __asm_copy_to_user_7(to, from, ret); + else if (n == 8) + __asm_copy_to_user_8(to, from, ret); + else if (n == 9) + __asm_copy_to_user_9(to, from, ret); + else if (n == 10) + __asm_copy_to_user_10(to, from, ret); + else if (n == 11) + __asm_copy_to_user_11(to, from, ret); + else if (n == 12) + __asm_copy_to_user_12(to, from, ret); + else if (n == 13) + __asm_copy_to_user_13(to, from, ret); + else if (n == 14) + __asm_copy_to_user_14(to, from, ret); + else if (n == 15) + __asm_copy_to_user_15(to, from, ret); + else if (n == 16) + __asm_copy_to_user_16(to, from, ret); + else if (n == 20) + __asm_copy_to_user_20(to, from, ret); + else if (n == 24) + __asm_copy_to_user_24(to, from, ret); + else + ret = __generic_copy_to_user(to, from, n); + + return ret; +} + +/* No switch, please. */ + +static inline unsigned long +__constant_clear_user(void *to, unsigned long n) +{ + unsigned long ret = 0; + if (n == 0) + ; + else if (n == 1) + __asm_clear_1(to, ret); + else if (n == 2) + __asm_clear_2(to, ret); + else if (n == 3) + __asm_clear_3(to, ret); + else if (n == 4) + __asm_clear_4(to, ret); + else if (n == 8) + __asm_clear_8(to, ret); + else if (n == 12) + __asm_clear_12(to, ret); + else if (n == 16) + __asm_clear_16(to, ret); + else if (n == 20) + __asm_clear_20(to, ret); + else if (n == 24) + __asm_clear_24(to, ret); + else + ret = __generic_clear_user(to, n); + + return ret; +} + + +#define clear_user(to, n) \ +(__builtin_constant_p(n) ? \ + __constant_clear_user(to, n) : \ + __generic_clear_user(to, n)) + +#define copy_from_user(to, from, n) \ +(__builtin_constant_p(n) ? \ + __constant_copy_from_user(to, from, n) : \ + __generic_copy_from_user(to, from, n)) + +#define copy_to_user(to, from, n) \ +(__builtin_constant_p(n) ? \ + __constant_copy_to_user(to, from, n) : \ + __generic_copy_to_user(to, from, n)) + +#define copy_to_user_ret(to,from,n,retval) \ + do { if (copy_to_user(to,from,n)) return retval; } while (0) +#define copy_from_user_ret(to,from,n,retval) \ + do { if (copy_from_user(to,from,n)) return retval; } while (0) + +/* We let the __ versions of copy_from/to_user inline, because they're often + * used in fast paths and have only a small space overhead. + */ + +static inline unsigned long +__generic_copy_from_user_nocheck(void *to, const void *from, unsigned long n) +{ + return __copy_user_zeroing(to,from,n); +} + +static inline unsigned long +__generic_copy_to_user_nocheck(void *to, const void *from, unsigned long n) +{ + return __copy_user(to,from,n); +} + +static inline unsigned long +__generic_clear_user_nocheck(void *to, unsigned long n) +{ + return __do_clear_user(to,n); +} + +/* without checking */ + +#define __copy_to_user(to,from,n) __generic_copy_to_user_nocheck((to),(from),(n)) +#define __copy_from_user(to,from,n) __generic_copy_from_user_nocheck((to),(from),(n)) +#define __clear_user(to,n) __generic_clear_user_nocheck((to),(n)) + +/* + * Return the size of a string (including the ending 0) + * + * Return length of string in userspace including terminating 0 + * or 0 for error. Return a value greater than N if too long. + */ + +static inline long +strnlen_user(const char *s, long n) +{ + long res, tmp1, tmp2; + + if (!access_ok(VERIFY_READ, s, 0)) + return 0; + + /* + * This code is deduced from: + * + * tmp1 = n; + * while (tmp1-- > 0 && *s++) + * ; + * + * res = n - tmp1; + * + * (with tweaks). + */ + + __asm__ __volatile__ ( + " move.d %1,r9\n" + "0:\n" + " ble 1f\n" + " subq 1,r9\n" + + " test.b [%0+]\n" + " bne 0b\n" + " test.d r9\n" + "1:\n" + " move.d %1,%0\n" + " sub.d r9,%0\n" + "2:\n" + " .section .fixup,\"ax\"\n" + + "3: clear.d %0\n" + " jump 2b\n" + + /* There's one address for a fault at the first move, and + two possible PC values for a fault at the second move, + being a delay-slot filler. However, the branch-target + for the second move is the same as the first address. + Just so you don't get confused... */ + " .previous\n" + " .section __ex_table,\"a\"\n" + " .dword 0b,3b\n" + " .dword 1b,3b\n" + " .previous\n" + : "=r" (res), "=r" (tmp1) + : "0" (s), "1" (n) + : "r9"); + + return res; +} + +#define strlen_user(str) strnlen_user((str), 0x7ffffffe) + +#endif /* __ASSEMBLY__ */ + +#endif /* _CRIS_UACCESS_H */ diff --git a/include/asm-cris/ucontext.h b/include/asm-cris/ucontext.h new file mode 100644 index 000000000..eed6ad5eb --- /dev/null +++ b/include/asm-cris/ucontext.h @@ -0,0 +1,12 @@ +#ifndef _ASM_CRIS_UCONTEXT_H +#define _ASM_CRIS_UCONTEXT_H + +struct ucontext { + unsigned long uc_flags; + struct ucontext *uc_link; + stack_t uc_stack; + struct sigcontext uc_mcontext; + sigset_t uc_sigmask; /* mask last for extensibility */ +}; + +#endif /* !_ASM_CRIS_UCONTEXT_H */ diff --git a/include/asm-cris/unaligned.h b/include/asm-cris/unaligned.h new file mode 100644 index 000000000..7fbbb399f --- /dev/null +++ b/include/asm-cris/unaligned.h @@ -0,0 +1,16 @@ +#ifndef __CRIS_UNALIGNED_H +#define __CRIS_UNALIGNED_H + +/* + * CRIS can do unaligned accesses itself. + * + * The strange macros are there to make sure these can't + * be misused in a way that makes them not work on other + * architectures where unaligned accesses aren't as simple. + */ + +#define get_unaligned(ptr) (*(ptr)) + +#define put_unaligned(val, ptr) ((void)( *(ptr) = (val) )) + +#endif diff --git a/include/asm-cris/unistd.h b/include/asm-cris/unistd.h new file mode 100644 index 000000000..97bb41199 --- /dev/null +++ b/include/asm-cris/unistd.h @@ -0,0 +1,373 @@ +#ifndef _ASM_CRIS_UNISTD_H_ +#define _ASM_CRIS_UNISTD_H_ + +/* + * This file contains the system call numbers, and stub macros for libc. + */ + +#define __NR_setup 0 /* used only by init, to get system going */ +#define __NR_exit 1 +#define __NR_fork 2 +#define __NR_read 3 +#define __NR_write 4 +#define __NR_open 5 +#define __NR_close 6 +#define __NR_waitpid 7 +#define __NR_creat 8 +#define __NR_link 9 +#define __NR_unlink 10 +#define __NR_execve 11 +#define __NR_chdir 12 +#define __NR_time 13 +#define __NR_mknod 14 +#define __NR_chmod 15 +#define __NR_lchown 16 +#define __NR_break 17 +#define __NR_oldstat 18 +#define __NR_lseek 19 +#define __NR_getpid 20 +#define __NR_mount 21 +#define __NR_umount 22 +#define __NR_setuid 23 +#define __NR_getuid 24 +#define __NR_stime 25 +#define __NR_ptrace 26 +#define __NR_alarm 27 +#define __NR_oldfstat 28 +#define __NR_pause 29 +#define __NR_utime 30 +#define __NR_stty 31 +#define __NR_gtty 32 +#define __NR_access 33 +#define __NR_nice 34 +#define __NR_ftime 35 +#define __NR_sync 36 +#define __NR_kill 37 +#define __NR_rename 38 +#define __NR_mkdir 39 +#define __NR_rmdir 40 +#define __NR_dup 41 +#define __NR_pipe 42 +#define __NR_times 43 +#define __NR_prof 44 +#define __NR_brk 45 +#define __NR_setgid 46 +#define __NR_getgid 47 +#define __NR_signal 48 +#define __NR_geteuid 49 +#define __NR_getegid 50 +#define __NR_acct 51 +#define __NR_phys 52 +#define __NR_lock 53 +#define __NR_ioctl 54 +#define __NR_fcntl 55 +#define __NR_mpx 56 +#define __NR_setpgid 57 +#define __NR_ulimit 58 +#define __NR_oldolduname 59 +#define __NR_umask 60 +#define __NR_chroot 61 +#define __NR_ustat 62 +#define __NR_dup2 63 +#define __NR_getppid 64 +#define __NR_getpgrp 65 +#define __NR_setsid 66 +#define __NR_sigaction 67 +#define __NR_sgetmask 68 +#define __NR_ssetmask 69 +#define __NR_setreuid 70 +#define __NR_setregid 71 +#define __NR_sigsuspend 72 +#define __NR_sigpending 73 +#define __NR_sethostname 74 +#define __NR_setrlimit 75 +#define __NR_getrlimit 76 +#define __NR_getrusage 77 +#define __NR_gettimeofday 78 +#define __NR_settimeofday 79 +#define __NR_getgroups 80 +#define __NR_setgroups 81 +#define __NR_select 82 +#define __NR_symlink 83 +#define __NR_oldlstat 84 +#define __NR_readlink 85 +#define __NR_uselib 86 +#define __NR_swapon 87 +#define __NR_reboot 88 +#define __NR_readdir 89 +#define __NR_mmap 90 +#define __NR_munmap 91 +#define __NR_truncate 92 +#define __NR_ftruncate 93 +#define __NR_fchmod 94 +#define __NR_fchown 95 +#define __NR_getpriority 96 +#define __NR_setpriority 97 +#define __NR_profil 98 +#define __NR_statfs 99 +#define __NR_fstatfs 100 +#define __NR_ioperm 101 +#define __NR_socketcall 102 +#define __NR_syslog 103 +#define __NR_setitimer 104 +#define __NR_getitimer 105 +#define __NR_stat 106 +#define __NR_lstat 107 +#define __NR_fstat 108 +#define __NR_olduname 109 +#define __NR_iopl 110 +#define __NR_vhangup 111 +#define __NR_idle 112 +#define __NR_vm86 113 +#define __NR_wait4 114 +#define __NR_swapoff 115 +#define __NR_sysinfo 116 +#define __NR_ipc 117 +#define __NR_fsync 118 +#define __NR_sigreturn 119 +#define __NR_clone 120 +#define __NR_setdomainname 121 +#define __NR_uname 122 +#define __NR_modify_ldt 123 +#define __NR_adjtimex 124 +#define __NR_mprotect 125 +#define __NR_sigprocmask 126 +#define __NR_create_module 127 +#define __NR_init_module 128 +#define __NR_delete_module 129 +#define __NR_get_kernel_syms 130 +#define __NR_quotactl 131 +#define __NR_getpgid 132 +#define __NR_fchdir 133 +#define __NR_bdflush 134 +#define __NR_sysfs 135 +#define __NR_personality 136 +#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ +#define __NR_setfsuid 138 +#define __NR_setfsgid 139 +#define __NR__llseek 140 +#define __NR_getdents 141 +#define __NR__newselect 142 +#define __NR_flock 143 +#define __NR_msync 144 +#define __NR_readv 145 +#define __NR_writev 146 +#define __NR_getsid 147 +#define __NR_fdatasync 148 +#define __NR__sysctl 149 +#define __NR_mlock 150 +#define __NR_munlock 151 +#define __NR_mlockall 152 +#define __NR_munlockall 153 +#define __NR_sched_setparam 154 +#define __NR_sched_getparam 155 +#define __NR_sched_setscheduler 156 +#define __NR_sched_getscheduler 157 +#define __NR_sched_yield 158 +#define __NR_sched_get_priority_max 159 +#define __NR_sched_get_priority_min 160 +#define __NR_sched_rr_get_interval 161 +#define __NR_nanosleep 162 +#define __NR_mremap 163 +#define __NR_setresuid 164 +#define __NR_getresuid 165 + +#define __NR_query_module 167 +#define __NR_poll 168 +#define __NR_nfsservctl 169 +#define __NR_setresgid 170 +#define __NR_getresgid 171 +#define __NR_prctl 172 +#define __NR_rt_sigreturn 173 +#define __NR_rt_sigaction 174 +#define __NR_rt_sigprocmask 175 +#define __NR_rt_sigpending 176 +#define __NR_rt_sigtimedwait 177 +#define __NR_rt_sigqueueinfo 178 +#define __NR_rt_sigsuspend 179 +#define __NR_pread 180 +#define __NR_pwrite 181 +#define __NR_chown 182 +#define __NR_getcwd 183 +#define __NR_capget 184 +#define __NR_capset 185 +#define __NR_sigaltstack 186 +#define __NR_sendfile 187 +#define __NR_getpmsg 188 /* some people actually want streams */ +#define __NR_putpmsg 189 /* some people actually want streams */ +#define __NR_vfork 190 +#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ +#define __NR_mmap2 192 +#define __NR_truncate64 193 +#define __NR_ftruncate64 194 +#define __NR_stat64 195 +#define __NR_lstat64 196 +#define __NR_fstat64 197 +#define __NR_lchown32 198 +#define __NR_getuid32 199 +#define __NR_getgid32 200 +#define __NR_geteuid32 201 +#define __NR_getegid32 202 +#define __NR_setreuid32 203 +#define __NR_setregid32 204 +#define __NR_getgroups32 205 +#define __NR_setgroups32 206 +#define __NR_fchown32 207 +#define __NR_setresuid32 208 +#define __NR_getresuid32 209 +#define __NR_setresgid32 210 +#define __NR_getresgid32 211 +#define __NR_chown32 212 +#define __NR_setuid32 213 +#define __NR_setgid32 214 +#define __NR_setfsuid32 215 +#define __NR_setfsgid32 216 +#define __NR_pivot_root 217 +#define __NR_mincore 218 +#define __NR_madvise 219 +#define __NR_getdents64 220 +#define __NR_fcntl64 221 + +/* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */ +#define _syscall0(type,name) \ +type name(void) \ +{ \ + register long __a __asm__ ("r10"); \ + __asm__ __volatile__ ("move.d %1,r1\n\tbreak 13" \ + : "=r" (__a) \ + : "g" (__NR_##name) \ + : "r10", "r1"); \ + if(__a >= 0) \ + return (type) __a; \ + errno = -__a; \ + return -1; \ +} + +#define _syscall1(type,name,type1,arg1) \ +type name(type1 arg1) \ +{ \ + register long __a __asm__ ("r10") = (long) arg1; \ + __asm__ __volatile__ ("move.d %1,r1\n\tbreak 13" \ + : "=r" (__a) \ + : "g" (__NR_##name), "0" (__a) \ + : "r10", "r1"); \ + if(__a >= 0) \ + return (type) __a; \ + errno = -__a; \ + return -1; \ +} + +#define _syscall2(type,name,type1,arg1,type2,arg2) \ +type name(type1 arg1,type2 arg2) \ +{ \ + register long __a __asm__ ("r10") = (long) arg1; \ + register long __b __asm__ ("r11") = (long) arg2; \ + __asm__ __volatile__ ("move.d %1,r1\n\tbreak 13" \ + : "=r" (__a) \ + : "g" (__NR_##name), "0" (__a), "r" (__b) \ + : "r10", "r1"); \ + if(__a >= 0) \ + return (type) __a; \ + errno = -__a; \ + return -1; \ +} + +#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ +type name(type1 arg1,type2 arg2,type3 arg3) \ +{ \ + register long __a __asm__ ("r10") = (long) arg1; \ + register long __b __asm__ ("r11") = (long) arg2; \ + register long __c __asm__ ("r12") = (long) arg3; \ + __asm__ __volatile__ ("move.d %1,r1\n\tbreak 13" \ + : "=r" (__a) \ + : "g" (__NR_##name), "0" (__a), "r" (__b), "r" (__c) \ + : "r10", "r1"); \ + if(__a >= 0) \ + return (type) __a; \ + errno = -__a; \ + return -1; \ +} + +#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ +type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ +{ \ + register long __a __asm__ ("r10") = (long) arg1; \ + register long __b __asm__ ("r11") = (long) arg2; \ + register long __c __asm__ ("r12") = (long) arg3; \ + register long __d __asm__ ("r13") = (long) arg4; \ + __asm__ __volatile__ ("move.d %1,r1\n\tbreak 13" \ + : "=r" (__a) \ + : "g" (__NR_##name), "0" (__a), "r" (__b), \ + "r" (__c), "r" (__d) \ + : "r10", "r1"); \ + if(__a >= 0) \ + return (type) __a; \ + errno = -__a; \ + return -1; \ +} + +#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ + type5,arg5) \ +type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \ +{ \ + register long __a __asm__ ("r10") = (long) arg1; \ + register long __b __asm__ ("r11") = (long) arg2; \ + register long __c __asm__ ("r12") = (long) arg3; \ + register long __d __asm__ ("r13") = (long) arg4; \ + register long __e __asm__ ("r0") = (long) arg5; \ + __asm__ __volatile__ ("move.d %1,r1\n\tbreak 13" \ + : "=r" (__a) \ + : "g" (__NR_##name), "0" (__a), "r" (__b), \ + "r" (__c), "r" (__d), "r" (__e) \ + : "r10", "r1"); \ + if(__a >= 0) \ + return (type) __a; \ + errno = -__a; \ + return -1; \ +} + +#ifdef __KERNEL_SYSCALLS__ + +/* + * we need this inline - forking from kernel space will result + * in NO COPY ON WRITE (!!!), until an execve is executed. This + * is no problem, but for the stack. This is handled by not letting + * main() use the stack at all after fork(). Thus, no function + * calls - which means inline code for fork too, as otherwise we + * would use the stack upon exit from 'fork()'. + * + * Actually only pause and fork are needed inline, so that there + * won't be any messing with the stack from main(), but we define + * some others too. + */ +#define __NR__exit __NR_exit +static inline _syscall0(int,idle) +static inline _syscall0(int,fork) +static inline _syscall2(int,clone,unsigned long,flags,char *,esp) +static inline _syscall0(int,pause) +static inline _syscall0(int,setup) +static inline _syscall0(int,sync) +static inline _syscall0(pid_t,setsid) +static inline _syscall3(int,write,int,fd,const char *,buf,off_t,count) +static inline _syscall1(int,dup,int,fd) +static inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp) +static inline _syscall3(int,open,const char *,file,int,flag,int,mode) +static inline _syscall1(int,close,int,fd) +static inline _syscall1(int,_exit,int,exitcode) +static inline _syscall3(pid_t,waitpid,pid_t,pid,int *,wait_stat,int,options) + + /* the following are just while developing the elinux port! */ + +static inline _syscall3(int,read,int,fd,char *,buf,off_t,count) +static inline _syscall2(int,socketcall,int,call,unsigned long *,args) +static inline _syscall3(int,ioctl,unsigned int,fd,unsigned int,cmd,unsigned long,arg) +static inline _syscall5(int,mount,const char *,a,const char *,b,const char *,c,unsigned long,rwflag,const void *,data) + +static inline pid_t wait(int * wait_stat) +{ + return waitpid(-1,wait_stat,0); +} + +#endif + +#endif /* _ASM_CRIS_UNISTD_H_ */ diff --git a/include/asm-cris/user.h b/include/asm-cris/user.h new file mode 100644 index 000000000..79c7048a3 --- /dev/null +++ b/include/asm-cris/user.h @@ -0,0 +1,51 @@ +#ifndef __ASM_CRIS_USER_H +#define __ASM_CRIS_USER_H + +#include <linux/types.h> +#include <asm/ptrace.h> +#include <asm/page.h> + +/* + * Core file format: The core file is written in such a way that gdb + * can understand it and provide useful information to the user (under + * linux we use the `trad-core' bfd). The file contents are as follows: + * + * upage: 1 page consisting of a user struct that tells gdb + * what is present in the file. Directly after this is a + * copy of the task_struct, which is currently not used by gdb, + * but it may come in handy at some point. All of the registers + * are stored as part of the upage. The upage should always be + * only one page long. + * data: The data segment follows next. We use current->end_text to + * current->brk to pick up all of the user variables, plus any memory + * that may have been sbrk'ed. No attempt is made to determine if a + * page is demand-zero or if a page is totally unused, we just cover + * the entire range. All of the addresses are rounded in such a way + * that an integral number of pages is written. + * stack: We need the stack information in order to get a meaningful + * backtrace. We need to write the data from usp to + * current->start_stack, so we round each of these in order to be able + * to write an integer number of pages. + */ + +struct user { + struct pt_regs regs; /* entire machine state */ + size_t u_tsize; /* text size (pages) */ + size_t u_dsize; /* data size (pages) */ + size_t u_ssize; /* stack size (pages) */ + unsigned long start_code; /* text starting address */ + unsigned long start_data; /* data starting address */ + unsigned long start_stack; /* stack starting address */ + long int signal; /* signal causing core dump */ + struct regs * u_ar0; /* help gdb find registers */ + unsigned long magic; /* identifies a core file */ + char u_comm[32]; /* user command name */ +}; + +#define NBPG PAGE_SIZE +#define UPAGES 1 +#define HOST_TEXT_START_ADDR (u.start_code) +#define HOST_DATA_START_ADDR (u.start_data) +#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) + +#endif /* __ASM_CRIS_USER_H */ diff --git a/include/asm-i386/errno.h b/include/asm-i386/errno.h index d22c4472b..7cf599f4d 100644 --- a/include/asm-i386/errno.h +++ b/include/asm-i386/errno.h @@ -128,6 +128,5 @@ #define ENOMEDIUM 123 /* No medium found */ #define EMEDIUMTYPE 124 /* Wrong medium type */ -#define EHASHCOLLISION 125 /* Number of hash collisons exceeds maximum generation counter value. */ #endif diff --git a/include/asm-i386/socket.h b/include/asm-i386/socket.h index c44d16bc0..18cd5b9fe 100644 --- a/include/asm-i386/socket.h +++ b/include/asm-i386/socket.h @@ -43,6 +43,8 @@ #define SO_TIMESTAMP 29 #define SCM_TIMESTAMP SO_TIMESTAMP +#define SO_ACCEPTCONN 30 + /* Nasty libc5 fixup - bletch */ #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) /* Socket types. */ diff --git a/include/asm-i386/termios.h b/include/asm-i386/termios.h index 9b337736f..70c1ecefd 100644 --- a/include/asm-i386/termios.h +++ b/include/asm-i386/termios.h @@ -51,7 +51,7 @@ struct termio { #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IR - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IR - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ #define N_SYNC_PPP 14 /* synchronous PPP */ diff --git a/include/asm-ia64/socket.h b/include/asm-ia64/socket.h index 5d5eb7b8c..0c75f7961 100644 --- a/include/asm-ia64/socket.h +++ b/include/asm-ia64/socket.h @@ -50,6 +50,8 @@ #define SO_TIMESTAMP 29 #define SCM_TIMESTAMP SO_TIMESTAMP +#define SO_ACCEPTCONN 30 + /* Nast libc5 fixup - bletch */ #if defined(__KERNEL__) /* Socket types. */ diff --git a/include/asm-ia64/termios.h b/include/asm-ia64/termios.h index 3252e9110..e350569cd 100644 --- a/include/asm-ia64/termios.h +++ b/include/asm-ia64/termios.h @@ -58,7 +58,7 @@ struct termio { #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IR - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IR - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS msgs */ #define N_HDLC 13 /* synchronous HDLC */ #define N_SYNC_PPP 14 /* synchronous PPP */ diff --git a/include/asm-m68k/bitops.h b/include/asm-m68k/bitops.h index 7d91887d7..5b40d766f 100644 --- a/include/asm-m68k/bitops.h +++ b/include/asm-m68k/bitops.h @@ -228,7 +228,7 @@ extern __inline__ int ffs(int x) { int cnt; - asm ("bfffo %1{#0:#0}" : "=d" (cnt) : "dm" (x & -x)); + asm ("bfffo %1{#0:#0},%0" : "=d" (cnt) : "dm" (x & -x)); return 32 - cnt; } diff --git a/include/asm-m68k/socket.h b/include/asm-m68k/socket.h index fa13cd8ff..1d01fc087 100644 --- a/include/asm-m68k/socket.h +++ b/include/asm-m68k/socket.h @@ -43,6 +43,8 @@ #define SO_TIMESTAMP 29 #define SCM_TIMESTAMP SO_TIMESTAMP +#define SO_ACCEPTCONN 30 + /* Nast libc5 fixup - bletch */ #if defined(__KERNEL__) /* Socket types. */ diff --git a/include/asm-m68k/termios.h b/include/asm-m68k/termios.h index 0f127c134..411018fdb 100644 --- a/include/asm-m68k/termios.h +++ b/include/asm-m68k/termios.h @@ -61,7 +61,7 @@ struct termio { #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IrDa - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IrDa - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ #define N_SYNC_PPP 14 diff --git a/include/asm-mips/errno.h b/include/asm-mips/errno.h index 736774592..2956e4ce3 100644 --- a/include/asm-mips/errno.h +++ b/include/asm-mips/errno.h @@ -141,7 +141,6 @@ */ #define ENOMEDIUM 159 /* No medium found */ #define EMEDIUMTYPE 160 /* Wrong medium type */ -#define EHASHCOLLISION 161 /* Number of hash collisons exceeds maximum generation counter value. */ #define EDQUOT 1133 /* Quota exceeded */ diff --git a/include/asm-mips/socket.h b/include/asm-mips/socket.h index a0e63bbbc..998959d99 100644 --- a/include/asm-mips/socket.h +++ b/include/asm-mips/socket.h @@ -33,6 +33,7 @@ To add: #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */ #define SO_RCVLOWAT 0x1004 /* receive low-water mark */ #define SO_SNDTIMEO 0x1005 /* send timeout */ #define SO_RCVTIMEO 0x1006 /* receive timeout */ +#define SO_ACCEPTCONN 0x1009 /* linux-specific, might as well be the same as on i386 */ #define SO_NO_CHECK 11 diff --git a/include/asm-mips/termios.h b/include/asm-mips/termios.h index 2e0ed639a..abc5deb3c 100644 --- a/include/asm-mips/termios.h +++ b/include/asm-mips/termios.h @@ -1,10 +1,9 @@ -/* $Id: termios.h,v 1.8 2000/01/27 23:45:30 ralf Exp $ - * +/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1995, 1996 by Ralf Baechle + * Copyright (C) 1995, 1996, 2001 by Ralf Baechle */ #ifndef _ASM_TERMIOS_H #define _ASM_TERMIOS_H @@ -97,7 +96,7 @@ struct termio { #define N_MASC 8 /* Reserved fo Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IrDa - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IrDa - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ #define N_SYNC_PPP 14 /* synchronous PPP */ diff --git a/include/asm-mips64/errno.h b/include/asm-mips64/errno.h index 7864a4039..615ab3a8b 100644 --- a/include/asm-mips64/errno.h +++ b/include/asm-mips64/errno.h @@ -142,7 +142,6 @@ */ #define ENOMEDIUM 159 /* No medium found */ #define EMEDIUMTYPE 160 /* Wrong medium type */ -#define EHASHCOLLISION 125 /* Number of hash collisons exceeds maximum generation counter value. */ #define EDQUOT 1133 /* Quota exceeded */ diff --git a/include/asm-mips64/socket.h b/include/asm-mips64/socket.h index 8410eb384..992cc155f 100644 --- a/include/asm-mips64/socket.h +++ b/include/asm-mips64/socket.h @@ -3,8 +3,8 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1997, 1999, 2000 Ralf Baechle - * Copyright (C) 2000 Silicon Graphics, Inc. + * Copyright (C) 1997, 1999, 2000, 2001 Ralf Baechle + * Copyright (C) 2000, 2001 Silicon Graphics, Inc. */ #ifndef _ASM_SOCKET_H #define _ASM_SOCKET_H @@ -41,6 +41,7 @@ To add: #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */ #define SO_RCVLOWAT 0x1004 /* receive low-water mark */ #define SO_SNDTIMEO 0x1005 /* send timeout */ #define SO_RCVTIMEO 0x1006 /* receive timeout */ +#define SO_ACCEPTCONN 0x1009 /* linux-specific, might as well be the same as on i386 */ #define SO_NO_CHECK 11 diff --git a/include/asm-mips64/termios.h b/include/asm-mips64/termios.h index 930a6dcb1..0c1e01eb3 100644 --- a/include/asm-mips64/termios.h +++ b/include/asm-mips64/termios.h @@ -1,10 +1,10 @@ -/* $Id: termios.h,v 1.2 2000/01/27 23:45:30 ralf Exp $ - * +/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1995, 1996 by Ralf Baechle + * Copyright (C) 1995, 1996, 2000, 2001 by Ralf Baechle + * Copyright (C) 2000, 2001 Silicon Graphics, Inc. */ #ifndef _ASM_TERMIOS_H #define _ASM_TERMIOS_H @@ -97,7 +97,7 @@ struct termio { #define N_MASC 8 /* Reserved fo Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IrDa - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IrDa - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ #define N_SYNC_PPP 14 /* synchronous PPP */ diff --git a/include/asm-parisc/socket.h b/include/asm-parisc/socket.h index 6ce553460..1cce8a139 100644 --- a/include/asm-parisc/socket.h +++ b/include/asm-parisc/socket.h @@ -43,6 +43,8 @@ #define SO_ATTACH_FILTER 0x401a #define SO_DETACH_FILTER 0x401b +#define SO_ACCEPTCONN 0x401c + #if defined(__KERNEL__) #define SOCK_STREAM 1 /* stream (connection) socket */ #define SOCK_DGRAM 2 /* datagram (conn.less) socket */ diff --git a/include/asm-parisc/termios.h b/include/asm-parisc/termios.h index 6aa0f8ff7..13131ef65 100644 --- a/include/asm-parisc/termios.h +++ b/include/asm-parisc/termios.h @@ -51,7 +51,7 @@ struct termio { #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IR - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IR - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #ifdef __KERNEL__ diff --git a/include/asm-ppc/socket.h b/include/asm-ppc/socket.h index 40b648d47..5bcb396c6 100644 --- a/include/asm-ppc/socket.h +++ b/include/asm-ppc/socket.h @@ -49,6 +49,8 @@ #define SO_TIMESTAMP 29 #define SCM_TIMESTAMP SO_TIMESTAMP +#define SO_ACCEPTCONN 30 + /* Nast libc5 fixup - bletch */ #if defined(__KERNEL__) /* Socket types. */ diff --git a/include/asm-ppc/termios.h b/include/asm-ppc/termios.h index 22f53ce8b..942c6e4b6 100644 --- a/include/asm-ppc/termios.h +++ b/include/asm-ppc/termios.h @@ -186,7 +186,7 @@ struct termio { #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IrDa - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IrDa - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ #define N_SYNC_PPP 14 diff --git a/include/asm-s390/atomic.h b/include/asm-s390/atomic.h index f1c1f3c5d..d7ced05e8 100644 --- a/include/asm-s390/atomic.h +++ b/include/asm-s390/atomic.h @@ -38,74 +38,80 @@ static __inline__ void atomic_set(atomic_t *v, int i) { __asm__ __volatile__("st %1,%0\n\t" "bcr 15,0" - : : "m" (*v), "d" (i) : "memory"); + : "=m" (*v) : "d" (i) ); } static __inline__ void atomic_add(int i, atomic_t *v) { - __asm__ __volatile__(" l 0,%0\n" + __asm__ __volatile__(" la 2,%0\n" + " l 0,%0\n" "0: lr 1,0\n" " ar 1,%1\n" - " cs 0,1,%0\n" + " cs 0,1,0(2)\n" " jl 0b" - : "+m" (*v) : "d" (i) : "0", "1" ); + : "+m" (*v) : "d" (i) : "0", "1", "2", "cc" ); } static __inline__ int atomic_add_return (int i, atomic_t *v) { int newval; - __asm__ __volatile__(" l 0,%0\n" + __asm__ __volatile__(" la 1,%0\n" + " l 0,%0\n" "0: lr %1,0\n" " ar %1,%2\n" - " cs 0,%1,%0\n" + " cs 0,%1,0(1)\n" " jl 0b" : "+m" (*v), "=&d" (newval) - : "d" (i) : "0", "cc" ); + : "d" (i) : "0", "1", "cc" ); return newval; } static __inline__ int atomic_add_negative(int i, atomic_t *v) { int newval; - __asm__ __volatile__(" l 0,%0\n" + __asm__ __volatile__(" la 1,%0\n" + " l 0,%0\n" "0: lr %1,0\n" " ar %1,%2\n" - " cs 0,%1,%0\n" + " cs 0,%1,0(1)\n" " jl 0b\n" : "+m" (*v), "=&d" (newval) - : "d" (i) : "0", "cc" ); + : "d" (i) : "0", "1", "cc" ); return newval < 0; } static __inline__ void atomic_sub(int i, atomic_t *v) { - __asm__ __volatile__(" l 0,%0\n" + __asm__ __volatile__(" la 2,%0\n" + " l 0,%0\n" "0: lr 1,0\n" " sr 1,%1\n" - " cs 0,1,%0\n" + " cs 0,1,0(2)\n" " jl 0b" - : "+m" (*v) : "d" (i) : "0", "1" ); + : "+m" (*v) : "d" (i) : "0", "1", "2", "cc" ); } static __inline__ void atomic_inc(volatile atomic_t *v) { - __asm__ __volatile__(" l 0,%0\n" + __asm__ __volatile__(" la 2,%0\n" + " l 0,%0\n" "0: lr 1,0\n" " ahi 1,1\n" - " cs 0,1,%0\n" + " cs 0,1,0(2)\n" " jl 0b" - : "+m" (*v) : : "0", "1" ); + : "+m" (*v) : : "0", "1", "2", "cc" ); } static __inline__ int atomic_inc_return(volatile atomic_t *v) { int i; - __asm__ __volatile__(" l 0,%0\n" + __asm__ __volatile__(" la 1,%0\n" + " l 0,%0\n" "0: lr %1,0\n" " ahi %1,1\n" - " cs 0,%1,%0\n" + " cs 0,%1,0(1)\n" " jl 0b" - : "+m" (*v), "=&d" (i) : : "0" ); + : "+m" (*v), "=&d" (i) : : "0", "1", "cc" ); return i; } @@ -113,67 +119,74 @@ static __inline__ int atomic_inc_and_test(volatile atomic_t *v) { int i; - __asm__ __volatile__(" l 0,%0\n" + __asm__ __volatile__(" la 1,%0\n" + " l 0,%0\n" "0: lr %1,0\n" " ahi %1,1\n" - " cs 0,%1,%0\n" + " cs 0,%1,0(1)\n" " jl 0b" - : "+m" (*v), "=&d" (i) : : "0" ); + : "+m" (*v), "=&d" (i) : : "0", "1", "cc" ); return i != 0; } static __inline__ void atomic_dec(volatile atomic_t *v) { - __asm__ __volatile__(" l 0,%0\n" + __asm__ __volatile__(" la 2,%0\n" + " l 0,%0\n" "0: lr 1,0\n" " ahi 1,-1\n" - " cs 0,1,%0\n" + " cs 0,1,0(2)\n" " jl 0b" - : "+m" (*v) : : "0", "1" ); + : "+m" (*v) : : "0", "1", "2", "cc" ); } static __inline__ int atomic_dec_return(volatile atomic_t *v) { int i; - __asm__ __volatile__(" l 0,%0\n" + __asm__ __volatile__(" la 1,%0\n" + " l 0,%0\n" "0: lr %1,0\n" " ahi %1,-1\n" - " cs 0,%1,%0\n" + " cs 0,%1,0(1)\n" " jl 0b" - : "+m" (*v), "=&d" (i) : : "0" ); + : "+m" (*v), "=&d" (i) : : "0", "1", "cc" ); return i; } static __inline__ int atomic_dec_and_test(volatile atomic_t *v) { int i; - __asm__ __volatile__(" l 0,%0\n" + __asm__ __volatile__(" la 1,%0\n" + " l 0,%0\n" "0: lr %1,0\n" " ahi %1,-1\n" - " cs 0,%1,%0\n" + " cs 0,%1,0(1)\n" " jl 0b" - : "+m" (*v), "=&d" (i) : : "0"); + : "+m" (*v), "=&d" (i) : : "0", "1", "cc" ); return i == 0; } static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *v) { - __asm__ __volatile__(" l 0,%0\n" + __asm__ __volatile__(" la 2,%0\n" + " l 0,%0\n" "0: lr 1,0\n" " nr 1,%1\n" - " cs 0,1,%0\n" + " cs 0,1,0(2)\n" " jl 0b" - : "+m" (*v) : "d" (~(mask)) : "0", "1" ); + : "+m" (*v) : "d" (~(mask)) + : "0", "1", "2", "cc" ); } static __inline__ void atomic_set_mask(unsigned long mask, atomic_t *v) { - __asm__ __volatile__(" l 0,%0\n" + __asm__ __volatile__(" la 2,%0\n" + " l 0,%0\n" "0: lr 1,0\n" " or 1,%1\n" - " cs 0,1,%0\n" + " cs 0,1,0(2)\n" " jl 0b" - : "+m" (*v) : "d" (mask) : "0", "1" ); + : "+m" (*v) : "d" (mask) : "0", "1", "2", "cc" ); } /* @@ -186,13 +199,15 @@ atomic_compare_and_swap(int expected_oldval,int new_val,atomic_t *v) int retval; __asm__ __volatile__( - " cs %2,%3,%1\n" + " la 1,%1\n" + " lr 0,%2\n" + " cs 0,%3,0(1)\n" " ipm %0\n" " srl %0,28\n" "0:" : "=&r" (retval), "+m" (*v) : "d" (expected_oldval) , "d" (new_val) - : "memory", "cc"); + : "0", "1", "cc"); return retval; } @@ -203,12 +218,20 @@ static __inline__ void atomic_compare_and_swap_spin(int expected_oldval,int new_val,atomic_t *v) { __asm__ __volatile__( + " la 2,%0\n" "0: lr 1,%1\n" - " cs 1,%2,%0\n" + " cs 1,%2,0(2)\n" " jl 0b\n" : "+m" (*v) : "d" (expected_oldval) , "d" (new_val) - : "memory", "cc", "1"); + : "cc", "1", "2"); +} + +#define atomic_compare_and_swap_debug(where,from,to) \ +if (atomic_compare_and_swap ((from), (to), (where))) {\ + printk (KERN_WARNING"%s/%d atomic counter:%s couldn't be changed from %d(%s) to %d(%s), was %d\n",\ + __FILE__,__LINE__,#where,(from),#from,(to),#to,atomic_read (where));\ + atomic_set(where,(to));\ } #endif /* __ARCH_S390_ATOMIC __ */ diff --git a/include/asm-s390/bitops.h b/include/asm-s390/bitops.h index 710cf8829..f441451c8 100644 --- a/include/asm-s390/bitops.h +++ b/include/asm-s390/bitops.h @@ -41,32 +41,11 @@ extern const char _oi_bitmap[]; extern const char _ni_bitmap[]; extern const char _zb_findmap[]; -/* - * Function prototypes to keep gcc -Wall happy - */ -extern void __set_bit(int nr, volatile void * addr); -extern void __constant_set_bit(int nr, volatile void * addr); -extern int __test_bit(int nr, volatile void * addr); -extern int __constant_test_bit(int nr, volatile void * addr); -extern void __clear_bit(int nr, volatile void * addr); -extern void __constant_clear_bit(int nr, volatile void * addr); -extern void __change_bit(int nr, volatile void * addr); -extern void __constant_change_bit(int nr, volatile void * addr); -extern int test_and_set_bit(int nr, volatile void * addr); -extern int test_and_clear_bit(int nr, volatile void * addr); -extern int test_and_change_bit(int nr, volatile void * addr); -extern int test_and_set_bit_simple(int nr, volatile void * addr); -extern int test_and_clear_bit_simple(int nr, volatile void * addr); -extern int test_and_change_bit_simple(int nr, volatile void * addr); -extern int find_first_zero_bit(void * addr, unsigned size); -extern int find_next_zero_bit (void * addr, int size, int offset); -extern unsigned long ffz(unsigned long word); - #ifdef CONFIG_SMP /* * SMP save set_bit routine based on compare and swap (CS) */ -extern __inline__ void set_bit_cs(int nr, volatile void * addr) +static __inline__ void set_bit_cs(int nr, volatile void * addr) { __asm__ __volatile__( #if ALIGN_CS == 1 @@ -80,8 +59,8 @@ extern __inline__ void set_bit_cs(int nr, volatile void * addr) " nr 1,%0\n" /* make shift value */ " xr %0,1\n" " srl %0,3\n" - " la %1,0(%0,%1)\n" /* calc. address for CS */ " lhi 2,1\n" + " la %1,0(%0,%1)\n" /* calc. address for CS */ " sll 2,0(1)\n" /* make OR mask */ " l %0,0(%1)\n" "0: lr 1,%0\n" /* CS loop starts here */ @@ -95,7 +74,7 @@ extern __inline__ void set_bit_cs(int nr, volatile void * addr) /* * SMP save clear_bit routine based on compare and swap (CS) */ -extern __inline__ void clear_bit_cs(int nr, volatile void * addr) +static __inline__ void clear_bit_cs(int nr, volatile void * addr) { static const int mask = -1; __asm__ __volatile__( @@ -110,8 +89,8 @@ extern __inline__ void clear_bit_cs(int nr, volatile void * addr) " nr 1,%0\n" /* make shift value */ " xr %0,1\n" " srl %0,3\n" - " la %1,0(%0,%1)\n" /* calc. address for CS */ " lhi 2,1\n" + " la %1,0(%0,%1)\n" /* calc. address for CS */ " sll 2,0(1)\n" " x 2,%2\n" /* make AND mask */ " l %0,0(%1)\n" @@ -126,7 +105,7 @@ extern __inline__ void clear_bit_cs(int nr, volatile void * addr) /* * SMP save change_bit routine based on compare and swap (CS) */ -extern __inline__ void change_bit_cs(int nr, volatile void * addr) +static __inline__ void change_bit_cs(int nr, volatile void * addr) { __asm__ __volatile__( #if ALIGN_CS == 1 @@ -140,8 +119,8 @@ extern __inline__ void change_bit_cs(int nr, volatile void * addr) " nr 1,%0\n" /* make shift value */ " xr %0,1\n" " srl %0,3\n" - " la %1,0(%0,%1)\n" /* calc. address for CS */ " lhi 2,1\n" + " la %1,0(%0,%1)\n" /* calc. address for CS */ " sll 2,0(1)\n" /* make XR mask */ " l %0,0(%1)\n" "0: lr 1,%0\n" /* CS loop starts here */ @@ -155,7 +134,7 @@ extern __inline__ void change_bit_cs(int nr, volatile void * addr) /* * SMP save test_and_set_bit routine based on compare and swap (CS) */ -extern __inline__ int test_and_set_bit_cs(int nr, volatile void * addr) +static __inline__ int test_and_set_bit_cs(int nr, volatile void * addr) { __asm__ __volatile__( #if ALIGN_CS == 1 @@ -186,7 +165,7 @@ extern __inline__ int test_and_set_bit_cs(int nr, volatile void * addr) /* * SMP save test_and_clear_bit routine based on compare and swap (CS) */ -extern __inline__ int test_and_clear_bit_cs(int nr, volatile void * addr) +static __inline__ int test_and_clear_bit_cs(int nr, volatile void * addr) { static const int mask = -1; __asm__ __volatile__( @@ -220,7 +199,7 @@ extern __inline__ int test_and_clear_bit_cs(int nr, volatile void * addr) /* * SMP save test_and_change_bit routine based on compare and swap (CS) */ -extern __inline__ int test_and_change_bit_cs(int nr, volatile void * addr) +static __inline__ int test_and_change_bit_cs(int nr, volatile void * addr) { __asm__ __volatile__( #if ALIGN_CS == 1 @@ -252,7 +231,7 @@ extern __inline__ int test_and_change_bit_cs(int nr, volatile void * addr) /* * fast, non-SMP set_bit routine */ -extern __inline__ void __set_bit(int nr, volatile void * addr) +static __inline__ void __set_bit(int nr, volatile void * addr) { __asm__ __volatile__( " lhi 2,24\n" @@ -267,7 +246,7 @@ extern __inline__ void __set_bit(int nr, volatile void * addr) : "cc", "memory", "1", "2" ); } -extern __inline__ void +static __inline__ void __constant_set_bit(const int nr, volatile void * addr) { switch (nr&7) { @@ -330,7 +309,7 @@ __constant_set_bit(const int nr, volatile void * addr) /* * fast, non-SMP clear_bit routine */ -extern __inline__ void +static __inline__ void __clear_bit(int nr, volatile void * addr) { __asm__ __volatile__( @@ -346,7 +325,7 @@ __clear_bit(int nr, volatile void * addr) : "cc", "memory", "1", "2" ); } -extern __inline__ void +static __inline__ void __constant_clear_bit(const int nr, volatile void * addr) { switch (nr&7) { @@ -409,7 +388,7 @@ __constant_clear_bit(const int nr, volatile void * addr) /* * fast, non-SMP change_bit routine */ -extern __inline__ void __change_bit(int nr, volatile void * addr) +static __inline__ void __change_bit(int nr, volatile void * addr) { __asm__ __volatile__( " lhi 2,24\n" @@ -424,7 +403,7 @@ extern __inline__ void __change_bit(int nr, volatile void * addr) : "cc", "memory", "1", "2" ); } -extern __inline__ void +static __inline__ void __constant_change_bit(const int nr, volatile void * addr) { switch (nr&7) { @@ -487,7 +466,7 @@ __constant_change_bit(const int nr, volatile void * addr) /* * fast, non-SMP test_and_set_bit routine */ -extern __inline__ int test_and_set_bit_simple(int nr, volatile void * addr) +static __inline__ int test_and_set_bit_simple(int nr, volatile void * addr) { static const int mask = 1; int oldbit; @@ -512,7 +491,7 @@ extern __inline__ int test_and_set_bit_simple(int nr, volatile void * addr) /* * fast, non-SMP test_and_clear_bit routine */ -extern __inline__ int test_and_clear_bit_simple(int nr, volatile void * addr) +static __inline__ int test_and_clear_bit_simple(int nr, volatile void * addr) { static const int mask = 1; int oldbit; @@ -538,7 +517,7 @@ extern __inline__ int test_and_clear_bit_simple(int nr, volatile void * addr) /* * fast, non-SMP test_and_change_bit routine */ -extern __inline__ int test_and_change_bit_simple(int nr, volatile void * addr) +static __inline__ int test_and_change_bit_simple(int nr, volatile void * addr) { static const int mask = 1; int oldbit; @@ -582,7 +561,7 @@ extern __inline__ int test_and_change_bit_simple(int nr, volatile void * addr) * This routine doesn't need to be atomic. */ -extern __inline__ int __test_bit(int nr, volatile void * addr) +static __inline__ int __test_bit(int nr, volatile void * addr) { static const int mask = 1; int oldbit; @@ -602,7 +581,7 @@ extern __inline__ int __test_bit(int nr, volatile void * addr) return oldbit; } -extern __inline__ int __constant_test_bit(int nr, volatile void * addr) { +static __inline__ int __constant_test_bit(int nr, volatile void * addr) { return (((volatile char *) addr)[(nr>>3)^3] & (1<<(nr&7))) != 0; } @@ -614,7 +593,7 @@ extern __inline__ int __constant_test_bit(int nr, volatile void * addr) { /* * Find-bit routines.. */ -extern __inline__ int find_first_zero_bit(void * addr, unsigned size) +static __inline__ int find_first_zero_bit(void * addr, unsigned size) { static const int mask = 0xffL; int res; @@ -633,7 +612,7 @@ extern __inline__ int find_first_zero_bit(void * addr, unsigned size) " lr 2,%1\n" " j 4f\n" "1: l 1,0(2,%2)\n" - " sll 2,3(0)\n" + " sll 2,3\n" " tml 1,0xFFFF\n" " jno 2f\n" " ahi 2,16\n" @@ -653,7 +632,7 @@ extern __inline__ int find_first_zero_bit(void * addr, unsigned size) return (res < size) ? res : size; } -extern __inline__ int find_next_zero_bit (void * addr, int size, int offset) +static __inline__ int find_next_zero_bit (void * addr, int size, int offset) { static const int mask = 0xffL; unsigned long * p = ((unsigned long *) addr) + (offset >> 5); @@ -698,7 +677,7 @@ extern __inline__ int find_next_zero_bit (void * addr, int size, int offset) * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. */ -extern __inline__ unsigned long ffz(unsigned long word) +static __inline__ unsigned long ffz(unsigned long word) { static const int mask = 0xffL; int result; @@ -738,24 +717,24 @@ extern int __inline__ ffs (int x) return 0; __asm__(" lr %%r1,%1\n" " sr %0,%0\n" - " tmh %%r1,0xFFFF\n" - " jz 0f\n" + " tml %%r1,0xFFFF\n" + " jnz 0f\n" " ahi %0,16\n" " srl %%r1,16\n" - "0: tml %%r1,0xFF00\n" - " jz 1f\n" + "0: tml %%r1,0x00FF\n" + " jnz 1f\n" " ahi %0,8\n" " srl %%r1,8\n" - "1: tml %%r1,0x00F0\n" - " jz 2f\n" + "1: tml %%r1,0x000F\n" + " jnz 2f\n" " ahi %0,4\n" " srl %%r1,4\n" - "2: tml %%r1,0x000C\n" - " jz 3f\n" + "2: tml %%r1,0x0003\n" + " jnz 3f\n" " ahi %0,2\n" " srl %%r1,2\n" - "3: tml %%r1,0x0002\n" - " jz 4f\n" + "3: tml %%r1,0x0001\n" + " jnz 4f\n" " ahi %0,1\n" "4:" : "=&d" (r) : "d" (x) : "cc", "1" ); @@ -787,9 +766,8 @@ extern int __inline__ ffs (int x) #define ext2_set_bit(nr, addr) test_and_set_bit((nr)^24, addr) #define ext2_clear_bit(nr, addr) test_and_clear_bit((nr)^24, addr) #define ext2_test_bit(nr, addr) test_bit((nr)^24, addr) -extern __inline__ int ext2_find_first_zero_bit(void *vaddr, unsigned size) +static __inline__ int ext2_find_first_zero_bit(void *vaddr, unsigned size) { - static const int mask = 0xffL; int res; if (!size) @@ -806,7 +784,8 @@ extern __inline__ int ext2_find_first_zero_bit(void *vaddr, unsigned size) " lr 2,%1\n" " j 4f\n" "1: l 1,0(2,%2)\n" - " sll 2,3(0)\n" + " sll 2,3\n" + " lhi 0,0xff\n" " ahi 2,24\n" " tmh 1,0xFFFF\n" " jo 2f\n" @@ -816,31 +795,19 @@ extern __inline__ int ext2_find_first_zero_bit(void *vaddr, unsigned size) " jo 3f\n" " ahi 2,-8\n" " srl 1,8\n" - "3: n 1,%3\n" - " ic 1,0(1,%4)\n" - " n 1,%3\n" + "3: nr 1,0\n" + " ic 1,0(1,%3)\n" " ar 2,1\n" "4: lr %0,2" : "=d" (res) : "a" (size), "a" (vaddr), - "m" (mask), "a" (&_zb_findmap) + "a" (&_zb_findmap) : "cc", "0", "1", "2" ); return (res < size) ? res : size; } -extern __inline__ int +static __inline__ int ext2_find_next_zero_bit(void *vaddr, unsigned size, unsigned offset) { - static const int mask = 0xffL; - static unsigned long orword[32] = { - 0x00000000, 0x01000000, 0x03000000, 0x07000000, - 0x0f000000, 0x1f000000, 0x3f000000, 0x7f000000, - 0xff000000, 0xff010000, 0xff030000, 0xff070000, - 0xff0f0000, 0xff1f0000, 0xff3f0000, 0xff7f0000, - 0xffff0000, 0xffff0100, 0xffff0300, 0xffff0700, - 0xffff0f00, 0xffff1f00, 0xffff3f00, 0xffff7f00, - 0xffffff00, 0xffffff01, 0xffffff03, 0xffffff07, - 0xffffff0f, 0xffffff1f, 0xffffff3f, 0xffffff7f - }; unsigned long *addr = vaddr; unsigned long *p = addr + (offset >> 5); unsigned long word; @@ -850,23 +817,29 @@ ext2_find_next_zero_bit(void *vaddr, unsigned size, unsigned offset) return size; if (bit) { - word = *p | orword[bit]; + __asm__(" ic %0,0(%1)\n" + " icm %0,2,1(%1)\n" + " icm %0,4,2(%1)\n" + " icm %0,8,3(%1)" + : "=&a" (word) : "a" (p) ); + word >>= bit; + res = bit; /* Look for zero in first longword */ - __asm__(" lhi %0,24\n" - " tmh %1,0xFFFF\n" - " jo 0f\n" - " ahi %0,-16\n" + __asm__(" lhi 0,0xff\n" + " tml %1,0xffff\n" + " jno 0f\n" + " ahi %0,16\n" " srl %1,16\n" - "0: tml %1,0xFF00\n" - " jo 1f\n" - " ahi %0,-8\n" + "0: tml %1,0x00ff\n" + " jno 1f\n" + " ahi %0,8\n" " srl %1,8\n" - "1: n %1,%2\n" - " ic %1,0(%1,%3)\n" + "1: nr %1,0\n" + " ic %1,0(%1,%2)\n" " alr %0,%1" - : "=&d" (res), "+&d" (word) - : "m" (mask), "a" (&_zb_findmap) - : "cc" ); + : "+&d" (res), "+&a" (word) + : "a" (&_zb_findmap) + : "cc", "0" ); if (res < 32) return (p - addr)*32 + res; p++; diff --git a/include/asm-s390/ccwcache.h b/include/asm-s390/ccwcache.h new file mode 100644 index 000000000..cfbb03bf2 --- /dev/null +++ b/include/asm-s390/ccwcache.h @@ -0,0 +1,84 @@ +/* + * File...........: linux/include/asm-s390/ccwcache.h + * Author(s)......: Holger Smolinski <Holger.Smolinski@de.ibm.com> + * Bugreports.to..: <Linux390@de.ibm.com> + * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 2000 + */ +#ifndef CCWCACHE_H +#define CCWCACHE_H +#include <linux/slab.h> +#include <asm/irq.h> + +#ifndef __KERNEL__ +#define kmem_cache_t void +#endif /* __KERNEL__ */ + +typedef struct ccw_req_t { + /* eye catcher plus queueing information */ + unsigned int magic; + struct ccw_req_t *next; /* pointer to next ccw_req_t in queue */ + struct ccw_req_t *int_next; /* for internal queueing */ + struct ccw_req_t *int_prev; /* for internal queueing */ + + /* Where to execute what... */ + void *device; /* index of the device the req is for */ + void *req; /* pointer to originating request */ + ccw1_t *cpaddr; /* address of channel program */ + char status; /* reflecting the status of this request */ + char flags; /* see below */ + short retries; /* A retry counter to be set when filling */ + + /* ... and how */ + int options; /* options for execution */ + char lpm; /* logical path mask */ + void *data; /* pointer to data area */ + devstat_t *dstat; /* The device status in case of an error */ + + /* these are important for recovering erroneous requests */ + struct ccw_req_t *refers; /* Does this request refer to another one? */ + void *function; /* refers to the originating ERP action */ ; + + unsigned long long expires; /* expiratioj period */ + /* these are for profiling purposes */ + unsigned long long buildclk; /* TOD-clock of request generation */ + unsigned long long startclk; /* TOD-clock of request start */ + unsigned long long stopclk; /* TOD-clock of request interrupt */ + unsigned long long endclk; /* TOD-clock of request termination */ + + /* these are for internal use */ + int cplength; /* length of the channel program in CCWs */ + int datasize; /* amount of additional data in bytes */ + kmem_cache_t *cache; /* the cache this data comes from */ + +} __attribute__ ((aligned(4))) ccw_req_t; + +/* + * ccw_req_t -> status can be: + */ +#define CQR_STATUS_EMPTY 0x00 /* request is empty */ +#define CQR_STATUS_FILLED 0x01 /* request is ready to be preocessed */ +#define CQR_STATUS_QUEUED 0x02 /* request is queued to be processed */ +#define CQR_STATUS_IN_IO 0x03 /* request is currently in IO */ +#define CQR_STATUS_DONE 0x04 /* request is completed sucessfully */ +#define CQR_STATUS_ERROR 0x05 /* request is completed with error */ +#define CQR_STATUS_FAILED 0x06 /* request is finally failed */ + +#define CQR_FLAGS_CHAINED 0x01 /* request is chained by another (last CCW is TIC) */ + +#ifdef __KERNEL__ +#define SMALLEST_SLAB (sizeof(struct ccw_req_t) <= 128 ? 128 :\ + sizeof(struct ccw_req_t) <= 256 ? 256 : 512 ) + +/* SMALLEST_SLAB(1),... PAGE_SIZE(CCW_NUMBER_CACHES) */ +#define CCW_NUMBER_CACHES (sizeof(struct ccw_req_t) <= 128 ? 6 :\ + sizeof(struct ccw_req_t) <= 256 ? 5 : 4 ) + +int ccwcache_init (void); + +ccw_req_t *ccw_alloc_request (char *magic, int cplength, int additional_data); +void ccw_free_request (ccw_req_t * request); +#endif /* __KERNEL__ */ +#endif /* CCWCACHE_H */ + + + diff --git a/include/asm-s390/chandev.h b/include/asm-s390/chandev.h index c9e7d2d54..9efb6fea3 100644 --- a/include/asm-s390/chandev.h +++ b/include/asm-s390/chandev.h @@ -1,87 +1,151 @@ /* * include/asm-s390/chandev.h * - * S390 version * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) - * + * + * Generic channel device initialisation support. */ - +#include <linux/version.h> #include <asm/types.h> +#include <linux/netdevice.h> +/* chandev_type is a bitmask for registering & describing device types. */ typedef enum { - none=0, - ctc=1, - escon=2, - lcs=4, - osad=8, - claw=16, + none=0x0, + ctc=0x1, + escon=0x2, + lcs=0x4, + osad=0x8, + qeth=0x10, + claw=0x20, } chandev_type; -typedef struct chandev_model_info chandev_model_info; - -struct chandev_model_info -{ - struct chandev_model_info *next; - chandev_type chan_type; - u16 cu_type; - u8 cu_model; - u8 max_port_no; -}; - -typedef struct chandev chandev; -struct chandev -{ - struct chandev *next; - chandev_model_info *model_info; - u16 devno; - int irq; -}; - -typedef struct chandev_noauto_range chandev_noauto_range; -struct chandev_noauto_range -{ - struct chandev_noauto_range *next; - u16 lo_devno; - u16 hi_devno; -}; - -typedef struct chandev_force chandev_force; -struct chandev_force +typedef enum { - struct chandev_force *next; - chandev_type chan_type; - s32 devif_num; /* -1 don't care e.g. tr0 implies 0 */ - u16 read_devno; - u16 write_devno; - s16 port_no; /* where available e.g. lcs,-1 don't care */ - u8 do_ip_checksumming; - u8 use_hw_stats; /* where available e.g. lcs */ -}; - - + no_category, + network_device, + serial_device, +} chandev_category; +/* + * The chandev_probeinfo structure is passed to the device driver with configuration + * info for which irq's & ports to use when attempting to probe the device. + */ typedef struct { - s32 devif_num; /* -1 don't care e.g. tr0 implies 0 */ int read_irq; int write_irq; - s16 forced_port_no; /* -1 don't care */ - u8 hint_port_no; - u8 max_port_no; - u8 do_ip_checksumming; + u16 read_devno; + u16 write_devno; + s16 port_protocol_no; /* -1 don't care */ + u8 hint_port_no; /* lcs specific */ + u8 max_port_no; /* lcs specific */ + chandev_type chan_type; + u8 checksum_received_ip_pkts; u8 use_hw_stats; /* where available e.g. lcs */ + u16 cu_type; /* control unit type */ + u8 cu_model; /* control unit model */ + u16 dev_type; /* device type */ + u8 dev_model; /* device model */ + char *parmstr; /* driver specific parameters added by add_parms keyword */ + /* newdevice used internally by chandev.c */ + struct chandev_activelist *newdevice; + s32 devif_num; +/* devif_num=-1 implies don't care,0 implies tr0, info used by chandev_initnetdevice */ } chandev_probeinfo; +/* + * This is a wrapper to the machine check handler & should be used + * instead of reqest_irq or s390_request_irq_special for anything + * using the channel device layer. + */ +int chandev_request_irq(unsigned int irq, + void (*handler)(int, void *, struct pt_regs *), + unsigned long irqflags, + const char *devname, + void *dev_id); + +typedef enum +{ + good=0, + not_oper, + first_msck=not_oper, + no_path, + revalidate, + gone, + last_msck, +} chandev_msck_status; typedef int (*chandev_probefunc)(chandev_probeinfo *probeinfo); +typedef void (*chandev_shutdownfunc)(void *device); +typedef void (*chandev_unregfunc)(void *device); +typedef void (*chandev_reoperfunc)(void *device,int msck_for_read_chan,chandev_msck_status prevstatus); + + + +/* A driver should call chandev_register_and_probe when ready to be probed, + * after registeration the drivers probefunction will be called asynchronously + * when more devices become available at normal task time. + * The shutdownfunc parameter is used so that the channel layer + * can request a driver to close unregister itself & release its interrupts. + * repoper func is used when a device becomes operational again after being temporarily + * not operational the previous status is sent in the prevstatus variable. + * This can be used in cases when the default handling isn't quite adequete + * e.g. if a ssch is needed to reinitialize long running channel programs. + */ +int chandev_register_and_probe(chandev_probefunc probefunc, + chandev_shutdownfunc shutdownfunc, + chandev_reoperfunc reoperfunc, + chandev_type chan_type); + +/* The chandev_unregister function is typically called when a module is being removed + * from the system. The shutdown parameter if TRUE calls shutdownfunc for each + * device instance so the driver writer doesn't have to. + */ +void chandev_unregister(chandev_probefunc probefunc,int call_shutdown); + +/* chandev_initdevice should be called immeadiately before returning after */ +/* a successful probe. */ +int chandev_initdevice(chandev_probeinfo *probeinfo,void *dev_ptr,u8 port_no,char *devname, +chandev_category category,chandev_unregfunc unreg_dev); + +/* chandev_initnetdevice registers a network device with the channel layer. + * It returns the device structure if successful,if dev=NULL it kmallocs it, + * On device initialisation failure it will kfree it under ALL curcumstances + * i.e. if dev is not NULL on entering this routine it MUST be malloced with kmalloc. + * The base name is tr ( e.g. tr0 without the 0 ), for token ring eth for ethernet, + * ctc or escon for ctc device drivers. + * If valid function pointers are given they will be called to setup, + * register & unregister the device. + * An example of setup is eth_setup in drivers/net/net_init.c. + * An example of init_dev is init_trdev(struct net_device *dev) + * & an example of unregister is unregister_trdev, + * unregister_netdev should be used for escon & ctc + * as there is no network unregister_ctcdev in the kernel. +*/ + +#if LINUX_VERSION_CODE>=KERNEL_VERSION(2,3,0) +struct net_device *chandev_initnetdevice(chandev_probeinfo *probeinfo,u8 port_no, + struct net_device *dev,int sizeof_priv, + char *basename, + struct net_device *(*init_netdevfunc) + (struct net_device *dev, int sizeof_priv), + void (*unreg_netdevfunc)(struct net_device *dev)); +#else +struct device *chandev_initnetdevice(chandev_probeinfo *probeinfo,u8 port_no, + struct device *dev,int sizeof_priv, + char *basename, + struct device *(*init_netdevfunc) + (struct device *dev, int sizeof_priv), + void (*unreg_netdevfunc)(struct device *dev)); +#endif + + + + + + -typedef struct chandev_probelist chandev_probelist; -struct chandev_probelist -{ - struct chandev_probelist *next; - chandev_probefunc probefunc; - chandev_type chan_type; -}; diff --git a/include/asm-s390/checksum.h b/include/asm-s390/checksum.h index 487ccc99b..cd0159a5b 100644 --- a/include/asm-s390/checksum.h +++ b/include/asm-s390/checksum.h @@ -141,20 +141,19 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned int sum) { __asm__ __volatile__ ( - " sll %3,16\n" - " or %3,%4\n" /* newproto=proto<<16 in hiword, len in lowword */ - " alr %1,%2\n" /* saddr+=daddr */ - " brc 12,0f\n" - " ahi %1,1\n" /* add carry */ - "0: alr %1,%3\n" /* add saddr+=newproto */ - " brc 12,1f\n" - " ahi %1,1\n" /* add carry again */ - "1: alr %0,%1\n" /* sum+=saddr */ + " alr %0,%1\n" /* sum += saddr */ + " brc 12,0f\n" + " ahi %0,1\n" /* add carry */ + "0: alr %0,%2\n" /* sum += daddr */ + " brc 12,1f\n" + " ahi %0,1\n" /* add carry */ + "1: alr %0,%3\n" /* sum += (len<<16) + (proto<<8) */ " brc 12,2f\n" - " ahi %0,1\n" /* add carry again */ + " ahi %0,1\n" /* add carry */ "2:" : "+&d" (sum) - : "d" (saddr), "d" (daddr), "d" (proto), "d" (len) + : "d" (saddr), "d" (daddr), + "d" (((unsigned int) len<<16) + (unsigned int) proto) : "cc" ); return sum; } diff --git a/include/asm-s390/current.h b/include/asm-s390/current.h index 42567eb94..88e8fc04e 100644 --- a/include/asm-s390/current.h +++ b/include/asm-s390/current.h @@ -20,7 +20,7 @@ static inline struct task_struct * get_current(void) struct task_struct *current; __asm__("lhi %0,-8192\n\t" "nr %0,15" - : "=r" (current) ); + : "=&r" (current) ); return current; } diff --git a/include/asm-s390/dasd.h b/include/asm-s390/dasd.h new file mode 100644 index 000000000..ea5e43eae --- /dev/null +++ b/include/asm-s390/dasd.h @@ -0,0 +1,339 @@ +/* + * File...........: linux/drivers/s390/block/dasd.c + * Author(s)......: Holger Smolinski <Holger.Smolinski@de.ibm.com> + * Bugreports.to..: <Linux390@de.ibm.com> + * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000 + * + * History of changes (starts July 2000) + */ + +#ifndef DASD_H +#define DASD_H + +#include <linux/ioctl.h> +#include <asm/irq.h> + +#define IOCTL_LETTER 'D' +/* Disable the volume (for Linux) */ +#define BIODASDDISABLE _IO(IOCTL_LETTER,0) +/* Enable the volume (for Linux) */ +#define BIODASDENABLE _IO(IOCTL_LETTER,1) +/* Issue a reserve/release command, rsp. */ +#define BIODASDRSRV _IO(IOCTL_LETTER,2) /* reserve */ +#define BIODASDRLSE _IO(IOCTL_LETTER,3) /* release */ +#define BIODASDSLCK _IO(IOCTL_LETTER,4) /* steal lock */ +/* Read sense ID infpormation */ +#define BIODASDRSID _IOR(IOCTL_LETTER,0,senseid_t) +/* Format the volume or an extent */ +#define BIODASDFORMAT _IOW(IOCTL_LETTER,0,format_data_t) +/* translate blocknumber of partition to absolute */ +#define BIODASDRWTB _IOWR(IOCTL_LETTER,0,int) + +#define DASD_NAME "dasd" +#define DASD_PARTN_BITS 2 +#define DASD_PER_MAJOR ( 1U<<(MINORBITS-DASD_PARTN_BITS)) + +/* + * struct format_data_t + * represents all data necessary to format a dasd + */ +typedef struct format_data_t { + int start_unit; /* from track */ + int stop_unit; /* to track */ + int blksize; /* sectorsize */ + int intensity; /* 0: normal, 1:record zero, 3:home address, 4 invalidate tracks */ +} __attribute__ ((packed)) format_data_t; + +#define DASD_FORMAT_DEFAULT_START_UNIT 0 +#define DASD_FORMAT_DEFAULT_STOP_UNIT -1 +#define DASD_FORMAT_DEFAULT_BLOCKSIZE -1 +#define DASD_FORMAT_DEFAULT_INTENSITY -1 + +#ifdef __KERNEL__ +#include <linux/version.h> +#include <linux/major.h> +#include <linux/wait.h> +#include <asm/ccwcache.h> +#include <linux/blk.h> +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,3,98)) +#include <linux/blkdev.h> +#include <linux/devfs_fs_kernel.h> +#endif +#include <linux/genhd.h> +#include <linux/hdreg.h> +#include <linux/compatmac.h> + +#include <asm/s390dyn.h> +#include <asm/todclk.h> +#include <asm/debug.h> + +/* Kernel Version Compatibility section */ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,98)) +typedef struct request *request_queue_t; +#define block_device_operations file_operations +#define __setup(x,y) struct dasd_device_t +#define devfs_register_blkdev(major,name,ops) register_blkdev(major,name,ops) +#define register_disk(dd,dev,partn,ops,size) \ +do { \ + dd->sizes[MINOR(dev)] = size >> 1; \ + resetup_one_dev(dd,MINOR(dev)>>DASD_PARTN_BITS); \ +} while(0) +#define init_waitqueue_head(x) do { *x = NULL; } while(0) +#define blk_cleanup_queue(x) do {} while(0) +#define blk_init_queue(x...) do {} while(0) +#define blk_queue_headactive(x...) do {} while(0) +#define blk_queue_make_request(x) do {} while(0) +#define list_empty(x) (0) +#define INIT_BLK_DEV(d_major,d_request_fn,d_queue_fn,d_current) \ +do { \ + blk_dev[d_major].request_fn = d_request_fn; \ + blk_dev[d_major].queue = d_queue_fn; \ + blk_dev[d_major].current_request = d_current; \ +} while(0) +#define INIT_GENDISK(D_MAJOR,D_NAME,D_PARTN_BITS,D_PER_MAJOR) \ + major:D_MAJOR, \ + major_name:D_NAME, \ + minor_shift:D_PARTN_BITS, \ + max_p:1 << D_PARTN_BITS, \ + max_nr:D_PER_MAJOR, \ + nr_real:D_PER_MAJOR, +static inline struct request * +dasd_next_request( request_queue_t *queue ) +{ + return *queue; +} +static inline void +dasd_dequeue_request( request_queue_t * q, struct request *req ) +{ + *q = req->next; + req->next = NULL; +} +#else +#define INIT_BLK_DEV(d_major,d_request_fn,d_queue_fn,d_current) \ +do { \ + blk_dev[d_major].queue = d_queue_fn; \ +} while(0) +#define INIT_GENDISK(D_MAJOR,D_NAME,D_PARTN_BITS,D_PER_MAJOR) \ + major:D_MAJOR, \ + major_name:D_NAME, \ + minor_shift:D_PARTN_BITS, \ + max_p:1 << D_PARTN_BITS, \ + nr_real:D_PER_MAJOR, +static inline struct request * +dasd_next_request( request_queue_t *queue ) +{ + return blkdev_entry_next_request(&queue->queue_head); +} +static inline void +dasd_dequeue_request( request_queue_t * q, struct request *req ) +{ + blkdev_dequeue_request (req); +} +#endif + +/* dasd_range_t are used for dynamic device att-/detachment */ +typedef struct dasd_devreg_t { + devreg_t devreg; /* the devreg itself */ + /* build a linked list of devregs, needed for cleanup */ + struct dasd_devreg_t *next; +} dasd_devreg_t; + +typedef enum { + dasd_era_fatal = -1, /* no chance to recover */ + dasd_era_none = 0, /* don't recover, everything alright */ + dasd_era_msg = 1, /* don't recover, just report... */ + dasd_era_recover = 2 /* recovery action recommended */ +} dasd_era_t; + +/* BIT DEFINITIONS FOR SENSE DATA */ +#define DASD_SENSE_BIT_0 0x80 +#define DASD_SENSE_BIT_1 0x40 +#define DASD_SENSE_BIT_2 0x20 +#define DASD_SENSE_BIT_3 0x10 + +#define check_then_set(where,from,to) \ +do { \ + if ((*(where)) != (from) ) { \ + printk (KERN_ERR PRINTK_HEADER "was %d\n", *(where)); \ + BUG(); \ + } \ + (*(where)) = (to); \ +} while (0) + +#define DASD_MESSAGE(d_loglevel,d_device,d_string,d_args...)\ +do { \ + int d_devno = d_device->devinfo.devno; \ + int d_irq = d_device->devinfo.irq; \ + char *d_name = d_device->name; \ + int d_major = MAJOR(d_device->kdev); \ + int d_minor = MINOR(d_device->kdev); \ + printk(d_loglevel PRINTK_HEADER \ + "/dev/%s(%d:%d), 0x%04X on SCH 0x%x:" \ + d_string "\n",d_name,d_major,d_minor,d_devno,d_irq,d_args ); \ +} while(0) + +/* + * struct dasd_sizes_t + * represents all data needed to access dasd with properly set up sectors + */ +typedef +struct dasd_sizes_t { + unsigned long blocks; /* size of volume in blocks */ + unsigned int bp_block; /* bytes per block */ + unsigned int s2b_shift; /* log2 (bp_block/512) */ +} dasd_sizes_t; + +/* + * struct dasd_chanq_t + * represents a queue of channel programs related to a single device + */ +typedef +struct dasd_chanq_t { + ccw_req_t *head; + ccw_req_t *tail; +} dasd_chanq_t; + +struct dasd_device_t; +struct request; + +/* + * signatures for the functions of dasd_discipline_t + * make typecasts much easier + */ +typedef ccw_req_t *(*dasd_erp_action_fn_t) (ccw_req_t * cqr); +typedef ccw_req_t *(*dasd_erp_postaction_fn_t) (ccw_req_t * cqr); + +typedef int (*dasd_ck_id_fn_t) (s390_dev_info_t *); +typedef int (*dasd_ck_characteristics_fn_t) (struct dasd_device_t *); +typedef int (*dasd_fill_geometry_fn_t) (struct dasd_device_t *, struct hd_geometry *); +typedef ccw_req_t *(*dasd_format_fn_t) (struct dasd_device_t *, struct format_data_t *); +typedef ccw_req_t *(*dasd_init_analysis_fn_t) (struct dasd_device_t *); +typedef int (*dasd_do_analysis_fn_t) (struct dasd_device_t *); +typedef int (*dasd_io_starter_fn_t) (ccw_req_t *); +typedef void (*dasd_int_handler_fn_t)(int irq, void *, struct pt_regs *); +typedef dasd_era_t (*dasd_error_examine_fn_t) (ccw_req_t *, devstat_t * stat); +typedef dasd_erp_action_fn_t (*dasd_error_analyse_fn_t) (ccw_req_t *); +typedef dasd_erp_postaction_fn_t (*dasd_erp_analyse_fn_t) (ccw_req_t *); +typedef ccw_req_t *(*dasd_cp_builder_fn_t)(struct dasd_device_t *,struct request *); +typedef char *(*dasd_dump_sense_fn_t)(struct dasd_device_t *,ccw_req_t *); +typedef ccw_req_t *(*dasd_reserve_fn_t)(struct dasd_device_t *); +typedef ccw_req_t *(*dasd_release_fn_t)(struct dasd_device_t *); +typedef ccw_req_t *(*dasd_merge_cp_fn_t)(struct dasd_device_t *); + + +/* + * the dasd_discipline_t is + * sth like a table of virtual functions, if you think of dasd_eckd + * inheriting dasd... + * no, currently we are not planning to reimplement the driver in C++ + */ +typedef struct dasd_discipline_t { + char ebcname[8]; /* a name used for tagging and printks */ + char name[8]; /* a name used for tagging and printks */ + + dasd_ck_id_fn_t id_check; /* to check sense data */ + dasd_ck_characteristics_fn_t check_characteristics; /* to check the characteristics */ + dasd_init_analysis_fn_t init_analysis; /* to start the analysis of the volume */ + dasd_do_analysis_fn_t do_analysis; /* to complete the analysis of the volume */ + dasd_fill_geometry_fn_t fill_geometry; /* to set up hd_geometry */ + dasd_io_starter_fn_t start_IO; + dasd_format_fn_t format_device; /* to format the device */ + dasd_error_examine_fn_t examine_error; + dasd_error_analyse_fn_t erp_action; + dasd_erp_analyse_fn_t erp_postaction; + dasd_cp_builder_fn_t build_cp_from_req; + dasd_dump_sense_fn_t dump_sense; + dasd_int_handler_fn_t int_handler; + dasd_reserve_fn_t reserve; + dasd_release_fn_t release; + dasd_merge_cp_fn_t merge_cp; + + struct dasd_discipline_t *next; /* used for list of disciplines */ +} dasd_discipline_t; + +typedef struct major_info_t { + struct major_info_t *next; + struct dasd_device_t **dasd_device; + struct gendisk gendisk; /* actually contains the major number */ +} __attribute__ ((packed)) major_info_t; + +typedef struct dasd_profile_info_t { + unsigned long dasd_io_reqs; /* number of requests processed at all */ + unsigned long dasd_io_secs[32]; /* histogram of request's sizes */ + unsigned long dasd_io_times[32]; /* histogram of requests's times */ + unsigned long dasd_io_timps[32]; /* histogram of requests's times per sector */ + unsigned long dasd_io_time1[32]; /* histogram of time from build to start */ + unsigned long dasd_io_time2[32]; /* histogram of time from start to irq */ + unsigned long dasd_io_time2ps[32]; /* histogram of time from start to irq */ + unsigned long dasd_io_time3[32]; /* histogram of time from irq to end */ +} dasd_profile_info_t; + +typedef struct dasd_device_t { + s390_dev_info_t devinfo; + dasd_discipline_t *discipline; + int level; + int open_count; + kdev_t kdev; + major_info_t *major_info; + struct dasd_chanq_t queue; + wait_queue_head_t wait_q; + request_queue_t request_queue; + devstat_t dev_status; /* needed ONLY!! for request_irq */ + dasd_sizes_t sizes; + char name[16]; /* The name of the device in /dev */ + char *private; /* to be used by the discipline internally */ +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,3,98)) + devfs_handle_t devfs_entry; +#endif /* LINUX_IS_24 */ + struct tq_struct bh_tq; + atomic_t bh_scheduled; + debug_info_t *debug_area; + dasd_profile_info_t profile; + struct proc_dir_entry *proc_dir; /* directory node */ + struct proc_dir_entry *proc_info; /* information from dasd_device_t */ + struct proc_dir_entry *proc_stats; /* statictics information */ +} dasd_device_t; + +/* dasd_device_t.level can be: */ +#define DASD_DEVICE_LEVEL_UNKNOWN 0x00 +#define DASD_DEVICE_LEVEL_RECOGNIZED 0x01 +#define DASD_DEVICE_LEVEL_ANALYSIS_PENDING 0x02 +#define DASD_DEVICE_LEVEL_ANALYSIS_PREPARED 0x04 +#define DASD_DEVICE_LEVEL_ANALYSED 0x08 +#define DASD_DEVICE_LEVEL_PARTITIONED 0x10 + +int dasd_init (void); +void dasd_discipline_enq (dasd_discipline_t *); +int dasd_discipline_deq(dasd_discipline_t *); +int dasd_start_IO (ccw_req_t *); +void dasd_int_handler (int , void *, struct pt_regs *); +ccw_req_t *default_erp_action (ccw_req_t *); +ccw_req_t *default_erp_postaction (ccw_req_t *); +int dasd_chanq_deq (dasd_chanq_t *, ccw_req_t *); +ccw_req_t *dasd_alloc_request (char *, int, int); +void dasd_free_request (ccw_req_t *); +int (*genhd_dasd_name) (char *, int, int, struct gendisk *); +int dasd_oper_handler (int irq, devreg_t * devreg); + +#endif /* __KERNEL__ */ + +#endif /* DASD_H */ + +/* + * Overrides for Emacs so that we follow Linus's tabbing style. + * Emacs will notice this stuff at the end of the file and automatically + * adjust the settings for this buffer only. This must remain at the end + * of the file. + * --------------------------------------------------------------------------- + * Local variables: + * c-indent-level: 4 + * c-brace-imaginary-offset: 0 + * c-brace-offset: -4 + * c-argdecl-indent: 4 + * c-label-offset: -4 + * c-continued-statement-offset: 4 + * c-continued-brace-offset: 0 + * indent-tabs-mode: nil + * tab-width: 8 + * End: + */ diff --git a/include/asm-s390/debug.h b/include/asm-s390/debug.h new file mode 100644 index 000000000..fdcc56008 --- /dev/null +++ b/include/asm-s390/debug.h @@ -0,0 +1,210 @@ +/* + * include/asm-s390/debug.h + * S/390 debug facility + * + * Copyright (C) 1999, 2000 IBM Deutschland Entwicklung GmbH, + * IBM Corporation + */ + +#ifndef DEBUG_H +#define DEBUG_H + +/* Note: + * struct __debug_entry must be defined outside of #ifdef __KERNEL__ + * in order to allow a user program to analyze the 'raw'-view. + */ + +struct __debug_entry{ + union { + struct { + unsigned long long clock:52; + unsigned long long exception:1; + unsigned long long used:1; + unsigned long long unused:1; + unsigned long long cpuid:9; + } fields; + + unsigned long long stck; + } id; + void* caller; +} __attribute__((packed)); + +#ifdef __KERNEL__ +#include <linux/version.h> +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0)) + #include <asm/spinlock.h> +#else + #include <linux/spinlock.h> +#endif /* LINUX_VERSION_CODE */ +#include <linux/kernel.h> +#include <linux/time.h> +#include <linux/proc_fs.h> + +#define DEBUG_MAX_LEVEL 6 /* debug levels range from 0 to 6 */ +#define DEBUG_OFF_LEVEL -1 /* level where debug is switched off */ +#define DEBUG_MAX_VIEWS 10 /* max number of views in proc fs */ +#define DEBUG_MAX_PROCF_LEN 16 /* max length for a proc file name */ +#define DEBUG_DEFAULT_LEVEL 3 /* initial debug level */ +#define DEBUG_FEATURE_VERSION 1 /* version of debug feature */ + +#define DEBUG_DIR_ROOT "s390dbf" /* name of debug root directory in proc fs */ + +#define DEBUG_DATA(entry) (char*)(entry + 1) /* data is stored behind */ + /* the entry information */ + +#define STCK(x) asm volatile ("STCK %0":"=m" (x)) + +typedef struct __debug_entry debug_entry_t; + +struct debug_view; + +typedef struct debug_info { + struct debug_info* next; + struct debug_info* prev; + atomic_t ref_count; + spinlock_t lock; + int level; + int nr_areas; + int page_order; + int buf_size; + int entry_size; + debug_entry_t** areas; + int active_area; + int *active_entry; + struct proc_dir_entry* proc_root_entry; + struct proc_dir_entry* proc_entries[DEBUG_MAX_VIEWS]; + struct debug_view* views[DEBUG_MAX_VIEWS]; + char name[DEBUG_MAX_PROCF_LEN]; +} debug_info_t; + +typedef int (debug_header_proc_t) (debug_info_t* id, + struct debug_view* view, + int area, + debug_entry_t* entry, + char* out_buf); + +typedef int (debug_format_proc_t) (debug_info_t* id, + struct debug_view* view, char* out_buf, + const char* in_buf); +typedef int (debug_prolog_proc_t) (debug_info_t* id, + struct debug_view* view, + char* out_buf); +typedef int (debug_input_proc_t) (debug_info_t* id, + struct debug_view* view, + struct file* file, const char* user_buf, + size_t in_buf_size, loff_t* offset); + +int debug_dflt_header_fn(debug_info_t* id, struct debug_view* view, + int area, debug_entry_t* entry, char* out_buf); + +struct debug_view { + char name[DEBUG_MAX_PROCF_LEN]; + debug_prolog_proc_t* prolog_proc; + debug_header_proc_t* header_proc; + debug_format_proc_t* format_proc; + debug_input_proc_t* input_proc; +}; + +extern struct debug_view debug_hex_ascii_view; +extern struct debug_view debug_raw_view; + +debug_info_t* debug_register(char* name, int pages_index, int nr_areas, + int buf_size); +void debug_unregister(debug_info_t* id); + +void debug_set_level(debug_info_t* id, int new_level); + +debug_entry_t* debug_event(debug_info_t* id, int level, void* data, + int length); +debug_entry_t* debug_int_event(debug_info_t* id, int level, + unsigned int tag); +debug_entry_t* debug_text_event(debug_info_t* id, int level, + const char* txt); + +debug_entry_t* debug_exception(debug_info_t* id, int level, void* data, + int length); +debug_entry_t* debug_int_exception(debug_info_t* id, int level, + unsigned int tag); +debug_entry_t* debug_text_exception(debug_info_t* id, int level, + const char* txt); + +static inline debug_entry_t * +debug_long_event (debug_info_t* id, int level, unsigned long tag) +{ + unsigned long t=tag; + return debug_event(id,level,&t,sizeof(unsigned long)); +} +static inline debug_entry_t * +debug_long_exception (debug_info_t* id, int level, unsigned long tag) +{ + unsigned long t=tag; + return debug_exception(id,level,&t,sizeof(unsigned long)); +} +int debug_register_view(debug_info_t* id, struct debug_view* view); +int debug_unregister_view(debug_info_t* id, struct debug_view* view); + +/* + define the debug levels: + - 0 No debugging output to console or syslog + - 1 Log internal errors to syslog, ignore check conditions + - 2 Log internal errors and check conditions to syslog + - 3 Log internal errors to console, log check conditions to syslog + - 4 Log internal errors and check conditions to console + - 5 panic on internal errors, log check conditions to console + - 6 panic on both, internal errors and check conditions + */ + +#ifndef DEBUG_LEVEL +#define DEBUG_LEVEL 4 +#endif + +#define INTERNAL_ERRMSG(x,y...) "E" __FILE__ "%d: " x, __LINE__, y +#define INTERNAL_WRNMSG(x,y...) "W" __FILE__ "%d: " x, __LINE__, y +#define INTERNAL_INFMSG(x,y...) "I" __FILE__ "%d: " x, __LINE__, y +#define INTERNAL_DEBMSG(x,y...) "D" __FILE__ "%d: " x, __LINE__, y + +#if DEBUG_LEVEL > 0 +#define PRINT_DEBUG(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) +#define PRINT_INFO(x...) printk ( KERN_INFO PRINTK_HEADER x ) +#define PRINT_WARN(x...) printk ( KERN_WARNING PRINTK_HEADER x ) +#define PRINT_ERR(x...) printk ( KERN_ERR PRINTK_HEADER x ) +#define PRINT_FATAL(x...) panic ( PRINTK_HEADER x ) +#else +#define PRINT_DEBUG(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) +#define PRINT_INFO(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) +#define PRINT_WARN(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) +#define PRINT_ERR(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) +#define PRINT_FATAL(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) +#endif /* DASD_DEBUG */ + +#if DASD_DEBUG > 4 +#define INTERNAL_ERROR(x...) PRINT_FATAL ( INTERNAL_ERRMSG ( x ) ) +#elif DASD_DEBUG > 2 +#define INTERNAL_ERROR(x...) PRINT_ERR ( INTERNAL_ERRMSG ( x ) ) +#elif DASD_DEBUG > 0 +#define INTERNAL_ERROR(x...) PRINT_WARN ( INTERNAL_ERRMSG ( x ) ) +#else +#define INTERNAL_ERROR(x...) +#endif /* DASD_DEBUG */ + +#if DASD_DEBUG > 5 +#define INTERNAL_CHECK(x...) PRINT_FATAL ( INTERNAL_CHKMSG ( x ) ) +#elif DASD_DEBUG > 3 +#define INTERNAL_CHECK(x...) PRINT_ERR ( INTERNAL_CHKMSG ( x ) ) +#elif DASD_DEBUG > 1 +#define INTERNAL_CHECK(x...) PRINT_WARN ( INTERNAL_CHKMSG ( x ) ) +#else +#define INTERNAL_CHECK(x...) +#endif /* DASD_DEBUG */ + +#undef DEBUG_MALLOC +#ifdef DEBUG_MALLOC +void *b; +#define kmalloc(x...) (PRINT_INFO(" kmalloc %p\n",b=kmalloc(x)),b) +#define kfree(x) PRINT_INFO(" kfree %p\n",x);kfree(x) +#define get_free_page(x...) (PRINT_INFO(" gfp %p\n",b=get_free_page(x)),b) +#define __get_free_pages(x...) (PRINT_INFO(" gfps %p\n",b=__get_free_pages(x)),b) +#endif /* DEBUG_MALLOC */ + +#endif /* __KERNEL__ */ +#endif /* DEBUG_H */ diff --git a/include/asm-s390/delay.h b/include/asm-s390/delay.h index 87ac55391..357fdb835 100644 --- a/include/asm-s390/delay.h +++ b/include/asm-s390/delay.h @@ -15,11 +15,8 @@ #define _S390_DELAY_H extern void __udelay(unsigned long usecs); -extern void __const_udelay(unsigned long usecs); extern void __delay(unsigned long loops); -#define udelay(n) (__builtin_constant_p(n) ? \ - __const_udelay((n) * 0x10c6ul) : \ - __udelay(n)) +#define udelay(n) __udelay(n) #endif /* defined(_S390_DELAY_H) */ diff --git a/include/asm-s390/dma.h b/include/asm-s390/dma.h index e7ae126e6..e7e157330 100644 --- a/include/asm-s390/dma.h +++ b/include/asm-s390/dma.h @@ -1,5 +1,5 @@ /* - * include/asm-s390/delay.h + * include/asm-s390/dma.h * * S390 version * @@ -11,7 +11,6 @@ #include <asm/io.h> /* need byte IO */ -#define MAX_DMA_CHANNELS 0 #define MAX_DMA_ADDRESS 0x80000000 #endif /* _ASM_DMA_H */ diff --git a/include/asm-s390/ebcdic.h b/include/asm-s390/ebcdic.h index 7d6aeb2a7..be17f99d4 100644 --- a/include/asm-s390/ebcdic.h +++ b/include/asm-s390/ebcdic.h @@ -14,6 +14,8 @@ #include <types.h> #endif +extern __u8 _ascebc_500[]; /* ASCII -> EBCDIC 500 conversion table */ +extern __u8 _ebcasc_500[]; /* EBCDIC 500 -> ASCII conversion table */ extern __u8 _ascebc[]; /* ASCII -> EBCDIC conversion table */ extern __u8 _ebcasc[]; /* EBCDIC -> ASCII conversion table */ extern __u8 _ebc_tolower[]; /* EBCDIC -> lowercase */ @@ -44,6 +46,8 @@ void codepage_convert(const __u8 *codepage, volatile __u8 * addr, int nr) #define ASCEBC(addr,nr) codepage_convert(_ascebc, addr, nr) #define EBCASC(addr,nr) codepage_convert(_ebcasc, addr, nr) +#define ASCEBC_500(addr,nr) codepage_convert(_ascebc_500, addr, nr) +#define EBCASC_500(addr,nr) codepage_convert(_ebcasc_500, addr, nr) #define EBC_TOLOWER(addr,nr) codepage_convert(_ebc_tolower, addr, nr) #define EBC_TOUPPER(addr,nr) codepage_convert(_ebc_toupper, addr, nr) diff --git a/include/asm-s390/elf.h b/include/asm-s390/elf.h index 28c5e47db..1f4de7c51 100644 --- a/include/asm-s390/elf.h +++ b/include/asm-s390/elf.h @@ -19,10 +19,6 @@ typedef s390_fp_regs elf_fpregset_t; typedef s390_regs elf_gregset_t; -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == EM_S390) /* * These are used to set parameters in the core dumps. @@ -31,6 +27,12 @@ typedef s390_regs elf_gregset_t; #define ELF_DATA ELFDATA2MSB #define ELF_ARCH EM_S390 +/* + * This is used to ensure we don't load something for the wrong architecture. + */ +#define elf_check_arch(x) \ + ((x)->e_machine == ELF_ARCH && (x)->e_ident[EI_CLASS] == ELF_CLASS) + /* For SVR4/S390 the function pointer to be registered with `atexit` is passed in R14. */ #define ELF_PLAT_INIT(_r) \ @@ -73,8 +75,7 @@ typedef s390_regs elf_gregset_t; #define ELF_PLATFORM (NULL) #ifdef __KERNEL__ -#define SET_PERSONALITY(ex, ibcs2) \ - current->personality = (ibcs2 ? PER_SVR4 : PER_LINUX) +#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) #endif #endif diff --git a/include/asm-s390/fcntl.h b/include/asm-s390/fcntl.h index c1987889a..80fdd6c2e 100644 --- a/include/asm-s390/fcntl.h +++ b/include/asm-s390/fcntl.h @@ -42,6 +42,11 @@ #define F_SETSIG 10 /* for sockets. */ #define F_GETSIG 11 /* for sockets. */ +#define F_GETLK64 12 /* using 'struct flock64' */ +#define F_SETLK64 13 +#define F_SETLKW64 14 + + /* for F_[GET|SET]FL */ #define FD_CLOEXEC 1 /* actually anything with low bit set goes */ @@ -77,5 +82,13 @@ struct flock { pid_t l_pid; }; +struct flock64 { + short l_type; + short l_whence; + loff_t l_start; + loff_t l_len; + pid_t l_pid; +}; + #define F_LINUX_SPECIFIC_BASE 1024 #endif diff --git a/include/asm-s390/hardirq.h b/include/asm-s390/hardirq.h index b32a0684a..05a95993c 100644 --- a/include/asm-s390/hardirq.h +++ b/include/asm-s390/hardirq.h @@ -50,14 +50,14 @@ * Special definitions for s390, always access current PSA. */ #define in_interrupt() ((S390_lowcore.__local_irq_count + S390_lowcore.__local_bh_count) != 0) - + #define in_irq() (S390_lowcore.__local_irq_count != 0) - + #ifndef CONFIG_SMP - + #define hardirq_trylock(cpu) (local_irq_count(cpu) == 0) #define hardirq_endlock(cpu) do { } while (0) - + #define hardirq_enter(cpu) (local_irq_count(cpu)++) #define hardirq_exit(cpu) (local_irq_count(cpu)--) diff --git a/include/asm-s390/idals.h b/include/asm-s390/idals.h new file mode 100644 index 000000000..7d5232b65 --- /dev/null +++ b/include/asm-s390/idals.h @@ -0,0 +1,57 @@ +/* + * File...........: linux/include/asm-s390x/idals.h + * Author(s)......: Holger Smolinski <Holger.Smolinski@de.ibm.com> + * Bugreports.to..: <Linux390@de.ibm.com> + * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 2000a + + * History of changes + * 07/24/00 new file + */ +#include <linux/config.h> +#include <asm/irq.h> + +typedef unsigned long idaw_t; + +static inline idaw_t * +idal_alloc ( int nridaws ) +{ + if ( nridaws > 33 ) + BUG(); + return kmalloc(nridaws * sizeof(idaw_t), GFP_ATOMIC | GFP_DMA ); +} + +static inline void +idal_free ( idaw_t *idal ) +{ + kfree (idal); +} + +/* + * Function: set_normalized_cda + * sets the address of the data in CCW + * if necessary it allocates an IDAL and sets sthe appropriate flags + */ +#if defined (CONFIG_ARCH_S390X) +extern void set_normalized_cda(ccw1_t * ccw, unsigned long address); +#else +static inline void +set_normalized_cda(ccw1_t * ccw, unsigned long address) +{ + ccw->cda = address; +} +#endif + +/* + * Function: clear_normalized_cda + * releases any allocated IDAL related to the CCW + */ +static inline void +clear_normalized_cda ( ccw1_t * ccw ) +{ + if ( ccw -> flags & CCW_FLAG_IDA ) { + idal_free ( (idaw_t *) (ccw -> cda )); + ccw -> flags &= ~CCW_FLAG_IDA; + } + ccw -> cda = 0; +} + diff --git a/include/asm-s390/io.h b/include/asm-s390/io.h index 87c4edb72..11bd4217a 100644 --- a/include/asm-s390/io.h +++ b/include/asm-s390/io.h @@ -27,7 +27,7 @@ extern inline unsigned long virt_to_phys(volatile void * address) { unsigned long real_address; - __asm__ (" lra %0,0(0,%1)\n" + __asm__ (" lra %0,0(%1)\n" " jz 0f\n" " sr %0,%0\n" "0:" diff --git a/include/asm-s390/ioctls.h b/include/asm-s390/ioctls.h index 41748666a..db7b0a0c3 100644 --- a/include/asm-s390/ioctls.h +++ b/include/asm-s390/ioctls.h @@ -73,6 +73,7 @@ #define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ #define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ +#define FIOQSIZE 0x545E /* Used for packet mode */ #define TIOCPKT_DATA 0 diff --git a/include/asm-s390/irq.h b/include/asm-s390/irq.h index 5efcdd40b..9849d6fdc 100644 --- a/include/asm-s390/irq.h +++ b/include/asm-s390/irq.h @@ -1,15 +1,8 @@ -/* - * arch/s390/kernel/s390io.h - * - * S390 version - * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Ingo Adlung (adlung@de.ibm.com) - */ - #ifndef __irq_h #define __irq_h #include <linux/config.h> +#ifdef __KERNEL__ #include <asm/hardirq.h> /* @@ -18,6 +11,8 @@ #define __MAX_SUBCHANNELS 65536 #define NR_IRQS __MAX_SUBCHANNELS +#define LPM_ANYPATH 0xff /* doesn't really belong here, Ingo? */ + #define INVALID_STORAGE_AREA ((void *)(-1 - 0x3FFF )) extern int disable_irq(unsigned int); @@ -50,7 +45,8 @@ struct hw_interrupt_type { */ typedef struct { __u32 intparm; /* interruption parameter */ - __u32 res0 : 2; /* reserved zeros */ + __u32 qf : 1; /* qdio facility */ + __u32 res0 : 1; /* reserved zeros */ __u32 isc : 3; /* interruption sublass */ __u32 res5 : 3; /* reserved zeros */ __u32 ena : 1; /* enabled */ @@ -77,6 +73,7 @@ typedef struct { /* ... in an operand exception. */ } __attribute__ ((packed)) pmcw_t; +#endif /* __KERNEL__ */ /* * subchannel status word */ @@ -89,7 +86,7 @@ typedef struct { __u32 pfch : 1; /* prefetch */ __u32 isic : 1; /* initial-status interruption control */ __u32 alcc : 1; /* address-limit checking control */ - __u32 ssi : 1; /* supress-suspended interruption */ + __u32 ssi : 1; /* suppress-suspended interruption */ __u32 zcc : 1; /* zero condition code */ __u32 ectl : 1; /* extended control */ __u32 pno : 1; /* path not operational */ @@ -140,6 +137,44 @@ typedef struct { #define SCHN_STAT_CHAIN_CHECK 0x01 /* + * architectured values for first sense byte + */ +#define SNS0_CMD_REJECT 0x80 +#define SNS_CMD_REJECT SNS0_CMD_REJECT +#define SNS0_INTERVENTION_REQ 0x40 +#define SNS0_BUS_OUT_CHECK 0x20 +#define SNS0_EQUIPMENT_CHECK 0x10 +#define SNS0_DATA_CHECK 0x08 +#define SNS0_OVERRUN 0x04 +/* 0x02 reserved */ +#define SNS0_INCOMPL_DOMAIN 0x01 + +/* + * architectured values for second sense byte + */ +#define SNS1_PERM_ERR 0x80 +#define SNS1_INV_TRACK_FORMAT 0x40 +#define SNS1_EOC 0x20 +#define SNS1_MESSAGE_TO_OPER 0x10 +#define SNS1_NO_REC_FOUND 0x08 +#define SNS1_FILE_PROTECTED 0x04 +#define SNS1_WRITE_INHIBITED 0x02 +#define SNS1_INPRECISE_END 0x01 + +/* + * architectured values for third sense byte + */ +#define SNS2_REQ_INH_WRITE 0x80 +#define SNS2_CORRECTABLE 0x40 +#define SNS2_FIRST_LOG_ERR 0x20 +#define SNS2_ENV_DATA_PRESENT 0x10 +/* 0x08 reserved */ +#define SNS2_INPRECISE_END 0x04 +/* 0x02 reserved */ +/* 0x01 reserved */ + +#ifdef __KERNEL__ +/* * subchannel information block */ typedef struct { @@ -147,13 +182,14 @@ typedef struct { scsw_t scsw; /* subchannel status word */ __u8 mda[12]; /* model dependent area */ } __attribute__ ((packed,aligned(4))) schib_t; +#endif /* __KERNEL__ */ typedef struct { __u8 cmd_code;/* command code */ - __u8 flags; /* flags, like IDA adressing, etc. */ + __u8 flags; /* flags, like IDA addressing, etc. */ __u16 count; /* byte count */ __u32 cda; /* data address */ - } ccw1_t __attribute__ ((packed,aligned(8))); + } __attribute__ ((packed,aligned(8))) ccw1_t; #define CCW_FLAG_DC 0x80 #define CCW_FLAG_CC 0x40 @@ -168,10 +204,13 @@ typedef struct { #define CCW_CMD_BASIC_SENSE 0x04 #define CCW_CMD_TIC 0x08 #define CCW_CMD_SENSE_PGID 0x34 +#define CCW_CMD_SUSPEND_RECONN 0x5B #define CCW_CMD_RDC 0x64 #define CCW_CMD_SET_PGID 0xAF #define CCW_CMD_SENSE_ID 0xE4 +#define CCW_CMD_DCTL 0xF3 +#ifdef __KERNEL__ #define SENSE_MAX_COUNT 0x20 /* @@ -192,19 +231,25 @@ typedef struct { __u32 intparm; /* interruption parameter */ __u32 key : 4; /* flags, like key, suspend control, etc. */ __u32 spnd : 1; /* suspend control */ - __u32 res1 : 3; /* reserved */ + __u32 res1 : 1; /* reserved */ + __u32 mod : 1; /* modification control */ + __u32 sync : 1; /* synchronize control */ __u32 fmt : 1; /* format control */ __u32 pfch : 1; /* prefetch control */ __u32 isic : 1; /* initial-status-interruption control */ __u32 alcc : 1; /* address-limit-checking control */ __u32 ssic : 1; /* suppress-suspended-interr. control */ - __u32 res2 : 3; /* reserved */ + __u32 res2 : 1; /* reserved */ + __u32 c64 : 1; /* IDAW/QDIO 64 bit control */ + __u32 i2k : 1; /* IDAW 2/4kB block size control */ __u32 lpm : 8; /* logical path mask */ __u32 ils : 1; /* incorrect length */ - __u32 zero : 7; /* reserved zeros */ + __u32 zero : 6; /* reserved zeros */ + __u32 orbx : 1; /* ORB extension control */ __u32 cpa; /* channel program address */ } __attribute__ ((packed,aligned(4))) orb_t; +#endif /* __KERNEL__ */ typedef struct { __u32 res0 : 4; /* reserved */ __u32 pvrf : 1; /* path-verification-required flag */ @@ -249,7 +294,7 @@ typedef struct { typedef struct { __u8 zero0; /* reserved zeros */ __u8 lpum; /* last path used mask */ - __u8 zero16; /* reserved zeros */ + __u16 zero16; /* reserved zeros */ erw_t erw; /* extended report word */ __u32 zeros[3]; /* 2 fullwords of zeros */ } __attribute__ ((packed)) esw1_t; @@ -291,30 +336,24 @@ typedef struct { esw_t esw; /* extended status word */ __u8 ecw[32]; /* extended control word */ } irb_t __attribute__ ((packed,aligned(4))); +#ifdef __KERNEL__ /* * TPI info structure */ typedef struct { - __u32 res : 16; /* reserved 0x00000001 */ - __u32 irq : 16; /* aka. subchannel number */ - __u32 intparm; /* interruption parameter */ + __u32 reserved1 : 16; /* reserved 0x00000001 */ + __u32 irq : 16; /* aka. subchannel number */ + __u32 intparm; /* interruption parameter */ + __u32 adapter_IO : 1; + __u32 reserved2 : 1; + __u32 isc : 3; + __u32 reserved3 : 12; + __u32 int_type : 3; + __u32 reserved4 : 12; } __attribute__ ((packed)) tpi_info_t; -/* - * This is the "IRQ descriptor", which contains various information - * about the irq, including what kind of hardware handling it has, - * whether it is disabled etc etc. - * - * Pad this out to 32 bytes for cache and indexing reasons. - */ -typedef struct { - __u32 status; /* IRQ status - IRQ_INPROGRESS, IRQ_DISABLED */ - struct hw_interrupt_type *handler; /* handle/enable/disable functions */ - struct irqaction *action; /* IRQ action list */ - } irq_desc_t; - // // command information word (CIW) layout // @@ -330,6 +369,7 @@ typedef struct _ciw { #define CIW_TYPE_SII 0x1 // set interface identifier #define CIW_TYPE_RNI 0x2 // read node identifier +#define MAX_CIWS 8 // // sense-id response buffer layout // @@ -342,9 +382,10 @@ typedef struct { __u8 dev_model; /* device model */ __u8 unused; /* padding byte */ /* extended part */ - ciw_t ciw[62]; /* variable # of CIWs */ + ciw_t ciw[MAX_CIWS]; /* variable # of CIWs */ } __attribute__ ((packed,aligned(4))) senseid_t; +#endif /* __KERNEL__ */ /* * sense data */ @@ -363,7 +404,7 @@ typedef struct { */ typedef struct { __u16 devno; /* device number, aka. "cuu" from irb */ - unsigned int intparm; /* interrupt parameter */ + unsigned long intparm; /* interrupt parameter */ __u8 cstat; /* channel status - accumulated */ __u8 dstat; /* device status - accumulated */ __u8 lpum; /* last path used mask from irb */ @@ -387,9 +428,53 @@ typedef struct { #define DEVSTAT_DEVICE_GONE 0x00000040 #define DEVSTAT_DEVICE_OWNED 0x00000080 #define DEVSTAT_CLEAR_FUNCTION 0x00000100 +#define DEVSTAT_PCI 0x00000200 +#define DEVSTAT_SUSPENDED 0x00000400 +#define DEVSTAT_UNKNOWN_DEV 0x00000800 #define DEVSTAT_FINAL_STATUS 0x80000000 +#define DEVINFO_NOT_OPER DEVSTAT_NOT_OPER +#define DEVINFO_UNKNOWN_DEV DEVSTAT_UNKNOWN_DEV +#define DEVINFO_DEVICE_OWNED DEVSTAT_DEVICE_OWNED +#define DEVINFO_QDIO_CAPABLE 0x40000000 + #define INTPARM_STATUS_PENDING 0xFFFFFFFF +#ifdef __KERNEL__ + +#define IO_INTERRUPT_TYPE 0 /* I/O interrupt type */ + +typedef void (* io_handler_func1_t) ( int irq, + devstat_t *devstat, + struct pt_regs *rgs); + +typedef void (* io_handler_func_t) ( int irq, + void *devstat, + struct pt_regs *rgs); + +typedef void ( * not_oper_handler_func_t)( int irq, + int status ); + +typedef int (* adapter_int_handler_t)( __u32 intparm ); + +struct s390_irqaction { + io_handler_func_t handler; + unsigned long flags; + const char *name; + devstat_t *dev_id; +}; + +/* + * This is the "IRQ descriptor", which contains various information + * about the irq, including what kind of hardware handling it has, + * whether it is disabled etc etc. + * + * Pad this out to 32 bytes for cache and indexing reasons. + */ +typedef struct { + unsigned int status; /* IRQ status - IRQ_INPROGRESS, IRQ_DISABLED */ + struct hw_interrupt_type *handler; /* handle/enable/disable functions */ + struct s390_irqaction *action; /* IRQ action list */ + } irq_desc_t; typedef struct { __u8 state1 : 2; /* path state value 1 */ @@ -409,36 +494,39 @@ typedef struct { __u32 tod_high; /* high word TOD clock */ } __attribute__ ((packed)) pgid_t; +#define SPID_FUNC_SINGLE_PATH 0x00 #define SPID_FUNC_MULTI_PATH 0x80 #define SPID_FUNC_ESTABLISH 0x00 #define SPID_FUNC_RESIGN 0x40 #define SPID_FUNC_DISBAND 0x20 -#define SNID_STATE1_RESET 0x0 -#define SNID_STATE1_UNGROUPED 0x8 -#define SNID_STATE1_GROUPED 0xC +#define SNID_STATE1_RESET 0 +#define SNID_STATE1_UNGROUPED 2 +#define SNID_STATE1_GROUPED 3 -#define SNID_STATE2_NOT_RESVD 0x0 -#define SNID_STATE2_RESVD_ELSE 0x8 -#define SNID_STATE2_RESVD_SELF 0xC +#define SNID_STATE2_NOT_RESVD 0 +#define SNID_STATE2_RESVD_ELSE 2 +#define SNID_STATE2_RESVD_SELF 3 #define SNID_STATE3_MULTI_PATH 1 +#define SNID_STATE3_SINGLE_PATH 0 /* * Flags used as input parameters for do_IO() */ -#define DOIO_EARLY_NOTIFICATION 0x01 /* allow for I/O completion ... */ +#define DOIO_EARLY_NOTIFICATION 0x0001 /* allow for I/O completion ... */ /* ... notification after ... */ /* ... primary interrupt status */ -#define DOIO_RETURN_CHAN_END DOIO_EARLY_NOTIFICATION -#define DOIO_VALID_LPM 0x02 /* LPM input parameter is valid */ -#define DOIO_WAIT_FOR_INTERRUPT 0x04 /* wait synchronously for interrupt */ -#define DOIO_REPORT_ALL 0x08 /* report all interrupt conditions */ -#define DOIO_ALLOW_SUSPEND 0x10 /* allow for channel prog. suspend */ -#define DOIO_DENY_PREFETCH 0x20 /* don't allow for CCW prefetch */ -#define DOIO_SUPPRESS_INTER 0x40 /* suppress intermediate inter. */ +#define DOIO_RETURN_CHAN_END DOIO_EARLY_NOTIFICATION +#define DOIO_VALID_LPM 0x0002 /* LPM input parameter is valid */ +#define DOIO_WAIT_FOR_INTERRUPT 0x0004 /* wait synchronously for interrupt */ +#define DOIO_REPORT_ALL 0x0008 /* report all interrupt conditions */ +#define DOIO_ALLOW_SUSPEND 0x0010 /* allow for channel prog. suspend */ +#define DOIO_DENY_PREFETCH 0x0020 /* don't allow for CCW prefetch */ +#define DOIO_SUPPRESS_INTER 0x0040 /* suppress intermediate inter. */ /* ... for suspended CCWs */ -#define DOIO_TIMEOUT 0x80 /* 3 secs. timeout for sync. I/O */ +#define DOIO_TIMEOUT 0x0080 /* 3 secs. timeout for sync. I/O */ +#define DOIO_DONT_CALL_INTHDLR 0x0100 /* don't call interrupt handler */ /* * do_IO() @@ -464,7 +552,7 @@ int do_IO( int irq, /* IRQ aka. subchannel number */ int start_IO( int irq, /* IRQ aka. subchannel number */ ccw1_t *cpa, /* logical channel program address */ - unsigned int intparm, /* interruption parameter */ + unsigned long intparm, /* interruption parameter */ __u8 lpm, /* logical path mask */ unsigned int flag); /* flags : see above */ @@ -493,12 +581,12 @@ typedef struct { __u16 devno; /* device number */ unsigned int status; /* device status */ senseid_t sid_data; /* senseID data */ - } dev_info_t; + } s390_dev_info_t; -int get_dev_info( int irq, dev_info_t *); /* to be eliminated - don't use */ +int get_dev_info( int irq, s390_dev_info_t *); /* to be eliminated - don't use */ -int get_dev_info_by_irq ( int irq, dev_info_t *pdi); -int get_dev_info_by_devno( __u16 devno, dev_info_t *pdi); +int get_dev_info_by_irq ( int irq, s390_dev_info_t *pdi); +int get_dev_info_by_devno( __u16 devno, s390_dev_info_t *pdi); int get_irq_by_devno( __u16 devno ); unsigned int get_devno_by_irq( int irq ); @@ -507,7 +595,16 @@ int get_irq_first( void ); int get_irq_next ( int irq ); int read_dev_chars( int irq, void **buffer, int length ); -int read_conf_data( int irq, void **buffer, int *length ); +int read_conf_data( int irq, void **buffer, int *length, __u8 lpm ); + +int s390_DevicePathVerification( int irq, __u8 domask ); + +int s390_request_irq_special( int irq, + io_handler_func_t io_handler, + not_oper_handler_func_t not_oper_handler, + unsigned long irqflags, + const char *devname, + void *dev_id); extern int handle_IRQ_event( unsigned int irq, int cpu, struct pt_regs *); @@ -524,7 +621,11 @@ extern __inline__ int stsch(int irq, volatile schib_t *addr) int ccode; __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else "LR 1,%1\n\t" +#endif "STSCH 0(%2)\n\t" "IPM %0\n\t" "SRL %0,28\n\t" @@ -538,7 +639,11 @@ extern __inline__ int msch(int irq, volatile schib_t *addr) int ccode; __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else "LR 1,%1\n\t" +#endif "MSCH 0(%2)\n\t" "IPM %0\n\t" "SRL %0,28\n\t" @@ -552,6 +657,21 @@ extern __inline__ int msch_err(int irq, volatile schib_t *addr) int ccode; __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + " lgr 1,%1\n" + " msch 0(%2)\n" + "0: ipm %0\n" + " srl %0,28\n" + "1:\n" + ".section .fixup,\"ax\"\n" + "2: l %0,%3\n" + " jg 1b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + " .align 8\n" + " .quad 0b,2b\n" + ".previous" +#else " lr 1,%1\n" " msch 0(%2)\n" "0: ipm %0\n" @@ -568,6 +688,7 @@ extern __inline__ int msch_err(int irq, volatile schib_t *addr) " .align 4\n" " .long 0b,2b\n" ".previous" +#endif : "=d" (ccode) : "r" (irq | 0x10000L), "a" (addr), "i" (__LC_PGM_ILC) : "cc", "1" ); @@ -579,7 +700,11 @@ extern __inline__ int tsch(int irq, volatile irb_t *addr) int ccode; __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else "LR 1,%1\n\t" +#endif "TSCH 0(%2)\n\t" "IPM %0\n\t" "SRL %0,28\n\t" @@ -606,7 +731,11 @@ extern __inline__ int ssch(int irq, volatile orb_t *addr) int ccode; __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else "LR 1,%1\n\t" +#endif "SSCH 0(%2)\n\t" "IPM %0\n\t" "SRL %0,28\n\t" @@ -620,7 +749,11 @@ extern __inline__ int rsch(int irq) int ccode; __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else "LR 1,%1\n\t" +#endif "RSCH\n\t" "IPM %0\n\t" "SRL %0,28\n\t" @@ -634,7 +767,11 @@ extern __inline__ int csch(int irq) int ccode; __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else "LR 1,%1\n\t" +#endif "CSCH\n\t" "IPM %0\n\t" "SRL %0,28\n\t" @@ -648,7 +785,11 @@ extern __inline__ int hsch(int irq) int ccode; __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else "LR 1,%1\n\t" +#endif "HSCH\n\t" "IPM %0\n\t" "SRL %0,28\n\t" @@ -669,6 +810,24 @@ extern __inline__ int iac( void) return ccode; } +extern __inline__ int rchp(int chpid) +{ + int ccode; + + __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else + "LR 1,%1\n\t" +#endif + "RCHP\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "r" (chpid) + : "cc", "1" ); + return ccode; +} + typedef struct { __u16 vrdcdvno : 16; /* device number (input) */ __u16 vrdclen : 16; /* data block length (input) */ @@ -690,12 +849,18 @@ extern __inline__ int diag210( diag210_t * addr) int ccode; __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "SAM31\n\t" + "DIAG %1,0,0x210\n\t" + "SAM64\n\t" +#else "LR 1,%1\n\t" ".long 0x83110210\n\t" +#endif "IPM %0\n\t" "SRL %0,28\n\t" : "=d" (ccode) : "a" (addr) - : "cc", "1" ); + : "cc" ); return ccode; } @@ -720,9 +885,15 @@ extern spinlock_t irq_controller_lock; static inline void irq_enter(int cpu, unsigned int irq) { hardirq_enter(cpu); +#ifdef CONFIG_ARCH_S390X + while (atomic_read(&global_irq_lock) != 0) { + eieio(); + } +#else while (test_bit(0,&global_irq_lock)) { eieio(); } +#endif } static inline void irq_exit(int cpu, unsigned int irq) @@ -754,10 +925,13 @@ static inline void irq_exit(int cpu, unsigned int irq) * x86 profiling function, SMP safe. We might want to do this in * assembly totally? */ +extern char _stext; static inline void s390_do_profile (unsigned long addr) { -#if 0 if (prof_buffer && current->pid) { +#ifndef CONFIG_ARCH_S390X + addr &= 0x7fffffff; +#endif addr -= (unsigned long) &_stext; addr >>= prof_shift; /* @@ -769,7 +943,6 @@ static inline void s390_do_profile (unsigned long addr) addr = prof_len-1; atomic_inc((atomic_t *)&prof_buffer[addr]); } -#endif } #include <asm/s390io.h> @@ -784,5 +957,6 @@ static inline void s390_do_profile (unsigned long addr) spin_lock_irqsave(&(ioinfo[irq]->irq_lock), flags) #define s390irq_spin_unlock_irqrestore(irq,flags) \ spin_unlock_irqrestore(&(ioinfo[irq]->irq_lock), flags) +#endif /* __KERNEL__ */ #endif diff --git a/include/asm-s390/irqextras390.h b/include/asm-s390/irqextras390.h index 0ca2f718a..70bac7f44 100644 --- a/include/asm-s390/irqextras390.h +++ b/include/asm-s390/irqextras390.h @@ -100,7 +100,7 @@ typedef struct __u16 count; - void *ccw_data_address; + __u32 ccw_data_address; } ccw1_bits_t __attribute__((packed,aligned(8))); typedef struct diff --git a/include/asm-s390/lowcore.h b/include/asm-s390/lowcore.h index 3430056da..cdfa00fa2 100644 --- a/include/asm-s390/lowcore.h +++ b/include/asm-s390/lowcore.h @@ -31,10 +31,11 @@ #define __LC_SUBCHANNEL_ID 0x0B8 #define __LC_SUBCHANNEL_NR 0x0BA #define __LC_IO_INT_PARM 0x0BC +#define __LC_IO_INT_WORD 0x0C0 #define __LC_MCCK_CODE 0x0E8 -#define __LC_AREGS_SAVE_AREA 0x200 -#define __LC_CREGS_SAVE_AREA 0x240 -#define __LC_RETURN_PSW 0x280 +#define __LC_AREGS_SAVE_AREA 0x120 +#define __LC_CREGS_SAVE_AREA 0x1C0 +#define __LC_RETURN_PSW 0x200 #define __LC_SYNC_IO_WORD 0x400 @@ -45,7 +46,7 @@ #define __LC_CPUID 0xC60 #define __LC_CPUADDR 0xC68 #define __LC_IPLDEV 0xC7C - +#define __LC_PANIC_MAGIC 0xE00 /* interrupt handler start with all io, external and mcck interrupt disabled */ @@ -53,7 +54,7 @@ #define _EXT_PSW_MASK 0x04080000 #define _PGM_PSW_MASK 0x04080000 #define _SVC_PSW_MASK 0x04080000 -#define _MCCK_PSW_MASK 0x040A0000 +#define _MCCK_PSW_MASK 0x04080000 #define _IO_PSW_MASK 0x04080000 #define _USER_PSW_MASK 0x070DC000/* DAT, IO, EXT, Home-space */ #define _WAIT_PSW_MASK 0x070E0000/* DAT, IO, EXT, Wait, Home-space */ @@ -119,7 +120,8 @@ struct _lowcore __u16 subchannel_id; /* 0x0b8 */ __u16 subchannel_nr; /* 0x0ba */ __u32 io_int_parm; /* 0x0bc */ - __u8 pad3[0xD8-0xC0]; /* 0x0c0 */ + __u32 io_int_word; /* 0x0c0 */ + __u8 pad3[0xD8-0xC4]; /* 0x0c4 */ __u32 cpu_timer_save_area[2]; /* 0x0d8 */ __u32 clock_comp_save_area[2]; /* 0x0e0 */ __u32 mcck_interuption_code[2]; /* 0x0e8 */ @@ -128,15 +130,14 @@ struct _lowcore __u32 failing_storage_address; /* 0x0f8 */ __u8 pad5[0x100-0xfc]; /* 0x0fc */ __u32 st_status_fixed_logout[4];/* 0x100 */ - __u8 pad6[0x160-0x110]; /* 0x110 */ + __u8 pad6[0x120-0x110]; /* 0x110 */ + __u32 access_regs_save_area[16];/* 0x120 */ __u32 floating_pt_save_area[8]; /* 0x160 */ __u32 gpregs_save_area[16]; /* 0x180 */ - __u8 pad7[0x200-0x1c0]; /* 0x1c0 */ - - __u32 access_regs_save_area[16];/* 0x200 */ __u32 cregs_save_area[16]; /* 0x240 */ - psw_t return_psw; /* 0x280 */ - __u8 pad8[0x400-0x288]; /* 0x288 */ + + psw_t return_psw; /* 0x200 */ + __u8 pad8[0x400-0x208]; /* 0x208 */ __u32 sync_io_word; /* 0x400 */ @@ -163,9 +164,14 @@ struct _lowcore atomic_t ext_call_fast; /* 0xc88 */ atomic_t ext_call_queue; /* 0xc8c */ atomic_t ext_call_count; /* 0xc90 */ + __u8 pad11[0xe00-0xc94]; /* 0xc94 */ - /* Align SMP info to the top 1k of prefix area */ - __u8 pad11[0x1000-0xc94]; /* 0xc94 */ + /* 0xe00 is used as indicator for dump tools */ + /* whether the kernel died with panic() or not */ + __u32 panic_magic; /* 0xe00 */ + + /* Align to the top 1k of prefix area */ + __u8 pad12[0x1000-0xe04]; /* 0xe04 */ } __attribute__((packed)); /* End structure*/ extern __inline__ void set_prefix(__u32 address) @@ -186,5 +192,7 @@ extern struct _lowcore *lowcore_ptr[]; #endif #endif /* __ASSEMBLY__ */ +#define __PANIC_MAGIC 0xDEADC0DE + #endif diff --git a/include/asm-s390/mathemu.h b/include/asm-s390/mathemu.h index c78d97b43..429b3a4f4 100644 --- a/include/asm-s390/mathemu.h +++ b/include/asm-s390/mathemu.h @@ -12,12 +12,12 @@ extern int math_emu_b3(__u8 *, struct pt_regs *); extern int math_emu_ed(__u8 *, struct pt_regs *); -extern void math_emu_ldr(__u8 *); -extern void math_emu_ler(__u8 *); -extern void math_emu_std(__u8 *, struct pt_regs *); -extern void math_emu_ld(__u8 *, struct pt_regs *); -extern void math_emu_ste(__u8 *, struct pt_regs *); -extern void math_emu_le(__u8 *, struct pt_regs *); +extern int math_emu_ldr(__u8 *); +extern int math_emu_ler(__u8 *); +extern int math_emu_std(__u8 *, struct pt_regs *); +extern int math_emu_ld(__u8 *, struct pt_regs *); +extern int math_emu_ste(__u8 *, struct pt_regs *); +extern int math_emu_le(__u8 *, struct pt_regs *); extern int math_emu_lfpc(__u8 *, struct pt_regs *); extern int math_emu_stfpc(__u8 *, struct pt_regs *); extern int math_emu_srnm(__u8 *, struct pt_regs *); @@ -46,3 +46,6 @@ extern __u64 __extendsfdf2(__u32); #endif /* __MATHEMU__ */ + + + diff --git a/include/asm-s390/misc390.h b/include/asm-s390/misc390.h index 43d89ccfb..3a48a7385 100644 --- a/include/asm-s390/misc390.h +++ b/include/asm-s390/misc390.h @@ -12,3 +12,4 @@ #define allocaligned(type,name,number) allocaligned2(type,name,number,__alignof__(type)) +extern void s390_daemonize(char *name,unsigned long mask,int use_init_fs); diff --git a/include/asm-s390/mmu_context.h b/include/asm-s390/mmu_context.h index 71f0f66df..d58b14cbb 100644 --- a/include/asm-s390/mmu_context.h +++ b/include/asm-s390/mmu_context.h @@ -27,7 +27,8 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, unsigned long pgd; if (prev != next) { - pgd = (__pa(next->pgd) & PAGE_MASK) | _SEGMENT_TABLE; + pgd = (__pa(next->pgd)&PAGE_MASK) | + (_SEGMENT_TABLE|USER_STD_MASK); /* Load page tables */ asm volatile(" lctl 7,7,%0\n" /* secondary space */ " lctl 13,13,%0\n" /* home space */ diff --git a/include/asm-s390/namei.h b/include/asm-s390/namei.h index 524b93937..3e286bdde 100644 --- a/include/asm-s390/namei.h +++ b/include/asm-s390/namei.h @@ -16,7 +16,6 @@ * Look at asm-sparc/namei.h for details. */ -#define __prefix_lookup_dentry(name, lookup_flags) \ - do {} while (0) +#define __emul_prefix() NULL #endif /* __S390_NAMEI_H */ diff --git a/include/asm-s390/page.h b/include/asm-s390/page.h index e259b2bff..745db14f6 100644 --- a/include/asm-s390/page.h +++ b/include/asm-s390/page.h @@ -17,7 +17,15 @@ #ifdef __KERNEL__ #ifndef __ASSEMBLY__ -#define STRICT_MM_TYPECHECKS +/* + * gcc uses builtin, i.e. MVCLE for both operations + */ + +#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) +#define copy_page(to,from) memcpy((void *)(to), (void *)(from), PAGE_SIZE) + +#define clear_user_page(page, vaddr) clear_page(page) +#define copy_user_page(to, from, vaddr) copy_page(to, from) #define BUG() do { \ printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \ @@ -43,14 +51,6 @@ extern __inline__ int get_order(unsigned long size) } /* - * gcc uses builtin, i.e. MVCLE for both operations - */ - -#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) -#define copy_page(to,from) memcpy((void *)(to), (void *)(from), PAGE_SIZE) - -#ifdef STRICT_MM_TYPECHECKS -/* * These are used to make use of C type-checking.. */ typedef struct { unsigned long pte; } pte_t; @@ -73,48 +73,18 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define __pgd(x) ((pgd_t) { (x) } ) #define __pgprot(x) ((pgprot_t) { (x) } ) -#else -/* - * .. while these make it easier on the compiler - */ -typedef unsigned long pte_t; -typedef unsigned long pmd_t; -typedef struct { - unsigned long pgd0; - unsigned long pgd1; - unsigned long pgd2; - unsigned long pgd3; - } pgd_t; -typedef unsigned long pgprot_t; - -#define pte_val(x) (x) -#define pmd_val(x) (x) -#define pgd_val(x) (x) -#define pgprot_val(x) (x) - -#define __pte(x) (x) -#define __pmd(x) (x) -#define __pgd(x) (x) -#define __pgprot(x) (x) - -#endif -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLY__ */ /* to align the pointer to the (next) page boundary */ #define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) -/* - * - * - */ - -#define __PAGE_OFFSET (0x0) -#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET) -#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) -#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) +#define __PAGE_OFFSET 0x0UL +#define PAGE_OFFSET 0x0UL +#define __pa(x) (unsigned long)(x) +#define __va(x) (void *)(x) #define virt_to_page(kaddr) (mem_map + (__pa(kaddr) >> PAGE_SHIFT)) #define VALID_PAGE(page) ((page - mem_map) < max_mapnr) -#endif /* __KERNEL__ */ +#endif /* __KERNEL__ */ -#endif /* _S390_PAGE_H */ +#endif /* _S390_PAGE_H */ diff --git a/include/asm-s390/param.h b/include/asm-s390/param.h index bd04cebde..c6d7f934f 100644 --- a/include/asm-s390/param.h +++ b/include/asm-s390/param.h @@ -28,4 +28,8 @@ #define MAXHOSTNAMELEN 64 /* max length of hostname */ +#ifdef __KERNEL__ +# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */ +#endif + #endif diff --git a/include/asm-s390/pgalloc.h b/include/asm-s390/pgalloc.h index c1fed9346..72c67617e 100644 --- a/include/asm-s390/pgalloc.h +++ b/include/asm-s390/pgalloc.h @@ -31,7 +31,7 @@ extern __inline__ pgd_t* get_pgd_slow(void) { int i; - pgd_t *pgd,*ret = (pgd_t *)__get_free_pages(GFP_KERNEL,2); + pgd_t *pgd,*ret = (pgd_t *)__get_free_pages(GFP_KERNEL,1); if (ret) for (i=0,pgd=ret;i<USER_PTRS_PER_PGD;i++,pgd++) pmd_clear(pmd_offset(pgd,i*PGDIR_SIZE)); @@ -40,47 +40,80 @@ extern __inline__ pgd_t* get_pgd_slow(void) extern __inline__ pgd_t* get_pgd_fast(void) { - unsigned long *ret; + unsigned long *ret = pgd_quicklist; - if((ret = pgd_quicklist) != NULL) { + if (ret != NULL) { pgd_quicklist = (unsigned long *)(*ret); ret[0] = ret[1]; - pgtable_cache_size--; - /* - * Need to flush tlb, since private page tables - * are unique thru address of pgd and virtual address. - * If we reuse pgd we need to be sure no tlb entry - * with that pdg is left -> global flush - * - * Fixme: To avoid this global flush we should - * use pdg_quicklist as fix lenght fifo list - * and not as stack - */ - } else - ret = (unsigned long *)get_pgd_slow(); + pgtable_cache_size -= 2; + } return (pgd_t *)ret; } +extern __inline__ pgd_t *pgd_alloc(void) +{ + pgd_t *pgd; + + pgd = get_pgd_fast(); + if (!pgd) + pgd = get_pgd_slow(); + return pgd; +} + extern __inline__ void free_pgd_fast(pgd_t *pgd) { *(unsigned long *)pgd = (unsigned long) pgd_quicklist; pgd_quicklist = (unsigned long *) pgd; - pgtable_cache_size++; + pgtable_cache_size += 2; } extern __inline__ void free_pgd_slow(pgd_t *pgd) { - free_pages((unsigned long)pgd,2); + free_pages((unsigned long) pgd, 1); +} + +#define pgd_free(pgd) free_pgd_fast(pgd) + +/* + * page middle directory allocation/free routines. + * We don't use pmd cache, so these are dummy routines. + */ +extern __inline__ pmd_t *get_pmd_fast(void) +{ + return (pmd_t *)0; +} + +extern __inline__ void free_pmd_fast(pmd_t *pmd) +{ +} + +extern inline pmd_t * pmd_alloc(pgd_t * pgd, unsigned long address) +{ + return (pmd_t *) pgd; +} + +extern __inline__ void free_pmd_slow(pmd_t *pmd) +{ +} + +extern inline void pmd_free(pmd_t * pmd) +{ } +#define pmd_free_kernel pmd_free +#define pmd_alloc_kernel pmd_alloc + +/* + * page table entry allocation/free routines. + */ +extern pte_t empty_bad_pte_table[]; extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted); -extern pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long address_preadjusted); extern __inline__ pte_t* get_pte_fast(void) { - unsigned long *ret; + unsigned long *ret = (unsigned long *) pte_quicklist; - if((ret = (unsigned long *)pte_quicklist) != NULL) { + if (ret != NULL) { pte_quicklist = (unsigned long *)(*ret); ret[0] = ret[1]; pgtable_cache_size--; @@ -90,6 +123,8 @@ extern __inline__ pte_t* get_pte_fast(void) extern __inline__ void free_pte_fast(pte_t *pte) { + if (pte == empty_bad_pte_table) + return; *(unsigned long *)pte = (unsigned long) pte_quicklist; pte_quicklist = (unsigned long *) pte; pgtable_cache_size++; @@ -97,79 +132,41 @@ extern __inline__ void free_pte_fast(pte_t *pte) extern __inline__ void free_pte_slow(pte_t *pte) { - free_page((unsigned long)pte); -} - -#define pte_free_kernel(pte) free_pte_fast(pte) -#define pte_free(pte) free_pte_fast(pte) -#define pgd_free(pgd) free_pgd_fast(pgd) -#define pgd_alloc() get_pgd_fast() - -extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address) -{ - address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); - if (pmd_none(*pmd)) { - pte_t * page = (pte_t *) get_pte_fast(); - - if (!page) - return get_pte_kernel_slow(pmd, address); - pmd_val(pmd[0]) = _KERNPG_TABLE + __pa(page); - pmd_val(pmd[1]) = _KERNPG_TABLE + __pa(page+1024); - pmd_val(pmd[2]) = _KERNPG_TABLE + __pa(page+2048); - pmd_val(pmd[3]) = _KERNPG_TABLE + __pa(page+3072); - return page + address; - } - if (pmd_bad(*pmd)) { - __handle_bad_pmd_kernel(pmd); - return NULL; - } - return (pte_t *) pmd_page(*pmd) + address; + free_page((unsigned long) pte); } -extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address) +extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long vmaddr) { - address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); + unsigned long offset; - if (pmd_none(*pmd)) - goto getnew; + offset = (vmaddr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); + if (pmd_none(*pmd)) { + unsigned long page = (unsigned long) get_pte_fast(); + + if (!page) + return get_pte_slow(pmd, offset); + pmd_val(pmd[0]) = _PAGE_TABLE + __pa(page); + pmd_val(pmd[1]) = _PAGE_TABLE + __pa(page+1024); + pmd_val(pmd[2]) = _PAGE_TABLE + __pa(page+2048); + pmd_val(pmd[3]) = _PAGE_TABLE + __pa(page+3072); + return (pte_t *) page + offset; + } if (pmd_bad(*pmd)) - goto fix; - return (pte_t *) pmd_page(*pmd) + address; -getnew: -{ - unsigned long page = (unsigned long) get_pte_fast(); - - if (!page) - return get_pte_slow(pmd, address); - pmd_val(pmd[0]) = _PAGE_TABLE + __pa(page); - pmd_val(pmd[1]) = _PAGE_TABLE + __pa(page+1024); - pmd_val(pmd[2]) = _PAGE_TABLE + __pa(page+2048); - pmd_val(pmd[3]) = _PAGE_TABLE + __pa(page+3072); - return (pte_t *) page + address; -} -fix: - __handle_bad_pmd(pmd); - return NULL; -} - -/* - * allocating and freeing a pmd is trivial: the 1-entry pmd is - * inside the pgd, so has no extra memory associated with it. - */ -extern inline void pmd_free(pmd_t * pmd) -{ + BUG(); + return (pte_t *) pmd_page(*pmd) + offset; } -extern inline pmd_t * pmd_alloc(pgd_t * pgd, unsigned long address) -{ - return (pmd_t *) pgd; -} - -#define pmd_free_kernel pmd_free -#define pmd_alloc_kernel pmd_alloc +#define pte_alloc_kernel(pmd, addr) pte_alloc(pmd, addr) +#define pte_free_kernel(pte) free_pte_fast(pte) +#define pte_free(pte) free_pte_fast(pte) extern int do_check_pgt_cache(int, int); +/* + * This establishes kernel virtual mappings (e.g., as a result of a + * vmalloc call). Since s390-esame uses a separate kernel page table, + * there is nothing to do here... :) + */ #define set_pgdir(addr,entry) do { } while(0) /* @@ -185,161 +182,122 @@ extern int do_check_pgt_cache(int, int); */ /* - * s390 has two ways of flushing TLBs + * S/390 has three ways of flushing TLBs * 'ptlb' does a flush of the local processor - * 'ipte' invalidates a pte in a page table and flushes that out of - * the TLBs of all PUs of a SMP + * 'csp' flushes the TLBs on all PUs of a SMP + * 'ipte' invalidates a pte in a page table and flushes that out of + * the TLBs of all PUs of a SMP */ -#define __flush_tlb() \ +#define local_flush_tlb() \ do { __asm__ __volatile__("ptlb": : :"memory"); } while (0) -static inline void __flush_global_tlb(void) -{ - int cs1=0,dum=0; - int *adr; - long long dummy=0; - adr = (int*) (((int)(((int*) &dummy)+1) & 0xfffffffc)|1); - __asm__ __volatile__("lr 2,%0\n\t" - "lr 3,%1\n\t" - "lr 4,%2\n\t" - ".long 0xb2500024" : - : "d" (cs1), "d" (dum), "d" (adr) - : "2", "3", "4"); -} - -#if 0 -#define flush_tlb_one(a,b) __flush_tlb() -#define __flush_tlb_one(a,b) __flush_tlb() -#else -static inline void __flush_tlb_one(struct mm_struct *mm, - unsigned long addr) -{ - pgd_t * pgdir; - pmd_t * pmd; - pte_t * pte, *pto; - - pgdir = pgd_offset(mm, addr); - if (pgd_none(*pgdir) || pgd_bad(*pgdir)) - return; - pmd = pmd_offset(pgdir, addr); - if (pmd_none(*pmd) || pmd_bad(*pmd)) - return; - pte = pte_offset(pmd,addr); - - /* - * S390 has 1mb segments, we are emulating 4MB segments - */ - - pto = (pte_t*) (((unsigned long) pte) & 0x7ffffc00); - - __asm__ __volatile(" ic 0,2(%0)\n" - " ipte %1,%2\n" - " stc 0,2(%0)" - : : "a" (pte), "a" (pto), "a" (addr): "0"); -} -#endif - - #ifndef CONFIG_SMP -#define flush_tlb() __flush_tlb() -#define flush_tlb_all() __flush_tlb() -#define local_flush_tlb() __flush_tlb() - /* * We always need to flush, since s390 does not flush tlb * on each context switch */ +#define flush_tlb() local_flush_tlb() +#define flush_tlb_all() local_flush_tlb() +#define flush_tlb_mm(mm) local_flush_tlb() +#define flush_tlb_page(vma, va) local_flush_tlb() +#define flush_tlb_range(mm, start, end) local_flush_tlb() -static inline void flush_tlb_mm(struct mm_struct *mm) -{ - __flush_tlb(); -} +#else + +#include <asm/smp.h> -static inline void flush_tlb_page(struct vm_area_struct *vma, - unsigned long addr) +extern void smp_ptlb_all(void); +static inline void global_flush_tlb_csp(void) { - __flush_tlb_one(vma->vm_mm,addr); + int cs1=0,dum=0; + int *adr; + long long dummy=0; + adr = (int*) (((int)(((int*) &dummy)+1) & 0xfffffffc)|1); + __asm__ __volatile__("lr 2,%0\n\t" + "lr 3,%1\n\t" + "lr 4,%2\n\t" + "csp 2,4" : + : "d" (cs1), "d" (dum), "d" (adr) + : "2", "3", "4"); } - -static inline void flush_tlb_range(struct mm_struct *mm, - unsigned long start, unsigned long end) +static inline void global_flush_tlb(void) { - __flush_tlb(); + if (MACHINE_HAS_CSP) + global_flush_tlb_csp(); + else + smp_ptlb_all(); } -#else - -/* - * We aren't very clever about this yet - SMP could certainly - * avoid some global flushes.. - */ - -#include <asm/smp.h> - -#define local_flush_tlb() \ - __flush_tlb() - /* - * We only have to do global flush of tlb if process run since last - * flush on any other pu than current. - * If we have threads (mm->count > 1) we always do a global flush, - * since the process runs on more than one processor at the same time. + * We only have to do global flush of tlb if process run since last + * flush on any other pu than current. + * If we have threads (mm->count > 1) we always do a global flush, + * since the process runs on more than one processor at the same time. */ -static inline void flush_tlb_current_task(void) +static inline void __flush_tlb_mm(struct mm_struct * mm) { - if ((atomic_read(¤t->mm->mm_count) != 1) || - (current->mm->cpu_vm_mask != (1UL << smp_processor_id()))) { - current->mm->cpu_vm_mask = (1UL << smp_processor_id()); - __flush_global_tlb(); + if ((smp_num_cpus > 1) && + ((atomic_read(&mm->mm_count) != 1) || + (mm->cpu_vm_mask != (1UL << smp_processor_id())))) { + mm->cpu_vm_mask = (1UL << smp_processor_id()); + global_flush_tlb(); } else { local_flush_tlb(); } } -#define flush_tlb() flush_tlb_current_task() +#define flush_tlb() __flush_tlb_mm(current->mm) +#define flush_tlb_all() global_flush_tlb() +#define flush_tlb_mm(mm) __flush_tlb_mm(mm) +#define flush_tlb_page(vma, va) __flush_tlb_mm((vma)->vm_mm) +#define flush_tlb_range(mm, start, end) __flush_tlb_mm(mm) -#define flush_tlb_all() __flush_global_tlb() +#endif -static inline void flush_tlb_mm(struct mm_struct * mm) +extern inline void flush_tlb_pgtables(struct mm_struct *mm, + unsigned long start, unsigned long end) { - if ((atomic_read(&mm->mm_count) != 1) || - (mm->cpu_vm_mask != (1UL << smp_processor_id()))) { - mm->cpu_vm_mask = (1UL << smp_processor_id()); - __flush_global_tlb(); - } else { - local_flush_tlb(); - } + /* S/390 does not keep any page table caches in TLB */ } -static inline void flush_tlb_page(struct vm_area_struct * vma, - unsigned long va) + +static inline int ptep_test_and_clear_and_flush_young(struct vm_area_struct *vma, + unsigned long address, pte_t *ptep) { - __flush_tlb_one(vma->vm_mm,va); + /* No need to flush TLB; bits are in storage key */ + return ptep_test_and_clear_young(ptep); } -static inline void flush_tlb_range(struct mm_struct * mm, - unsigned long start, unsigned long end) +static inline int ptep_test_and_clear_and_flush_dirty(struct vm_area_struct *vma, + unsigned long address, pte_t *ptep) { - if ((atomic_read(&mm->mm_count) != 1) || - (mm->cpu_vm_mask != (1UL << smp_processor_id()))) { - mm->cpu_vm_mask = (1UL << smp_processor_id()); - __flush_global_tlb(); - } else { - local_flush_tlb(); - } + /* No need to flush TLB; bits are in storage key */ + return ptep_test_and_clear_dirty(ptep); } -#endif +static inline pte_t ptep_invalidate(struct vm_area_struct *vma, + unsigned long address, pte_t *ptep) +{ + pte_t pte = *ptep; + if (!(pte_val(pte) & _PAGE_INVALID)) { + /* S390 has 1mb segments, we are emulating 4MB segments */ + pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00); + __asm__ __volatile__ ("ipte %0,%1" : : "a" (pto), "a" (address)); + } + pte_clear(ptep); + return pte; +} -extern inline void flush_tlb_pgtables(struct mm_struct *mm, - unsigned long start, unsigned long end) +static inline void ptep_establish(struct vm_area_struct *vma, + unsigned long address, pte_t *ptep, pte_t entry) { - /* S/390 does not keep any page table caches in TLB */ + ptep_invalidate(vma, address, ptep); + set_pte(ptep, entry); } #endif /* _S390_PGALLOC_H */ diff --git a/include/asm-s390/pgtable.h b/include/asm-s390/pgtable.h index 6906a875a..3c83ec404 100644 --- a/include/asm-s390/pgtable.h +++ b/include/asm-s390/pgtable.h @@ -3,7 +3,9 @@ * * S390 version * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Hartmut Penner + * Author(s): Hartmut Penner (hp@de.ibm.com) + * Ulrich Weigand (weigand@de.ibm.com) + * Martin Schwidefsky (schwidefsky@de.ibm.com) * * Derived from "include/asm-i386/pgtable.h" */ @@ -17,14 +19,19 @@ * table, so that we physically have the same two-level page table as the * S390 mmu expects. * + * The "pgd_xxx()" functions are trivial for a folded two-level + * setup: the pgd is never bad, and a pmd always exists (as it's folded + * into the pgd entry) + * * This file contains the functions and defines necessary to modify and use * the S390 page table tree. */ #ifndef __ASSEMBLY__ #include <asm/processor.h> -#include <linux/tasks.h> +#include <linux/threads.h> extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096))); +extern void paging_init(void); /* Caches aren't brain-dead on S390. */ #define flush_cache_all() do { } while (0) @@ -37,20 +44,30 @@ extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096))); #define flush_icache_page(vma,pg) do { } while (0) /* + * The S390 doesn't have any external MMU info: the kernel page + * tables contain all the necessary information. + */ +#define update_mmu_cache(vma, address, pte) do { } while (0) + +/* * ZERO_PAGE is a global shared page that is always zero: used * for zero-mapped memory areas etc.. */ -extern unsigned long empty_zero_page[1024]; +extern char empty_zero_page[PAGE_SIZE]; #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) #endif /* !__ASSEMBLY__ */ -/* Certain architectures need to do special things when PTEs +/* + * Certain architectures need to do special things when PTEs * within a page table are directly modified. Thus, the following * hook is made available. */ #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval)) -/* PMD_SHIFT determines the size of the area a second-level page table can map */ +/* + * PMD_SHIFT determines the size of the area a second-level page + * table can map + */ #define PMD_SHIFT 22 #define PMD_SIZE (1UL << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE-1)) @@ -70,7 +87,6 @@ extern unsigned long empty_zero_page[1024]; #define PTRS_PER_PMD 1 #define PTRS_PER_PGD 512 - /* * pgd entries used up by user/kernel: */ @@ -87,7 +103,8 @@ extern unsigned long empty_zero_page[1024]; printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) #ifndef __ASSEMBLY__ -/* Just any arbitrary offset to the start of the vmalloc VM area: the +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the * current 8MB value just means that there will be a 8MB "hole" after the * physical memory until the kernel virtual memory starts. That means that * any out-of-bounds memory accesses will hopefully be caught. @@ -95,14 +112,14 @@ extern unsigned long empty_zero_page[1024]; * area for the same reason. ;) */ #define VMALLOC_OFFSET (8*1024*1024) -#define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) \ + & ~(VMALLOC_OFFSET-1)) #define VMALLOC_VMADDR(x) ((unsigned long)(x)) #define VMALLOC_END (0x7fffffffL) /* * A pagetable entry of S390 has following format: - * * | PFRA | | OS | * 0 0IP0 * 00000000001111111111222222222233 @@ -110,11 +127,8 @@ extern unsigned long empty_zero_page[1024]; * * I Page-Invalid Bit: Page is not available for address-translation * P Page-Protection Bit: Store access not possible for page - */ - -/* - * A segmenttable entry of S390 has following format: * + * A segmenttable entry of S390 has following format: * | P-table origin | |PTL * 0 IC * 00000000001111111111222222222233 @@ -122,10 +136,8 @@ extern unsigned long empty_zero_page[1024]; * * I Segment-Invalid Bit: Segment is not available for address-translation * C Common-Segment Bit: Segment is not private (PoP 3-30) - * PTL Page-Table-Length: Length of Page-table (PTL+1*16 entries -> up to 256 entries) - */ - -/* + * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256) + * * The segmenttable origin of S390 has following format: * * |S-table origin | | STL | @@ -137,27 +149,38 @@ extern unsigned long empty_zero_page[1024]; * G Segment-Invalid Bit: * * P Private-Space Bit: Segment is not private (PoP 3-30) * S Storage-Alteration: - * STL Segment-Table-Length: Length of Page-table (STL+1*16 entries -> up to 2048 entries) + * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048) + * + * A storage key has the following format: + * | ACC |F|R|C|0| + * 0 3 4 5 6 7 + * ACC: access key + * F : fetch protection bit + * R : referenced bit + * C : changed bit */ +/* Bits in the page table entry */ #define _PAGE_PRESENT 0x001 /* Software */ -#define _PAGE_ACCESSED 0x002 /* Software accessed */ -#define _PAGE_DIRTY 0x004 /* Software dirty */ #define _PAGE_RO 0x200 /* HW read-only */ #define _PAGE_INVALID 0x400 /* HW invalid */ +/* Bits in the segment table entry */ #define _PAGE_TABLE_LEN 0xf /* only full page-tables */ #define _PAGE_TABLE_COM 0x10 /* common page-table */ #define _PAGE_TABLE_INV 0x20 /* invalid page-table */ #define _SEG_PRESENT 0x001 /* Software (overlap with PTL) */ +/* Bits int the storage key */ +#define _PAGE_CHANGED 0x02 /* HW changed bit */ +#define _PAGE_REFERENCED 0x04 /* HW referenced bit */ + #define _USER_SEG_TABLE_LEN 0x7f /* user-segment-table up to 2 GB */ #define _KERNEL_SEG_TABLE_LEN 0x7f /* kernel-segment-table up to 2 GB */ /* * User and Kernel pagetables are identical */ - #define _PAGE_TABLE (_PAGE_TABLE_LEN ) #define _KERNPG_TABLE (_PAGE_TABLE_LEN ) @@ -165,22 +188,25 @@ extern unsigned long empty_zero_page[1024]; * The Kernel segment-tables includes the User segment-table */ -#define _SEGMENT_TABLE (_USER_SEG_TABLE_LEN|0x80000000) +#define _SEGMENT_TABLE (_USER_SEG_TABLE_LEN|0x80000000|0x100) #define _KERNSEG_TABLE (_KERNEL_SEG_TABLE_LEN) + /* * No mapping available */ -#define PAGE_NONE __pgprot(_PAGE_INVALID ) - -#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED) -#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_RO) -#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_RO) -#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY) +#define PAGE_INVALID __pgprot(_PAGE_INVALID) +#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_INVALID) +#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_RO) +#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_RO) +#define PAGE_SHARED __pgprot(_PAGE_PRESENT) +#define PAGE_KERNEL __pgprot(_PAGE_PRESENT) /* - * The S390 can't do page protection for execute, and considers that the same are read. - * Also, write permissions imply read permissions. This is the closest we can get.. + * The S390 can't do page protection for execute, and considers that the + * same are read. Also, write permissions imply read permissions. This is + * the closest we can get.. */ + /*xwr*/ #define __P000 PAGE_NONE #define __P001 PAGE_READONLY #define __P010 PAGE_COPY @@ -200,152 +226,199 @@ extern unsigned long empty_zero_page[1024]; #define __S111 PAGE_SHARED /* - * Define this if things work differently on an i386 and an i486: - * it will (on an i486) warn about kernel memory accesses that are - * done without a 'verify_area(VERIFY_WRITE,..)' - * - * Kernel and User memory-access are done equal, so we don't need verify + * Permanent address of a page. */ -#undef TEST_VERIFY_AREA +#define page_address(page) ((page)->virtual) +#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) -/* page table for 0-4MB for everybody */ -extern unsigned long pg0[1024]; +/* + * pgd/pmd/pte query functions + */ +extern inline int pgd_present(pgd_t pgd) { return 1; } +extern inline int pgd_none(pgd_t pgd) { return 0; } +extern inline int pgd_bad(pgd_t pgd) { return 0; } -/* number of bits that fit into a memory pointer */ -#define BITS_PER_PTR (8*sizeof(unsigned long)) +extern inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; } +extern inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PAGE_TABLE_INV; } +extern inline int pmd_bad(pmd_t pmd) +{ + return (pmd_val(pmd) & (~PAGE_MASK & ~_PAGE_TABLE_INV)) != _PAGE_TABLE; +} -/* to align the pointer to a pointer address */ -#define PTR_MASK (~(sizeof(void*)-1)) +extern inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; } +extern inline int pte_none(pte_t pte) +{ + return ((pte_val(pte) & + (_PAGE_INVALID | _PAGE_RO | _PAGE_PRESENT)) == _PAGE_INVALID); +} -/* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */ -/* 64-bit machines, beware! SRB. */ -#define SIZEOF_PTR_LOG2 2 +#define pte_same(a,b) (pte_val(a) == pte_val(b)) -/* to find an entry in a page-table */ -#define PAGE_PTR(address) \ -((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK) +/* + * query functions pte_write/pte_dirty/pte_young only work if + * pte_present() is true. Undefined behaviour if not.. + */ +extern inline int pte_write(pte_t pte) +{ + return (pte_val(pte) & _PAGE_RO) == 0; +} +extern inline int pte_dirty(pte_t pte) +{ + int skey; + asm volatile ("iske %0,%1" : "=d" (skey) : "a" (pte_val(pte))); + return skey & _PAGE_CHANGED; +} -/* - * CR 7 (SPST) and cr 13 (HPST) are set to the user pgdir. - * Kernel is running in its own, disjunct address space, - * running in primary address space. - * Copy to/from user is done via access register mode with - * access registers set to 0 or 1. For that purpose we need - * set up CR 7 with the user pgd. - * - */ +extern inline int pte_young(pte_t pte) +{ + int skey; -#define SET_PAGE_DIR(tsk,pgdir) \ -do { \ - unsigned long __pgdir = (__pa(pgdir) & PAGE_MASK ) | _SEGMENT_TABLE; \ - (tsk)->thread.user_seg = __pgdir; \ - if ((tsk) == current) { \ - __asm__ __volatile__("lctl 7,7,%0": :"m" (__pgdir)); \ - __asm__ __volatile__("lctl 13,13,%0": :"m" (__pgdir)); \ - } \ -} while (0) - -/* - * CR 7 (SPST) and cr 13 (HPST) are set to the user pgdir. - * Kernel is running in its own, disjunct address space, - * running in primary address space. - * Copy to/from user is done via access register mode with - * access registers set to 0 or 1. For that purpose we need - * set up CR 7 with the user pgd. - * + asm volatile ("iske %0,%1" : "=d" (skey) : "a" (pte_val(pte))); + return skey & _PAGE_REFERENCED; +} + +/* + * pgd/pmd/pte modification functions */ +extern inline void pgd_clear(pgd_t * pgdp) { } -#define SET_PAGE_DIR(tsk,pgdir) \ -do { \ - unsigned long __pgdir = (__pa(pgdir) & PAGE_MASK ) | _SEGMENT_TABLE; \ - (tsk)->thread.user_seg = __pgdir; \ - if ((tsk) == current) { \ - __asm__ __volatile__("lctl 7,7,%0": :"m" (__pgdir)); \ - __asm__ __volatile__("lctl 13,13,%0": :"m" (__pgdir)); \ - } \ -} while (0) +extern inline void pmd_clear(pmd_t * pmdp) +{ + pmd_val(pmdp[0]) = _PAGE_TABLE_INV; + pmd_val(pmdp[1]) = _PAGE_TABLE_INV; + pmd_val(pmdp[2]) = _PAGE_TABLE_INV; + pmd_val(pmdp[3]) = _PAGE_TABLE_INV; +} +extern inline void pte_clear(pte_t *ptep) +{ + pte_val(*ptep) = _PAGE_INVALID; +} -extern inline int pte_none(pte_t pte) { return ((pte_val(pte) & (_PAGE_INVALID | _PAGE_RO)) == _PAGE_INVALID); } -extern inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; } -extern inline void pte_clear(pte_t *ptep) { pte_val(*ptep) = _PAGE_INVALID; } #define PTE_INIT(x) pte_clear(x) -extern inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PAGE_TABLE_INV; } -extern inline int pmd_bad(pmd_t pmd) { return (pmd_val(pmd) == 0); } -extern inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; } -extern inline void pmd_clear(pmd_t * pmdp) { - pmd_val(pmdp[0]) = _PAGE_TABLE_INV; - pmd_val(pmdp[1]) = _PAGE_TABLE_INV; - pmd_val(pmdp[2]) = _PAGE_TABLE_INV; - pmd_val(pmdp[3]) = _PAGE_TABLE_INV; - } - /* - * The "pgd_xxx()" functions here are trivial for a folded two-level - * setup: the pgd is never bad, and a pmd always exists (as it's folded - * into the pgd entry) + * The following pte modification functions only work if + * pte_present() is true. Undefined behaviour if not.. */ -extern inline int pgd_none(pgd_t pgd) { return 0; } -extern inline int pgd_bad(pgd_t pgd) { return 0; } -extern inline int pgd_present(pgd_t pgd) { return 1; } -extern inline void pgd_clear(pgd_t * pgdp) { } +extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) +{ + pte_val(pte) = (pte_val(pte) & PAGE_MASK) | pgprot_val(newprot); + return pte; +} +extern inline pte_t pte_wrprotect(pte_t pte) +{ + pte_val(pte) |= _PAGE_RO; + return pte; +} -/* - * The following only work if pte_present() is true. - * Undefined behaviour if not.. - */ -extern inline int pte_write(pte_t pte) { return !(pte_val(pte) & _PAGE_RO); } -extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } -extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } +extern inline pte_t pte_mkwrite(pte_t pte) +{ + pte_val(pte) &= ~_PAGE_RO; + return pte; +} + +extern inline pte_t pte_mkclean(pte_t pte) +{ + /* We can't clear the changed bit atomically. The iske/and/sske + * sequence has a race condition with the page referenced bit. + * At the moment pte_mkclean is always followed by a pte_mkold. + * So its safe to ignore the problem for now. Hope this will + * never change ... */ + asm volatile ("sske %0,%1" + : : "d" (0), "a" (pte_val(pte))); + return pte; +} + +extern inline pte_t pte_mkdirty(pte_t pte) +{ + /* We can't set the changed bit atomically either. For now we + * set (!) the page referenced bit. */ + asm volatile ("sske %0,%1" + : : "d" (_PAGE_CHANGED|_PAGE_REFERENCED), + "a" (pte_val(pte))); + return pte; +} + +extern inline pte_t pte_mkold(pte_t pte) +{ + asm volatile ("rrbe 0,%0" : : "a" (pte_val(pte))); + return pte; +} + +extern inline pte_t pte_mkyoung(pte_t pte) +{ + /* To set the referenced bit we read the first word from the real + * page with a special instruction: load using real address (lura). + * Isn't S/390 a nice architecture ?! */ + asm volatile ("lura 0,%0" : : "a" (pte_val(pte) & PAGE_MASK) : "0" ); + return pte; +} + +static inline int ptep_test_and_clear_young(pte_t *ptep) +{ + int ccode; -/* who needs that -extern inline int pte_read(pte_t pte) { return !(pte_val(pte) & _PAGE_INVALID); } -extern inline int pte_exec(pte_t pte) { return !(pte_val(pte) & _PAGE_INVALID); } -extern inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) |= _PAGE_INVALID; return pte; } -extern inline pte_t pte_exprotect(pte_t pte) { pte_val(pte) |= _PAGE_INVALID; return pte; } -extern inline pte_t pte_mkread(pte_t pte) { pte_val(pte) &= _PAGE_INVALID; return pte; } -extern inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) &= _PAGE_INVALID; return pte; } -*/ + asm volatile ("rrbe 0,%1\n\t" + "ipm %0\n\t" + "srl %0,28\n\t" : "=d" (ccode) : "a" (pte_val(*ptep))); + return ccode & 2; +} -extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) |= _PAGE_RO; return pte; } -extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) &= ~_PAGE_RO ; return pte; } +static inline int ptep_test_and_clear_dirty(pte_t *ptep) +{ + int skey; + + asm volatile ("iske %0,%1" : "=d" (skey) : "a" (*ptep)); + if ((skey & _PAGE_CHANGED) == 0) + return 0; + /* We can't clear the changed bit atomically. For now we + * clear (!) the page referenced bit. */ + asm volatile ("sske %0,%1" + : : "d" (0), "a" (*ptep)); + return 1; +} -extern inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; } -extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; } +static inline pte_t ptep_get_and_clear(pte_t *ptep) +{ + pte_t pte = *ptep; + pte_clear(ptep); + return pte; +} -extern inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; } -extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; } +static inline void ptep_set_wrprotect(pte_t *ptep) +{ + pte_t old_pte = *ptep; + set_pte(ptep, pte_wrprotect(old_pte)); +} +static inline void ptep_mkdirty(pte_t *ptep) +{ + pte_mkdirty(*ptep); +} /* * Conversion functions: convert a page and protection to a page entry, * and a page entry and page directory to the page they refer to. */ -#define mk_pte(page, pgprot) \ -({ pte_t __pte; pte_val(__pte) = __pa(((page)-mem_map)<<PAGE_SHIFT) + pgprot_val(pgprot); __pte; }) - -/* This takes a physical page address that is used by the remapping functions */ -#define mk_pte_phys(physpage, pgprot) \ -({ pte_t __pte; pte_val(__pte) = physpage + pgprot_val(pgprot); __pte; }) - -extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ pte_val(pte) = (pte_val(pte) & PAGE_MASK) | pgprot_val(newprot); return pte; } +extern inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot) +{ + pte_t __pte; + pte_val(__pte) = physpage + pgprot_val(pgprot); + return __pte; +} +#define mk_pte(page,pgprot) mk_pte_phys(__pa(((page)-mem_map)<<PAGE_SHIFT),pgprot) -#define page_address(page) ((page)->virtual) -#define pte_page(x) (mem_map+(unsigned long)((pte_val(pte) >> PAGE_SHIFT))) +#define pte_page(x) (mem_map+(unsigned long)((pte_val(x) >> PAGE_SHIFT))) #define pmd_page(pmd) \ -((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) + ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) /* to find an entry in a page-table-directory */ #define pgd_index(address) ((address >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) - -#define __pgd_offset(address) pgd_index(address) - #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) /* to find an entry in a kernel page-table-directory */ @@ -359,53 +432,39 @@ extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address) /* Find an entry in the third-level page table.. */ #define pte_offset(pmd, address) \ -((pte_t *) (pmd_page(*pmd) + ((address>>10) & ((PTRS_PER_PTE-1)<<2)))) - - -/* We don't use pmd cache, so these are dummy routines */ -extern __inline__ pmd_t *get_pmd_fast(void) -{ - return (pmd_t *)0; -} - -extern __inline__ void free_pmd_fast(pmd_t *pmd) -{ -} - -extern __inline__ void free_pmd_slow(pmd_t *pmd) -{ -} - -extern void __handle_bad_pmd(pmd_t *pmd); -extern void __handle_bad_pmd_kernel(pmd_t *pmd); + ((pte_t *) (pmd_page(*pmd) + ((address>>10) & ((PTRS_PER_PTE-1)<<2)))) /* - * The S390 doesn't have any external MMU info: the kernel page - * tables contain all the necessary information. + * A page-table entry has some bits we have to treat in a special way. + * Bits 0, 20 and bit 23 have to be zero, otherwise an specification + * exception will occur instead of a page translation exception. The + * specifiation exception has the bad habit not to store necessary + * information in the lowcore. + * Bit 21 and bit 22 are the page invalid bit and the page protection + * bit. We set both to indicate a swapped page. + * Bit 31 is used as the software page present bit. If a page is + * swapped this obviously has to be zero. + * This leaves the bits 1-19 and bits 24-30 to store type and offset. + * We use the 7 bits from 24-30 for the type and the 19 bits from 1-19 + * for the offset. + * 0| offset |0110|type |0 + * 00000000001111111111222222222233 + * 01234567890123456789012345678901 */ -extern inline void update_mmu_cache(struct vm_area_struct * vma, - unsigned long address, pte_t pte) +extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset) { + pte_t pte; + pte_val(pte) = (type << 1) | (offset << 12) | _PAGE_INVALID | _PAGE_RO; + pte_val(pte) &= 0x7ffff6fe; /* better to be paranoid */ + return pte; } -/* - * a page-table entry has only 19 bit for offset and 7 bit for type - * if bits 0, 20 or 23 are set, a translation specification exceptions occures, and it's - * hard to find out the failing address - * therefor, we zero out this bits - */ - -#define SWP_TYPE(entry) (((entry).val >> 1) & 0x3f) -#define SWP_OFFSET(entry) (((entry).val >> 12) & 0x7FFFF ) -#define SWP_ENTRY(type,offset) ((swp_entry_t) { (((type) << 1) | \ - ((offset) << 12) | \ - _PAGE_INVALID | _PAGE_RO) \ - & 0x7ffff6fe }) - -#define pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define swp_entry_to_pte(x) ((pte_t) { (x).val }) +#define SWP_TYPE(entry) (((entry).val >> 1) & 0x3f) +#define SWP_OFFSET(entry) (((entry).val >> 12) & 0x7FFFF ) +#define SWP_ENTRY(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) }) -#include <asm-generic/pgtable.h> +#define pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) +#define swp_entry_to_pte(x) ((pte_t) { (x).val }) #endif /* !__ASSEMBLY__ */ diff --git a/include/asm-s390/processor.h b/include/asm-s390/processor.h index 4629c822b..63f7a2a72 100644 --- a/include/asm-s390/processor.h +++ b/include/asm-s390/processor.h @@ -41,7 +41,7 @@ struct cpuinfo_S390 cpuid_t cpu_id; __u16 cpu_addr; __u16 cpu_nr; - unsigned long loops_per_sec; + unsigned long loops_per_jiffy; unsigned long *pgd_quick; unsigned long *pte_quick; unsigned long pgtable_cache_sz; @@ -87,13 +87,15 @@ struct thread_struct /* perform syscall argument validation (get/set_fs) */ mm_segment_t fs; per_struct per_info;/* Must be aligned on an 4 byte boundary*/ + addr_t ieee_instruction_pointer; + /* Used to give failing instruction back to user for ieee exceptions */ }; typedef struct thread_struct thread_struct; #define INIT_MMAP \ { &init_mm, 0, 0, NULL, PAGE_SHARED, \ -VM_READ | VM_WRITE | VM_EXEC, 1, NULL, &init_mm.mmap } +VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } #define INIT_THREAD { (struct pt_regs *) 0, \ { 0,{{0},{0},{0},{0},{0},{0},{0},{0},{0},{0}, \ @@ -108,12 +110,8 @@ VM_READ | VM_WRITE | VM_EXEC, 1, NULL, &init_mm.mmap } /* need to define ... */ #define start_thread(regs, new_psw, new_stackp) do { \ - unsigned long *u_stack = new_stackp; \ regs->psw.mask = _USER_PSW_MASK; \ - regs->psw.addr = new_psw | 0x80000000 ; \ - get_user(regs->gprs[2],u_stack); \ - get_user(regs->gprs[3],u_stack+1); \ - get_user(regs->gprs[4],u_stack+2); \ + regs->psw.addr = new_psw | 0x80000000; \ regs->gprs[15] = new_stackp ; \ } while (0) @@ -172,13 +170,33 @@ unsigned long get_wchan(struct task_struct *p); static inline void disabled_wait(unsigned long code) { char psw_buffer[2*sizeof(psw_t)]; + char ctl_buf[4]; psw_t *dw_psw = (psw_t *)(((unsigned long) &psw_buffer+sizeof(psw_t)-1) & -sizeof(psw_t)); dw_psw->mask = 0x000a0000; dw_psw->addr = code; - /* load disabled wait psw, the processor is dead afterwards */ - asm volatile ("lpsw 0(%0)" : : "a" (dw_psw)); + /* + * Store status and then load disabled wait psw, + * the processor is dead afterwards + */ + + asm volatile (" stctl 0,0,0(%1)\n" + " ni 0(%1),0xef\n" /* switch off protection */ + " lctl 0,0,0(%1)\n" + " stpt 0xd8\n" /* store timer */ + " stckc 0xe0\n" /* store clock comparator */ + " stpx 0x108\n" /* store prefix register */ + " stam 0,15,0x120\n" /* store access registers */ + " std 0,0x160\n" /* store f0 */ + " std 2,0x168\n" /* store f2 */ + " std 4,0x170\n" /* store f4 */ + " std 6,0x178\n" /* store f6 */ + " stm 0,15,0x180\n" /* store general registers */ + " stctl 0,15,0x1c0\n" /* store control registers */ + " oi 0(%1),0x10\n" /* fake protection bit */ + " lpsw 0(%0)" + : : "a" (dw_psw), "a" (&ctl_buf)); } #endif /* __ASM_S390_PROCESSOR_H */ diff --git a/include/asm-s390/ptrace.h b/include/asm-s390/ptrace.h index 60a698662..bf076e9b8 100644 --- a/include/asm-s390/ptrace.h +++ b/include/asm-s390/ptrace.h @@ -63,8 +63,8 @@ typedef struct unsigned storage_alt_space_ctl:1; unsigned :5; unsigned :16; - __u32 starting_addr; - __u32 ending_addr; + addr_t starting_addr; + addr_t ending_addr; } per_cr_bits __attribute__((packed)); typedef struct @@ -83,13 +83,25 @@ typedef struct unsigned perc_store_real_address:1; unsigned :3; unsigned :1; - unsigned atmid:5; + unsigned atmid_validity_bit:1; + unsigned atmid_psw_bit_32:1; + unsigned atmid_psw_bit_5:1; + unsigned atmid_psw_bit_16:1; + unsigned atmid_psw_bit_17:1; unsigned si:2; - __u32 address; /* 0x098 */ + addr_t address; /* 0x098 */ unsigned :4; /* 0x0a1 */ unsigned access_id:4; } per_lowcore_bits __attribute__((packed)); +typedef enum +{ + primary_asce, + ar_asce, + secondary_asce, + home_space_asce +} per_ai_codes; + typedef struct { union @@ -134,6 +146,8 @@ struct user_regs_struct * this is the way intel does it */ per_struct per_info; + addr_t ieee_instruction_pointer; + /* Used to give failing instruction back to user for ieee exceptions */ }; typedef struct user_regs_struct user_regs_struct; @@ -143,12 +157,8 @@ typedef struct pt_regs pt_regs; #ifdef __KERNEL__ #define user_mode(regs) (((regs)->psw.mask & PSW_PROBLEM_STATE) != 0) #define instruction_pointer(regs) ((regs)->psw.addr) - -struct thread_struct; -extern int sprintf_regs(int line,char *buff,struct task_struct * task, - struct thread_struct *tss,struct pt_regs * regs); -extern void show_regs(struct task_struct * task,struct thread_struct *tss, - struct pt_regs * regs); +extern void show_regs(struct pt_regs * regs); +extern char *task_show_regs(struct task_struct *task, char *buffer); #endif @@ -270,8 +280,9 @@ enum PT_CR_9=pt_off(per_info.control_regs.words.cr[0]), PT_CR_10=pt_off(per_info.control_regs.words.cr[1]), PT_CR_11=pt_off(per_info.control_regs.words.cr[2]), - PT_LASTOFF=PT_CR_11, - PT_ENDREGS=offsetof(user_regs_struct,per_info.lowcore.words.perc_atmid) + PT_IEEE_IP=pt_off(ieee_instruction_pointer), + PT_LASTOFF=PT_IEEE_IP, + PT_ENDREGS=sizeof(user_regs_struct)-1 }; #define PTRACE_AREA \ diff --git a/include/asm-s390/queue.h b/include/asm-s390/queue.h index 9771d3048..c817d23b3 100644 --- a/include/asm-s390/queue.h +++ b/include/asm-s390/queue.h @@ -70,6 +70,35 @@ static __inline__ void add_to_list(list **lhead,list *member) *lhead=member; } +static __inline__ list *remove_listhead(list **lhead) +{ + list *oldhead=*lhead; + + if(oldhead) + *lhead=(*lhead)->next; + return(oldhead); +} + +static __inline__ void add_to_list_tail(list **lhead,list *member) +{ + list *curr,*prev; + if(*lhead==NULL) + *lhead=member; + else + { + prev=*lhead; + for(curr=(*lhead)->next;curr!=NULL;curr=curr->next) + prev=curr; + prev->next=member; + } +} +static __inline__ void add_to_list_tail_null(list **lhead,list *member) +{ + member->next=NULL; + add_to_list_tail_null(lhead,member); +} + + static __inline__ int is_in_list(list *lhead,list *member) { list *curr; @@ -96,6 +125,7 @@ static __inline__ int get_prev(list *lhead,list *member,list **prev) } + static __inline__ int remove_from_list(list **lhead,list *member) { list *prev; @@ -112,6 +142,29 @@ static __inline__ int remove_from_list(list **lhead,list *member) return(FALSE); } +static __inline__ int remove_from_queue(qheader *qhead,queue *member) +{ + queue *prev; + + if(get_prev(qhead->head,(list *)member,(list **)&prev)) + { + + if(prev) + { + prev->next=member->next; + if(prev->next==NULL) + qhead->tail=prev; + } + else + { + if(qhead->head==qhead->tail) + qhead->tail=NULL; + qhead->head=member->next; + } + return(TRUE); + } + return(FALSE); +} diff --git a/include/asm-s390/resource.h b/include/asm-s390/resource.h index 4e5d91143..bc2520e1d 100644 --- a/include/asm-s390/resource.h +++ b/include/asm-s390/resource.h @@ -23,8 +23,8 @@ #define RLIMIT_NOFILE 7 /* max number of open files */ #define RLIMIT_MEMLOCK 8 /* max locked-in-memory address space */ #define RLIMIT_AS 9 /* address space limit */ -#define RLIMIT_AS 10 /* maximum file locks held */ - +#define RLIMIT_LOCKS 10 /* maximum file locks held */ + #define RLIM_NLIMITS 11 /* @@ -37,17 +37,17 @@ #define INIT_RLIMITS \ { \ - { LONG_MAX, LONG_MAX }, \ - { LONG_MAX, LONG_MAX }, \ - { LONG_MAX, LONG_MAX }, \ - { _STK_LIM, LONG_MAX }, \ - { 0, LONG_MAX }, \ - { LONG_MAX, LONG_MAX }, \ - { MAX_TASKS_PER_USER, MAX_TASKS_PER_USER }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { _STK_LIM, RLIM_INFINITY }, \ + { 0, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { 0, 0 }, \ { INR_OPEN, INR_OPEN }, \ - { LONG_MAX, LONG_MAX }, \ - { LONG_MAX, LONG_MAX }, \ - { LONG_MAX, LONG_MAX }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ } #endif /* __KERNEL__ */ diff --git a/include/asm-s390/s390-gdbregs.h b/include/asm-s390/s390-gdbregs.h index af708d51d..9527f575e 100644 --- a/include/asm-s390/s390-gdbregs.h +++ b/include/asm-s390/s390-gdbregs.h @@ -8,13 +8,14 @@ * used both by the linux kernel for remote debugging & gdb */ -/* Say how long (ordinary) registers are. This is a piece of bogosity - used in push_word and a few other places; REGISTER_RAW_SIZE is the - real way to know how big a register is. */ #ifndef _S390_GDBREGS_H #define _S390_GDBREGS_H +#ifdef __KERNEL__ #include <asm/s390-regs-common.h> +#else +#include <s390/s390-regs-common.h> +#endif #define S390_MAX_INSTR_SIZE 6 #define NUM_REGS (2+NUM_GPRS+NUM_ACRS+NUM_CRS+1+NUM_FPRS) #define FIRST_ACR (2+NUM_GPRS) diff --git a/include/asm-s390/s390-regs-common.h b/include/asm-s390/s390-regs-common.h index aa349a69d..7934b3dab 100644 --- a/include/asm-s390/s390-regs-common.h +++ b/include/asm-s390/s390-regs-common.h @@ -16,8 +16,9 @@ #ifndef __ASSEMBLY__ #include <asm/types.h> #endif - +#if defined(WANT_S390_TGT_DEFS) || defined(__KERNEL__) #define REGISTER_SIZE 4 +#endif #define NUM_GPRS 16 #define GPR_SIZE 4 #define PSW_MASK_SIZE 4 @@ -41,8 +42,6 @@ typedef struct __u32 addr; } psw_t __attribute__ ((aligned(8))); -typedef __u32 gpr_t; - /* 2 __u32's are used for floats instead to compile with a __STRICT_ANSI__ defined */ typedef union { @@ -71,6 +70,13 @@ typedef struct freg_t fprs[NUM_FPRS]; } s390_fp_regs; +#define FPC_EXCEPTION_MASK 0xF8000000 +#define FPC_FLAGS_MASK 0x00F80000 +#define FPC_DXC_MASK 0x0000FF00 +#define FPC_RM_MASK 0x00000003 +#define FPC_VALID_MASK ((FPC_EXCEPTION_MASK|FPC_FLAGS_MASK| \ + FPC_DXC_MASK|FPC_RM_MASK)) + /* gdb structures & the kernel have this much always in common */ @@ -90,9 +96,11 @@ typedef struct #define S390_BREAKPOINT_U16 ((__u16)0x0001) #define S390_SYSCALL_OPCODE ((__u16)0x0a00) #define S390_SYSCALL_SIZE 2 +#if defined(WANT_S390_TGT_DEFS) || defined(__KERNEL__) #define ADDR_BITS_REMOVE(addr) ((addr)&0x7fffffff) #endif #endif +#endif diff --git a/include/asm-s390/s390_ext.h b/include/asm-s390/s390_ext.h new file mode 100644 index 000000000..08a080441 --- /dev/null +++ b/include/asm-s390/s390_ext.h @@ -0,0 +1,30 @@ +#ifndef _S390_EXTINT_H +#define _S390_EXTINT_H + +/* + * include/asm-s390/s390_ext.h + * + * S390 version + * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com), + * Martin Schwidefsky (schwidefsky@de.ibm.com) + */ + +typedef void (*ext_int_handler_t)(struct pt_regs *regs, __u16 code); + +/* + * Warning: if you change ext_int_info_t you have to change the + * external interrupt handler in entry.S too. + */ +typedef struct ext_int_info_t { + struct ext_int_info_t *next; + ext_int_handler_t handler; + __u16 code; +} __attribute__ ((packed)) ext_int_info_t; + +extern ext_int_info_t *ext_int_hash[]; + +int register_external_interrupt(__u16 code, ext_int_handler_t handler); +int unregister_external_interrupt(__u16 code, ext_int_handler_t handler); + +#endif diff --git a/include/asm-s390/s390dyn.h b/include/asm-s390/s390dyn.h index 960a81b43..a728ddf33 100644 --- a/include/asm-s390/s390dyn.h +++ b/include/asm-s390/s390dyn.h @@ -12,28 +12,20 @@ struct _devreg; -typedef int (* oper_handler_func_t)( int irq, - struct _devreg *dreg); -typedef void (* io_handler_func_t) ( int irq, - __u32 intparm ); -typedef void ( * not_oper_handler_func_t)( int irq, - int status ); +typedef int (* oper_handler_func_t)( int irq, + struct _devreg *dreg); + +typedef struct _devreg_hc_t { + __u16 ctype; + __u8 cmode; + __u16 dtype; + __u8 dmode; + } __attribute__ ((packed)) devreg_hc_t; typedef struct _devreg { union { - struct _hc { - __u16 ctype; - __u8 cmode; - __u16 dtype; - __u8 dmode; - } hc; /* has controller info */ - - struct _hnc { - __u16 dtype; - __u8 dmode; - __u16 res1; - __u8 res2; - } hnc; /* has no controller info */ + int devno; + devreg_hc_t hc; /* has controller info */ } ci; int flag; @@ -46,15 +38,13 @@ typedef struct _devreg { #define DEVREG_MATCH_DEV_TYPE 0x00000002 #define DEVREG_MATCH_CU_TYPE 0x00000004 #define DEVREG_NO_CU_INFO 0x00000008 +#define DEVREG_NO_DEV_INFO 0x00000010 +#define DEVREG_TYPE_DEVNO 0x80000000 +#define DEVREG_TYPE_DEVCHARS 0x40000000 -int s390_device_register ( devreg_t *drinfo ); -int s390_device_deregister ( devreg_t *dreg ); -int s390_request_irq_special( int irq, - io_handler_func_t io_handler, - not_oper_handler_func_t not_oper_handler, - unsigned long irqflags, - const char *devname, - void *dev_id); +int s390_device_register ( devreg_t *drinfo ); +int s390_device_unregister( devreg_t *dreg ); +devreg_t * s390_search_devreg ( ioinfo_t *ioinfo ); #endif /* __s390dyn */ diff --git a/include/asm-s390/s390io.h b/include/asm-s390/s390io.h index 8ba9c11db..1a5a0f094 100644 --- a/include/asm-s390/s390io.h +++ b/include/asm-s390/s390io.h @@ -47,25 +47,35 @@ typedef struct _ioinfo { unsigned int s_pend : 1; /* status pending condition */ unsigned int pgid : 1; /* "path group ID" is valid */ unsigned int pgid_supp : 1; /* "path group ID" command is supported */ - unsigned int unused : (sizeof(unsigned int)*8 - 18); /* unused */ + unsigned int esid : 1; /* Ext. SenseID supported by HW */ + unsigned int rcd : 1; /* RCD supported by HW */ + unsigned int repnone : 1; /* don't call IRQ handler on interrupt */ + unsigned int newreq : 1; /* new register interface */ + unsigned int dval : 1; /* device number valid */ + unsigned int unknown : 1; /* unknown device - if SenseID failed */ + unsigned int unused : (sizeof(unsigned int)*8 - 24); /* unused */ } __attribute__ ((packed)) flags; } ui; unsigned long u_intparm; /* user interruption parameter */ senseid_t senseid; /* SenseID info */ irq_desc_t irq_desc; /* irq descriptor */ + not_oper_handler_func_t nopfunc; /* not oper handler */ __u8 ulpm; /* logical path mask used for I/O */ __u8 opm; /* path mask of operational paths */ + __u16 devno; /* device number */ pgid_t pgid; /* path group ID */ schib_t schib; /* subchannel information block */ orb_t orb; /* operation request block */ devstat_t devstat; /* device status */ ccw1_t *qcpa; /* queued channel program */ ccw1_t senseccw; /* ccw for sense command */ + __u8 sense_data[32];/* buffer for basic sense */ unsigned int stctl; /* accumulated status control from irb */ unsigned long qintparm; /* queued interruption parameter */ unsigned long qflag; /* queued flags */ - unsigned char qlpm; /* queued logical path mask */ + __u8 qlpm; /* queued logical path mask */ + __u32 syncnt; /* sync I/O recursive usage count */ } __attribute__ ((aligned(8))) ioinfo_t; diff --git a/include/asm-s390/s390mach.h b/include/asm-s390/s390mach.h index 56349777a..961e17ecf 100644 --- a/include/asm-s390/s390mach.h +++ b/include/asm-s390/s390mach.h @@ -12,14 +12,21 @@ #include <asm/types.h> -// -// machine-check-interruption code -// -typedef struct _mcic { +typedef struct _mci { __u32 to_be_defined_1 : 9; __u32 cp : 1; /* channel-report pending */ __u32 to_be_defined_2 : 22; __u32 to_be_defined_3; + } mci_t; + +// +// machine-check-interruption code +// +typedef struct _mcic { + union _mcc { + __u64 mcl; /* machine check int. code - long info */ + mci_t mcd; /* machine check int. code - details */ + } mcc; } __attribute__ ((packed)) mcic_t; // @@ -37,29 +44,63 @@ typedef struct _crw { __u32 rsid : 16; /* reporting-source ID */ } __attribute__ ((packed)) crw_t; +#define CRW_RSC_MONITOR 0x2 /* monitoring facility */ +#define CRW_RSC_SCH 0x3 /* subchannel */ +#define CRW_RSC_CPATH 0x4 /* channel path */ +#define CRW_RSC_CONFIG 0x9 /* configuration-alert facility */ +#define CRW_RSC_CSS 0xB /* channel subsystem */ + +#define CRW_ERC_EVENT 0x00 /* event information pending */ +#define CRW_ERC_AVAIL 0x01 /* available */ +#define CRW_ERC_INIT 0x02 /* initialized */ +#define CRW_ERC_TERROR 0x03 /* temporary error */ +#define CRW_ERC_IPARM 0x04 /* installed parm initialized */ +#define CRW_ERC_TERM 0x05 /* terminal */ +#define CRW_ERC_PERRN 0x06 /* perm. error, fac. not init */ +#define CRW_ERC_PERRI 0x07 /* perm. error, facility init */ +#define CRW_ERC_PMOD 0x08 /* installed parameters modified */ + +#define MAX_CRW_PENDING 1024 +#define MAX_MACH_PENDING 1024 + // // CRW Entry // typedef struct _crwe { - crw_t crw; - crw_t *crw_next; + crw_t crw; + struct _crwe *crwe_next; } __attribute__ ((packed)) crwe_t; -typedef struct _mchchk_queue_element { - spinlock_t lock; - unsigned int status; - mcic_t mcic; - crwe_t *crwe; /* CRW if applicable */ - struct mchchk_queue_element *next; - struct mchchk_queue_element *prev; -} mchchk_queue_element_t; +typedef struct _mache { + spinlock_t lock; + unsigned int status; + mcic_t mcic; + union _mc { + crwe_t *crwe; /* CRW if applicable */ + } mc; + struct _mache *next; + struct _mache *prev; +} mache_t; #define MCHCHK_STATUS_TO_PROCESS 0x00000001 #define MCHCHK_STATUS_IN_PROGRESS 0x00000002 #define MCHCHK_STATUS_WAITING 0x00000004 -void s390_init_machine_check ( void ); -void __init s390_do_machine_check ( void ); -void __init s390_machine_check_handler( struct semaphore * ); +void s390_init_machine_check( void ); +void s390_do_machine_check ( void ); +void s390_do_crw_pending ( crwe_t *pcrwe ); + +extern __inline__ int stcrw( __u32 *pcrw ) +{ + int ccode; + + __asm__ __volatile__( + "STCRW 0(%1)\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "a" (pcrw) + : "cc", "1" ); + return ccode; +} #endif /* __s390mach */ diff --git a/include/asm-s390/scatterlist.h b/include/asm-s390/scatterlist.h new file mode 100644 index 000000000..e9cfe86f6 --- /dev/null +++ b/include/asm-s390/scatterlist.h @@ -0,0 +1,13 @@ +#ifndef _ASMS390X_SCATTERLIST_H +#define _ASMS390X_SCATTERLIST_H + +struct scatterlist { + char * address; /* Location data is to be transferred to */ + char * alt_address; /* Location of actual if address is a + * dma indirect buffer. NULL otherwise */ + unsigned int length; +}; + +#define ISA_DMA_THRESHOLD (0xffffffffffffffff) + +#endif /* _ASMS390X_SCATTERLIST_H */ diff --git a/include/asm-s390/semaphore.h b/include/asm-s390/semaphore.h index fc903d772..dfd49e1d7 100644 --- a/include/asm-s390/semaphore.h +++ b/include/asm-s390/semaphore.h @@ -36,7 +36,7 @@ struct semaphore { #define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) #define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) -extern inline void sema_init (struct semaphore *sem, int val) +static inline void sema_init (struct semaphore *sem, int val) { *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val); } @@ -61,13 +61,13 @@ asmlinkage int __down_interruptible(struct semaphore * sem); asmlinkage int __down_trylock(struct semaphore * sem); asmlinkage void __up(struct semaphore * sem); -extern inline void down(struct semaphore * sem) +static inline void down(struct semaphore * sem) { if (atomic_dec_return(&sem->count) < 0) __down(sem); } -extern inline int down_interruptible(struct semaphore * sem) +static inline int down_interruptible(struct semaphore * sem) { int ret = 0; @@ -76,7 +76,7 @@ extern inline int down_interruptible(struct semaphore * sem) return ret; } -extern inline int down_trylock(struct semaphore * sem) +static inline int down_trylock(struct semaphore * sem) { int ret = 0; @@ -85,7 +85,7 @@ extern inline int down_trylock(struct semaphore * sem) return ret; } -extern inline void up(struct semaphore * sem) +static inline void up(struct semaphore * sem) { if (atomic_inc_return(&sem->count) <= 0) __up(sem); @@ -136,7 +136,7 @@ struct rw_semaphore { #define DECLARE_RWSEM_READ_LOCKED(name) __DECLARE_RWSEM_GENERIC(name,RW_LOCK_BIAS-1) #define DECLARE_RWSEM_WRITE_LOCKED(name) __DECLARE_RWSEM_GENERIC(name,0) -extern inline void init_rwsem(struct rw_semaphore *sem) +static inline void init_rwsem(struct rw_semaphore *sem) { atomic_set(&sem->count, RW_LOCK_BIAS); sem->read_bias_granted = 0; @@ -149,7 +149,7 @@ extern void __down_read_failed(int, struct rw_semaphore *); extern void __down_write_failed(int, struct rw_semaphore *); extern void __rwsem_wake(int, struct rw_semaphore *); -extern inline void down_read(struct rw_semaphore *sem) +static inline void down_read(struct rw_semaphore *sem) { int count; count = atomic_dec_return(&sem->count); @@ -157,7 +157,7 @@ extern inline void down_read(struct rw_semaphore *sem) __down_read_failed(count, sem); } -extern inline void down_write(struct rw_semaphore *sem) +static inline void down_write(struct rw_semaphore *sem) { int count; count = atomic_add_return (-RW_LOCK_BIAS, &sem->count); @@ -169,7 +169,7 @@ extern inline void down_write(struct rw_semaphore *sem) * case is when there was a writer waiting, and we've * bumped the count to 0: we must wake the writer up. */ -extern inline void up_read(struct rw_semaphore *sem) +static inline void up_read(struct rw_semaphore *sem) { int count; count = atomic_inc_return(&sem->count); @@ -180,7 +180,7 @@ extern inline void up_read(struct rw_semaphore *sem) /* releasing the writer is easy -- just release it and * wake up any sleepers. */ -extern inline void up_write(struct rw_semaphore *sem) +static inline void up_write(struct rw_semaphore *sem) { int count; count = atomic_add_return(RW_LOCK_BIAS, &sem->count); diff --git a/include/asm-s390/setup.h b/include/asm-s390/setup.h index 6a9449a52..9e97f2dc0 100644 --- a/include/asm-s390/setup.h +++ b/include/asm-s390/setup.h @@ -41,6 +41,7 @@ #define MACHINE_IS_VM (MACHINE_FLAGS & 1) #define MACHINE_HAS_IEEE (MACHINE_FLAGS & 2) #define MACHINE_IS_P390 (MACHINE_FLAGS & 4) +#define MACHINE_HAS_CSP (MACHINE_FLAGS & 8) #define RAMDISK_ORIGIN 0x800000 #define RAMDISK_BLKSIZE 0x1000 diff --git a/include/asm-s390/sigcontext.h b/include/asm-s390/sigcontext.h index 610f20e26..25c65e26a 100644 --- a/include/asm-s390/sigcontext.h +++ b/include/asm-s390/sigcontext.h @@ -2,12 +2,15 @@ * include/asm-s390/sigcontext.h * * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation */ #ifndef _ASM_S390_SIGCONTEXT_H #define _ASM_S390_SIGCONTEXT_H -#include <asm/s390-regs-common.h> + +#define __NUM_GPRS 16 +#define __NUM_FPRS 16 +#define __NUM_ACRS 16 /* Has to be at least _NSIG_WORDS from asm/signal.h @@ -15,20 +18,39 @@ #define _SIGCONTEXT_NSIG 64 #define _SIGCONTEXT_NSIG_BPW 32 /* Size of stack frame allocated when calling signal handler. */ -#define __SIGNAL_FRAMESIZE STACK_FRAME_OVERHEAD -#define _SIGCONTEXT_NSIG_WORDS (_SIGCONTEXT_NSIG / _SIGCONTEXT_NSIG_BPW) -#define SIGMASK_COPY_SIZE (sizeof(unsigned long)*_SIGCONTEXT_NSIG_WORDS) +#define __SIGNAL_FRAMESIZE 96 +#define _SIGCONTEXT_NSIG_WORDS (_SIGCONTEXT_NSIG / _SIGCONTEXT_NSIG_BPW) +#define _SIGMASK_COPY_SIZE (sizeof(unsigned long)*_SIGCONTEXT_NSIG_WORDS) + +typedef struct +{ + unsigned long mask; + unsigned long addr; +} _psw_t __attribute__ ((aligned(8))); + +typedef struct +{ + _psw_t psw; + unsigned long gprs[__NUM_GPRS]; + unsigned int acrs[__NUM_ACRS]; +} _s390_regs_common __attribute__ ((packed)); + +typedef struct +{ + unsigned int fpc; + double fprs[__NUM_FPRS]; +} _s390_fp_regs; typedef struct { - s390_regs_common regs; - s390_fp_regs fpregs; -} sigregs; + _s390_regs_common regs; + _s390_fp_regs fpregs; +} _sigregs; struct sigcontext { unsigned long oldmask[_SIGCONTEXT_NSIG_WORDS]; - sigregs *sregs; + _sigregs *sregs; }; diff --git a/include/asm-s390/siginfo.h b/include/asm-s390/siginfo.h index 1efd4e1c3..876e8baae 100644 --- a/include/asm-s390/siginfo.h +++ b/include/asm-s390/siginfo.h @@ -85,6 +85,25 @@ typedef struct siginfo { #define si_band _sifields._sigpoll._band #define si_fd _sifields._sigpoll._fd +#ifdef __KERNEL__ +#define __SI_MASK 0xffff0000 +#define __SI_KILL (0 << 16) +#define __SI_TIMER (1 << 16) +#define __SI_POLL (2 << 16) +#define __SI_FAULT (3 << 16) +#define __SI_CHLD (4 << 16) +#define __SI_RT (5 << 16) +#define __SI_CODE(T,N) ((T) << 16 | ((N) & 0xffff)) +#else +#define __SI_KILL 0 +#define __SI_TIMER 0 +#define __SI_POLL 0 +#define __SI_FAULT 0 +#define __SI_CHLD 0 +#define __SI_RT 0 +#define __SI_CODE(T,N) (N) +#endif + /* * si_code values * Digital reserves positive values for kernel-generated signals. @@ -202,4 +221,20 @@ typedef struct sigevent { #define sigev_notify_function _sigev_un._sigev_thread._function #define sigev_notify_attributes _sigev_un._sigev_thread._attribute +#ifdef __KERNEL__ +#include <linux/string.h> + +extern inline void copy_siginfo(siginfo_t *to, siginfo_t *from) +{ + if (from->si_code < 0) + memcpy(to, from, sizeof(siginfo_t)); + else + /* _sigchld is currently the largest know union member */ + memcpy(to, from, 3*sizeof(int) + sizeof(from->_sifields._sigchld)); +} + +extern int copy_siginfo_to_user(siginfo_t *to, siginfo_t *from); + +#endif /* __KERNEL__ */ + #endif diff --git a/include/asm-s390/sigp.h b/include/asm-s390/sigp.h index 5154a34a5..bbf97d5c9 100644 --- a/include/asm-s390/sigp.h +++ b/include/asm-s390/sigp.h @@ -41,83 +41,6 @@ typedef enum sigp_store_extended_status_at_address } sigp_order_code; -#if 0 -/* - * these definitions are not used at the moment, but we might need - * them in future. - */ -typedef struct -{ - __u64 cpu_timer; - psw_t current_psw; - __u32 prefix; - __u32 access_regs[16]; - __u64 float_regs[4]; - __u32 gpr_regs[16]; - __u32 control_regs[16]; -} sigp_status __attribute__((packed)); - -typedef struct -{ - __u8 unused1[216]; - __u64 cpu_timer; - psw_t current_psw; - __u32 prefix; - __u32 access_regs[16]; - __u64 float_regs[4]; - __u32 gpr_regs[16]; - __u32 control_regs[16]; -} sigp_status_512 __attribute__((packed)); - -typedef struct -{ - __u32 extended_save_area_address; - __u64 cpu_timer; - psw_t current_psw; - __u32 prefix; - __u32 access_regs[16]; - __u64 float_regs[4]; - __u32 gpr_regs[16]; - __u32 control_regs[16]; -} sigp_extended_status __attribute__((packed)); - -typedef struct -{ - __u8 unused1[212]; - __u32 extended_save_area_address; - __u64 cpu_timer; - psw_t current_psw; - __u32 prefix; - __u32 access_regs[16]; - __u64 float_regs[4]; - __u32 gpr_regs[16]; - __u32 control_regs[16]; -} sigp_extended_status_512 __attribute__((packed)); - -typedef struct -{ - __u64 bfp_float_regs[16]; - __u32 bfp_float_control_reg; - __u8 reserved[12]; -} sigp_extended_save_area __attribute__ ((packed)); - -typedef struct -{ - unsigned equipment_check:1; - unsigned unassigned1:20; - unsigned incorrect_state:1; - unsigned invalid_parameter:1; - unsigned external_call_pending:1; - unsigned stopped:1; - unsigned operator_intervening:1; - unsigned check_stop:1; - unsigned unassigned2:1; - unsigned inoperative:1; - unsigned invalid_order:1; - unsigned receiver_check:1; -} sigp_status_bits __attribute__((packed)); -#endif - typedef __u32 sigp_status_word; typedef enum @@ -140,16 +63,15 @@ typedef enum ec_restart, ec_halt, ec_power_off, + ec_ptlb, ec_bit_last } ec_bit_sig; /* Signals which come with a parameter area, synchronous */ typedef enum { - ec_set_ctl, - ec_get_ctl, - ec_set_ctl_masked, - ec_cmd_last + ec_callback_async, + ec_callback_sync } ec_cmd_sig; /* state information for synchronous signals */ @@ -166,26 +88,10 @@ typedef struct ec_ext_call ec_cmd_sig cmd; atomic_t status; struct ec_ext_call *next; - void *parms; + void (*func)(void *info); + void *info; } ec_ext_call; -/* parameter area for the ec_set_ctl and ec_get_ctl signal */ -typedef struct -{ - __u16 start_ctl; - __u16 end_ctl; - __u32 cregs[16]; -} ec_creg_parms; - -/* parameter area for the ec_set_ctl_masked signal */ -typedef struct -{ - __u16 start_ctl; - __u16 end_ctl; - __u32 orvals[16]; - __u32 andvals[16]; -} ec_creg_mask_parms; - /* * Signal processor */ diff --git a/include/asm-s390/smp.h b/include/asm-s390/smp.h index d7f246bb7..2922f398a 100644 --- a/include/asm-s390/smp.h +++ b/include/asm-s390/smp.h @@ -13,7 +13,7 @@ #ifndef __ASSEMBLY__ #include <asm/lowcore.h> -#include <linux/tasks.h> // FOR NR_CPUS definition only. +#include <linux/threads.h> // FOR NR_CPUS definition only. #include <linux/kernel.h> // FOR FASTCALL definition #define smp_processor_id() (current->processor) @@ -31,7 +31,6 @@ #define PROC_CHANGE_PENALTY 20 /* Schedule penalty */ -extern unsigned long ipi_count; extern void count_cpus(void); extern __inline__ int cpu_logical_map(int cpu) @@ -67,10 +66,11 @@ typedef struct __u16 cpu; } sigp_info; -sigp_ccode smp_ext_call_sync(int cpu, ec_cmd_sig cmd,void *parms); -sigp_ccode smp_ext_call_async(int cpu, ec_bit_sig sig); -void smp_ext_call_sync_others(ec_cmd_sig cmd, void *parms); -void smp_ext_call_async_others(ec_bit_sig sig); +sigp_ccode +smp_ext_call(int cpu, void (*callback)(void *info), void *info, int wait); +void smp_ext_call_others(void (*callback)(void *info), void *info, int wait); +sigp_ccode smp_ext_bitcall(int cpu, ec_bit_sig sig); +void smp_ext_bitcall_others(ec_bit_sig sig); int smp_signal_others(sigp_order_code order_code,__u32 parameter, int spin,sigp_info *info); diff --git a/include/asm-s390/smplock.h b/include/asm-s390/smplock.h index 4ebd38025..1f6485fb0 100644 --- a/include/asm-s390/smplock.h +++ b/include/asm-s390/smplock.h @@ -7,10 +7,12 @@ */ #include <linux/interrupt.h> -#include <asm/spinlock.h> +#include <linux/spinlock.h> extern spinlock_t kernel_flag; +#define kernel_locked() spin_is_locked(&kernel_flag) + /* * Release global kernel lock and global interrupt lock */ diff --git a/include/asm-s390/socket.h b/include/asm-s390/socket.h index 0d00c3b54..7b52cdb8f 100644 --- a/include/asm-s390/socket.h +++ b/include/asm-s390/socket.h @@ -51,6 +51,8 @@ #define SO_TIMESTAMP 29 #define SCM_TIMESTAMP SO_TIMESTAMP +#define SO_ACCEPTCONN 30 + /* Nast libc5 fixup - bletch */ #if defined(__KERNEL__) /* Socket types. */ diff --git a/include/asm-s390/spinlock.h b/include/asm-s390/spinlock.h index 9c7725b55..52bcfc739 100644 --- a/include/asm-s390/spinlock.h +++ b/include/asm-s390/spinlock.h @@ -24,37 +24,36 @@ typedef struct { #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 } #define spin_lock_init(lp) do { (lp)->lock = 0; } while(0) -#define spin_unlock_wait(lp) do { barrier(); } while((volatile spinlock_t *)(lp)->lock) +#define spin_unlock_wait(lp) do { barrier(); } while(((volatile spinlock_t *)(lp))->lock) #define spin_is_locked(x) ((x)->lock != 0) extern inline void spin_lock(spinlock_t *lp) { - __asm__ __volatile(" lhi 1,-1\n" - "0: slr 0,0\n" - " cs 0,1,%1\n" - " jl 0b" - : "=m" (lp->lock) - : "0" (lp->lock) : "0", "1"); + __asm__ __volatile(" bras 1,1f\n" + "0: diag 0,0,68\n" + "1: slr 0,0\n" + " cs 0,1,%1\n" + " jl 0b\n" + : "=m" (lp->lock) + : "0" (lp->lock) : "0", "1", "cc" ); } extern inline int spin_trylock(spinlock_t *lp) { unsigned long result; __asm__ __volatile(" slr %1,%1\n" - " lhi 0,-1\n" - "0: cs %1,0,%0" + " basr 1,0\n" + "0: cs %1,1,%0" : "=m" (lp->lock), "=&d" (result) - : "0" (lp->lock) : "0"); + : "0" (lp->lock) : "1", "cc" ); return !result; } - - extern inline void spin_unlock(spinlock_t *lp) { __asm__ __volatile(" xc 0(4,%0),0(%0)\n" " bcr 15,0" - : /* no output */ : "a" (lp) ); + : /* no output */ : "a" (lp) : "memory", "cc" ); } /* @@ -76,45 +75,42 @@ typedef struct { #define read_lock(rw) \ asm volatile(" l 2,%0\n" \ - "0: sll 2,1\n" \ - " srl 2,1\n" /* clear high (=write) bit */ \ - " lr 3,2\n" \ - " ahi 3,1\n" /* one more reader */ \ + " j 1f\n" \ + "0: diag 0,0,68\n" \ + "1: la 2,0(2)\n" /* clear high (=write) bit */ \ + " la 3,1(2)\n" /* one more reader */ \ " cs 2,3,%0\n" /* try to write new value */ \ " jl 0b" \ - : "+m" ((rw)->lock) : : "2", "3" ); + : "+m" ((rw)->lock) : : "2", "3", "cc" ); #define read_unlock(rw) \ asm volatile(" l 2,%0\n" \ - "0: lr 3,2\n" \ + " j 1f\n" \ + "0: diag 0,0,68\n" \ + "1: lr 3,2\n" \ " ahi 3,-1\n" /* one less reader */ \ " cs 2,3,%0\n" \ " jl 0b" \ - : "+m" ((rw)->lock) : : "2", "3" ); + : "+m" ((rw)->lock) : : "2", "3", "cc" ); #define write_lock(rw) \ asm volatile(" lhi 3,1\n" \ " sll 3,31\n" /* new lock value = 0x80000000 */ \ - "0: slr 2,2\n" /* old lock value must be 0 */ \ + " j 1f\n" \ + "0: diag 0,0,68\n" \ + "1: slr 2,2\n" /* old lock value must be 0 */ \ " cs 2,3,%0\n" \ " jl 0b" \ - : "+m" ((rw)->lock) : : "2", "3" ); + : "+m" ((rw)->lock) : : "2", "3", "cc" ); #define write_unlock(rw) \ asm volatile(" slr 3,3\n" /* new lock value = 0 */ \ - "0: lhi 2,1\n" \ + " j 1f\n" \ + "0: diag 0,0,68\n" \ + "1: lhi 2,1\n" \ " sll 2,31\n" /* old lock value must be 0x80000000 */ \ " cs 2,3,%0\n" \ " jl 0b" \ - : "+m" ((rw)->lock) : : "2", "3" ); + : "+m" ((rw)->lock) : : "2", "3", "cc" ); #endif /* __ASM_SPINLOCK_H */ - - - - - - - - - diff --git a/include/asm-s390/stat.h b/include/asm-s390/stat.h index be52ef679..a0edcab80 100644 --- a/include/asm-s390/stat.h +++ b/include/asm-s390/stat.h @@ -50,36 +50,30 @@ struct stat { * insane amounts of padding around dev_t's. */ struct stat64 { - unsigned short st_dev; unsigned char __pad0[6]; - - unsigned long long st_ino; + unsigned short st_dev; + unsigned int __pad1; +#define STAT64_HAS_BROKEN_ST_INO 1 + unsigned long __st_ino; unsigned int st_mode; unsigned int st_nlink; - unsigned long st_uid; unsigned long st_gid; - + unsigned char __pad2[6]; unsigned short st_rdev; - unsigned char __pad3[10]; - + unsigned int __pad3; long long st_size; unsigned long st_blksize; - - unsigned long st_blocks; /* Number 512-byte blocks allocated. */ - unsigned long __pad4; /* future possible st_blocks high bits */ - + unsigned char __pad4[4]; + unsigned long __pad5; /* future possible st_blocks high bits */ + unsigned long st_blocks; /* Number 512-byte blocks allocated. */ unsigned long st_atime; - unsigned long __pad5; - - unsigned long st_mtime; unsigned long __pad6; - + unsigned long st_mtime; + unsigned long __pad7; unsigned long st_ctime; - unsigned long __pad7; /* will be high 32 bits of ctime someday */ - - unsigned long __unused1; - unsigned long __unused2; + unsigned long __pad8; /* will be high 32 bits of ctime someday */ + unsigned long long st_ino; }; #endif diff --git a/include/asm-s390/string.h b/include/asm-s390/string.h index 2e8081912..304979b83 100644 --- a/include/asm-s390/string.h +++ b/include/asm-s390/string.h @@ -40,24 +40,29 @@ #undef __HAVE_ARCH_STRSTR extern void *memset(void *, int, size_t); +extern void *memcpy(void *, const void *, size_t); +extern void *memmove(void *, const void *, size_t); +extern char *strncpy(char *, const char *, size_t); +extern int strcmp(const char *,const char *); -extern inline void * memchr(const void * cs,int c,size_t count) +static inline void * memchr(const void * cs,int c,size_t count) { void *ptr; __asm__ __volatile__ (" lr 0,%2\n" + " lr 1,%1\n" " la %0,0(%3,%1)\n" - "0: srst %0,%1\n" + "0: srst %0,1\n" " jo 0b\n" " brc 13,1f\n" " slr %0,%0\n" "1:" - : "=a" (ptr) : "a" (cs), "d" (c), "d" (count) - : "cc", "0" ); + : "=&a" (ptr) : "a" (cs), "d" (c), "d" (count) + : "cc", "0", "1" ); return ptr; } -extern __inline__ char *strcpy(char *dest, const char *src) +static __inline__ char *strcpy(char *dest, const char *src) { char *tmp = dest; @@ -69,7 +74,7 @@ extern __inline__ char *strcpy(char *dest, const char *src) return tmp; } -extern __inline__ size_t strlen(const char *s) +static __inline__ size_t strlen(const char *s) { size_t len; @@ -84,7 +89,7 @@ extern __inline__ size_t strlen(const char *s) return len; } -extern __inline__ char *strcat(char *dest, const char *src) +static __inline__ char *strcat(char *dest, const char *src) { char *tmp = dest; @@ -100,8 +105,13 @@ extern __inline__ char *strcat(char *dest, const char *src) return tmp; } +extern void *alloca(size_t); #endif /* __KERNEL__ */ #endif /* __S390_STRING_H_ */ + + + + diff --git a/include/asm-s390/system.h b/include/asm-s390/system.h index afced6af1..49ccb1a74 100644 --- a/include/asm-s390/system.h +++ b/include/asm-s390/system.h @@ -12,6 +12,7 @@ #define __ASM_SYSTEM_H #include <linux/config.h> +#include <asm/types.h> #ifdef __KERNEL__ #include <asm/lowcore.h> #endif @@ -40,7 +41,7 @@ static inline unsigned long __xchg(unsigned long x, void * ptr, int size) asm volatile ( " lhi 1,3\n" " nr 1,%0\n" /* isolate last 2 bits */ - " xr 1,%0\n" /* align ptr */ + " xr %0,1\n" /* align ptr */ " bras 2,0f\n" " icm 1,8,%1\n" /* for ptr&3 == 0 */ " stcm 0,8,%1\n" @@ -52,13 +53,13 @@ static inline unsigned long __xchg(unsigned long x, void * ptr, int size) " stcm 0,1,%1\n" "0: sll 1,3\n" " la 2,0(1,2)\n" /* r2 points to an icm */ - " l 0,%1\n" /* get fullword */ + " l 0,0(%0)\n" /* get fullword */ "1: lr 1,0\n" /* cs loop */ " ex 0,0(2)\n" /* insert x */ - " cs 0,1,%1\n" + " cs 0,1,0(%0)\n" " jl 1b\n" " ex 0,4(2)" /* store *ptr to x */ - : "+a&" (ptr) : "m" (x) + : "+a&" (ptr), "+m" (x) : : "memory", "0", "1", "2"); case 2: if(((__u32)ptr)&1) @@ -66,7 +67,7 @@ static inline unsigned long __xchg(unsigned long x, void * ptr, int size) asm volatile ( " lhi 1,2\n" " nr 1,%0\n" /* isolate bit 2^1 */ - " xr 1,%0\n" /* align ptr */ + " xr %0,1\n" /* align ptr */ " bras 2,0f\n" " icm 1,12,%1\n" /* for ptr&2 == 0 */ " stcm 0,12,%1\n" @@ -74,13 +75,13 @@ static inline unsigned long __xchg(unsigned long x, void * ptr, int size) " stcm 0,3,%1\n" "0: sll 1,2\n" " la 2,0(1,2)\n" /* r2 points to an icm */ - " l 0,%1\n" /* get fullword */ + " l 0,0(%0)\n" /* get fullword */ "1: lr 1,0\n" /* cs loop */ " ex 0,0(2)\n" /* insert x */ - " cs 0,1,%1\n" + " cs 0,1,0(%0)\n" " jl 1b\n" " ex 0,4(2)" /* store *ptr to x */ - : "+a&" (ptr) : "m" (x) + : "+a&" (ptr), "+m" (x) : : "memory", "0", "1", "2"); break; case 4: @@ -115,6 +116,12 @@ static inline unsigned long __xchg(unsigned long x, void * ptr, int size) #define mb() eieio() #define rmb() eieio() #define wmb() eieio() +#define smp_mb() mb() +#define smp_rmb() rmb() +#define smp_wmb() wmb() +#define smp_mb__before_clear_bit() smp_mb() +#define smp_mb__after_clear_bit() smp_mb() + #define set_mb(var, value) do { var = value; mb(); } while (0) #define set_wmb(var, value) do { var = value; wmb(); } while (0) @@ -139,6 +146,27 @@ static inline unsigned long __xchg(unsigned long x, void * ptr, int size) #define __restore_flags(x) \ __asm__ __volatile__("ssm %0" : : "m" (x) : "memory") +#define __load_psw(psw) \ + __asm__ __volatile__("lpsw %0" : : "m" (psw)); + +#define __ctl_load(array, low, high) ({ \ + __asm__ __volatile__ ( \ + " la 1,%0\n" \ + " bras 2,0f\n" \ + " lctl 0,0,0(1)\n" \ + "0: ex %1,0(2)" \ + : : "m" (array), "a" (((low)<<4)+(high)) : "1", "2" ); \ + }) + +#define __ctl_store(array, low, high) ({ \ + __asm__ __volatile__ ( \ + " la 1,%0\n" \ + " bras 2,0f\n" \ + " stctl 0,0,0(1)\n" \ + "0: ex %1,0(2)" \ + : "=m" (array) : "a" (((low)<<4)+(high)): "1", "2" ); \ + }) + #define __ctl_set_bit(cr, bit) ({ \ __u8 dummy[16]; \ __asm__ __volatile__ ( \ @@ -220,7 +248,6 @@ extern int save_fp_regs1(s390_fp_regs *fpregs); extern void save_fp_regs(s390_fp_regs *fpregs); extern int restore_fp_regs1(s390_fp_regs *fpregs); extern void restore_fp_regs(s390_fp_regs *fpregs); -extern void show_crashed_task_info(void); #endif #endif diff --git a/include/asm-s390/termios.h b/include/asm-s390/termios.h index 86415c0a2..30defbf1d 100644 --- a/include/asm-s390/termios.h +++ b/include/asm-s390/termios.h @@ -60,7 +60,7 @@ struct termio { #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IR - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IR - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ @@ -77,18 +77,19 @@ struct termio { /* * Translate a "termio" structure into a "termios". Ugh. */ -#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ - unsigned short __tmp; \ - get_user(__tmp,&(termio)->x); \ - *(unsigned short *) &(termios)->x = __tmp; \ -} #define user_termio_to_kernel_termios(termios, termio) \ ({ \ - SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ + unsigned short tmp; \ + get_user(tmp, &(termio)->c_iflag); \ + (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \ + get_user(tmp, &(termio)->c_oflag); \ + (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \ + get_user(tmp, &(termio)->c_cflag); \ + (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \ + get_user(tmp, &(termio)->c_lflag); \ + (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \ + get_user((termios)->c_line, &(termio)->c_line); \ copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ }) diff --git a/include/asm-s390/todclk.h b/include/asm-s390/todclk.h new file mode 100644 index 000000000..92a27a9d4 --- /dev/null +++ b/include/asm-s390/todclk.h @@ -0,0 +1,19 @@ +/* + * File...........: linux/include/asm/todclk.h + * Author(s)......: Holger Smolinski <Holger.Smolinski@de.ibm.com> + * Bugreports.to..: <Linux390@de.ibm.com> + * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000 + * + * History of changes (starts July 2000) + */ + +#ifndef __ASM_TODCLK_H +#define __ASM_TODCLK_H + +#define TOD_uSEC (0x1000ULL) +#define TOD_mSEC (1000 * TOD_uSEC) +#define TOD_SEC (1000 * TOD_mSEC) +#define TOD_MIN (60 * TOD_SEC) +#define TOD_HOUR (60 * TOD_MIN) + +#endif diff --git a/include/asm-s390/uaccess.h b/include/asm-s390/uaccess.h index a19cfa29f..3bcf7bbed 100644 --- a/include/asm-s390/uaccess.h +++ b/include/asm-s390/uaccess.h @@ -84,15 +84,14 @@ extern inline int __put_user_asm_4(__u32 x, void *ptr) { int err; - __asm__ __volatile__ ( " iac 1\n" - " sr %1,%1\n" + __asm__ __volatile__ ( " sr %1,%1\n" " la 4,%0\n" " sacf 512\n" "0: st %2,0(4)\n" - " sacf 0(1)\n" + " sacf 0\n" "1:\n" ".section .fixup,\"ax\"\n" - "2: sacf 0(1)\n" + "2: sacf 0\n" " lhi %1,%h3\n" " bras 4,3f\n" " .long 1b\n" @@ -105,7 +104,7 @@ extern inline int __put_user_asm_4(__u32 x, void *ptr) ".previous" : "=m" (*((__u32*) ptr)) , "=&d" (err) : "d" (x), "K" (-EFAULT) - : "1", "4" ); + : "4" ); return err; } @@ -113,15 +112,14 @@ extern inline int __put_user_asm_2(__u16 x, void *ptr) { int err; - __asm__ __volatile__ ( " iac 1\n" - " sr %1,%1\n" + __asm__ __volatile__ ( " sr %1,%1\n" " la 4,%0\n" " sacf 512\n" "0: sth %2,0(4)\n" - " sacf 0(1)\n" + " sacf 0\n" "1:\n" ".section .fixup,\"ax\"\n" - "2: sacf 0(1)\n" + "2: sacf 0\n" " lhi %1,%h3\n" " bras 4,3f\n" " .long 1b\n" @@ -134,7 +132,7 @@ extern inline int __put_user_asm_2(__u16 x, void *ptr) ".previous" : "=m" (*((__u16*) ptr)) , "=&d" (err) : "d" (x), "K" (-EFAULT) - : "1", "4" ); + : "4" ); return err; } @@ -142,15 +140,14 @@ extern inline int __put_user_asm_1(__u8 x, void *ptr) { int err; - __asm__ __volatile__ ( " iac 1\n" - " sr %1,%1\n" + __asm__ __volatile__ ( " sr %1,%1\n" " la 4,%0\n" " sacf 512\n" "0: stc %2,0(4)\n" - " sacf 0(1)\n" + " sacf 0\n" "1:\n" ".section .fixup,\"ax\"\n" - "2: sacf 0(1)\n" + "2: sacf 0\n" " lhi %1,%h3\n" " bras 4,3f\n" " .long 1b\n" @@ -163,7 +160,7 @@ extern inline int __put_user_asm_1(__u8 x, void *ptr) ".previous" : "=m" (*((__u8*) ptr)) , "=&d" (err) : "d" (x), "K" (-EFAULT) - : "1", "4" ); + : "4" ); return err; } @@ -176,13 +173,13 @@ extern inline int __put_user_asm_1(__u8 x, void *ptr) int __pu_err; \ switch (sizeof (*(ptr))) { \ case 1: \ - __pu_err = __put_user_asm_1((__u8)(__u32)x,ptr);\ + __pu_err = __put_user_asm_1((__u8)(__u32)x,(ptr));\ break; \ case 2: \ - __pu_err = __put_user_asm_2((__u16)(__u32)x,ptr);\ + __pu_err = __put_user_asm_2((__u16)(__u32)x,(ptr));\ break; \ case 4: \ - __pu_err = __put_user_asm_4((__u32) x,ptr);\ + __pu_err = __put_user_asm_4((__u32) x,(ptr));\ break; \ default: \ __pu_err = __put_user_bad(); \ @@ -195,7 +192,7 @@ extern inline int __put_user_asm_1(__u8 x, void *ptr) ({ \ long __pu_err = -EFAULT; \ __typeof__(*(ptr)) *__pu_addr = (ptr); \ - __typeof__(x) __x = (x); \ + __typeof__(*(ptr)) __x = (x); \ if (__access_ok((long)__pu_addr,sizeof(*(ptr)))) { \ __pu_err = 0; \ __put_user((__x), (__pu_addr)); \ @@ -206,83 +203,80 @@ extern inline int __put_user_asm_1(__u8 x, void *ptr) extern int __put_user_bad(void); -#define __get_user_asm_4(x, ptr, err) \ -({ \ - __asm__ __volatile__ ( " iac 1\n" \ - " sr %1,%1\n" \ - " la 4,%2\n" \ - " sacf 512\n" \ - "0: l %0,0(4)\n" \ - " sacf 0(1)\n" \ - "1:\n" \ - ".section .fixup,\"ax\"\n" \ - "2: sacf 0(1)\n" \ - " lhi %1,%h3\n" \ - " bras 4,3f\n" \ - " .long 1b\n" \ - "3: l 4,0(4)\n" \ - " br 4\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 4\n" \ - " .long 0b,2b\n" \ - ".previous" \ - : "=d" (x) , "=&d" (err) \ - : "m" (*(__u32*) ptr), "K" (-EFAULT) \ - : "1", "4" ); \ +#define __get_user_asm_4(x, ptr, err) \ +({ \ + __asm__ __volatile__ ( " sr %1,%1\n" \ + " la 4,%2\n" \ + " sacf 512\n" \ + "0: l %0,0(4)\n" \ + " sacf 0\n" \ + "1:\n" \ + ".section .fixup,\"ax\"\n" \ + "2: sacf 0\n" \ + " lhi %1,%h3\n" \ + " bras 4,3f\n" \ + " .long 1b\n" \ + "3: l 4,0(4)\n" \ + " br 4\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 4\n" \ + " .long 0b,2b\n" \ + ".previous" \ + : "=d" (x) , "=&d" (err) \ + : "m" (*(const __u32*)(ptr)),"K" (-EFAULT) \ + : "4" ); \ }) -#define __get_user_asm_2(x, ptr, err) \ -({ \ - __asm__ __volatile__ ( " iac 1\n" \ - " sr %1,%1\n" \ - " la 4,%2\n" \ - " sacf 512\n" \ - "0: lh %0,0(4)\n" \ - " sacf 0(1)\n" \ - "1:\n" \ - ".section .fixup,\"ax\"\n" \ - "2: sacf 0(1)\n" \ - " lhi %1,%h3\n" \ - " bras 4,3f\n" \ - " .long 1b\n" \ - "3: l 4,0(4)\n" \ - " br 4\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 4\n" \ - " .long 0b,2b\n" \ - ".previous" \ - : "=d" (x) , "=&d" (err) \ - : "m" (*(__u16*) ptr), "K" (-EFAULT) \ - : "1", "4" ); \ +#define __get_user_asm_2(x, ptr, err) \ +({ \ + __asm__ __volatile__ ( " sr %1,%1\n" \ + " la 4,%2\n" \ + " sacf 512\n" \ + "0: lh %0,0(4)\n" \ + " sacf 0\n" \ + "1:\n" \ + ".section .fixup,\"ax\"\n" \ + "2: sacf 0\n" \ + " lhi %1,%h3\n" \ + " bras 4,3f\n" \ + " .long 1b\n" \ + "3: l 4,0(4)\n" \ + " br 4\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 4\n" \ + " .long 0b,2b\n" \ + ".previous" \ + : "=d" (x) , "=&d" (err) \ + : "m" (*(const __u16*)(ptr)),"K" (-EFAULT) \ + : "4" ); \ }) -#define __get_user_asm_1(x, ptr, err) \ -({ \ - __asm__ __volatile__ ( " iac 1\n" \ - " sr %1,%1\n" \ - " la 4,%2\n" \ - " sr %0,%0\n" \ - " sacf 512\n" \ - "0: ic %0,0(4)\n" \ - " sacf 0(1)\n" \ - "1:\n" \ - ".section .fixup,\"ax\"\n" \ - "2: sacf 0(1)\n" \ - " lhi %1,%h3\n" \ - " bras 4,3f\n" \ - " .long 1b\n" \ - "3: l 4,0(4)\n" \ - " br 4\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 4\n" \ - " .long 0b,2b\n" \ - ".previous" \ - : "=d" (x) , "=&d" (err) \ - : "m" (*(__u8*) ptr), "K" (-EFAULT) \ - : "1", "4" ); \ +#define __get_user_asm_1(x, ptr, err) \ +({ \ + __asm__ __volatile__ ( " sr %1,%1\n" \ + " la 4,%2\n" \ + " sr %0,%0\n" \ + " sacf 512\n" \ + "0: ic %0,0(4)\n" \ + " sacf 0\n" \ + "1:\n" \ + ".section .fixup,\"ax\"\n" \ + "2: sacf 0\n" \ + " lhi %1,%h3\n" \ + " bras 4,3f\n" \ + " .long 1b\n" \ + "3: l 4,0(4)\n" \ + " br 4\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 4\n" \ + " .long 0b,2b\n" \ + ".previous" \ + : "=d" (x) , "=&d" (err) \ + : "m" (*(const __u8*)(ptr)),"K" (-EFAULT) \ + : "4" ); \ }) #define __get_user(x, ptr) \ @@ -310,7 +304,7 @@ extern int __put_user_bad(void); ({ \ long __gu_err = -EFAULT; \ __typeof__(ptr) __gu_addr = (ptr); \ - __typeof__(x) __x; \ + __typeof__(*(ptr)) __x; \ if (__access_ok((long)__gu_addr,sizeof(*(ptr)))) { \ __gu_err = 0; \ __get_user((__x), (__gu_addr)); \ @@ -327,26 +321,28 @@ extern int __get_user_bad(void); * access register are set up, that 4 points to secondary (user) , 2 to primary (kernel) */ +asmlinkage void __copy_from_user_fixup(void /* special calling convention */); +asmlinkage void __copy_to_user_fixup(void /* special calling convention */); + extern inline unsigned long __copy_to_user_asm(void* to, const void* from, long n) { - __asm__ __volatile__ ( " iac 1\n" - " lr 2,%2\n" + __asm__ __volatile__ ( " lr 2,%2\n" " lr 4,%1\n" " lr 3,%0\n" " lr 5,3\n" " sacf 512\n" "0: mvcle 4,2,0\n" " jo 0b\n" - "1: sacf 0(1)\n" + " sacf 0\n" " lr %0,3\n" ".section __ex_table,\"a\"\n" " .align 4\n" - " .long 0b,1b\n" + " .long 0b,__copy_to_user_fixup\n" ".previous" : "+&d" (n) : "d" (to), "d" (from) - : "1", "2", "3", "4", "5" ); + : "2", "3", "4", "5" ); return n; } @@ -370,22 +366,21 @@ __copy_to_user_asm(void* to, const void* from, long n) extern inline unsigned long __copy_from_user_asm(void* to, const void* from, long n) { - __asm__ __volatile__ ( " iac 1\n" - " lr 2,%1\n" + __asm__ __volatile__ ( " lr 2,%1\n" " lr 4,%2\n" " lr 3,%0\n" " lr 5,3\n" " sacf 512\n" "0: mvcle 2,4,0\n" " jo 0b\n" - "1: sacf 0(1)\n" + " sacf 0\n" " lr %0,3\n" ".section __ex_table,\"a\"\n" " .align 4\n" - " .long 0b,1b\n" + " .long 0b,__copy_from_user_fixup\n" ".previous" : "+&d" (n) : "d" (to), "d" (from) - : "1", "2", "3", "4", "5" ); + : "2", "3", "4", "5" ); return n; } @@ -412,11 +407,10 @@ __copy_from_user_asm(void* to, const void* from, long n) */ static inline long -strncpy_from_user(char *dst, const char *src, long count) +__strncpy_from_user(char *dst, const char *src, long count) { int len; - __asm__ __volatile__ ( " iac 1\n" - " slr %0,%0\n" + __asm__ __volatile__ ( " slr %0,%0\n" " lr 2,%1\n" " lr 4,%2\n" " slr 3,3\n" @@ -428,7 +422,7 @@ strncpy_from_user(char *dst, const char *src, long count) " ahi %0,1\n" " clr %0,%3\n" " jl 0b\n" - "2: sacf 0(1)\n" + "2: sacf 0\n" ".section .fixup,\"ax\"\n" "3: lhi %0,%h4\n" " basr 3,0\n" @@ -444,10 +438,20 @@ strncpy_from_user(char *dst, const char *src, long count) : "=&a" (len) : "a" (dst), "d" (src), "d" (count), "K" (-EFAULT) - : "1", "2", "3", "4", "memory" ); + : "2", "3", "4", "memory" ); return len; } +static inline long +strncpy_from_user(char *dst, const char *src, long count) +{ + long res = -EFAULT; + if (access_ok(VERIFY_READ, src, 1)) + res = __strncpy_from_user(dst, src, count); + return res; +} + + /* * Return the size of a string (including the ending 0) * @@ -456,8 +460,7 @@ strncpy_from_user(char *dst, const char *src, long count) static inline unsigned long strnlen_user(const char * src, unsigned long n) { - __asm__ __volatile__ (" iac 1\n" - " alr %0,%1\n" + __asm__ __volatile__ (" alr %0,%1\n" " slr 0,0\n" " lr 4,%1\n" " sacf 512\n" @@ -465,10 +468,10 @@ strnlen_user(const char * src, unsigned long n) " jo 0b\n" " slr %0,%1\n" " ahi %0,1\n" - " sacf 0(1)\n" + " sacf 0\n" "1:\n" ".section .fixup,\"ax\"\n" - "2: sacf 0(1)\n" + "2: sacf 0\n" " slr %0,%0\n" " bras 4,3f\n" " .long 1b\n" @@ -480,7 +483,7 @@ strnlen_user(const char * src, unsigned long n) " .long 0b,2b\n" ".previous" : "+&a" (n) : "d" (src) - : "cc", "0", "1", "4" ); + : "cc", "0", "4" ); return n; } #define strlen_user(str) strnlen_user(str, ~0UL) @@ -490,26 +493,45 @@ strnlen_user(const char * src, unsigned long n) */ static inline unsigned long -clear_user(void *to, unsigned long n) +__clear_user(void *to, unsigned long n) { - __asm__ __volatile__ ( " iac 1\n" - " sacf 512\n" + __asm__ __volatile__ ( " sacf 512\n" " lr 4,%1\n" " lr 5,%0\n" " sr 2,2\n" " sr 3,3\n" "0: mvcle 4,2,0\n" " jo 0b\n" - "1: sacf 0(1)\n" - " lr %0,3\n" + " sacf 0\n" + "1: lr %0,3\n" + ".section .fixup,\"ax\"\n" + "2: lhi 5,-4096\n" + " n 5,0x90\n" + " sr 5,4\n" + " mvcle 4,2,0\n" + " sacf 0\n" + " basr 4,0\n" + " l 4,3f-.(4)\n" + " br 4\n" + "3: .long 1b\n" + ".previous\n" ".section __ex_table,\"a\"\n" " .align 4\n" - " .long 0b,1b\n" + " .long 0b,2b\n" ".previous" : "+&a" (n) : "a" (to) - : "cc", "1", "2", "3", "4", "5" ); + : "cc", "2", "3", "4", "5" ); + return n; +} + +static inline unsigned long +clear_user(void *to, unsigned long n) +{ + if (access_ok(VERIFY_WRITE, to, n)) + n = __clear_user(to, n); return n; } + #endif /* _S390_UACCESS_H */ diff --git a/include/asm-s390/ucontext.h b/include/asm-s390/ucontext.h index cf7c431f1..d4e39ae77 100644 --- a/include/asm-s390/ucontext.h +++ b/include/asm-s390/ucontext.h @@ -13,8 +13,10 @@ struct ucontext { unsigned long uc_flags; struct ucontext *uc_link; stack_t uc_stack; - struct sigcontext uc_mcontext; sigset_t uc_sigmask; /* mask last for extensibility */ + struct sigcontext *sc; /* Added for pthread support */ }; + + #endif /* !_ASM_S390_UCONTEXT_H */ diff --git a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h index e7da084b0..b223e0490 100644 --- a/include/asm-s390/unistd.h +++ b/include/asm-s390/unistd.h @@ -222,7 +222,7 @@ do { \ return (type) (res); \ } while (0) -#define _svc_clobber "cc", "memory" +#define _svc_clobber "2", "cc", "memory" #define _syscall0(type,name) \ type name(void) { \ @@ -359,7 +359,6 @@ static inline _syscall1(int,_exit,int,exitcode) static inline _syscall1(int,delete_module,const char *,name) static inline _syscall2(long,stat,char *,filename,struct stat *,statbuf) -extern int sys_wait4(int, int *, int, struct rusage *); static inline pid_t waitpid(int pid, int * wait_stat, int flags) { return sys_wait4(pid, wait_stat, flags, NULL); diff --git a/include/asm-s390x/a.out.h b/include/asm-s390x/a.out.h new file mode 100644 index 000000000..72adee6ef --- /dev/null +++ b/include/asm-s390x/a.out.h @@ -0,0 +1,38 @@ +/* + * include/asm-s390/a.out.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * + * Derived from "include/asm-i386/a.out.h" + * Copyright (C) 1992, Linus Torvalds + * + * I don't think we'll ever need a.out ... + */ + +#ifndef __S390_A_OUT_H__ +#define __S390_A_OUT_H__ + +struct exec +{ + unsigned long a_info; /* Use macros N_MAGIC, etc for access */ + unsigned a_text; /* length of text, in bytes */ + unsigned a_data; /* length of data, in bytes */ + unsigned a_bss; /* length of uninitialized data area for file, in bytes */ + unsigned a_syms; /* length of symbol table data in file, in bytes */ + unsigned a_entry; /* start address */ + unsigned a_trsize; /* length of relocation info for text, in bytes */ + unsigned a_drsize; /* length of relocation info for data, in bytes */ +}; + +#define N_TRSIZE(a) ((a).a_trsize) +#define N_DRSIZE(a) ((a).a_drsize) +#define N_SYMSIZE(a) ((a).a_syms) + +#ifdef __KERNEL__ + +#define STACK_TOP TASK_SIZE + +#endif + +#endif /* __A_OUT_GNU_H__ */ diff --git a/include/asm-s390x/atomic.h b/include/asm-s390x/atomic.h new file mode 100644 index 000000000..29e40413c --- /dev/null +++ b/include/asm-s390x/atomic.h @@ -0,0 +1,236 @@ +#ifndef __ARCH_S390_ATOMIC__ +#define __ARCH_S390_ATOMIC__ + +/* + * include/asm-s390x/atomic.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), + * Denis Joseph Barrow + * + * Derived from "include/asm-i386/bitops.h" + * Copyright (C) 1992, Linus Torvalds + * + */ + +/* + * Atomic operations that C can't guarantee us. Useful for + * resource counting etc.. + * S390 uses 'Compare And Swap' for atomicity in SMP enviroment + */ + +typedef struct { volatile int counter; } atomic_t __attribute__ ((aligned (4))); +#define ATOMIC_INIT(i) { (i) } + +#define atomic_eieio() __asm__ __volatile__ ("BCR 15,0") + +static __inline__ int atomic_read(atomic_t *v) +{ + int retval; + __asm__ __volatile__("bcr 15,0\n\t" + "l %0,%1" + : "=d" (retval) : "m" (*v) ); + return retval; +} + +static __inline__ void atomic_set(atomic_t *v, int i) +{ + __asm__ __volatile__("st %1,%0\n\t" + "bcr 15,0" + : "=m" (*v) : "d" (i) ); +} + +static __inline__ void atomic_add(int i, atomic_t *v) +{ + __asm__ __volatile__(" la 2,%0\n" + " l 0,0(2)\n" + "0: lr 1,0\n" + " ar 1,%1\n" + " cs 0,1,0(2)\n" + " jl 0b" + : "+m" (*v) : "d" (i) : "0", "1", "2", "cc" ); +} + +static __inline__ int atomic_add_return (int i, atomic_t *v) +{ + int newval; + __asm__ __volatile__(" la 1,%0\n" + " l 0,0(1)\n" + "0: lr %1,0\n" + " ar %1,%2\n" + " cs 0,%1,0(1)\n" + " jl 0b" + : "+m" (*v), "=&d" (newval) + : "d" (i) : "0", "1", "cc" ); + return newval; +} + +static __inline__ int atomic_inc_and_test(volatile atomic_t *v) +{ + int i; + + __asm__ __volatile__(" l 0,%0\n" + "0: lr %1,0\n" + " ahi %1,1\n" + " cs 0,%1,%0\n" + " jl 0b" + : "+m" (*v), "=&d" (i) : : "0", "cc" ); + return i != 0; +} + +static __inline__ int atomic_add_negative(int i, atomic_t *v) +{ + int newval; + __asm__ __volatile__(" la 1,%0\n" + " l 0,0(1)\n" + "0: lr %1,0\n" + " ar %1,%2\n" + " cs 0,%1,0(1)\n" + " jl 0b\n" + : "+m" (*v), "=&d" (newval) + : "d" (i) : "0", "1", "cc" ); + return newval < 0; +} + +static __inline__ void atomic_sub(int i, atomic_t *v) +{ + __asm__ __volatile__(" la 2,%0\n" + " l 0,0(2)\n" + "0: lr 1,0\n" + " sr 1,%1\n" + " cs 0,1,0(2)\n" + " jl 0b" + : "+m" (*v) : "d" (i) : "0", "1", "2", "cc" ); +} + +static __inline__ void atomic_inc(volatile atomic_t *v) +{ + __asm__ __volatile__(" la 2,%0\n" + " l 0,0(2)\n" + "0: lr 1,0\n" + " ahi 1,1\n" + " cs 0,1,0(2)\n" + " jl 0b" + : "+m" (*v) : : "0", "1", "2", "cc" ); +} + +static __inline__ int atomic_inc_return(volatile atomic_t *v) +{ + int i; + __asm__ __volatile__(" la 1,%0\n" + " l 0,0(1)\n" + "0: lr %1,0\n" + " ahi %1,1\n" + " cs 0,%1,0(1)\n" + " jl 0b" + : "+m" (*v), "=&d" (i) : : "0", "1", "cc" ); + return i; +} + +static __inline__ void atomic_dec(volatile atomic_t *v) +{ + __asm__ __volatile__(" la 2,%0\n" + " l 0,0(2)\n" + "0: lr 1,0\n" + " ahi 1,-1\n" + " cs 0,1,0(2)\n" + " jl 0b" + : "+m" (*v) : : "0", "1", "2", "cc" ); +} + +static __inline__ int atomic_dec_return(volatile atomic_t *v) +{ + int i; + __asm__ __volatile__(" la 1,%0\n" + " l 0,0(1)\n" + "0: lr %1,0\n" + " ahi %1,-1\n" + " cs 0,%1,0(1)\n" + " jl 0b" + : "+m" (*v), "=&d" (i) : : "0", "1", "cc" ); + return i; +} + +static __inline__ int atomic_dec_and_test(volatile atomic_t *v) +{ + int i; + __asm__ __volatile__(" la 1,%0\n" + " l 0,0(1)\n" + "0: lr %1,0\n" + " ahi %1,-1\n" + " cs 0,%1,0(1)\n" + " jl 0b" + : "+m" (*v), "=&d" (i) : : "0", "1", "cc"); + return i == 0; +} + +static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *v) +{ + __asm__ __volatile__(" la 2,%0\n" + " l 0,0(2)\n" + "0: lr 1,0\n" + " nr 1,%1\n" + " cs 0,1,0(2)\n" + " jl 0b" + : "+m" (*v) : "d" (~(mask)) + : "0", "1", "2", "cc" ); +} + +static __inline__ void atomic_set_mask(unsigned long mask, atomic_t *v) +{ + __asm__ __volatile__(" la 2,%0\n" + " l 0,0(2)\n" + "0: lr 1,0\n" + " or 1,%1\n" + " cs 0,1,0(2)\n" + " jl 0b" + : "+m" (*v) : "d" (mask) : "0", "1", "2", "cc" ); +} + +/* + returns 0 if expected_oldval==value in *v ( swap was successful ) + returns 1 if unsuccessful. +*/ +static __inline__ int +atomic_compare_and_swap(int expected_oldval,int new_val,atomic_t *v) +{ + int retval; + + __asm__ __volatile__( + " la 1,%1\n" + " lr 0,%2\n" + " cs 0,%3,0(1)\n" + " ipm %0\n" + " srl %0,28" + : "=&r" (retval), "+m" (*v) + : "d" (expected_oldval) , "d" (new_val) + : "0", "1", "cc"); + return retval; +} + +/* + Spin till *v = expected_oldval then swap with newval. + */ +static __inline__ void +atomic_compare_and_swap_spin(int expected_oldval,int new_val,atomic_t *v) +{ + __asm__ __volatile__( + " la 1,%0\n" + "0: lr 0,%1\n" + " cs 0,%2,0(1)\n" + " jl 0b\n" + : "+m" (*v) + : "d" (expected_oldval) , "d" (new_val) + : "cc", "0", "1"); +} + +#define atomic_compare_and_swap_debug(where,from,to) \ +if (atomic_compare_and_swap ((from), (to), (where))) {\ + printk (KERN_WARNING"%s/%d atomic counter:%s couldn't be changed from %d(%s) to %d(%s), was %d\n",\ + __FILE__,__LINE__,#where,(from),#from,(to),#to,atomic_read (where));\ + atomic_set(where,(to));\ +} + +#endif /* __ARCH_S390_ATOMIC __ */ + diff --git a/include/asm-s390x/bitops.h b/include/asm-s390x/bitops.h new file mode 100644 index 000000000..6f4204e72 --- /dev/null +++ b/include/asm-s390x/bitops.h @@ -0,0 +1,884 @@ +/* + * include/asm-s390/bitops.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) + * + * Derived from "include/asm-i386/bitops.h" + * Copyright (C) 1992, Linus Torvalds + * + */ + +#ifndef _S390_BITOPS_H +#define _S390_BITOPS_H + +/* + * bit 0 is the LSB of *addr; bit 63 is the MSB of *addr; + * bit 64 is the LSB of *(addr+8). That combined with the + * big endian byte order on S390 give the following bit + * order in memory: + * 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30 + * 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20 + * 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10 + * 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00 + * after that follows the next long with bit numbers + * 7f 7e 7d 7c 7b 7a 79 78 77 76 75 74 73 72 71 70 + * 6f 6e 6d 6c 6b 6a 69 68 67 66 65 64 63 62 61 60 + * 5f 5e 5d 5c 5b 5a 59 58 57 56 55 54 53 52 51 50 + * 4f 4e 4d 4c 4b 4a 49 48 47 46 45 44 43 42 41 40 + * The reason for this bit ordering is the fact that + * in the architecture independent code bits operations + * of the form "flags |= (1 << bitnr)" are used INTERMIXED + * with operation of the form "set_bit(bitnr, flags)". + */ +#include <linux/config.h> + +/* set ALIGN_CS to 1 if the SMP safe bit operations should + * align the address to 4 byte boundary. It seems to work + * without the alignment. + */ +#define ALIGN_CS 0 + +/* bitmap tables from arch/S390/kernel/bitmap.S */ +extern const char _oi_bitmap[]; +extern const char _ni_bitmap[]; +extern const char _zb_findmap[]; + +#ifdef CONFIG_SMP +/* + * SMP save set_bit routine based on compare and swap (CS) + */ +static __inline__ void set_bit_cs(unsigned long nr, volatile void * addr) +{ + unsigned long bits, mask; + __asm__ __volatile__( +#if ALIGN_CS == 1 + " lghi %2,3\n" /* CS must be aligned on 4 byte b. */ + " ngr %2,%1\n" /* isolate last 2 bits of address */ + " xgr %1,%2\n" /* make addr % 4 == 0 */ + " sllg %2,%2,3\n" + " agr %0,%2\n" /* add alignement to bitnr */ +#endif + " lghi %2,63\n" + " nr %2,%0\n" /* make shift value */ + " xr %0,%2\n" + " srlg %0,%0,3\n" + " lghi %3,1\n" + " la %1,0(%0,%1)\n" /* calc. address for CS */ + " sllg %3,%3,0(%2)\n" /* make OR mask */ + " lg %0,0(%1)\n" + "0: lgr %2,%0\n" /* CS loop starts here */ + " ogr %2,%3\n" /* set bit */ + " csg %0,%2,0(%1)\n" + " jl 0b" + : "+a" (nr), "+a" (addr), "=a" (bits), "=d" (mask) : + : "cc", "memory" ); +} + +/* + * SMP save clear_bit routine based on compare and swap (CS) + */ +static __inline__ void clear_bit_cs(unsigned long nr, volatile void * addr) +{ + unsigned long bits, mask; + __asm__ __volatile__( +#if ALIGN_CS == 1 + " lghi %2,3\n" /* CS must be aligned on 4 byte b. */ + " ngr %2,%1\n" /* isolate last 2 bits of address */ + " xgr %1,%2\n" /* make addr % 4 == 0 */ + " sllg %2,%2,3\n" + " agr %0,%2\n" /* add alignement to bitnr */ +#endif + " lghi %2,63\n" + " nr %2,%0\n" /* make shift value */ + " xr %0,%2\n" + " srlg %0,%0,3\n" + " lghi %3,-2\n" + " la %1,0(%0,%1)\n" /* calc. address for CS */ + " lghi %3,-2\n" + " rllg %3,%3,0(%2)\n" /* make AND mask */ + " lg %0,0(%1)\n" + "0: lgr %2,%0\n" /* CS loop starts here */ + " ngr %2,%3\n" /* clear bit */ + " csg %0,%2,0(%1)\n" + " jl 0b" + : "+a" (nr), "+a" (addr), "=a" (bits), "=d" (mask) : + : "cc", "memory" ); +} + +/* + * SMP save change_bit routine based on compare and swap (CS) + */ +static __inline__ void change_bit_cs(unsigned long nr, volatile void * addr) +{ + unsigned long bits, mask; + __asm__ __volatile__( +#if ALIGN_CS == 1 + " lghi %2,3\n" /* CS must be aligned on 4 byte b. */ + " ngr %2,%1\n" /* isolate last 2 bits of address */ + " xgr %1,%2\n" /* make addr % 4 == 0 */ + " sllg %2,%2,3\n" + " agr %0,%2\n" /* add alignement to bitnr */ +#endif + " lghi %2,63\n" + " nr %2,%0\n" /* make shift value */ + " xr %0,%2\n" + " srlg %0,%0,3\n" + " lghi %3,1\n" + " la %1,0(%0,%1)\n" /* calc. address for CS */ + " sllg %3,%3,0(%2)\n" /* make XR mask */ + " lg %0,0(%1)\n" + "0: lgr %2,%0\n" /* CS loop starts here */ + " xgr %2,%3\n" /* change bit */ + " csg %0,%2,0(%1)\n" + " jl 0b" + : "+a" (nr), "+a" (addr), "=a" (bits), "=d" (mask) : + : "cc", "memory" ); +} + +/* + * SMP save test_and_set_bit routine based on compare and swap (CS) + */ +static __inline__ int +test_and_set_bit_cs(unsigned long nr, volatile void * addr) +{ + unsigned long bits, mask; + __asm__ __volatile__( +#if ALIGN_CS == 1 + " lghi %2,3\n" /* CS must be aligned on 4 byte b. */ + " ngr %2,%1\n" /* isolate last 2 bits of address */ + " xgr %1,%2\n" /* make addr % 4 == 0 */ + " sllg %2,%2,3\n" + " agr %0,%2\n" /* add alignement to bitnr */ +#endif + " lghi %2,63\n" + " nr %2,%0\n" /* make shift value */ + " xr %0,%2\n" + " srlg %0,%0,3\n" + " lghi %3,1\n" + " la %1,0(%0,%1)\n" /* calc. address for CS */ + " sllg %3,%3,0(%2)\n" /* make OR mask */ + " lg %0,0(%1)\n" + "0: lgr %2,%0\n" /* CS loop starts here */ + " ogr %2,%3\n" /* set bit */ + " csg %0,%2,0(%1)\n" + " jl 0b\n" + " ngr %0,%3\n" /* isolate old bit */ + : "+a" (nr), "+a" (addr), "=a" (bits), "=d" (mask) : + : "cc", "memory" ); + return nr != 0; +} + +/* + * SMP save test_and_clear_bit routine based on compare and swap (CS) + */ +static __inline__ int +test_and_clear_bit_cs(unsigned long nr, volatile void * addr) +{ + unsigned long bits, mask; + __asm__ __volatile__( +#if ALIGN_CS == 1 + " lghi %2,3\n" /* CS must be aligned on 4 byte b. */ + " ngr %2,%1\n" /* isolate last 2 bits of address */ + " xgr %1,%2\n" /* make addr % 4 == 0 */ + " sllg %2,%2,3\n" + " agr %0,%2\n" /* add alignement to bitnr */ +#endif + " lghi %2,63\n" + " nr %2,%0\n" /* make shift value */ + " xr %0,%2\n" + " srlg %0,%0,3\n" + " lghi %3,-2\n" + " la %1,0(%0,%1)\n" /* calc. address for CS */ + " rllg %3,%3,0(%2)\n" /* make AND mask */ + " lg %0,0(%1)\n" + "0: lgr %2,%0\n" /* CS loop starts here */ + " ngr %2,%3\n" /* clear bit */ + " csg %0,%2,0(%1)\n" + " jl 0b\n" + " xgr %0,%2\n" /* isolate old bit */ + : "+a" (nr), "+a" (addr), "=a" (bits), "=d" (mask) : + : "cc", "memory" ); + return nr != 0; +} + +/* + * SMP save test_and_change_bit routine based on compare and swap (CS) + */ +static __inline__ int +test_and_change_bit_cs(unsigned long nr, volatile void * addr) +{ + unsigned long bits, mask; + __asm__ __volatile__( +#if ALIGN_CS == 1 + " lghi %2,3\n" /* CS must be aligned on 4 byte b. */ + " ngr %2,%1\n" /* isolate last 2 bits of address */ + " xgr %1,%2\n" /* make addr % 4 == 0 */ + " sllg %2,%2,3\n" + " agr %0,%2\n" /* add alignement to bitnr */ +#endif + " lghi %2,63\n" + " nr %2,%0\n" /* make shift value */ + " xr %0,%2\n" + " srlg %0,%0,3\n" + " lghi %3,1\n" + " la %1,0(%0,%1)\n" /* calc. address for CS */ + " sllg %3,%3,0(%2)\n" /* make OR mask */ + " lg %0,0(%1)\n" + "0: lgr %2,%0\n" /* CS loop starts here */ + " xgr %2,%3\n" /* change bit */ + " csg %0,%2,0(%1)\n" + " jl 0b\n" + " ngr %0,%3\n" /* isolate old bit */ + : "+a" (nr), "+a" (addr), "=a" (bits), "=d" (mask) : + : "cc", "memory" ); + return nr != 0; +} +#endif /* CONFIG_SMP */ + +/* + * fast, non-SMP set_bit routine + */ +static __inline__ void __set_bit(unsigned long nr, volatile void * addr) +{ + __asm__ __volatile__( + " lghi 2,56\n" + " lghi 1,7\n" + " xgr 2,%0\n" + " nr 1,%0\n" + " srlg 2,2,3\n" + " la 2,0(2,%1)\n" + " la 1,0(1,%2)\n" + " oc 0(1,2),0(1)" + : : "a" (nr), "a" (addr), "a" (&_oi_bitmap) + : "cc", "memory", "1", "2" ); +} + +static __inline__ void +__constant_set_bit(const unsigned long nr, volatile void * addr) +{ + switch (nr&7) { + case 0: + __asm__ __volatile__ ("la 1,%0\n\t" + "oi 0(1),0x01" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory"); + break; + case 1: + __asm__ __volatile__ ("la 1,%0\n\t" + "oi 0(1),0x02" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 2: + __asm__ __volatile__ ("la 1,%0\n\t" + "oi 0(1),0x04" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 3: + __asm__ __volatile__ ("la 1,%0\n\t" + "oi 0(1),0x08" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 4: + __asm__ __volatile__ ("la 1,%0\n\t" + "oi 0(1),0x10" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 5: + __asm__ __volatile__ ("la 1,%0\n\t" + "oi 0(1),0x20" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 6: + __asm__ __volatile__ ("la 1,%0\n\t" + "oi 0(1),0x40" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 7: + __asm__ __volatile__ ("la 1,%0\n\t" + "oi 0(1),0x80" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + } +} + +#define set_bit_simple(nr,addr) \ +(__builtin_constant_p((nr)) ? \ + __constant_set_bit((nr),(addr)) : \ + __set_bit((nr),(addr)) ) + +/* + * fast, non-SMP clear_bit routine + */ +static __inline__ void +__clear_bit(unsigned long nr, volatile void * addr) +{ + __asm__ __volatile__( + " lghi 2,56\n" + " lghi 1,7\n" + " xgr 2,%0\n" + " nr 1,%0\n" + " srlg 2,2,3\n" + " la 2,0(2,%1)\n" + " la 1,0(1,%2)\n" + " nc 0(1,2),0(1)" + : : "d" (nr), "a" (addr), "a" (&_ni_bitmap) + : "cc", "memory", "1", "2" ); +} + +static __inline__ void +__constant_clear_bit(const unsigned long nr, volatile void * addr) +{ + switch (nr&7) { + case 0: + __asm__ __volatile__ ("la 1,%0\n\t" + "ni 0(1),0xFE" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 1: + __asm__ __volatile__ ("la 1,%0\n\t" + "ni 0(1),0xFD" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 2: + __asm__ __volatile__ ("la 1,%0\n\t" + "ni 0(1),0xFB" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 3: + __asm__ __volatile__ ("la 1,%0\n\t" + "ni 0(1),0xF7" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 4: + __asm__ __volatile__ ("la 1,%0\n\t" + "ni 0(1),0xEF" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "cc", "memory" ); + break; + case 5: + __asm__ __volatile__ ("la 1,%0\n\t" + "ni 0(1),0xDF" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 6: + __asm__ __volatile__ ("la 1,%0\n\t" + "ni 0(1),0xBF" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 7: + __asm__ __volatile__ ("la 1,%0\n\t" + "ni 0(1),0x7F" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + } +} + +#define clear_bit_simple(nr,addr) \ +(__builtin_constant_p((nr)) ? \ + __constant_clear_bit((nr),(addr)) : \ + __clear_bit((nr),(addr)) ) + +/* + * fast, non-SMP change_bit routine + */ +static __inline__ void __change_bit(unsigned long nr, volatile void * addr) +{ + __asm__ __volatile__( + " lghi 2,56\n" + " lghi 1,7\n" + " xgr 2,%0\n" + " nr 1,%0\n" + " srlg 2,2,3\n" + " la 2,0(2,%1)\n" + " la 1,0(1,%2)\n" + " xc 0(1,2),0(1)" + : : "d" (nr), "a" (addr), "a" (&_oi_bitmap) + : "cc", "memory", "1", "2" ); +} + +static __inline__ void +__constant_change_bit(const unsigned long nr, volatile void * addr) +{ + switch (nr&7) { + case 0: + __asm__ __volatile__ ("la 1,%0\n\t" + "xi 0(1),0x01" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "cc", "memory" ); + break; + case 1: + __asm__ __volatile__ ("la 1,%0\n\t" + "xi 0(1),0x02" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "cc", "memory" ); + break; + case 2: + __asm__ __volatile__ ("la 1,%0\n\t" + "xi 0(1),0x04" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "cc", "memory" ); + break; + case 3: + __asm__ __volatile__ ("la 1,%0\n\t" + "xi 0(1),0x08" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "cc", "memory" ); + break; + case 4: + __asm__ __volatile__ ("la 1,%0\n\t" + "xi 0(1),0x10" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "cc", "memory" ); + break; + case 5: + __asm__ __volatile__ ("la 1,%0\n\t" + "xi 0(1),0x20" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 6: + __asm__ __volatile__ ("la 1,%0\n\t" + "xi 0(1),0x40" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + case 7: + __asm__ __volatile__ ("la 1,%0\n\t" + "xi 0(1),0x80" + : "=m" (*((volatile char *) addr + ((nr>>3)^7))) + : : "1", "cc", "memory" ); + break; + } +} + +#define change_bit_simple(nr,addr) \ +(__builtin_constant_p((nr)) ? \ + __constant_change_bit((nr),(addr)) : \ + __change_bit((nr),(addr)) ) + +/* + * fast, non-SMP test_and_set_bit routine + */ +static __inline__ int +test_and_set_bit_simple(unsigned long nr, volatile void * addr) +{ + int oldbit; + __asm__ __volatile__( + " lghi 1,56\n" + " lghi 2,7\n" + " xgr 1,%1\n" + " nr 2,%1\n" + " srlg 1,1,3\n" + " la 1,0(1,%2)\n" + " ic %0,0(1)\n" + " srl %0,0(2)\n" + " la 2,0(2,%3)\n" + " oc 0(1,1),0(2)" + : "=&d" (oldbit) : "d" (nr), "a" (addr), "a" (&_oi_bitmap) + : "cc", "memory", "1", "2" ); + return oldbit & 1; +} + +/* + * fast, non-SMP test_and_clear_bit routine + */ +static __inline__ int +test_and_clear_bit_simple(unsigned long nr, volatile void * addr) +{ + int oldbit; + + __asm__ __volatile__( + " lghi 1,56\n" + " lghi 2,7\n" + " xgr 1,%1\n" + " nr 2,%1\n" + " srlg 1,1,3\n" + " la 1,0(1,%2)\n" + " ic %0,0(1)\n" + " srl %0,0(2)\n" + " la 2,0(2,%3)\n" + " nc 0(1,1),0(2)" + : "=&d" (oldbit) : "d" (nr), "a" (addr), "a" (&_ni_bitmap) + : "cc", "memory", "1", "2" ); + return oldbit & 1; +} + +/* + * fast, non-SMP test_and_change_bit routine + */ +static __inline__ int +test_and_change_bit_simple(unsigned long nr, volatile void * addr) +{ + int oldbit; + + __asm__ __volatile__( + " lghi 1,56\n" + " lghi 2,7\n" + " xgr 1,%1\n" + " nr 2,%1\n" + " srlg 1,1,3\n" + " la 1,0(1,%2)\n" + " ic %0,0(1)\n" + " srl %0,0(2)\n" + " la 2,0(2,%3)\n" + " xc 0(1,1),0(2)" + : "=&d" (oldbit) : "d" (nr), "a" (addr), "a" (&_oi_bitmap) + : "cc", "memory", "1", "2" ); + return oldbit & 1; +} + +#ifdef CONFIG_SMP +#define set_bit set_bit_cs +#define clear_bit clear_bit_cs +#define change_bit change_bit_cs +#define test_and_set_bit test_and_set_bit_cs +#define test_and_clear_bit test_and_clear_bit_cs +#define test_and_change_bit test_and_change_bit_cs +#else +#define set_bit set_bit_simple +#define clear_bit clear_bit_simple +#define change_bit change_bit_simple +#define test_and_set_bit test_and_set_bit_simple +#define test_and_clear_bit test_and_clear_bit_simple +#define test_and_change_bit test_and_change_bit_simple +#endif + + +/* + * This routine doesn't need to be atomic. + */ + +static __inline__ int __test_bit(unsigned long nr, volatile void * addr) +{ + int oldbit; + + __asm__ __volatile__( + " lghi 2,56\n" + " lghi 1,7\n" + " xgr 2,%1\n" + " nr 1,%1\n" + " srlg 2,2,3\n" + " ic %0,0(2,%2)\n" + " srl %0,0(1)\n" + : "=&d" (oldbit) : "d" (nr), "a" (addr) + : "cc", "1", "2" ); + return oldbit & 1; +} + +static __inline__ int +__constant_test_bit(unsigned long nr, volatile void * addr) { + return (((volatile char *) addr)[(nr>>3)^7] & (1<<(nr&7))) != 0; +} + +#define test_bit(nr,addr) \ +(__builtin_constant_p((nr)) ? \ + __constant_test_bit((nr),(addr)) : \ + __test_bit((nr),(addr)) ) + +/* + * Find-bit routines.. + */ +static __inline__ unsigned long +find_first_zero_bit(void * addr, unsigned long size) +{ + unsigned long res; + + if (!size) + return 0; + __asm__(" lghi 0,-1\n" + " lgr 1,%1\n" + " slgr %0,%0\n" + " aghi 1,63\n" + " srlg 1,1,6\n" + "0: cg 0,0(%0,%2)\n" + " jne 1f\n" + " aghi %0,8\n" + " brct 1,0b\n" + " lgr %0,%1\n" + " j 5f\n" + "1: lg 1,0(%0,%2)\n" + " sllg %0,%0,3\n" + " clr 1,0\n" + " jne 2f\n" + " aghi %0,32\n" + " srlg 1,1,32\n" + "2: lghi 0,0xff\n" + " tmll 1,0xffff\n" + " jno 3f\n" + " aghi %0,16\n" + " srl 1,16\n" + "3: tmll 1,0x00ff\n" + " jno 4f\n" + " aghi %0,8\n" + " srl 1,8\n" + "4: ngr 1,0\n" + " ic 1,0(1,%3)\n" + " algr %0,1\n" + "5:" + : "=&a" (res) : "a" (size), "a" (addr), "a" (&_zb_findmap) + : "cc", "0", "1" ); + return (res < size) ? res : size; +} + +static __inline__ unsigned long +find_next_zero_bit (void * addr, unsigned long size, unsigned long offset) +{ + unsigned long * p = ((unsigned long *) addr) + (offset >> 6); + unsigned long bitvec; + unsigned long set, bit = offset & 63, res; + + if (bit) { + /* + * Look for zero in first word + */ + bitvec = (*p) >> bit; + __asm__(" lhi 0,-1\n" + " lgr 1,%1\n" + " slgr %0,%0\n" + " clr 1,0\n" + " jne 0f\n" + " aghi %0,32\n" + " srlg 1,1,32\n" + "0: lghi 0,0xff\n" + " tmll 1,0xffff\n" + " jno 1f\n" + " aghi %0,16\n" + " srlg 1,1,16\n" + "1: tmll 1,0x00ff\n" + " jno 2f\n" + " aghi %0,8\n" + " srlg 1,1,8\n" + "2: ngr 1,0\n" + " ic 1,0(1,%2)\n" + " algr %0,1" + : "=&d" (set) + : "d" (bitvec), "a" (&_zb_findmap) + : "cc", "0", "1" ); + if (set < (64 - bit)) + return set + offset; + offset += 64 - bit; + p++; + } + /* + * No zero yet, search remaining full words for a zero + */ + res = find_first_zero_bit (p, size - 64 * (p - (unsigned long *) addr)); + return (offset + res); +} + +/* + * ffz = Find First Zero in word. Undefined if no zero exists, + * so code should check against ~0UL first.. + */ +static __inline__ unsigned long ffz(unsigned long word) +{ + int result; + + __asm__(" lhi 0,-1\n" + " lgr 1,%1\n" + " slgr %0,%0\n" + " clr 1,0\n" + " jne 0f\n" + " aghi %0,32\n" + " srlg 1,1,32\n" + "0: lghi 0,0xff\n" + " tmll 1,0xffff\n" + " jno 1f\n" + " aghi %0,16\n" + " srlg 1,1,16\n" + "1: tmll 1,0x00ff\n" + " jno 2f\n" + " aghi %0,8\n" + " srlg 1,1,8\n" + "2: ngr 1,0\n" + " ic 1,0(1,%2)\n" + " algr %0,1" + : "=&d" (result) + : "d" (word), "a" (&_zb_findmap) + : "cc", "0", "1" ); + + return result; +} + +/* + * ffs: find first bit set. This is defined the same way as + * the libc and compiler builtin ffs routines, therefore + * differs in spirit from the above ffz (man ffs). + */ + +extern int __inline__ ffs (int x) +{ + int r; + + if (x == 0) + return 0; + __asm__(" lr 1,%1\n" + " slr %0,%0\n" + " tml 1,0xFFFF\n" + " jnz 0f\n" + " ahi %0,16\n" + " srl 1,16\n" + "0: tml 1,0x00FF\n" + " jnz 1f\n" + " ahi %0,8\n" + " srl 1,8\n" + "1: tml 1,0x000F\n" + " jnz 2f\n" + " ahi %0,4\n" + " srl 1,4\n" + "2: tml 1,0x0003\n" + " jnz 3f\n" + " ahi %0,2\n" + " srl 1,2\n" + "3: tml 1,0x0001\n" + " jnz 4f\n" + " ahi %0,1\n" + "4:" + : "=&d" (r) : "d" (x) : "cc", "1" ); + return r+1; +} + +/* + * hweightN: returns the hamming weight (i.e. the number + * of bits set) of a N-bit word + */ + +#define hweight32(x) generic_hweight32(x) +#define hweight16(x) generic_hweight16(x) +#define hweight8(x) generic_hweight8(x) + + +#ifdef __KERNEL__ + +/* + * ATTENTION: intel byte ordering convention for ext2 and minix !! + * bit 0 is the LSB of addr; bit 31 is the MSB of addr; + * bit 32 is the LSB of (addr+4). + * That combined with the little endian byte order of Intel gives the + * following bit order in memory: + * 07 06 05 04 03 02 01 00 15 14 13 12 11 10 09 08 \ + * 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24 + */ + +#define ext2_set_bit(nr, addr) test_and_set_bit((nr)^56, addr) +#define ext2_clear_bit(nr, addr) test_and_clear_bit((nr)^56, addr) +#define ext2_test_bit(nr, addr) test_bit((nr)^56, addr) +static __inline__ unsigned long +ext2_find_first_zero_bit(void *vaddr, unsigned long size) +{ + unsigned long res; + + if (!size) + return 0; + __asm__(" lghi 0,-1\n" + " lgr 1,%1\n" + " aghi 1,63\n" + " srlg 1,1,6\n" + " slgr %0,%0\n" + "0: clg 0,0(%0,%2)\n" + " jne 1f\n" + " aghi %0,8\n" + " brct 1,0b\n" + " lgr %0,%1\n" + " j 5f\n" + "1: cl 0,0(%0,%2)\n" + " jne 2f\n" + " aghi %0,4\n" + "2: l 1,0(%0,%2)\n" + " sllg %0,%0,3\n" + " aghi %0,24\n" + " lghi 0,0xff\n" + " tmlh 1,0xffff\n" + " jo 3f\n" + " aghi %0,-16\n" + " srl 1,16\n" + "3: tmll 1,0xff00\n" + " jo 4f\n" + " aghi %0,-8\n" + " srl 1,8\n" + "4: ngr 1,0\n" + " ic 1,0(1,%3)\n" + " algr %0,1\n" + "5:" + : "=&a" (res) : "a" (size), "a" (vaddr), "a" (&_zb_findmap) + : "cc", "0", "1" ); + return (res < size) ? res : size; +} + +static __inline__ unsigned long +ext2_find_next_zero_bit(void *vaddr, unsigned long size, unsigned long offset) +{ + unsigned long *addr = vaddr; + unsigned long *p = addr + (offset >> 6); + unsigned long word; + unsigned long bit = offset & 63UL, res; + + if (offset >= size) + return size; + + if (bit) { + __asm__(" lrvg %0,%1" /* load reversed, neat instruction */ + : "=a" (word) : "m" (*p) ); + word >>= bit; + res = bit; + /* Look for zero in first 8 byte word */ + __asm__(" lgr 1,%1\n" + " lghi 0,0xff\n" + " tmll 1,0xffff\n" + " jno 2f\n" + " ahi %0,16\n" + " srlg 1,1,16\n" + "0: tmll 1,0xffff\n" + " jno 2f\n" + " ahi %0,16\n" + " srlg 1,1,16\n" + "1: tmll 1,0xffff\n" + " jno 2f\n" + " ahi %0,16\n" + " srl 1,16\n" + "2: tmll 1,0x00ff\n" + " jno 3f\n" + " ahi %0,8\n" + " srl 1,8\n" + "3: ngr 1,0\n" + " ic 1,0(1,%2)\n" + " alr %0,1" + : "+&d" (res) + : "d" (word), "a" (&_zb_findmap) + : "cc", "0", "1" ); + if (res < 64) + return (p - addr)*64 + res; + p++; + } + /* No zero yet, search remaining full bytes for a zero */ + res = ext2_find_first_zero_bit (p, size - 64 * (p - addr)); + return (p - addr) * 64 + res; +} + +/* Bitmap functions for the minix filesystem. */ +/* FIXME !!! */ +#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr) +#define minix_set_bit(nr,addr) set_bit(nr,addr) +#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr) +#define minix_test_bit(nr,addr) test_bit(nr,addr) +#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size) + +#endif /* __KERNEL__ */ + +#endif /* _S390_BITOPS_H */ diff --git a/include/asm-s390x/bugs.h b/include/asm-s390x/bugs.h new file mode 100644 index 000000000..2c3659621 --- /dev/null +++ b/include/asm-s390x/bugs.h @@ -0,0 +1,22 @@ +/* + * include/asm-s390/bugs.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) + * + * Derived from "include/asm-i386/bugs.h" + * Copyright (C) 1994 Linus Torvalds + */ + +/* + * This is included by init/main.c to check for architecture-dependent bugs. + * + * Needs: + * void check_bugs(void); + */ + +static void __init check_bugs(void) +{ + /* s390 has no bugs ... */ +} diff --git a/include/asm-s390x/byteorder.h b/include/asm-s390x/byteorder.h new file mode 100644 index 000000000..15bb43ff4 --- /dev/null +++ b/include/asm-s390x/byteorder.h @@ -0,0 +1,113 @@ +#ifndef _S390_BYTEORDER_H +#define _S390_BYTEORDER_H + +/* + * include/asm-s390/byteorder.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) + */ + +#include <asm/types.h> + +#ifdef __GNUC__ + +static __inline__ __const__ __u64 ___arch__swab64(__u64 x) +{ + __u64 result; + + __asm__ __volatile__ ( + " lrvg %0,%1" + : "=&d" (result) : "m" (x) ); + return result; +} + +static __inline__ __const__ __u64 ___arch__swab64p(__u64 *x) +{ + __u64 result; + + __asm__ __volatile__ ( + " lrvg %0,%1" + : "=d" (result) : "m" (*x) ); + return result; +} + +static __inline__ void ___arch__swab64s(__u64 *x) +{ + __asm__ __volatile__ ( + " lrvg %0,%1\n" + " stg %0,%1" + : : "m" (*x) : "memory"); +} + +static __inline__ __const__ __u32 ___arch__swab32(__u32 x) +{ + __u32 result; + + __asm__ __volatile__ ( + " lrv %0,%1" + : "=&d" (result) : "m" (x) ); + return result; +} + +static __inline__ __const__ __u32 ___arch__swab32p(__u32 *x) +{ + __u32 result; + + __asm__ __volatile__ ( + " lrv %0,%1" + : "=d" (result) : "m" (*x) ); + return result; +} + +static __inline__ void ___arch__swab32s(__u32 *x) +{ + __asm__ __volatile__ ( + " lrv %0,%1\n" + " st %0,%1" + : : "m" (*x) : "memory"); +} + +static __inline__ __const__ __u16 ___arch__swab16(__u16 x) +{ + __u16 result; + + __asm__ __volatile__ ( + " lrvh %0,%1" + : "=d" (result) : "m" (x) ); + return result; +} + +static __inline__ __const__ __u16 ___arch__swab16p(__u16 *x) +{ + __u16 result; + + __asm__ __volatile__ ( + " lrvh %0,%1" + : "=d" (result) : "m" (*x) ); + return result; +} + +static __inline__ void ___arch__swab16s(__u16 *x) +{ + __asm__ __volatile__ ( + " lrvh %0,%1\n" + " sth %0,%1" + : : "m" (*x) : "memory"); +} + +#define __arch__swab32(x) ___arch__swab32(x) +#define __arch__swab16(x) ___arch__swab16(x) +#define __arch__swab32p(x) ___arch__swab32p(x) +#define __arch__swab16p(x) ___arch__swab16p(x) +#define __arch__swab32s(x) ___arch__swab32s(x) +#define __arch__swab16s(x) ___arch__swab16s(x) + +#define __BYTEORDER_HAS_U64__ + +#endif /* __GNUC__ */ + +#include <linux/byteorder/big_endian.h> + +#endif /* _S390_BYTEORDER_H */ diff --git a/include/asm-s390x/cache.h b/include/asm-s390x/cache.h new file mode 100644 index 000000000..ad82cf8e0 --- /dev/null +++ b/include/asm-s390x/cache.h @@ -0,0 +1,16 @@ +/* + * include/asm-s390/cache.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * + * Derived from "include/asm-i386/cache.h" + * Copyright (C) 1992, Linus Torvalds + */ + +#ifndef __ARCH_S390_CACHE_H +#define __ARCH_S390_CACHE_H + +#define L1_CACHE_BYTES 16 + +#endif diff --git a/include/asm-s390x/ccwcache.h b/include/asm-s390x/ccwcache.h new file mode 100644 index 000000000..cfbb03bf2 --- /dev/null +++ b/include/asm-s390x/ccwcache.h @@ -0,0 +1,84 @@ +/* + * File...........: linux/include/asm-s390/ccwcache.h + * Author(s)......: Holger Smolinski <Holger.Smolinski@de.ibm.com> + * Bugreports.to..: <Linux390@de.ibm.com> + * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 2000 + */ +#ifndef CCWCACHE_H +#define CCWCACHE_H +#include <linux/slab.h> +#include <asm/irq.h> + +#ifndef __KERNEL__ +#define kmem_cache_t void +#endif /* __KERNEL__ */ + +typedef struct ccw_req_t { + /* eye catcher plus queueing information */ + unsigned int magic; + struct ccw_req_t *next; /* pointer to next ccw_req_t in queue */ + struct ccw_req_t *int_next; /* for internal queueing */ + struct ccw_req_t *int_prev; /* for internal queueing */ + + /* Where to execute what... */ + void *device; /* index of the device the req is for */ + void *req; /* pointer to originating request */ + ccw1_t *cpaddr; /* address of channel program */ + char status; /* reflecting the status of this request */ + char flags; /* see below */ + short retries; /* A retry counter to be set when filling */ + + /* ... and how */ + int options; /* options for execution */ + char lpm; /* logical path mask */ + void *data; /* pointer to data area */ + devstat_t *dstat; /* The device status in case of an error */ + + /* these are important for recovering erroneous requests */ + struct ccw_req_t *refers; /* Does this request refer to another one? */ + void *function; /* refers to the originating ERP action */ ; + + unsigned long long expires; /* expiratioj period */ + /* these are for profiling purposes */ + unsigned long long buildclk; /* TOD-clock of request generation */ + unsigned long long startclk; /* TOD-clock of request start */ + unsigned long long stopclk; /* TOD-clock of request interrupt */ + unsigned long long endclk; /* TOD-clock of request termination */ + + /* these are for internal use */ + int cplength; /* length of the channel program in CCWs */ + int datasize; /* amount of additional data in bytes */ + kmem_cache_t *cache; /* the cache this data comes from */ + +} __attribute__ ((aligned(4))) ccw_req_t; + +/* + * ccw_req_t -> status can be: + */ +#define CQR_STATUS_EMPTY 0x00 /* request is empty */ +#define CQR_STATUS_FILLED 0x01 /* request is ready to be preocessed */ +#define CQR_STATUS_QUEUED 0x02 /* request is queued to be processed */ +#define CQR_STATUS_IN_IO 0x03 /* request is currently in IO */ +#define CQR_STATUS_DONE 0x04 /* request is completed sucessfully */ +#define CQR_STATUS_ERROR 0x05 /* request is completed with error */ +#define CQR_STATUS_FAILED 0x06 /* request is finally failed */ + +#define CQR_FLAGS_CHAINED 0x01 /* request is chained by another (last CCW is TIC) */ + +#ifdef __KERNEL__ +#define SMALLEST_SLAB (sizeof(struct ccw_req_t) <= 128 ? 128 :\ + sizeof(struct ccw_req_t) <= 256 ? 256 : 512 ) + +/* SMALLEST_SLAB(1),... PAGE_SIZE(CCW_NUMBER_CACHES) */ +#define CCW_NUMBER_CACHES (sizeof(struct ccw_req_t) <= 128 ? 6 :\ + sizeof(struct ccw_req_t) <= 256 ? 5 : 4 ) + +int ccwcache_init (void); + +ccw_req_t *ccw_alloc_request (char *magic, int cplength, int additional_data); +void ccw_free_request (ccw_req_t * request); +#endif /* __KERNEL__ */ +#endif /* CCWCACHE_H */ + + + diff --git a/include/asm-s390x/chandev.h b/include/asm-s390x/chandev.h new file mode 100644 index 000000000..9efb6fea3 --- /dev/null +++ b/include/asm-s390x/chandev.h @@ -0,0 +1,151 @@ +/* + * include/asm-s390/chandev.h + * + * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) + * + * Generic channel device initialisation support. + */ +#include <linux/version.h> +#include <asm/types.h> +#include <linux/netdevice.h> + +/* chandev_type is a bitmask for registering & describing device types. */ +typedef enum +{ + none=0x0, + ctc=0x1, + escon=0x2, + lcs=0x4, + osad=0x8, + qeth=0x10, + claw=0x20, +} chandev_type; + +typedef enum +{ + no_category, + network_device, + serial_device, +} chandev_category; + +/* + * The chandev_probeinfo structure is passed to the device driver with configuration + * info for which irq's & ports to use when attempting to probe the device. + */ +typedef struct +{ + int read_irq; + int write_irq; + u16 read_devno; + u16 write_devno; + s16 port_protocol_no; /* -1 don't care */ + u8 hint_port_no; /* lcs specific */ + u8 max_port_no; /* lcs specific */ + chandev_type chan_type; + u8 checksum_received_ip_pkts; + u8 use_hw_stats; /* where available e.g. lcs */ + u16 cu_type; /* control unit type */ + u8 cu_model; /* control unit model */ + u16 dev_type; /* device type */ + u8 dev_model; /* device model */ + char *parmstr; /* driver specific parameters added by add_parms keyword */ + /* newdevice used internally by chandev.c */ + struct chandev_activelist *newdevice; + s32 devif_num; +/* devif_num=-1 implies don't care,0 implies tr0, info used by chandev_initnetdevice */ +} chandev_probeinfo; + +/* + * This is a wrapper to the machine check handler & should be used + * instead of reqest_irq or s390_request_irq_special for anything + * using the channel device layer. + */ +int chandev_request_irq(unsigned int irq, + void (*handler)(int, void *, struct pt_regs *), + unsigned long irqflags, + const char *devname, + void *dev_id); + +typedef enum +{ + good=0, + not_oper, + first_msck=not_oper, + no_path, + revalidate, + gone, + last_msck, +} chandev_msck_status; + +typedef int (*chandev_probefunc)(chandev_probeinfo *probeinfo); +typedef void (*chandev_shutdownfunc)(void *device); +typedef void (*chandev_unregfunc)(void *device); +typedef void (*chandev_reoperfunc)(void *device,int msck_for_read_chan,chandev_msck_status prevstatus); + + + +/* A driver should call chandev_register_and_probe when ready to be probed, + * after registeration the drivers probefunction will be called asynchronously + * when more devices become available at normal task time. + * The shutdownfunc parameter is used so that the channel layer + * can request a driver to close unregister itself & release its interrupts. + * repoper func is used when a device becomes operational again after being temporarily + * not operational the previous status is sent in the prevstatus variable. + * This can be used in cases when the default handling isn't quite adequete + * e.g. if a ssch is needed to reinitialize long running channel programs. + */ +int chandev_register_and_probe(chandev_probefunc probefunc, + chandev_shutdownfunc shutdownfunc, + chandev_reoperfunc reoperfunc, + chandev_type chan_type); + +/* The chandev_unregister function is typically called when a module is being removed + * from the system. The shutdown parameter if TRUE calls shutdownfunc for each + * device instance so the driver writer doesn't have to. + */ +void chandev_unregister(chandev_probefunc probefunc,int call_shutdown); + +/* chandev_initdevice should be called immeadiately before returning after */ +/* a successful probe. */ +int chandev_initdevice(chandev_probeinfo *probeinfo,void *dev_ptr,u8 port_no,char *devname, +chandev_category category,chandev_unregfunc unreg_dev); + +/* chandev_initnetdevice registers a network device with the channel layer. + * It returns the device structure if successful,if dev=NULL it kmallocs it, + * On device initialisation failure it will kfree it under ALL curcumstances + * i.e. if dev is not NULL on entering this routine it MUST be malloced with kmalloc. + * The base name is tr ( e.g. tr0 without the 0 ), for token ring eth for ethernet, + * ctc or escon for ctc device drivers. + * If valid function pointers are given they will be called to setup, + * register & unregister the device. + * An example of setup is eth_setup in drivers/net/net_init.c. + * An example of init_dev is init_trdev(struct net_device *dev) + * & an example of unregister is unregister_trdev, + * unregister_netdev should be used for escon & ctc + * as there is no network unregister_ctcdev in the kernel. +*/ + +#if LINUX_VERSION_CODE>=KERNEL_VERSION(2,3,0) +struct net_device *chandev_initnetdevice(chandev_probeinfo *probeinfo,u8 port_no, + struct net_device *dev,int sizeof_priv, + char *basename, + struct net_device *(*init_netdevfunc) + (struct net_device *dev, int sizeof_priv), + void (*unreg_netdevfunc)(struct net_device *dev)); +#else +struct device *chandev_initnetdevice(chandev_probeinfo *probeinfo,u8 port_no, + struct device *dev,int sizeof_priv, + char *basename, + struct device *(*init_netdevfunc) + (struct device *dev, int sizeof_priv), + void (*unreg_netdevfunc)(struct device *dev)); +#endif + + + + + + + + diff --git a/include/asm-s390x/checksum.h b/include/asm-s390x/checksum.h new file mode 100644 index 000000000..bb825c546 --- /dev/null +++ b/include/asm-s390x/checksum.h @@ -0,0 +1,188 @@ +#ifndef _S390_CHECKSUM_H +#define _S390_CHECKSUM_H + +/* + * include/asm-s390/checksum.h + * S390 fast network checksum routines + * see also arch/S390/lib/checksum.c + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Ulrich Hild (first version) + * Martin Schwidefsky (heavily optimized CKSM version) + * D.J. Barrow (third attempt) + */ + +#include <asm/uaccess.h> + +/* + * computes the checksum of a memory block at buff, length len, + * and adds in "sum" (32-bit) + * + * returns a 32-bit number suitable for feeding into itself + * or csum_tcpudp_magic + * + * this function must be called with even lengths, except + * for the last fragment, which may be odd + * + * it's best to have buff aligned on a 32-bit boundary + */ +unsigned int +csum_partial(const unsigned char * buff, int len, unsigned int sum); + +/* + * csum_partial as an inline function + */ +extern inline unsigned int +csum_partial_inline(const unsigned char * buff, int len, unsigned int sum) +{ + __asm__ __volatile__ ( + " lgr 2,%1\n" /* address in gpr 2 */ + " lgfr 3,%2\n" /* length in gpr 3 */ + "0: cksm %0,2\n" /* do checksum on longs */ + " jo 0b\n" + : "+&d" (sum) + : "d" (buff), "d" (len) + : "cc", "2", "3" ); + return sum; +} + +/* + * the same as csum_partial, but copies from src while it + * checksums + * + * here even more important to align src and dst on a 32-bit (or even + * better 64-bit) boundary + */ + +extern inline unsigned int +csum_partial_copy(const char *src, char *dst, int len,unsigned int sum) +{ + memcpy(dst,src,len); + return csum_partial_inline(dst, len, sum); +} + +/* + * the same as csum_partial_copy, but copies from user space. + * + * here even more important to align src and dst on a 32-bit (or even + * better 64-bit) boundary + */ + +extern inline unsigned int +csum_partial_copy_from_user(const char *src, char *dst, + int len, unsigned int sum, int *errp) +{ + if (copy_from_user(dst, src, len)) { + *errp = -EFAULT; + memset(dst, 0, len); + return sum; + } + return csum_partial_inline(dst, len, sum); +} + +extern inline unsigned int +csum_partial_copy_nocheck (const char *src, char *dst, int len, unsigned int sum) +{ + memcpy(dst,src,len); + return csum_partial_inline(dst, len, sum); +} + +/* + * Fold a partial checksum without adding pseudo headers + */ +extern inline unsigned short +csum_fold(unsigned int sum) +{ + __asm__ __volatile__ ( + " sr 3,3\n" /* %0 = H*65536 + L */ + " lr 2,%0\n" /* %0 = H L, R2/R3 = H L / 0 0 */ + " srdl 2,16\n" /* %0 = H L, R2/R3 = 0 H / L 0 */ + " alr 2,3\n" /* %0 = H L, R2/R3 = L H / L 0 */ + " alr %0,2\n" /* %0 = H+L+C L+H */ + " srl %0,16\n" /* %0 = H+L+C */ + : "+&d" (sum) : : "cc", "2", "3"); + return ((unsigned short) ~sum); +} + +/* + * This is a version of ip_compute_csum() optimized for IP headers, + * which always checksum on 4 octet boundaries. + * + */ +extern inline unsigned short +ip_fast_csum(unsigned char *iph, unsigned int ihl) +{ + unsigned long sum; + + __asm__ __volatile__ ( + " slgr %0,%0\n" /* set sum to zero */ + " lgr 2,%1\n" /* address in gpr 2 */ + " lgfr 3,%2\n" /* length in gpr 3 */ + "0: cksm %0,2\n" /* do checksum on ints */ + " jo 0b\n" + : "=&d" (sum) + : "d" (iph), "d" (ihl*4) + : "cc", "2", "3" ); + return csum_fold(sum); +} + +/* + * computes the checksum of the TCP/UDP pseudo-header + * returns a 32-bit checksum + */ +extern inline unsigned int +csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, + unsigned short len, unsigned short proto, + unsigned int sum) +{ + __asm__ __volatile__ ( + " lgfr %0,%0\n" + " algr %0,%1\n" /* sum += saddr */ + " brc 12,0f\n" + " aghi %0,1\n" /* add carry */ + "0: algr %0,%2\n" /* sum += daddr */ + " brc 12,1f\n" + " aghi %0,1\n" /* add carry */ + "1: algfr %0,%3\n" /* sum += (len<<16) + proto */ + " brc 12,2f\n" + " aghi %0,1\n" /* add carry */ + "2: srlg 0,%0,32\n" + " alr %0,0\n" /* fold to 32 bits */ + " brc 12,3f\n" + " ahi %0,1\n" /* add carry */ + "3: llgfr %0,%0" + : "+&d" (sum) + : "d" (saddr), "d" (daddr), + "d" (((unsigned int) len<<16) + (unsigned int) proto) + : "cc", "0" ); + return sum; +} + +/* + * computes the checksum of the TCP/UDP pseudo-header + * returns a 16-bit checksum, already complemented + */ + +extern inline unsigned short int +csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, + unsigned short len, unsigned short proto, + unsigned int sum) +{ + return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); +} + +/* + * this routine is used for miscellaneous IP-like checksums, mainly + * in icmp.c + */ + +extern inline unsigned short +ip_compute_csum(unsigned char * buff, int len) +{ + return csum_fold(csum_partial_inline(buff, len, 0)); +} + +#endif /* _S390_CHECKSUM_H */ + + diff --git a/include/asm-s390x/current.h b/include/asm-s390x/current.h new file mode 100644 index 000000000..617c758bd --- /dev/null +++ b/include/asm-s390x/current.h @@ -0,0 +1,31 @@ +/* + * include/asm-s390/current.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) + * + * Derived from "include/asm-i386/current.h" + */ + +#ifndef _S390_CURRENT_H +#define _S390_CURRENT_H + +#ifdef __KERNEL__ + +struct task_struct; + +static inline struct task_struct * get_current(void) +{ + struct task_struct *current; + __asm__("lghi %0,-16384\n\t" + "ngr %0,15" + : "=&r" (current) ); + return current; + } + +#define current get_current() + +#endif + +#endif /* !(_S390_CURRENT_H) */ diff --git a/include/asm-s390x/dasd.h b/include/asm-s390x/dasd.h new file mode 100644 index 000000000..d9e4a8363 --- /dev/null +++ b/include/asm-s390x/dasd.h @@ -0,0 +1,339 @@ +/* + * File...........: linux/drivers/s390/block/dasd.c + * Author(s)......: Holger Smolinski <Holger.Smolinski@de.ibm.com> + * Bugreports.to..: <Linux390@de.ibm.com> + * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000 + * + * History of changes (starts July 2000) + */ + +#ifndef DASD_H +#define DASD_H + +#include <linux/ioctl.h> +#include <asm/irq.h> + +#define IOCTL_LETTER 'D' +/* Disable the volume (for Linux) */ +#define BIODASDDISABLE _IO(IOCTL_LETTER,0) +/* Enable the volume (for Linux) */ +#define BIODASDENABLE _IO(IOCTL_LETTER,1) +/* Issue a reserve/release command, rsp. */ +#define BIODASDRSRV _IO(IOCTL_LETTER,2) /* reserve */ +#define BIODASDRLSE _IO(IOCTL_LETTER,3) /* release */ +#define BIODASDSLCK _IO(IOCTL_LETTER,4) /* steal lock */ +/* Read sense ID infpormation */ +#define BIODASDRSID _IOR(IOCTL_LETTER,0,senseid_t) +/* Format the volume or an extent */ +#define BIODASDFORMAT _IOW(IOCTL_LETTER,0,format_data_t) +/* translate blocknumber of partition to absolute */ +#define BIODASDRWTB _IOWR(IOCTL_LETTER,0,int) + +#define DASD_NAME "dasd" +#define DASD_PARTN_BITS 2 +#define DASD_PER_MAJOR ( 1U<<(MINORBITS-DASD_PARTN_BITS)) + +/* + * struct format_data_t + * represents all data necessary to format a dasd + */ +typedef struct format_data_t { + int start_unit; /* from track */ + int stop_unit; /* to track */ + int blksize; /* sectorsize */ + int intensity; /* 0: normal, 1:record zero, 3:home address, 4 invalidate tracks */ +} __attribute__ ((packed)) format_data_t; + +#define DASD_FORMAT_DEFAULT_START_UNIT 0 +#define DASD_FORMAT_DEFAULT_STOP_UNIT -1 +#define DASD_FORMAT_DEFAULT_BLOCKSIZE -1 +#define DASD_FORMAT_DEFAULT_INTENSITY -1 + +#ifdef __KERNEL__ +#include <linux/version.h> +#include <linux/major.h> +#include <linux/wait.h> +#include <asm/ccwcache.h> +#include <linux/blk.h> +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,3,98)) +#include <linux/blkdev.h> +#include <linux/devfs_fs_kernel.h> +#endif +#include <linux/genhd.h> +#include <linux/hdreg.h> +#include <linux/compatmac.h> + +#include <asm/s390dyn.h> +#include <asm/todclk.h> +#include <asm/debug.h> + +/* Kernel Version Compatibility section */ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,98)) +typedef struct request *request_queue_t; +#define block_device_operations file_operations +#define __setup(x,y) struct dasd_device_t +#define devfs_register_blkdev(major,name,ops) register_blkdev(major,name,ops) +#define register_disk(dd,dev,partn,ops,size) \ +do { \ + dd->sizes[MINOR(dev)] = size >> 1; \ + resetup_one_dev(dd,MINOR(dev)>>DASD_PARTN_BITS); \ +} while(0) +#define init_waitqueue_head(x) do { *x = NULL; } while(0) +#define blk_cleanup_queue(x) do {} while(0) +#define blk_init_queue(x...) do {} while(0) +#define blk_queue_headactive(x...) do {} while(0) +#define blk_queue_make_request(x) do {} while(0) +#define list_empty(x) (0) +#define INIT_BLK_DEV(d_major,d_request_fn,d_queue_fn,d_current) \ +do { \ + blk_dev[d_major].request_fn = d_request_fn; \ + blk_dev[d_major].queue = d_queue_fn; \ + blk_dev[d_major].current_request = d_current; \ +} while(0) +#define INIT_GENDISK(D_MAJOR,D_NAME,D_PARTN_BITS,D_PER_MAJOR) \ + major:D_MAJOR, \ + major_name:D_NAME, \ + minor_shift:D_PARTN_BITS, \ + max_p:1 << D_PARTN_BITS, \ + max_nr:D_PER_MAJOR, \ + nr_real:D_PER_MAJOR, +static inline struct request * +dasd_next_request( request_queue_t *queue ) +{ + return *queue; +} +static inline void +dasd_dequeue_request( request_queue_t * q, struct request *req ) +{ + *q = req->next; + req->next = NULL; +} +#else +#define INIT_BLK_DEV(d_major,d_request_fn,d_queue_fn,d_current) \ +do { \ + blk_dev[d_major].queue = d_queue_fn; \ +} while(0) +#define INIT_GENDISK(D_MAJOR,D_NAME,D_PARTN_BITS,D_PER_MAJOR) \ + major:D_MAJOR, \ + major_name:D_NAME, \ + minor_shift:D_PARTN_BITS, \ + max_p:1 << D_PARTN_BITS, \ + nr_real:D_PER_MAJOR, +static inline struct request * +dasd_next_request( request_queue_t *queue ) +{ + return blkdev_entry_next_request(&queue->queue_head); +} +static inline void +dasd_dequeue_request( request_queue_t * q, struct request *req ) +{ + blkdev_dequeue_request (req); +} +#endif + +/* dasd_range_t are used for dynamic device att-/detachment */ +typedef struct dasd_devreg_t { + devreg_t devreg; /* the devreg itself */ + /* build a linked list of devregs, needed for cleanup */ + struct dasd_devreg_t *next; +} dasd_devreg_t; + +typedef enum { + dasd_era_fatal = -1, /* no chance to recover */ + dasd_era_none = 0, /* don't recover, everything alright */ + dasd_era_msg = 1, /* don't recover, just report... */ + dasd_era_recover = 2 /* recovery action recommended */ +} dasd_era_t; + +/* BIT DEFINITIONS FOR SENSE DATA */ +#define DASD_SENSE_BIT_0 0x80 +#define DASD_SENSE_BIT_1 0x40 +#define DASD_SENSE_BIT_2 0x20 +#define DASD_SENSE_BIT_3 0x10 + +#define check_then_set(where,from,to) \ +do { \ + if ((*(where)) != (from) ) { \ + printk (KERN_ERR PRINTK_HEADER "was %d\n", *(where)); \ + BUG(); \ + } \ + (*(where)) = (to); \ +} while (0) + +#define DASD_MESSAGE(d_loglevel,d_device,d_string,d_args...)\ +do { \ + int d_devno = d_device->devinfo.devno; \ + int d_irq = d_device->devinfo.irq; \ + char *d_name = d_device->name; \ + int d_major = MAJOR(d_device->kdev); \ + int d_minor = MINOR(d_device->kdev); \ + printk(d_loglevel PRINTK_HEADER \ + "/dev/%s(%d:%d), 0x%04X on SCH 0x%x:" \ + d_string "\n",d_name,d_major,d_minor,d_devno,d_irq,d_args ); \ +} while(0) + +/* + * struct dasd_sizes_t + * represents all data needed to access dasd with properly set up sectors + */ +typedef +struct dasd_sizes_t { + unsigned long blocks; /* size of volume in blocks */ + unsigned int bp_block; /* bytes per block */ + unsigned int s2b_shift; /* log2 (bp_block/512) */ +} dasd_sizes_t; + +/* + * struct dasd_chanq_t + * represents a queue of channel programs related to a single device + */ +typedef +struct dasd_chanq_t { + ccw_req_t *head; + ccw_req_t *tail; +} dasd_chanq_t; + +struct dasd_device_t; +struct request; + +/* + * signatures for the functions of dasd_discipline_t + * make typecasts much easier + */ +typedef ccw_req_t *(*dasd_erp_action_fn_t) (ccw_req_t * cqr); +typedef ccw_req_t *(*dasd_erp_postaction_fn_t) (ccw_req_t * cqr); + +typedef int (*dasd_ck_id_fn_t) (dev_info_t *); +typedef int (*dasd_ck_characteristics_fn_t) (struct dasd_device_t *); +typedef int (*dasd_fill_geometry_fn_t) (struct dasd_device_t *, struct hd_geometry *); +typedef ccw_req_t *(*dasd_format_fn_t) (struct dasd_device_t *, struct format_data_t *); +typedef ccw_req_t *(*dasd_init_analysis_fn_t) (struct dasd_device_t *); +typedef int (*dasd_do_analysis_fn_t) (struct dasd_device_t *); +typedef int (*dasd_io_starter_fn_t) (ccw_req_t *); +typedef void (*dasd_int_handler_fn_t)(int irq, void *, struct pt_regs *); +typedef dasd_era_t (*dasd_error_examine_fn_t) (ccw_req_t *, devstat_t * stat); +typedef dasd_erp_action_fn_t (*dasd_error_analyse_fn_t) (ccw_req_t *); +typedef dasd_erp_postaction_fn_t (*dasd_erp_analyse_fn_t) (ccw_req_t *); +typedef ccw_req_t *(*dasd_cp_builder_fn_t)(struct dasd_device_t *,struct request *); +typedef char *(*dasd_dump_sense_fn_t)(struct dasd_device_t *,ccw_req_t *); +typedef ccw_req_t *(*dasd_reserve_fn_t)(struct dasd_device_t *); +typedef ccw_req_t *(*dasd_release_fn_t)(struct dasd_device_t *); +typedef ccw_req_t *(*dasd_merge_cp_fn_t)(struct dasd_device_t *); + + +/* + * the dasd_discipline_t is + * sth like a table of virtual functions, if you think of dasd_eckd + * inheriting dasd... + * no, currently we are not planning to reimplement the driver in C++ + */ +typedef struct dasd_discipline_t { + char ebcname[8]; /* a name used for tagging and printks */ + char name[8]; /* a name used for tagging and printks */ + + dasd_ck_id_fn_t id_check; /* to check sense data */ + dasd_ck_characteristics_fn_t check_characteristics; /* to check the characteristics */ + dasd_init_analysis_fn_t init_analysis; /* to start the analysis of the volume */ + dasd_do_analysis_fn_t do_analysis; /* to complete the analysis of the volume */ + dasd_fill_geometry_fn_t fill_geometry; /* to set up hd_geometry */ + dasd_io_starter_fn_t start_IO; + dasd_format_fn_t format_device; /* to format the device */ + dasd_error_examine_fn_t examine_error; + dasd_error_analyse_fn_t erp_action; + dasd_erp_analyse_fn_t erp_postaction; + dasd_cp_builder_fn_t build_cp_from_req; + dasd_dump_sense_fn_t dump_sense; + dasd_int_handler_fn_t int_handler; + dasd_reserve_fn_t reserve; + dasd_release_fn_t release; + dasd_merge_cp_fn_t merge_cp; + + struct dasd_discipline_t *next; /* used for list of disciplines */ +} dasd_discipline_t; + +typedef struct major_info_t { + struct major_info_t *next; + struct dasd_device_t **dasd_device; + struct gendisk gendisk; /* actually contains the major number */ +} __attribute__ ((packed)) major_info_t; + +typedef struct dasd_profile_info_t { + unsigned long dasd_io_reqs; /* number of requests processed at all */ + unsigned long dasd_io_secs[32]; /* histogram of request's sizes */ + unsigned long dasd_io_times[32]; /* histogram of requests's times */ + unsigned long dasd_io_timps[32]; /* histogram of requests's times per sector */ + unsigned long dasd_io_time1[32]; /* histogram of time from build to start */ + unsigned long dasd_io_time2[32]; /* histogram of time from start to irq */ + unsigned long dasd_io_time2ps[32]; /* histogram of time from start to irq */ + unsigned long dasd_io_time3[32]; /* histogram of time from irq to end */ +} dasd_profile_info_t; + +typedef struct dasd_device_t { + dev_info_t devinfo; + dasd_discipline_t *discipline; + int level; + int open_count; + kdev_t kdev; + major_info_t *major_info; + struct dasd_chanq_t queue; + wait_queue_head_t wait_q; + request_queue_t request_queue; + devstat_t dev_status; /* needed ONLY!! for request_irq */ + dasd_sizes_t sizes; + char name[16]; /* The name of the device in /dev */ + char *private; /* to be used by the discipline internally */ +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,3,98)) + devfs_handle_t devfs_entry; +#endif /* LINUX_IS_24 */ + struct tq_struct bh_tq; + atomic_t bh_scheduled; + debug_info_t *debug_area; + dasd_profile_info_t profile; + struct proc_dir_entry *proc_dir; /* directory node */ + struct proc_dir_entry *proc_info; /* information from dasd_device_t */ + struct proc_dir_entry *proc_stats; /* statictics information */ +} dasd_device_t; + +/* dasd_device_t.level can be: */ +#define DASD_DEVICE_LEVEL_UNKNOWN 0x00 +#define DASD_DEVICE_LEVEL_RECOGNIZED 0x01 +#define DASD_DEVICE_LEVEL_ANALYSIS_PENDING 0x02 +#define DASD_DEVICE_LEVEL_ANALYSIS_PREPARED 0x04 +#define DASD_DEVICE_LEVEL_ANALYSED 0x08 +#define DASD_DEVICE_LEVEL_PARTITIONED 0x10 + +int dasd_init (void); +void dasd_discipline_enq (dasd_discipline_t *); +int dasd_discipline_deq(dasd_discipline_t *); +int dasd_start_IO (ccw_req_t *); +void dasd_int_handler (int , void *, struct pt_regs *); +ccw_req_t *default_erp_action (ccw_req_t *); +ccw_req_t *default_erp_postaction (ccw_req_t *); +int dasd_chanq_deq (dasd_chanq_t *, ccw_req_t *); +ccw_req_t *dasd_alloc_request (char *, int, int); +void dasd_free_request (ccw_req_t *); +int (*genhd_dasd_name) (char *, int, int, struct gendisk *); +int dasd_oper_handler (int irq, devreg_t * devreg); + +#endif /* __KERNEL__ */ + +#endif /* DASD_H */ + +/* + * Overrides for Emacs so that we follow Linus's tabbing style. + * Emacs will notice this stuff at the end of the file and automatically + * adjust the settings for this buffer only. This must remain at the end + * of the file. + * --------------------------------------------------------------------------- + * Local variables: + * c-indent-level: 4 + * c-brace-imaginary-offset: 0 + * c-brace-offset: -4 + * c-argdecl-indent: 4 + * c-label-offset: -4 + * c-continued-statement-offset: 4 + * c-continued-brace-offset: 0 + * indent-tabs-mode: nil + * tab-width: 8 + * End: + */ diff --git a/include/asm-s390x/debug.h b/include/asm-s390x/debug.h new file mode 100644 index 000000000..fdcc56008 --- /dev/null +++ b/include/asm-s390x/debug.h @@ -0,0 +1,210 @@ +/* + * include/asm-s390/debug.h + * S/390 debug facility + * + * Copyright (C) 1999, 2000 IBM Deutschland Entwicklung GmbH, + * IBM Corporation + */ + +#ifndef DEBUG_H +#define DEBUG_H + +/* Note: + * struct __debug_entry must be defined outside of #ifdef __KERNEL__ + * in order to allow a user program to analyze the 'raw'-view. + */ + +struct __debug_entry{ + union { + struct { + unsigned long long clock:52; + unsigned long long exception:1; + unsigned long long used:1; + unsigned long long unused:1; + unsigned long long cpuid:9; + } fields; + + unsigned long long stck; + } id; + void* caller; +} __attribute__((packed)); + +#ifdef __KERNEL__ +#include <linux/version.h> +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0)) + #include <asm/spinlock.h> +#else + #include <linux/spinlock.h> +#endif /* LINUX_VERSION_CODE */ +#include <linux/kernel.h> +#include <linux/time.h> +#include <linux/proc_fs.h> + +#define DEBUG_MAX_LEVEL 6 /* debug levels range from 0 to 6 */ +#define DEBUG_OFF_LEVEL -1 /* level where debug is switched off */ +#define DEBUG_MAX_VIEWS 10 /* max number of views in proc fs */ +#define DEBUG_MAX_PROCF_LEN 16 /* max length for a proc file name */ +#define DEBUG_DEFAULT_LEVEL 3 /* initial debug level */ +#define DEBUG_FEATURE_VERSION 1 /* version of debug feature */ + +#define DEBUG_DIR_ROOT "s390dbf" /* name of debug root directory in proc fs */ + +#define DEBUG_DATA(entry) (char*)(entry + 1) /* data is stored behind */ + /* the entry information */ + +#define STCK(x) asm volatile ("STCK %0":"=m" (x)) + +typedef struct __debug_entry debug_entry_t; + +struct debug_view; + +typedef struct debug_info { + struct debug_info* next; + struct debug_info* prev; + atomic_t ref_count; + spinlock_t lock; + int level; + int nr_areas; + int page_order; + int buf_size; + int entry_size; + debug_entry_t** areas; + int active_area; + int *active_entry; + struct proc_dir_entry* proc_root_entry; + struct proc_dir_entry* proc_entries[DEBUG_MAX_VIEWS]; + struct debug_view* views[DEBUG_MAX_VIEWS]; + char name[DEBUG_MAX_PROCF_LEN]; +} debug_info_t; + +typedef int (debug_header_proc_t) (debug_info_t* id, + struct debug_view* view, + int area, + debug_entry_t* entry, + char* out_buf); + +typedef int (debug_format_proc_t) (debug_info_t* id, + struct debug_view* view, char* out_buf, + const char* in_buf); +typedef int (debug_prolog_proc_t) (debug_info_t* id, + struct debug_view* view, + char* out_buf); +typedef int (debug_input_proc_t) (debug_info_t* id, + struct debug_view* view, + struct file* file, const char* user_buf, + size_t in_buf_size, loff_t* offset); + +int debug_dflt_header_fn(debug_info_t* id, struct debug_view* view, + int area, debug_entry_t* entry, char* out_buf); + +struct debug_view { + char name[DEBUG_MAX_PROCF_LEN]; + debug_prolog_proc_t* prolog_proc; + debug_header_proc_t* header_proc; + debug_format_proc_t* format_proc; + debug_input_proc_t* input_proc; +}; + +extern struct debug_view debug_hex_ascii_view; +extern struct debug_view debug_raw_view; + +debug_info_t* debug_register(char* name, int pages_index, int nr_areas, + int buf_size); +void debug_unregister(debug_info_t* id); + +void debug_set_level(debug_info_t* id, int new_level); + +debug_entry_t* debug_event(debug_info_t* id, int level, void* data, + int length); +debug_entry_t* debug_int_event(debug_info_t* id, int level, + unsigned int tag); +debug_entry_t* debug_text_event(debug_info_t* id, int level, + const char* txt); + +debug_entry_t* debug_exception(debug_info_t* id, int level, void* data, + int length); +debug_entry_t* debug_int_exception(debug_info_t* id, int level, + unsigned int tag); +debug_entry_t* debug_text_exception(debug_info_t* id, int level, + const char* txt); + +static inline debug_entry_t * +debug_long_event (debug_info_t* id, int level, unsigned long tag) +{ + unsigned long t=tag; + return debug_event(id,level,&t,sizeof(unsigned long)); +} +static inline debug_entry_t * +debug_long_exception (debug_info_t* id, int level, unsigned long tag) +{ + unsigned long t=tag; + return debug_exception(id,level,&t,sizeof(unsigned long)); +} +int debug_register_view(debug_info_t* id, struct debug_view* view); +int debug_unregister_view(debug_info_t* id, struct debug_view* view); + +/* + define the debug levels: + - 0 No debugging output to console or syslog + - 1 Log internal errors to syslog, ignore check conditions + - 2 Log internal errors and check conditions to syslog + - 3 Log internal errors to console, log check conditions to syslog + - 4 Log internal errors and check conditions to console + - 5 panic on internal errors, log check conditions to console + - 6 panic on both, internal errors and check conditions + */ + +#ifndef DEBUG_LEVEL +#define DEBUG_LEVEL 4 +#endif + +#define INTERNAL_ERRMSG(x,y...) "E" __FILE__ "%d: " x, __LINE__, y +#define INTERNAL_WRNMSG(x,y...) "W" __FILE__ "%d: " x, __LINE__, y +#define INTERNAL_INFMSG(x,y...) "I" __FILE__ "%d: " x, __LINE__, y +#define INTERNAL_DEBMSG(x,y...) "D" __FILE__ "%d: " x, __LINE__, y + +#if DEBUG_LEVEL > 0 +#define PRINT_DEBUG(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) +#define PRINT_INFO(x...) printk ( KERN_INFO PRINTK_HEADER x ) +#define PRINT_WARN(x...) printk ( KERN_WARNING PRINTK_HEADER x ) +#define PRINT_ERR(x...) printk ( KERN_ERR PRINTK_HEADER x ) +#define PRINT_FATAL(x...) panic ( PRINTK_HEADER x ) +#else +#define PRINT_DEBUG(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) +#define PRINT_INFO(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) +#define PRINT_WARN(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) +#define PRINT_ERR(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) +#define PRINT_FATAL(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) +#endif /* DASD_DEBUG */ + +#if DASD_DEBUG > 4 +#define INTERNAL_ERROR(x...) PRINT_FATAL ( INTERNAL_ERRMSG ( x ) ) +#elif DASD_DEBUG > 2 +#define INTERNAL_ERROR(x...) PRINT_ERR ( INTERNAL_ERRMSG ( x ) ) +#elif DASD_DEBUG > 0 +#define INTERNAL_ERROR(x...) PRINT_WARN ( INTERNAL_ERRMSG ( x ) ) +#else +#define INTERNAL_ERROR(x...) +#endif /* DASD_DEBUG */ + +#if DASD_DEBUG > 5 +#define INTERNAL_CHECK(x...) PRINT_FATAL ( INTERNAL_CHKMSG ( x ) ) +#elif DASD_DEBUG > 3 +#define INTERNAL_CHECK(x...) PRINT_ERR ( INTERNAL_CHKMSG ( x ) ) +#elif DASD_DEBUG > 1 +#define INTERNAL_CHECK(x...) PRINT_WARN ( INTERNAL_CHKMSG ( x ) ) +#else +#define INTERNAL_CHECK(x...) +#endif /* DASD_DEBUG */ + +#undef DEBUG_MALLOC +#ifdef DEBUG_MALLOC +void *b; +#define kmalloc(x...) (PRINT_INFO(" kmalloc %p\n",b=kmalloc(x)),b) +#define kfree(x) PRINT_INFO(" kfree %p\n",x);kfree(x) +#define get_free_page(x...) (PRINT_INFO(" gfp %p\n",b=get_free_page(x)),b) +#define __get_free_pages(x...) (PRINT_INFO(" gfps %p\n",b=__get_free_pages(x)),b) +#endif /* DEBUG_MALLOC */ + +#endif /* __KERNEL__ */ +#endif /* DEBUG_H */ diff --git a/include/asm-s390x/delay.h b/include/asm-s390x/delay.h new file mode 100644 index 000000000..357fdb835 --- /dev/null +++ b/include/asm-s390x/delay.h @@ -0,0 +1,22 @@ +/* + * include/asm-s390/delay.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) + * + * Derived from "include/asm-i386/delay.h" + * Copyright (C) 1993 Linus Torvalds + * + * Delay routines calling functions in arch/i386/lib/delay.c + */ + +#ifndef _S390_DELAY_H +#define _S390_DELAY_H + +extern void __udelay(unsigned long usecs); +extern void __delay(unsigned long loops); + +#define udelay(n) __udelay(n) + +#endif /* defined(_S390_DELAY_H) */ diff --git a/include/asm-s390x/div64.h b/include/asm-s390x/div64.h new file mode 100644 index 000000000..17824b1a2 --- /dev/null +++ b/include/asm-s390x/div64.h @@ -0,0 +1,10 @@ +#ifndef __S390_DIV64 +#define __S390_DIV64 + +#define do_div(n,base) ({ \ +int __res; \ +__res = ((unsigned long) n) % (unsigned) base; \ +n = ((unsigned long) n) / (unsigned) base; \ +__res; }) + +#endif diff --git a/include/asm-s390x/dma.h b/include/asm-s390x/dma.h new file mode 100644 index 000000000..2a19a6184 --- /dev/null +++ b/include/asm-s390x/dma.h @@ -0,0 +1,16 @@ +/* + * include/asm-s390x/dma.h + * + * S390 version + */ + +#ifndef _ASM_DMA_H +#define _ASM_DMA_H + +#include <asm/io.h> /* need byte IO */ + +/* The I/O subsystem can access only memory below 2GB. + We use the existing DMA zone mechanism to handle this. */ +#define MAX_DMA_ADDRESS 0x80000000 + +#endif /* _ASM_DMA_H */ diff --git a/include/asm-s390x/ebcdic.h b/include/asm-s390x/ebcdic.h new file mode 100644 index 000000000..086a09eb8 --- /dev/null +++ b/include/asm-s390x/ebcdic.h @@ -0,0 +1,55 @@ +/* + * include/asm-s390/ebcdic.h + * EBCDIC -> ASCII, ASCII -> EBCDIC conversion routines. + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com> + */ + +#ifndef _EBCDIC_H +#define _EBCDIC_H + +#ifndef _S390_TYPES_H +#include <types.h> +#endif + +extern __u8 _ascebc_500[]; /* ASCII -> EBCDIC 500 conversion table */ +extern __u8 _ebcasc_500[]; /* EBCDIC 500 -> ASCII conversion table */ +extern __u8 _ascebc[]; /* ASCII -> EBCDIC conversion table */ +extern __u8 _ebcasc[]; /* EBCDIC -> ASCII conversion table */ +extern __u8 _ebc_tolower[]; /* EBCDIC -> lowercase */ +extern __u8 _ebc_toupper[]; /* EBCDIC -> uppercase */ + +extern __inline__ void +codepage_convert(const __u8 *codepage, volatile __u8 * addr, unsigned long nr) +{ + static const __u16 tr_op[] = { 0xDC00, 0x1000,0x3000 }; + __asm__ __volatile__( + " lgr 1,%0\n" + " lgr 2,%1\n" + " lgr 3,%2\n" + " aghi 2,-256\n" + " jm 1f\n" + "0: tr 0(256,1),0(3)\n" + " aghi 1,256\n" + " aghi 2,-256\n" + " jp 0b\n" + "1: aghi 2,255\n" + " jm 2f\n" + " ex 2,%3\n" + "2:" + : /* no output */ + : "a" (addr), "d" (nr), "a" (codepage), "m" (tr_op[0]) + : "cc", "memory", "1", "2", "3" ); +} + +#define ASCEBC(addr,nr) codepage_convert(_ascebc, addr, nr) +#define EBCASC(addr,nr) codepage_convert(_ebcasc, addr, nr) +#define ASCEBC_500(addr,nr) codepage_convert(_ascebc_500, addr, nr) +#define EBCASC_500(addr,nr) codepage_convert(_ebcasc_500, addr, nr) +#define EBC_TOLOWER(addr,nr) codepage_convert(_ebc_tolower, addr, nr) +#define EBC_TOUPPER(addr,nr) codepage_convert(_ebc_toupper, addr, nr) + +#endif + diff --git a/include/asm-s390x/elf.h b/include/asm-s390x/elf.h new file mode 100644 index 000000000..3c0989b8d --- /dev/null +++ b/include/asm-s390x/elf.h @@ -0,0 +1,82 @@ +/* + * include/asm-s390/elf.h + * + * S390 version + * + * Derived from "include/asm-i386/elf.h" + */ + +#ifndef __ASMS390_ELF_H +#define __ASMS390_ELF_H + +/* + * ELF register definitions.. + */ + +#include <asm/ptrace.h> +#include <asm/user.h> + + +typedef s390_fp_regs elf_fpregset_t; +typedef s390_regs elf_gregset_t; + +/* + * These are used to set parameters in the core dumps. + */ +#define ELF_CLASS ELFCLASS64 +#define ELF_DATA ELFDATA2MSB +#define ELF_ARCH EM_S390 + +/* + * This is used to ensure we don't load something for the wrong architecture. + */ +#define elf_check_arch(x) \ + ((x)->e_machine == ELF_ARCH && (x)->e_ident[EI_CLASS] == ELF_CLASS) + +/* For SVR4/S390 the function pointer to be registered with `atexit` is + passed in R14. */ +#define ELF_PLAT_INIT(_r) \ + do { \ + _r->gprs[14] = 0; \ + current->thread.flags = 0; \ + } while(0) + +#define USE_ELF_CORE_DUMP +#define ELF_EXEC_PAGESIZE 4096 + +/* This is the location that an ET_DYN program is loaded if exec'ed. Typical + use of this is to invoke "./ld.so someprog" to test out a new version of + the loader. We need to make sure that it is out of the way of the program + that it will "exec", and that there is sufficient room for the brk. */ + +#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) + +/* Wow, the "main" arch needs arch dependent functions too.. :) */ + +/* regs is struct pt_regs, pr_reg is elf_gregset_t (which is + now struct_user_regs, they are different) */ + +#define ELF_CORE_COPY_REGS(pr_reg, regs) \ + memcpy(&pr_reg,regs,sizeof(elf_gregset_t)); \ + + + +/* This yields a mask that user programs can use to figure out what + instruction set this CPU supports. */ + +#define ELF_HWCAP (0) + +/* This yields a string that ld.so will use to load implementation + specific libraries for optimization. This is more specific in + intent than poking at uname or /proc/cpuinfo. + + For the moment, we have only optimizations for the Intel generations, + but that could change... */ + +#define ELF_PLATFORM (NULL) + +#ifdef __KERNEL__ +#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) +#endif + +#endif diff --git a/include/asm-s390x/errno.h b/include/asm-s390x/errno.h new file mode 100644 index 000000000..37d3f24c0 --- /dev/null +++ b/include/asm-s390x/errno.h @@ -0,0 +1,140 @@ +/* + * include/asm-s390/errno.h + * + * S390 version + * + * Derived from "include/asm-i386/errno.h" + */ + +#ifndef _S390_ERRNO_H +#define _S390_ERRNO_H + +#define EPERM 1 /* Operation not permitted */ +#define ENOENT 2 /* No such file or directory */ +#define ESRCH 3 /* No such process */ +#define EINTR 4 /* Interrupted system call */ +#define EIO 5 /* I/O error */ +#define ENXIO 6 /* No such device or address */ +#define E2BIG 7 /* Arg list too long */ +#define ENOEXEC 8 /* Exec format error */ +#define EBADF 9 /* Bad file number */ +#define ECHILD 10 /* No child processes */ +#define EAGAIN 11 /* Try again */ +#define ENOMEM 12 /* Out of memory */ +#define EACCES 13 /* Permission denied */ +#define EFAULT 14 /* Bad address */ +#define ENOTBLK 15 /* Block device required */ +#define EBUSY 16 /* Device or resource busy */ +#define EEXIST 17 /* File exists */ +#define EXDEV 18 /* Cross-device link */ +#define ENODEV 19 /* No such device */ +#define ENOTDIR 20 /* Not a directory */ +#define EISDIR 21 /* Is a directory */ +#define EINVAL 22 /* Invalid argument */ +#define ENFILE 23 /* File table overflow */ +#define EMFILE 24 /* Too many open files */ +#define ENOTTY 25 /* Not a typewriter */ +#define ETXTBSY 26 /* Text file busy */ +#define EFBIG 27 /* File too large */ +#define ENOSPC 28 /* No space left on device */ +#define ESPIPE 29 /* Illegal seek */ +#define EROFS 30 /* Read-only file system */ +#define EMLINK 31 /* Too many links */ +#define EPIPE 32 /* Broken pipe */ +#define EDOM 33 /* Math argument out of domain of func */ +#define ERANGE 34 /* Math result not representable */ +#define EDEADLK 35 /* Resource deadlock would occur */ +#define ENAMETOOLONG 36 /* File name too long */ +#define ENOLCK 37 /* No record locks available */ +#define ENOSYS 38 /* Function not implemented */ +#define ENOTEMPTY 39 /* Directory not empty */ +#define ELOOP 40 /* Too many symbolic links encountered */ +#define EWOULDBLOCK EAGAIN /* Operation would block */ +#define ENOMSG 42 /* No message of desired type */ +#define EIDRM 43 /* Identifier removed */ +#define ECHRNG 44 /* Channel number out of range */ +#define EL2NSYNC 45 /* Level 2 not synchronized */ +#define EL3HLT 46 /* Level 3 halted */ +#define EL3RST 47 /* Level 3 reset */ +#define ELNRNG 48 /* Link number out of range */ +#define EUNATCH 49 /* Protocol driver not attached */ +#define ENOCSI 50 /* No CSI structure available */ +#define EL2HLT 51 /* Level 2 halted */ +#define EBADE 52 /* Invalid exchange */ +#define EBADR 53 /* Invalid request descriptor */ +#define EXFULL 54 /* Exchange full */ +#define ENOANO 55 /* No anode */ +#define EBADRQC 56 /* Invalid request code */ +#define EBADSLT 57 /* Invalid slot */ + +#define EDEADLOCK EDEADLK + +#define EBFONT 59 /* Bad font file format */ +#define ENOSTR 60 /* Device not a stream */ +#define ENODATA 61 /* No data available */ +#define ETIME 62 /* Timer expired */ +#define ENOSR 63 /* Out of streams resources */ +#define ENONET 64 /* Machine is not on the network */ +#define ENOPKG 65 /* Package not installed */ +#define EREMOTE 66 /* Object is remote */ +#define ENOLINK 67 /* Link has been severed */ +#define EADV 68 /* Advertise error */ +#define ESRMNT 69 /* Srmount error */ +#define ECOMM 70 /* Communication error on send */ +#define EPROTO 71 /* Protocol error */ +#define EMULTIHOP 72 /* Multihop attempted */ +#define EDOTDOT 73 /* RFS specific error */ +#define EBADMSG 74 /* Not a data message */ +#define EOVERFLOW 75 /* Value too large for defined data type */ +#define ENOTUNIQ 76 /* Name not unique on network */ +#define EBADFD 77 /* File descriptor in bad state */ +#define EREMCHG 78 /* Remote address changed */ +#define ELIBACC 79 /* Can not access a needed shared library */ +#define ELIBBAD 80 /* Accessing a corrupted shared library */ +#define ELIBSCN 81 /* .lib section in a.out corrupted */ +#define ELIBMAX 82 /* Attempting to link in too many shared libraries */ +#define ELIBEXEC 83 /* Cannot exec a shared library directly */ +#define EILSEQ 84 /* Illegal byte sequence */ +#define ERESTART 85 /* Interrupted system call should be restarted */ +#define ESTRPIPE 86 /* Streams pipe error */ +#define EUSERS 87 /* Too many users */ +#define ENOTSOCK 88 /* Socket operation on non-socket */ +#define EDESTADDRREQ 89 /* Destination address required */ +#define EMSGSIZE 90 /* Message too long */ +#define EPROTOTYPE 91 /* Protocol wrong type for socket */ +#define ENOPROTOOPT 92 /* Protocol not available */ +#define EPROTONOSUPPORT 93 /* Protocol not supported */ +#define ESOCKTNOSUPPORT 94 /* Socket type not supported */ +#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ +#define EPFNOSUPPORT 96 /* Protocol family not supported */ +#define EAFNOSUPPORT 97 /* Address family not supported by protocol */ +#define EADDRINUSE 98 /* Address already in use */ +#define EADDRNOTAVAIL 99 /* Cannot assign requested address */ +#define ENETDOWN 100 /* Network is down */ +#define ENETUNREACH 101 /* Network is unreachable */ +#define ENETRESET 102 /* Network dropped connection because of reset */ +#define ECONNABORTED 103 /* Software caused connection abort */ +#define ECONNRESET 104 /* Connection reset by peer */ +#define ENOBUFS 105 /* No buffer space available */ +#define EISCONN 106 /* Transport endpoint is already connected */ +#define ENOTCONN 107 /* Transport endpoint is not connected */ +#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */ +#define ETOOMANYREFS 109 /* Too many references: cannot splice */ +#define ETIMEDOUT 110 /* Connection timed out */ +#define ECONNREFUSED 111 /* Connection refused */ +#define EHOSTDOWN 112 /* Host is down */ +#define EHOSTUNREACH 113 /* No route to host */ +#define EALREADY 114 /* Operation already in progress */ +#define EINPROGRESS 115 /* Operation now in progress */ +#define ESTALE 116 /* Stale NFS file handle */ +#define EUCLEAN 117 /* Structure needs cleaning */ +#define ENOTNAM 118 /* Not a XENIX named type file */ +#define ENAVAIL 119 /* No XENIX semaphores available */ +#define EISNAM 120 /* Is a named type file */ +#define EREMOTEIO 121 /* Remote I/O error */ +#define EDQUOT 122 /* Quota exceeded */ + +#define ENOMEDIUM 123 /* No medium found */ +#define EMEDIUMTYPE 124 /* Wrong medium type */ + +#endif diff --git a/include/asm-s390x/fcntl.h b/include/asm-s390x/fcntl.h new file mode 100644 index 000000000..63c92ded4 --- /dev/null +++ b/include/asm-s390x/fcntl.h @@ -0,0 +1,85 @@ +/* + * include/asm-s390/fcntl.h + * + * S390 version + * + * Derived from "include/asm-i386/fcntl.h" + */ +#ifndef _S390_FCNTL_H +#define _S390_FCNTL_H + +/* open/fcntl - O_SYNC is only implemented on blocks devices and on files + located on an ext2 file system */ +#define O_ACCMODE 0003 +#define O_RDONLY 00 +#define O_WRONLY 01 +#define O_RDWR 02 +#define O_CREAT 0100 /* not fcntl */ +#define O_EXCL 0200 /* not fcntl */ +#define O_NOCTTY 0400 /* not fcntl */ +#define O_TRUNC 01000 /* not fcntl */ +#define O_APPEND 02000 +#define O_NONBLOCK 04000 +#define O_NDELAY O_NONBLOCK +#define O_SYNC 010000 +#define FASYNC 020000 /* fcntl, for BSD compatibility */ +#define O_DIRECT 040000 /* direct disk access hint - currently ignored */ +#define O_LARGEFILE 0100000 +#define O_DIRECTORY 0200000 /* must be a directory */ +#define O_NOFOLLOW 0400000 /* don't follow links */ + +#define F_DUPFD 0 /* dup */ +#define F_GETFD 1 /* get close_on_exec */ +#define F_SETFD 2 /* set/clear close_on_exec */ +#define F_GETFL 3 /* get file->f_flags */ +#define F_SETFL 4 /* set file->f_flags */ +#define F_GETLK 5 +#define F_SETLK 6 +#define F_SETLKW 7 + +#define F_SETOWN 8 /* for sockets. */ +#define F_GETOWN 9 /* for sockets. */ +#define F_SETSIG 10 /* for sockets. */ +#define F_GETSIG 11 /* for sockets. */ + +/* for F_[GET|SET]FL */ +#define FD_CLOEXEC 1 /* actually anything with low bit set goes */ + +/* for posix fcntl() and lockf() */ +#define F_RDLCK 0 +#define F_WRLCK 1 +#define F_UNLCK 2 + +/* for old implementation of bsd flock () */ +#define F_EXLCK 4 /* or 3 */ +#define F_SHLCK 8 /* or 4 */ + +/* for leases */ +#define F_INPROGRESS 16 + +/* operations for bsd flock(), also used by the kernel implementation */ +#define LOCK_SH 1 /* shared lock */ +#define LOCK_EX 2 /* exclusive lock */ +#define LOCK_NB 4 /* or'd with one of the above to prevent + blocking */ +#define LOCK_UN 8 /* remove lock */ + +#define LOCK_MAND 32 /* This is a mandatory flock */ +#define LOCK_READ 64 /* ... Which allows concurrent read operations */ +#define LOCK_WRITE 128 /* ... Which allows concurrent write operations +*/ +#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */ + +struct flock { + short l_type; + short l_whence; + __kernel_off_t l_start; + __kernel_off_t l_len; + __kernel_pid_t l_pid; +}; + +#define F_LINUX_SPECIFIC_BASE 1024 + +#define flock64 flock + +#endif diff --git a/include/asm-s390x/gdb-stub.h b/include/asm-s390x/gdb-stub.h new file mode 100644 index 000000000..fa68800f4 --- /dev/null +++ b/include/asm-s390x/gdb-stub.h @@ -0,0 +1,18 @@ +/* + * include/asm-s390/gdb-stub.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) + */ + +#ifndef __S390_GDB_STUB__ +#define __S390_GDB_STUB__ +#include <linux/config.h> +#if CONFIG_REMOTE_DEBUG +#include <asm/s390-gdbregs.h> +#include <asm/ptrace.h> +extern int gdb_stub_initialised; +extern void gdb_stub_handle_exception(gdb_pt_regs *regs,int sigval); +#endif +#endif diff --git a/include/asm-s390x/hardirq.h b/include/asm-s390x/hardirq.h new file mode 100644 index 000000000..d5ec49dde --- /dev/null +++ b/include/asm-s390x/hardirq.h @@ -0,0 +1,108 @@ +/* + * include/asm-s390/hardirq.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), + * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) + * + * Derived from "include/asm-i386/hardirq.h" + */ + +#ifndef __ASM_HARDIRQ_H +#define __ASM_HARDIRQ_H + +#include <linux/config.h> +#include <linux/threads.h> +#include <asm/lowcore.h> +#include <linux/sched.h> + +/* No irq_cpustat_t for s390, the data is held directly in S390_lowcore */ + +/* + * Simple wrappers reducing source bloat. S390 specific because each + * cpu stores its data in S390_lowcore (PSA) instead of using a cache + * aligned array element like most architectures. + */ + +#ifdef CONFIG_SMP + +#define softirq_active(cpu) (safe_get_cpu_lowcore(cpu).__softirq_active) +#define softirq_mask(cpu) (safe_get_cpu_lowcore(cpu).__softirq_mask) +#define local_irq_count(cpu) (safe_get_cpu_lowcore(cpu).__local_irq_count) +#define local_bh_count(cpu) (safe_get_cpu_lowcore(cpu).__local_bh_count) +#define syscall_count(cpu) (safe_get_cpu_lowcore(cpu).__syscall_count) + +#else /* CONFIG_SMP */ + +/* Optimize away the cpu calculation, it is always current PSA */ +#define softirq_active(cpu) ((void)(cpu), S390_lowcore.__softirq_active) +#define softirq_mask(cpu) ((void)(cpu), S390_lowcore.__softirq_mask) +#define local_irq_count(cpu) ((void)(cpu), S390_lowcore.__local_irq_count) +#define local_bh_count(cpu) ((void)(cpu), S390_lowcore.__local_bh_count) +#define syscall_count(cpu) ((void)(cpu), S390_lowcore.__syscall_count) + +#endif /* CONFIG_SMP */ + +/* + * Are we in an interrupt context? Either doing bottom half + * or hardware interrupt processing? + * Special definitions for s390, always access current PSA. + */ +#define in_interrupt() ((S390_lowcore.__local_irq_count + S390_lowcore.__local_bh_count) != 0) + +#define in_irq() (S390_lowcore.__local_irq_count != 0) + +#ifndef CONFIG_SMP + +#define hardirq_trylock(cpu) (local_irq_count(cpu) == 0) +#define hardirq_endlock(cpu) do { } while (0) + +#define hardirq_enter(cpu) (local_irq_count(cpu)++) +#define hardirq_exit(cpu) (local_irq_count(cpu)--) + +#define synchronize_irq() do { } while (0) + +#else + +#include <asm/atomic.h> +#include <asm/smp.h> + +extern atomic_t global_irq_holder; +extern atomic_t global_irq_lock; +extern atomic_t global_irq_count; + +static inline void release_irqlock(int cpu) +{ + /* if we didn't own the irq lock, just ignore.. */ + if (atomic_read(&global_irq_holder) == cpu) { + atomic_set(&global_irq_holder,NO_PROC_ID); + atomic_set(&global_irq_lock,0); + } +} + +static inline void hardirq_enter(int cpu) +{ + ++local_irq_count(cpu); + atomic_inc(&global_irq_count); +} + +static inline void hardirq_exit(int cpu) +{ + atomic_dec(&global_irq_count); + --local_irq_count(cpu); +} + +static inline int hardirq_trylock(int cpu) +{ + return !atomic_read(&global_irq_count) && + !atomic_read(&global_irq_lock); +} + +#define hardirq_endlock(cpu) do { } while (0) + +extern void synchronize_irq(void); + +#endif /* CONFIG_SMP */ + +#endif /* __ASM_HARDIRQ_H */ diff --git a/include/asm-s390x/hdreg.h b/include/asm-s390x/hdreg.h new file mode 100644 index 000000000..20061819d --- /dev/null +++ b/include/asm-s390x/hdreg.h @@ -0,0 +1,13 @@ +/* + * linux/include/asm-arm/hdreg.h + * + * Copyright (C) 1994-1996 Linus Torvalds & authors + */ + +#ifndef __ASMS390_HDREG_H +#define __ASMS390_HDREG_H + +typedef unsigned long ide_ioreg_t; + +#endif /* __ASMS390_HDREG_H */ + diff --git a/include/asm-s390x/idals.h b/include/asm-s390x/idals.h new file mode 100644 index 000000000..277489692 --- /dev/null +++ b/include/asm-s390x/idals.h @@ -0,0 +1,57 @@ +/* + * File...........: linux/include/asm-s390x/idals.h + * Author(s)......: Holger Smolinski <Holger.Smolinski@de.ibm.com> + * Bugreports.to..: <Linux390@de.ibm.com> + * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 2000a + + * History of changes + * 07/24/00 new file + */ +#include <linux/config.h> +#include <asm/irq.h> + +typedef unsigned long idaw_t; + +static inline idaw_t * +idal_alloc ( int nridaws ) +{ + if ( nridaws > 33 ) + BUG(); + return kmalloc(nridaws * sizeof(idaw_t), GFP_ATOMIC | GFP_DMA ); +} + +static inline void +idal_free ( idaw_t *idal ) +{ + kfree (idal); +} + +/* + * Function: set_normalized_cda + * sets the address of the data in CCW + * if necessary it allocates an IDAL and sets sthe appropriate flags + */ +#if defined (CONFIG_ARCH_S390X) +extern void set_normalized_cda(ccw1_t * ccw, unsigned long address); +#else +static inline void +set_normalized_cda(ccw1_t * ccw, unsigned long address) +{ + ccw->cda = address; +} +#endif + +/* + * Function: clear_normalized_cda + * releases any allocated IDAL related to the CCW + */ +static inline void +clear_normalized_cda ( ccw1_t * ccw ) +{ + if ( ccw -> flags & CCW_FLAG_IDA ) { + idal_free ( (idaw_t *)(unsigned long) (ccw -> cda )); + ccw -> flags &= ~CCW_FLAG_IDA; + } + ccw -> cda = 0; +} + diff --git a/include/asm-s390x/ide.h b/include/asm-s390x/ide.h new file mode 100644 index 000000000..eb47027ff --- /dev/null +++ b/include/asm-s390x/ide.h @@ -0,0 +1,54 @@ +/* + * linux/include/asm-arm/ide.h + * + * Copyright (C) 1994-1996 Linus Torvalds & authors + */ + +/* s390 does not have IDE */ + +#ifndef __ASMS390_IDE_H +#define __ASMS390_IDE_H + +#ifdef __KERNEL__ + +#ifndef MAX_HWIFS +#define MAX_HWIFS 0 +#endif + +#define ide__sti() do {} while (0) + +typedef union { + unsigned all : 8; /* all of the bits together */ + struct { + unsigned head : 4; /* always zeros here */ + unsigned unit : 1; /* drive select number, 0 or 1 */ + unsigned bit5 : 1; /* always 1 */ + unsigned lba : 1; /* using LBA instead of CHS */ + unsigned bit7 : 1; /* always 1 */ + } b; + } select_t; + +#define ide_request_irq(irq,hand,flg,dev,id) do {} while (0) +#define ide_free_irq(irq,dev_id) do {} while (0) +#define ide_check_region(from,extent) do {} while (0) +#define ide_request_region(from,extent,name) do {} while (0) +#define ide_release_region(from,extent) do {} while (0) + +/* + * The following are not needed for the non-m68k ports + */ +#define ide_ack_intr(hwif) (1) +#define ide_fix_driveid(id) do {} while (0) +#define ide_release_lock(lock) do {} while (0) +#define ide_get_lock(lock, hdlr, data) do {} while (0) + +/* + * We always use the new IDE port registering, + * so these are fixed here. + */ +#define ide_default_io_base(i) ((ide_ioreg_t)0) +#define ide_default_irq(b) (0) + +#endif /* __KERNEL__ */ + +#endif /* __ASMARM_IDE_H */ diff --git a/include/asm-s390x/init.h b/include/asm-s390x/init.h new file mode 100644 index 000000000..715485b72 --- /dev/null +++ b/include/asm-s390x/init.h @@ -0,0 +1,29 @@ +/* + * include/asm-s390/init.h + * + * S390 version + */ + +#ifndef _S390_INIT_H +#define _S390_INIT_H + +#define __init __attribute__ ((constructor)) + +/* don't know, if need on S390 */ +#define __initdata +#define __initfunc(__arginit) \ + __arginit __init; \ + __arginit +/* For assembly routines + * need to define ? + */ +/* +#define __INIT .section ".text.init",#alloc,#execinstr +#define __FINIT .previous +#define __INITDATA .section ".data.init",#alloc,#write +*/ + +#define __cacheline_aligned __attribute__ ((__aligned__(16))) + +#endif + diff --git a/include/asm-s390x/io.h b/include/asm-s390x/io.h new file mode 100644 index 000000000..9a4aabd6f --- /dev/null +++ b/include/asm-s390x/io.h @@ -0,0 +1,94 @@ +/* + * include/asm-s390/io.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) + * + * Derived from "include/asm-i386/io.h" + */ + +#ifndef _S390_IO_H +#define _S390_IO_H + +#ifdef __KERNEL__ + +#include <linux/vmalloc.h> +#include <asm/page.h> + +#define IO_SPACE_LIMIT 0xffffffff + +#define __io_virt(x) ((void *)(PAGE_OFFSET | (unsigned long)(x))) +#define __io_phys(x) ((unsigned long)(x) & ~PAGE_OFFSET) +/* + * Change virtual addresses to physical addresses and vv. + * These are pretty trivial + */ +extern inline unsigned long virt_to_phys(volatile void * address) +{ + unsigned long real_address; + __asm__ (" lrag %0,0(%1)\n" + " jz 0f\n" + " slgr %0,%0\n" + "0:" + : "=a" (real_address) : "a" (address) ); + return real_address; +} + +extern inline void * phys_to_virt(unsigned long address) +{ + return __io_virt(address); +} + +extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); + +extern inline void * ioremap (unsigned long offset, unsigned long size) +{ + return __ioremap(offset, size, 0); +} + +/* + * This one maps high address device memory and turns off caching for that area. + * it's useful if some control registers are in such an area and write combining + * or read caching is not desirable: + */ +extern inline void * ioremap_nocache (unsigned long offset, unsigned long size) +{ + return __ioremap(offset, size, 0); +} + +extern void iounmap(void *addr); + +/* + * IO bus memory addresses are also 1:1 with the physical address + */ +#define virt_to_bus virt_to_phys +#define bus_to_virt phys_to_virt + +/* + * readX/writeX() are used to access memory mapped devices. On some + * architectures the memory mapped IO stuff needs to be accessed + * differently. + */ + +#define readb(addr) (*(volatile unsigned char *) __io_virt(addr)) +#define readw(addr) (*(volatile unsigned short *) __io_virt(addr)) +#define readl(addr) (*(volatile unsigned int *) __io_virt(addr)) + +#define writeb(b,addr) (*(volatile unsigned char *) __io_virt(addr) = (b)) +#define writew(b,addr) (*(volatile unsigned short *) __io_virt(addr) = (b)) +#define writel(b,addr) (*(volatile unsigned int *) __io_virt(addr) = (b)) + +#define memset_io(a,b,c) memset(__io_virt(a),(b),(c)) +#define memcpy_fromio(a,b,c) memcpy((a),__io_virt(b),(c)) +#define memcpy_toio(a,b,c) memcpy(__io_virt(a),(b),(c)) + +#define inb_p(addr) readb(addr) +#define inb(addr) readb(addr) + +#define outb(x,addr) ((void) writeb(x,addr)) +#define outb_p(x,addr) outb(x,addr) + +#endif /* __KERNEL__ */ + +#endif diff --git a/include/asm-s390x/ioctl.h b/include/asm-s390x/ioctl.h new file mode 100644 index 000000000..35b4821e8 --- /dev/null +++ b/include/asm-s390x/ioctl.h @@ -0,0 +1,78 @@ +/* + * include/asm-s390/ioctl.h + * + * S390 version + * + * Derived from "include/asm-i386/ioctl.h" + */ + +#ifndef _S390_IOCTL_H +#define _S390_IOCTL_H + +/* ioctl command encoding: 32 bits total, command in lower 16 bits, + * size of the parameter structure in the lower 14 bits of the + * upper 16 bits. + * Encoding the size of the parameter structure in the ioctl request + * is useful for catching programs compiled with old versions + * and to avoid overwriting user space outside the user buffer area. + * The highest 2 bits are reserved for indicating the ``access mode''. + * NOTE: This limits the max parameter size to 16kB -1 ! + */ + +/* + * The following is for compatibility across the various Linux + * platforms. The i386 ioctl numbering scheme doesn't really enforce + * a type field. De facto, however, the top 8 bits of the lower 16 + * bits are indeed used as a type field, so we might just as well make + * this explicit here. Please be sure to use the decoding macros + * below from now on. + */ +#define _IOC_NRBITS 8 +#define _IOC_TYPEBITS 8 +#define _IOC_SIZEBITS 14 +#define _IOC_DIRBITS 2 + +#define _IOC_NRMASK ((1 << _IOC_NRBITS)-1) +#define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1) +#define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1) +#define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1) + +#define _IOC_NRSHIFT 0 +#define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS) +#define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS) +#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS) + +/* + * Direction bits. + */ +#define _IOC_NONE 0U +#define _IOC_WRITE 1U +#define _IOC_READ 2U + +#define _IOC(dir,type,nr,size) \ + (((dir) << _IOC_DIRSHIFT) | \ + ((type) << _IOC_TYPESHIFT) | \ + ((nr) << _IOC_NRSHIFT) | \ + ((size) << _IOC_SIZESHIFT)) + +/* used to create numbers */ +#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) +#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) +#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) +#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) + +/* used to decode ioctl numbers.. */ +#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) +#define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) +#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) +#define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK) + +/* ...and for the drivers/sound files... */ + +#define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT) +#define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT) +#define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT) +#define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT) +#define IOCSIZE_SHIFT (_IOC_SIZESHIFT) + +#endif /* _S390_IOCTL_H */ diff --git a/include/asm-s390x/ioctls.h b/include/asm-s390x/ioctls.h new file mode 100644 index 000000000..db7b0a0c3 --- /dev/null +++ b/include/asm-s390x/ioctls.h @@ -0,0 +1,89 @@ +/* + * include/asm-s390/ioctls.h + * + * S390 version + * + * Derived from "include/asm-i386/ioctls.h" + */ + +#ifndef __ARCH_S390_IOCTLS_H__ +#define __ARCH_S390_IOCTLS_H__ + +#include <asm/ioctl.h> + +/* 0x54 is just a magic number to make these relatively unique ('T') */ + +#define TCGETS 0x5401 +#define TCSETS 0x5402 +#define TCSETSW 0x5403 +#define TCSETSF 0x5404 +#define TCGETA 0x5405 +#define TCSETA 0x5406 +#define TCSETAW 0x5407 +#define TCSETAF 0x5408 +#define TCSBRK 0x5409 +#define TCXONC 0x540A +#define TCFLSH 0x540B +#define TIOCEXCL 0x540C +#define TIOCNXCL 0x540D +#define TIOCSCTTY 0x540E +#define TIOCGPGRP 0x540F +#define TIOCSPGRP 0x5410 +#define TIOCOUTQ 0x5411 +#define TIOCSTI 0x5412 +#define TIOCGWINSZ 0x5413 +#define TIOCSWINSZ 0x5414 +#define TIOCMGET 0x5415 +#define TIOCMBIS 0x5416 +#define TIOCMBIC 0x5417 +#define TIOCMSET 0x5418 +#define TIOCGSOFTCAR 0x5419 +#define TIOCSSOFTCAR 0x541A +#define FIONREAD 0x541B +#define TIOCINQ FIONREAD +#define TIOCLINUX 0x541C +#define TIOCCONS 0x541D +#define TIOCGSERIAL 0x541E +#define TIOCSSERIAL 0x541F +#define TIOCPKT 0x5420 +#define FIONBIO 0x5421 +#define TIOCNOTTY 0x5422 +#define TIOCSETD 0x5423 +#define TIOCGETD 0x5424 +#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ +#define TIOCTTYGSTRUCT 0x5426 /* For debugging only */ +#define TIOCSBRK 0x5427 /* BSD compatibility */ +#define TIOCCBRK 0x5428 /* BSD compatibility */ +#define TIOCGSID 0x5429 /* Return the session ID of FD */ +#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ +#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ + +#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ +#define FIOCLEX 0x5451 +#define FIOASYNC 0x5452 +#define TIOCSERCONFIG 0x5453 +#define TIOCSERGWILD 0x5454 +#define TIOCSERSWILD 0x5455 +#define TIOCGLCKTRMIOS 0x5456 +#define TIOCSLCKTRMIOS 0x5457 +#define TIOCSERGSTRUCT 0x5458 /* For debugging only */ +#define TIOCSERGETLSR 0x5459 /* Get line status register */ +#define TIOCSERGETMULTI 0x545A /* Get multiport config */ +#define TIOCSERSETMULTI 0x545B /* Set multiport config */ + +#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ +#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ +#define FIOQSIZE 0x545E + +/* Used for packet mode */ +#define TIOCPKT_DATA 0 +#define TIOCPKT_FLUSHREAD 1 +#define TIOCPKT_FLUSHWRITE 2 +#define TIOCPKT_STOP 4 +#define TIOCPKT_START 8 +#define TIOCPKT_NOSTOP 16 +#define TIOCPKT_DOSTOP 32 + +#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ + +#endif diff --git a/include/asm-s390x/ipc.h b/include/asm-s390x/ipc.h new file mode 100644 index 000000000..66d2b53de --- /dev/null +++ b/include/asm-s390x/ipc.h @@ -0,0 +1,39 @@ +/* + * include/asm-s390/ipc.h + * + * S390 version + * + * Derived from "include/asm-i386/ipc.h" + */ + +#ifndef __s390_IPC_H__ +#define __s390_IPC_H__ + +/* + * These are used to wrap system calls on S390. + * + * See arch/s390/kernel/sys_s390.c for ugly details.. + */ +struct ipc_kludge { + struct msgbuf *msgp; + long msgtyp; +}; + +#define SEMOP 1 +#define SEMGET 2 +#define SEMCTL 3 +#define MSGSND 11 +#define MSGRCV 12 +#define MSGGET 13 +#define MSGCTL 14 +#define SHMAT 21 +#define SHMDT 22 +#define SHMGET 23 +#define SHMCTL 24 + +/* Used by the DIPC package, try and avoid reusing it */ +#define DIPC 25 + +#define IPCCALL(version,op) ((version)<<16 | (op)) + +#endif diff --git a/include/asm-s390x/ipcbuf.h b/include/asm-s390x/ipcbuf.h new file mode 100644 index 000000000..d007272a8 --- /dev/null +++ b/include/asm-s390x/ipcbuf.h @@ -0,0 +1,28 @@ +#ifndef __S390_IPCBUF_H__ +#define __S390_IPCBUF_H__ + +/* + * The user_ipc_perm structure for S/390 architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 32-bit mode_t and seq + * - 2 miscellaneous 32-bit values + */ + +struct ipc64_perm +{ + __kernel_key_t key; + __kernel_uid32_t uid; + __kernel_gid32_t gid; + __kernel_uid32_t cuid; + __kernel_gid32_t cgid; + __kernel_mode_t mode; + unsigned short __pad1; + unsigned short seq; + unsigned long __unused1; + unsigned long __unused2; +}; + +#endif /* __S390_IPCBUF_H__ */ diff --git a/include/asm-s390x/irq.h b/include/asm-s390x/irq.h new file mode 100644 index 000000000..9849d6fdc --- /dev/null +++ b/include/asm-s390x/irq.h @@ -0,0 +1,962 @@ +#ifndef __irq_h +#define __irq_h + +#include <linux/config.h> +#ifdef __KERNEL__ +#include <asm/hardirq.h> + +/* + * How many IRQ's for S390 ?!? + */ +#define __MAX_SUBCHANNELS 65536 +#define NR_IRQS __MAX_SUBCHANNELS + +#define LPM_ANYPATH 0xff /* doesn't really belong here, Ingo? */ + +#define INVALID_STORAGE_AREA ((void *)(-1 - 0x3FFF )) + +extern int disable_irq(unsigned int); +extern int enable_irq(unsigned int); + +/* + * Interrupt controller descriptor. This is all we need + * to describe about the low-level hardware. + */ +struct hw_interrupt_type { + const __u8 *typename; + int (*handle)(unsigned int irq, + int cpu, + struct pt_regs * regs); + int (*enable) (unsigned int irq); + int (*disable)(unsigned int irq); +}; + +/* + * Status: reason for being disabled: somebody has + * done a "disable_irq()" or we must not re-enter the + * already executing irq.. + */ +#define IRQ_INPROGRESS 1 +#define IRQ_DISABLED 2 +#define IRQ_PENDING 4 + +/* + * path management control word + */ +typedef struct { + __u32 intparm; /* interruption parameter */ + __u32 qf : 1; /* qdio facility */ + __u32 res0 : 1; /* reserved zeros */ + __u32 isc : 3; /* interruption sublass */ + __u32 res5 : 3; /* reserved zeros */ + __u32 ena : 1; /* enabled */ + __u32 lm : 2; /* limit mode */ + __u32 mme : 2; /* measurement-mode enable */ + __u32 mp : 1; /* multipath mode */ + __u32 tf : 1; /* timing facility */ + __u32 dnv : 1; /* device number valid */ + __u32 dev : 16; /* device number */ + __u8 lpm; /* logical path mask */ + __u8 pnom; /* path not operational mask */ + __u8 lpum; /* last path used mask */ + __u8 pim; /* path installed mask */ + __u16 mbi; /* measurement-block index */ + __u8 pom; /* path operational mask */ + __u8 pam; /* path available mask */ + __u8 chpid[8]; /* CHPID 0-7 (if available) */ + __u32 unused1 : 8; /* reserved zeros */ + __u32 st : 3; /* subchannel type */ + __u32 unused2 : 20; /* reserved zeros */ + __u32 csense : 1; /* concurrent sense; can be enabled ...*/ + /* ... per MSCH, however, if facility */ + /* ... is not installed, this results */ + /* ... in an operand exception. */ + } __attribute__ ((packed)) pmcw_t; + +#endif /* __KERNEL__ */ +/* + * subchannel status word + */ +typedef struct { + __u32 key : 4; /* subchannel key */ + __u32 sctl : 1; /* suspend control */ + __u32 eswf : 1; /* ESW format */ + __u32 cc : 2; /* deferred condition code */ + __u32 fmt : 1; /* format */ + __u32 pfch : 1; /* prefetch */ + __u32 isic : 1; /* initial-status interruption control */ + __u32 alcc : 1; /* address-limit checking control */ + __u32 ssi : 1; /* suppress-suspended interruption */ + __u32 zcc : 1; /* zero condition code */ + __u32 ectl : 1; /* extended control */ + __u32 pno : 1; /* path not operational */ + __u32 res : 1; /* reserved */ + __u32 fctl : 3; /* function control */ + __u32 actl : 7; /* activity control */ + __u32 stctl : 5; /* status control */ + __u32 cpa; /* channel program address */ + __u32 dstat : 8; /* device status */ + __u32 cstat : 8; /* subchannel status */ + __u32 count : 16; /* residual count */ + } __attribute__ ((packed)) scsw_t; + +#define SCSW_FCTL_CLEAR_FUNC 0x1 +#define SCSW_FCTL_HALT_FUNC 0x2 +#define SCSW_FCTL_START_FUNC 0x4 + +#define SCSW_ACTL_SUSPENDED 0x1 +#define SCSW_ACTL_DEVACT 0x2 +#define SCSW_ACTL_SCHACT 0x4 +#define SCSW_ACTL_CLEAR_PEND 0x8 +#define SCSW_ACTL_HALT_PEND 0x10 +#define SCSW_ACTL_START_PEND 0x20 +#define SCSW_ACTL_RESUME_PEND 0x40 + +#define SCSW_STCTL_STATUS_PEND 0x1 +#define SCSW_STCTL_SEC_STATUS 0x2 +#define SCSW_STCTL_PRIM_STATUS 0x4 +#define SCSW_STCTL_INTER_STATUS 0x8 +#define SCSW_STCTL_ALERT_STATUS 0x10 + +#define DEV_STAT_ATTENTION 0x80 +#define DEV_STAT_STAT_MOD 0x40 +#define DEV_STAT_CU_END 0x20 +#define DEV_STAT_BUSY 0x10 +#define DEV_STAT_CHN_END 0x08 +#define DEV_STAT_DEV_END 0x04 +#define DEV_STAT_UNIT_CHECK 0x02 +#define DEV_STAT_UNIT_EXCEP 0x01 + +#define SCHN_STAT_PCI 0x80 +#define SCHN_STAT_INCORR_LEN 0x40 +#define SCHN_STAT_PROG_CHECK 0x20 +#define SCHN_STAT_PROT_CHECK 0x10 +#define SCHN_STAT_CHN_DATA_CHK 0x08 +#define SCHN_STAT_CHN_CTRL_CHK 0x04 +#define SCHN_STAT_INTF_CTRL_CHK 0x02 +#define SCHN_STAT_CHAIN_CHECK 0x01 + +/* + * architectured values for first sense byte + */ +#define SNS0_CMD_REJECT 0x80 +#define SNS_CMD_REJECT SNS0_CMD_REJECT +#define SNS0_INTERVENTION_REQ 0x40 +#define SNS0_BUS_OUT_CHECK 0x20 +#define SNS0_EQUIPMENT_CHECK 0x10 +#define SNS0_DATA_CHECK 0x08 +#define SNS0_OVERRUN 0x04 +/* 0x02 reserved */ +#define SNS0_INCOMPL_DOMAIN 0x01 + +/* + * architectured values for second sense byte + */ +#define SNS1_PERM_ERR 0x80 +#define SNS1_INV_TRACK_FORMAT 0x40 +#define SNS1_EOC 0x20 +#define SNS1_MESSAGE_TO_OPER 0x10 +#define SNS1_NO_REC_FOUND 0x08 +#define SNS1_FILE_PROTECTED 0x04 +#define SNS1_WRITE_INHIBITED 0x02 +#define SNS1_INPRECISE_END 0x01 + +/* + * architectured values for third sense byte + */ +#define SNS2_REQ_INH_WRITE 0x80 +#define SNS2_CORRECTABLE 0x40 +#define SNS2_FIRST_LOG_ERR 0x20 +#define SNS2_ENV_DATA_PRESENT 0x10 +/* 0x08 reserved */ +#define SNS2_INPRECISE_END 0x04 +/* 0x02 reserved */ +/* 0x01 reserved */ + +#ifdef __KERNEL__ +/* + * subchannel information block + */ +typedef struct { + pmcw_t pmcw; /* path management control word */ + scsw_t scsw; /* subchannel status word */ + __u8 mda[12]; /* model dependent area */ + } __attribute__ ((packed,aligned(4))) schib_t; +#endif /* __KERNEL__ */ + +typedef struct { + __u8 cmd_code;/* command code */ + __u8 flags; /* flags, like IDA addressing, etc. */ + __u16 count; /* byte count */ + __u32 cda; /* data address */ + } __attribute__ ((packed,aligned(8))) ccw1_t; + +#define CCW_FLAG_DC 0x80 +#define CCW_FLAG_CC 0x40 +#define CCW_FLAG_SLI 0x20 +#define CCW_FLAG_SKIP 0x10 +#define CCW_FLAG_PCI 0x08 +#define CCW_FLAG_IDA 0x04 +#define CCW_FLAG_SUSPEND 0x02 + +#define CCW_CMD_READ_IPL 0x02 +#define CCW_CMD_NOOP 0x03 +#define CCW_CMD_BASIC_SENSE 0x04 +#define CCW_CMD_TIC 0x08 +#define CCW_CMD_SENSE_PGID 0x34 +#define CCW_CMD_SUSPEND_RECONN 0x5B +#define CCW_CMD_RDC 0x64 +#define CCW_CMD_SET_PGID 0xAF +#define CCW_CMD_SENSE_ID 0xE4 +#define CCW_CMD_DCTL 0xF3 + +#ifdef __KERNEL__ +#define SENSE_MAX_COUNT 0x20 + +/* + * architectured values for first sense byte + */ +#define SNS0_CMD_REJECT 0x80 +#define SNS_CMD_REJECT SNS0_CMD_REJECT +#define SNS0_INTERVENTION_REQ 0x40 +#define SNS0_BUS_OUT_CHECK 0x20 +#define SNS0_EQUIPMENT_CHECK 0x10 +#define SNS0_DATA_CHECK 0x08 +#define SNS0_OVERRUN 0x04 + +/* + * operation request block + */ +typedef struct { + __u32 intparm; /* interruption parameter */ + __u32 key : 4; /* flags, like key, suspend control, etc. */ + __u32 spnd : 1; /* suspend control */ + __u32 res1 : 1; /* reserved */ + __u32 mod : 1; /* modification control */ + __u32 sync : 1; /* synchronize control */ + __u32 fmt : 1; /* format control */ + __u32 pfch : 1; /* prefetch control */ + __u32 isic : 1; /* initial-status-interruption control */ + __u32 alcc : 1; /* address-limit-checking control */ + __u32 ssic : 1; /* suppress-suspended-interr. control */ + __u32 res2 : 1; /* reserved */ + __u32 c64 : 1; /* IDAW/QDIO 64 bit control */ + __u32 i2k : 1; /* IDAW 2/4kB block size control */ + __u32 lpm : 8; /* logical path mask */ + __u32 ils : 1; /* incorrect length */ + __u32 zero : 6; /* reserved zeros */ + __u32 orbx : 1; /* ORB extension control */ + __u32 cpa; /* channel program address */ + } __attribute__ ((packed,aligned(4))) orb_t; + +#endif /* __KERNEL__ */ +typedef struct { + __u32 res0 : 4; /* reserved */ + __u32 pvrf : 1; /* path-verification-required flag */ + __u32 cpt : 1; /* channel-path timeout */ + __u32 fsavf : 1; /* Failing storage address validity flag */ + __u32 cons : 1; /* concurrent-sense */ + __u32 res8 : 2; /* reserved */ + __u32 scnt : 6; /* sense count if cons == 1 */ + __u32 res16 : 16; /* reserved */ + } __attribute__ ((packed)) erw_t; + +/* + * subchannel logout area + */ +typedef struct { + __u32 res0 : 1; /* reserved */ + __u32 esf : 7; /* extended status flags */ + __u32 lpum : 8; /* last path used mask */ + __u32 res16 : 1; /* reserved */ + __u32 fvf : 5; /* field-validity flags */ + __u32 sacc : 2; /* storage access code */ + __u32 termc : 2; /* termination code */ + __u32 devsc : 1; /* device-status check */ + __u32 serr : 1; /* secondary error */ + __u32 ioerr : 1; /* i/o-error alert */ + __u32 seqc : 3; /* sequence code */ + } __attribute__ ((packed)) sublog_t ; + +/* + * Format 0 Extended Status Word (ESW) + */ +typedef struct { + sublog_t sublog; /* subchannel logout */ + erw_t erw; /* extended report word */ + __u32 faddr; /* failing address */ + __u32 zeros[2]; /* 2 fullwords of zeros */ + } __attribute__ ((packed)) esw0_t; + +/* + * Format 1 Extended Status Word (ESW) + */ +typedef struct { + __u8 zero0; /* reserved zeros */ + __u8 lpum; /* last path used mask */ + __u16 zero16; /* reserved zeros */ + erw_t erw; /* extended report word */ + __u32 zeros[3]; /* 2 fullwords of zeros */ + } __attribute__ ((packed)) esw1_t; + +/* + * Format 2 Extended Status Word (ESW) + */ +typedef struct { + __u8 zero0; /* reserved zeros */ + __u8 lpum; /* last path used mask */ + __u16 dcti; /* device-connect-time interval */ + erw_t erw; /* extended report word */ + __u32 zeros[3]; /* 2 fullwords of zeros */ + } __attribute__ ((packed)) esw2_t; + +/* + * Format 3 Extended Status Word (ESW) + */ +typedef struct { + __u8 zero0; /* reserved zeros */ + __u8 lpum; /* last path used mask */ + __u16 res; /* reserved */ + erw_t erw; /* extended report word */ + __u32 zeros[3]; /* 2 fullwords of zeros */ + } __attribute__ ((packed)) esw3_t; + +typedef union { + esw0_t esw0; + esw1_t esw1; + esw2_t esw2; + esw3_t esw3; + } __attribute__ ((packed)) esw_t; + +/* + * interruption response block + */ +typedef struct { + scsw_t scsw; /* subchannel status word */ + esw_t esw; /* extended status word */ + __u8 ecw[32]; /* extended control word */ + } irb_t __attribute__ ((packed,aligned(4))); +#ifdef __KERNEL__ + +/* + * TPI info structure + */ +typedef struct { + __u32 reserved1 : 16; /* reserved 0x00000001 */ + __u32 irq : 16; /* aka. subchannel number */ + __u32 intparm; /* interruption parameter */ + __u32 adapter_IO : 1; + __u32 reserved2 : 1; + __u32 isc : 3; + __u32 reserved3 : 12; + __u32 int_type : 3; + __u32 reserved4 : 12; + } __attribute__ ((packed)) tpi_info_t; + + +// +// command information word (CIW) layout +// +typedef struct _ciw { + __u32 et : 2; // entry type + __u32 reserved : 2; // reserved + __u32 ct : 4; // command type + __u32 cmd : 8; // command + __u32 count : 16; // count + } __attribute__ ((packed)) ciw_t; + +#define CIW_TYPE_RCD 0x0 // read configuration data +#define CIW_TYPE_SII 0x1 // set interface identifier +#define CIW_TYPE_RNI 0x2 // read node identifier + +#define MAX_CIWS 8 +// +// sense-id response buffer layout +// +typedef struct { + /* common part */ + __u8 reserved; /* always 0x'FF' */ + __u16 cu_type; /* control unit type */ + __u8 cu_model; /* control unit model */ + __u16 dev_type; /* device type */ + __u8 dev_model; /* device model */ + __u8 unused; /* padding byte */ + /* extended part */ + ciw_t ciw[MAX_CIWS]; /* variable # of CIWs */ + } __attribute__ ((packed,aligned(4))) senseid_t; + +#endif /* __KERNEL__ */ +/* + * sense data + */ +typedef struct { + __u8 res[32]; /* reserved */ + __u8 data[32]; /* sense data */ + } __attribute__ ((packed)) sense_t; + +/* + * device status area, to be provided by the device driver + * when calling request_irq() as parameter "dev_id", later + * tied to the "action" control block. + * + * Note : No data area must be added after union ii or the + * effective devstat size calculation will fail ! + */ +typedef struct { + __u16 devno; /* device number, aka. "cuu" from irb */ + unsigned long intparm; /* interrupt parameter */ + __u8 cstat; /* channel status - accumulated */ + __u8 dstat; /* device status - accumulated */ + __u8 lpum; /* last path used mask from irb */ + __u8 unused; /* not used - reserved */ + unsigned int flag; /* flag : see below */ + __u32 cpa; /* CCW address from irb at primary status */ + __u32 rescnt; /* res. count from irb at primary status */ + __u32 scnt; /* sense count, if DEVSTAT_FLAG_SENSE_AVAIL */ + union { + irb_t irb; /* interruption response block */ + sense_t sense; /* sense information */ + } ii; /* interrupt information */ + } devstat_t; + +#define DEVSTAT_FLAG_SENSE_AVAIL 0x00000001 +#define DEVSTAT_NOT_OPER 0x00000002 +#define DEVSTAT_START_FUNCTION 0x00000004 +#define DEVSTAT_HALT_FUNCTION 0x00000008 +#define DEVSTAT_STATUS_PENDING 0x00000010 +#define DEVSTAT_REVALIDATE 0x00000020 +#define DEVSTAT_DEVICE_GONE 0x00000040 +#define DEVSTAT_DEVICE_OWNED 0x00000080 +#define DEVSTAT_CLEAR_FUNCTION 0x00000100 +#define DEVSTAT_PCI 0x00000200 +#define DEVSTAT_SUSPENDED 0x00000400 +#define DEVSTAT_UNKNOWN_DEV 0x00000800 +#define DEVSTAT_FINAL_STATUS 0x80000000 + +#define DEVINFO_NOT_OPER DEVSTAT_NOT_OPER +#define DEVINFO_UNKNOWN_DEV DEVSTAT_UNKNOWN_DEV +#define DEVINFO_DEVICE_OWNED DEVSTAT_DEVICE_OWNED +#define DEVINFO_QDIO_CAPABLE 0x40000000 + +#define INTPARM_STATUS_PENDING 0xFFFFFFFF +#ifdef __KERNEL__ + +#define IO_INTERRUPT_TYPE 0 /* I/O interrupt type */ + +typedef void (* io_handler_func1_t) ( int irq, + devstat_t *devstat, + struct pt_regs *rgs); + +typedef void (* io_handler_func_t) ( int irq, + void *devstat, + struct pt_regs *rgs); + +typedef void ( * not_oper_handler_func_t)( int irq, + int status ); + +typedef int (* adapter_int_handler_t)( __u32 intparm ); + +struct s390_irqaction { + io_handler_func_t handler; + unsigned long flags; + const char *name; + devstat_t *dev_id; +}; + +/* + * This is the "IRQ descriptor", which contains various information + * about the irq, including what kind of hardware handling it has, + * whether it is disabled etc etc. + * + * Pad this out to 32 bytes for cache and indexing reasons. + */ +typedef struct { + unsigned int status; /* IRQ status - IRQ_INPROGRESS, IRQ_DISABLED */ + struct hw_interrupt_type *handler; /* handle/enable/disable functions */ + struct s390_irqaction *action; /* IRQ action list */ + } irq_desc_t; + +typedef struct { + __u8 state1 : 2; /* path state value 1 */ + __u8 state2 : 2; /* path state value 2 */ + __u8 state3 : 1; /* path state value 3 */ + __u8 resvd : 3; /* reserved */ + } __attribute__ ((packed)) path_state_t; + +typedef struct { + union { + __u8 fc; /* SPID function code */ + path_state_t ps; /* SNID path state */ + } inf; + __u32 cpu_addr : 16; /* CPU address */ + __u32 cpu_id : 24; /* CPU identification */ + __u32 cpu_model : 16; /* CPU model */ + __u32 tod_high; /* high word TOD clock */ + } __attribute__ ((packed)) pgid_t; + +#define SPID_FUNC_SINGLE_PATH 0x00 +#define SPID_FUNC_MULTI_PATH 0x80 +#define SPID_FUNC_ESTABLISH 0x00 +#define SPID_FUNC_RESIGN 0x40 +#define SPID_FUNC_DISBAND 0x20 + +#define SNID_STATE1_RESET 0 +#define SNID_STATE1_UNGROUPED 2 +#define SNID_STATE1_GROUPED 3 + +#define SNID_STATE2_NOT_RESVD 0 +#define SNID_STATE2_RESVD_ELSE 2 +#define SNID_STATE2_RESVD_SELF 3 + +#define SNID_STATE3_MULTI_PATH 1 +#define SNID_STATE3_SINGLE_PATH 0 + +/* + * Flags used as input parameters for do_IO() + */ +#define DOIO_EARLY_NOTIFICATION 0x0001 /* allow for I/O completion ... */ + /* ... notification after ... */ + /* ... primary interrupt status */ +#define DOIO_RETURN_CHAN_END DOIO_EARLY_NOTIFICATION +#define DOIO_VALID_LPM 0x0002 /* LPM input parameter is valid */ +#define DOIO_WAIT_FOR_INTERRUPT 0x0004 /* wait synchronously for interrupt */ +#define DOIO_REPORT_ALL 0x0008 /* report all interrupt conditions */ +#define DOIO_ALLOW_SUSPEND 0x0010 /* allow for channel prog. suspend */ +#define DOIO_DENY_PREFETCH 0x0020 /* don't allow for CCW prefetch */ +#define DOIO_SUPPRESS_INTER 0x0040 /* suppress intermediate inter. */ + /* ... for suspended CCWs */ +#define DOIO_TIMEOUT 0x0080 /* 3 secs. timeout for sync. I/O */ +#define DOIO_DONT_CALL_INTHDLR 0x0100 /* don't call interrupt handler */ + +/* + * do_IO() + * + * Start a S/390 channel program. When the interrupt arrives + * handle_IRQ_event() is called, which eventually calls the + * IRQ handler, either immediately, delayed (dev-end missing, + * or sense required) or never (no IRQ handler registered - + * should never occur, as the IRQ (subchannel ID) should be + * disabled if no handler is present. Depending on the action + * taken, do_IO() returns : 0 - Success + * -EIO - Status pending + * see : action->dev_id->cstat + * action->dev_id->dstat + * -EBUSY - Device busy + * -ENODEV - Device not operational + */ +int do_IO( int irq, /* IRQ aka. subchannel number */ + ccw1_t *cpa, /* logical channel program address */ + unsigned long intparm, /* interruption parameter */ + __u8 lpm, /* logical path mask */ + unsigned long flag); /* flags : see above */ + +int start_IO( int irq, /* IRQ aka. subchannel number */ + ccw1_t *cpa, /* logical channel program address */ + unsigned long intparm, /* interruption parameter */ + __u8 lpm, /* logical path mask */ + unsigned int flag); /* flags : see above */ + +void do_crw_pending( void ); /* CRW handler */ + +int resume_IO( int irq); /* IRQ aka. subchannel number */ + +int halt_IO( int irq, /* IRQ aka. subchannel number */ + unsigned long intparm, /* dummy intparm */ + unsigned long flag); /* possible DOIO_WAIT_FOR_INTERRUPT */ + +int clear_IO( int irq, /* IRQ aka. subchannel number */ + unsigned long intparm, /* dummy intparm */ + unsigned long flag); /* possible DOIO_WAIT_FOR_INTERRUPT */ + +int process_IRQ( struct pt_regs regs, + unsigned int irq, + unsigned int intparm); + + +int enable_cpu_sync_isc ( int irq ); +int disable_cpu_sync_isc( int irq ); + +typedef struct { + int irq; /* irq, aka. subchannel */ + __u16 devno; /* device number */ + unsigned int status; /* device status */ + senseid_t sid_data; /* senseID data */ + } s390_dev_info_t; + +int get_dev_info( int irq, s390_dev_info_t *); /* to be eliminated - don't use */ + +int get_dev_info_by_irq ( int irq, s390_dev_info_t *pdi); +int get_dev_info_by_devno( __u16 devno, s390_dev_info_t *pdi); + +int get_irq_by_devno( __u16 devno ); +unsigned int get_devno_by_irq( int irq ); + +int get_irq_first( void ); +int get_irq_next ( int irq ); + +int read_dev_chars( int irq, void **buffer, int length ); +int read_conf_data( int irq, void **buffer, int *length, __u8 lpm ); + +int s390_DevicePathVerification( int irq, __u8 domask ); + +int s390_request_irq_special( int irq, + io_handler_func_t io_handler, + not_oper_handler_func_t not_oper_handler, + unsigned long irqflags, + const char *devname, + void *dev_id); + +extern int handle_IRQ_event( unsigned int irq, int cpu, struct pt_regs *); + +extern int set_cons_dev(int irq); +extern int reset_cons_dev(int irq); +extern int wait_cons_dev(int irq); + +/* + * Some S390 specific IO instructions as inline + */ + +extern __inline__ int stsch(int irq, volatile schib_t *addr) +{ + int ccode; + + __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else + "LR 1,%1\n\t" +#endif + "STSCH 0(%2)\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "r" (irq | 0x10000L), "a" (addr) + : "cc", "1" ); + return ccode; +} + +extern __inline__ int msch(int irq, volatile schib_t *addr) +{ + int ccode; + + __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else + "LR 1,%1\n\t" +#endif + "MSCH 0(%2)\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "r" (irq | 0x10000L), "a" (addr) + : "cc", "1" ); + return ccode; +} + +extern __inline__ int msch_err(int irq, volatile schib_t *addr) +{ + int ccode; + + __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + " lgr 1,%1\n" + " msch 0(%2)\n" + "0: ipm %0\n" + " srl %0,28\n" + "1:\n" + ".section .fixup,\"ax\"\n" + "2: l %0,%3\n" + " jg 1b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + " .align 8\n" + " .quad 0b,2b\n" + ".previous" +#else + " lr 1,%1\n" + " msch 0(%2)\n" + "0: ipm %0\n" + " srl %0,28\n" + "1:\n" + ".section .fixup,\"ax\"\n" + "2: l %0,%3\n" + " bras 1,3f\n" + " .long 1b\n" + "3: l 1,0(1)\n" + " br 1\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + " .align 4\n" + " .long 0b,2b\n" + ".previous" +#endif + : "=d" (ccode) + : "r" (irq | 0x10000L), "a" (addr), "i" (__LC_PGM_ILC) + : "cc", "1" ); + return ccode; +} + +extern __inline__ int tsch(int irq, volatile irb_t *addr) +{ + int ccode; + + __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else + "LR 1,%1\n\t" +#endif + "TSCH 0(%2)\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "r" (irq | 0x10000L), "a" (addr) + : "cc", "1" ); + return ccode; +} + +extern __inline__ int tpi( volatile tpi_info_t *addr) +{ + int ccode; + + __asm__ __volatile__( + "TPI 0(%1)\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "a" (addr) + : "cc", "1" ); + return ccode; +} + +extern __inline__ int ssch(int irq, volatile orb_t *addr) +{ + int ccode; + + __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else + "LR 1,%1\n\t" +#endif + "SSCH 0(%2)\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "r" (irq | 0x10000L), "a" (addr) + : "cc", "1" ); + return ccode; +} + +extern __inline__ int rsch(int irq) +{ + int ccode; + + __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else + "LR 1,%1\n\t" +#endif + "RSCH\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "r" (irq | 0x10000L) + : "cc", "1" ); + return ccode; +} + +extern __inline__ int csch(int irq) +{ + int ccode; + + __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else + "LR 1,%1\n\t" +#endif + "CSCH\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "r" (irq | 0x10000L) + : "cc", "1" ); + return ccode; +} + +extern __inline__ int hsch(int irq) +{ + int ccode; + + __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else + "LR 1,%1\n\t" +#endif + "HSCH\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "r" (irq | 0x10000L) + : "cc", "1" ); + return ccode; +} + +extern __inline__ int iac( void) +{ + int ccode; + + __asm__ __volatile__( + "IAC 1\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : : "cc", "1" ); + return ccode; +} + +extern __inline__ int rchp(int chpid) +{ + int ccode; + + __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "LGR 1,%1\n\t" +#else + "LR 1,%1\n\t" +#endif + "RCHP\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "r" (chpid) + : "cc", "1" ); + return ccode; +} + +typedef struct { + __u16 vrdcdvno : 16; /* device number (input) */ + __u16 vrdclen : 16; /* data block length (input) */ + __u32 vrdcvcla : 8; /* virtual device class (output) */ + __u32 vrdcvtyp : 8; /* virtual device type (output) */ + __u32 vrdcvsta : 8; /* virtual device status (output) */ + __u32 vrdcvfla : 8; /* virtual device flags (output) */ + __u32 vrdcrccl : 8; /* real device class (output) */ + __u32 vrdccrty : 8; /* real device type (output) */ + __u32 vrdccrmd : 8; /* real device model (output) */ + __u32 vrdccrft : 8; /* real device feature (output) */ + } __attribute__ ((packed,aligned(4))) diag210_t; + +void VM_virtual_device_info( __u16 devno, /* device number */ + senseid_t *ps ); /* ptr to senseID data */ + +extern __inline__ int diag210( diag210_t * addr) +{ + int ccode; + + __asm__ __volatile__( +#ifdef CONFIG_ARCH_S390X + "SAM31\n\t" + "DIAG %1,0,0x210\n\t" + "SAM64\n\t" +#else + "LR 1,%1\n\t" + ".long 0x83110210\n\t" +#endif + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "a" (addr) + : "cc" ); + return ccode; +} + +/* + * Various low-level irq details needed by irq.c, process.c, + * time.c, io_apic.c and smp.c + * + * Interrupt entry/exit code at both C and assembly level + */ + +void mask_irq(unsigned int irq); +void unmask_irq(unsigned int irq); + +#define MAX_IRQ_SOURCES 128 + +extern spinlock_t irq_controller_lock; + +#ifdef CONFIG_SMP + +#include <asm/atomic.h> + +static inline void irq_enter(int cpu, unsigned int irq) +{ + hardirq_enter(cpu); +#ifdef CONFIG_ARCH_S390X + while (atomic_read(&global_irq_lock) != 0) { + eieio(); + } +#else + while (test_bit(0,&global_irq_lock)) { + eieio(); + } +#endif +} + +static inline void irq_exit(int cpu, unsigned int irq) +{ + hardirq_exit(cpu); + release_irqlock(cpu); +} + + +#else + +#define irq_enter(cpu, irq) (++local_irq_count(cpu)) +#define irq_exit(cpu, irq) (--local_irq_count(cpu)) + +#endif + +#define __STR(x) #x +#define STR(x) __STR(x) + +#ifdef CONFIG_SMP + +/* + * SMP has a few special interrupts for IPI messages + */ + +#endif /* CONFIG_SMP */ + +/* + * x86 profiling function, SMP safe. We might want to do this in + * assembly totally? + */ +extern char _stext; +static inline void s390_do_profile (unsigned long addr) +{ + if (prof_buffer && current->pid) { +#ifndef CONFIG_ARCH_S390X + addr &= 0x7fffffff; +#endif + addr -= (unsigned long) &_stext; + addr >>= prof_shift; + /* + * Don't ignore out-of-bounds EIP values silently, + * put them into the last histogram slot, so if + * present, they will show up as a sharp peak. + */ + if (addr > prof_len-1) + addr = prof_len-1; + atomic_inc((atomic_t *)&prof_buffer[addr]); + } +} + +#include <asm/s390io.h> + +#define s390irq_spin_lock(irq) \ + spin_lock(&(ioinfo[irq]->irq_lock)) + +#define s390irq_spin_unlock(irq) \ + spin_unlock(&(ioinfo[irq]->irq_lock)) + +#define s390irq_spin_lock_irqsave(irq,flags) \ + spin_lock_irqsave(&(ioinfo[irq]->irq_lock), flags) +#define s390irq_spin_unlock_irqrestore(irq,flags) \ + spin_unlock_irqrestore(&(ioinfo[irq]->irq_lock), flags) +#endif /* __KERNEL__ */ +#endif + diff --git a/include/asm-s390x/irqextras390.h b/include/asm-s390x/irqextras390.h new file mode 100644 index 000000000..70bac7f44 --- /dev/null +++ b/include/asm-s390x/irqextras390.h @@ -0,0 +1,151 @@ +/* + * include/asm-s390/irqextras390.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) + */ + +#ifndef __irqextras390_h +#define __irqextras390_h + +/* + irqextras390.h by D.J. Barrow + if you are a bitfield fan & are paranoid that ansi dosen't + give hard definitions about the size of an int or long you might + prefer these definitions as an alternative. + +*/ + +#include <linux/types.h> + +typedef struct +{ + unsigned key:4; + unsigned s:1; + unsigned l:1; + unsigned cc:2; + unsigned f:1; + unsigned p:1; + unsigned i:1; + unsigned a:1; + unsigned u:1; + unsigned z:1; + unsigned e:1; + unsigned n:1; + unsigned zero:1; + + unsigned fc_start:1; + unsigned fc_halt:1; + unsigned fc_clear:1; + + unsigned ac_resume_pending:1; + unsigned ac_start_pending:1; + unsigned ac_halt_pending:1; + unsigned ac_clear_pending:1; + unsigned ac_subchannel_active:1; + unsigned ac_device_active:1; + unsigned ac_suspended:1; + + unsigned sc_alert:1; + unsigned sc_intermediate:1; + unsigned sc_primary:1; + unsigned sc_seconary:1; + unsigned sc_status_pending:1; + + __u32 ccw_address; + + unsigned dev_status_attention:1; + unsigned dev_status_modifier:1; + unsigned dev_status_control_unit_end:1; + unsigned dev_status_busy:1; + unsigned dev_status_channel_end:1; + unsigned dev_status_device_end:1; + unsigned dev_status_unit_check:1; + unsigned dev_status_unit_exception:1; + + unsigned sch_status_program_cont_int:1; + unsigned sch_status_incorrect_length:1; + unsigned sch_status_program_check:1; + unsigned sch_status_protection_check:1; + unsigned sch_status_channel_data_check:1; + unsigned sch_status_channel_control_check:1; + unsigned sch_status_interface_control_check:1; + unsigned sch_status_chaining_check:1; + + __u16 byte_count; +} scsw_bits_t __attribute__((packed)); + +typedef struct +{ + __u32 flags; + __u32 ccw_address; + __u8 dev_status; + __u8 sch_status; + __u16 byte_count; +} scsw_words_t __attribute__((packed)); + +typedef struct +{ + __u8 cmd_code; + + unsigned cd:1; + unsigned cc:1; + unsigned sli:1; + unsigned skip:1; + unsigned pci:1; + unsigned ida:1; + unsigned s:1; + unsigned res1:1; + + __u16 count; + + __u32 ccw_data_address; +} ccw1_bits_t __attribute__((packed,aligned(8))); + +typedef struct +{ + __u32 interruption_parm; + unsigned key:4; + unsigned s:1; + unsigned res1:3; + unsigned f:1; + unsigned p:1; + unsigned i:1; + unsigned a:1; + unsigned u:1; + __u8 lpm; + unsigned l:1; + unsigned res2:7; + ccw1_bits_t *ccw_program_address; +} orb_bits_t __attribute__((packed)); + +void fixchannelprogram(orb_bits_t *orbptr); +void fixccws(ccw1_bits_t *ccwptr); +enum +{ + ccw_write=0x1, + ccw_read=0x2, + ccw_read_backward=0xc, + ccw_control=0x3, + ccw_sense=0x4, + ccw_sense_id=0xe4, + ccw_transfer_in_channel0=0x8, + ccw_transfer_in_channel1=0x8, + ccw_set_x_mode=0xc3, // according to uli's lan notes + ccw_nop=0x3 // according to uli's notes again + // n.b. ccw_control clashes with this + // so I presume its a special case of + // control +}; + + + +#endif + + + + + + + diff --git a/include/asm-s390x/lowcore.h b/include/asm-s390x/lowcore.h new file mode 100644 index 000000000..215b8b8e0 --- /dev/null +++ b/include/asm-s390x/lowcore.h @@ -0,0 +1,196 @@ +/* + * include/asm-s390/lowcore.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Hartmut Penner (hpenner@de.ibm.com), + * Martin Schwidefsky (schwidefsky@de.ibm.com), + * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) + */ + +#ifndef _ASM_S390_LOWCORE_H +#define _ASM_S390_LOWCORE_H + +#define __LC_EXT_OLD_PSW 0x0130 +#define __LC_SVC_OLD_PSW 0x0140 +#define __LC_PGM_OLD_PSW 0x0150 +#define __LC_MCK_OLD_PSW 0x0160 +#define __LC_IO_OLD_PSW 0x0170 +#define __LC_EXT_NEW_PSW 0x01b0 +#define __LC_SVC_NEW_PSW 0x01c0 +#define __LC_PGM_NEW_PSW 0x01d0 +#define __LC_MCK_NEW_PSW 0x01e0 +#define __LC_IO_NEW_PSW 0x01f0 +#define __LC_RETURN_PSW 0x0200 +#define __LC_SYNC_IO_WORD 0x0210 +#define __LC_EXT_PARAMS 0x080 +#define __LC_CPU_ADDRESS 0x084 +#define __LC_EXT_INT_CODE 0x086 +#define __LC_SVC_ILC 0x088 +#define __LC_SVC_INT_CODE 0x08A +#define __LC_PGM_ILC 0x08C +#define __LC_PGM_INT_CODE 0x08E +#define __LC_TRANS_EXC_ADDR 0x0a8 +#define __LC_SUBCHANNEL_ID 0x0B8 +#define __LC_SUBCHANNEL_NR 0x0BA +#define __LC_IO_INT_PARM 0x0BC +#define __LC_IO_INT_WORD 0x0C0 +#define __LC_MCCK_CODE 0x0E8 + +#define __LC_SAVE_AREA 0xC00 +#define __LC_CREGS_SAVE_AREA 0xC80 +#define __LC_AREGS_SAVE_AREA 0xD00 +#define __LC_KERNEL_STACK 0xD40 +#define __LC_KERNEL_LEVEL 0xD48 +#define __LC_IRQ_STAT 0xD50 +#define __LC_CPUID 0xD90 +#define __LC_CPUADDR 0xD98 +#define __LC_IPLDEV 0xDB8 + +#define __LC_PANIC_MAGIC 0xE00 + + +/* interrupt handler start with all io, external and mcck interrupt disabled */ + +#define _RESTART_PSW_MASK 0x0000000180000000 +#define _EXT_PSW_MASK 0x0400000180000000 +#define _PGM_PSW_MASK 0x0400000180000000 +#define _SVC_PSW_MASK 0x0400000180000000 +#define _MCCK_PSW_MASK 0x0400000180000000 +#define _IO_PSW_MASK 0x0400000180000000 +#define _USER_PSW_MASK 0x0701C00180000000 +#define _WAIT_PSW_MASK 0x0706000180000000 +#define _DW_PSW_MASK 0x0002000180000000 + +#define _PRIMARY_MASK 0x0000 /* MASK for SACF */ +#define _SECONDARY_MASK 0x0100 /* MASK for SACF */ +#define _ACCESS_MASK 0x0200 /* MASK for SACF */ +#define _HOME_MASK 0x0300 /* MASK for SACF */ + +#define _PSW_PRIM_SPACE_MODE 0x0000000000000000 +#define _PSW_SEC_SPACE_MODE 0x0000800000000000 +#define _PSW_ACC_REG_MODE 0x0000400000000000 +#define _PSW_HOME_SPACE_MODE 0x0000C00000000000 + +#define _PSW_WAIT_MASK_BIT 0x0002000000000000 +#define _PSW_IO_MASK_BIT 0x0200000000000000 +#define _PSW_IO_WAIT 0x0202000000000000 + +#ifndef __ASSEMBLY__ + +#include <linux/config.h> +#include <asm/processor.h> +#include <linux/types.h> +#include <asm/atomic.h> +#include <asm/sigp.h> + + +struct _lowcore +{ + /* prefix area: defined by architecture */ + __u32 ccw1[2]; /* 0x000 */ + __u32 ccw2[4]; /* 0x008 */ + __u8 pad1[0x80-0x18]; /* 0x018 */ + __u32 ext_params; /* 0x080 */ + __u16 cpu_addr; /* 0x084 */ + __u16 ext_int_code; /* 0x086 */ + __u16 svc_ilc; /* 0x088 */ + __u16 scv_code; /* 0x08a */ + __u16 pgm_ilc; /* 0x08c */ + __u16 pgm_code; /* 0x08e */ + __u32 data_exc_code; /* 0x090 */ + __u16 mon_class_num; /* 0x094 */ + __u16 per_perc_atmid; /* 0x096 */ + addr_t per_address; /* 0x098 */ + __u8 exc_access_id; /* 0x0a0 */ + __u8 per_access_id; /* 0x0a1 */ + __u8 op_access_id; /* 0x0a2 */ + __u8 ar_access_id; /* 0x0a3 */ + __u8 pad2[0xA8-0xA4]; /* 0x0a4 */ + addr_t trans_exc_code; /* 0x0A0 */ + addr_t monitor_code; /* 0x09c */ + __u16 subchannel_id; /* 0x0b8 */ + __u16 subchannel_nr; /* 0x0ba */ + __u32 io_int_parm; /* 0x0bc */ + __u32 io_int_word; /* 0x0c0 */ + __u8 pad3[0xc8-0xc4]; /* 0x0c4 */ + __u32 stfl_fac_list; /* 0x0c8 */ + __u8 pad4[0xe8-0xcc]; /* 0x0cc */ + __u32 mcck_interuption_code[2]; /* 0x0e8 */ + __u8 pad5[0xf4-0xf0]; /* 0x0f0 */ + __u32 external_damage_code; /* 0x0f4 */ + addr_t failing_storage_address; /* 0x0f8 */ + __u8 pad6[0x120-0x100]; /* 0x100 */ + psw_t restart_old_psw; /* 0x120 */ + psw_t external_old_psw; /* 0x130 */ + psw_t svc_old_psw; /* 0x140 */ + psw_t program_old_psw; /* 0x150 */ + psw_t mcck_old_psw; /* 0x160 */ + psw_t io_old_psw; /* 0x170 */ + __u8 pad7[0x1a0-0x180]; /* 0x180 */ + psw_t restart_psw; /* 0x1a0 */ + psw_t external_new_psw; /* 0x1b0 */ + psw_t svc_new_psw; /* 0x1c0 */ + psw_t program_new_psw; /* 0x1d0 */ + psw_t mcck_new_psw; /* 0x1e0 */ + psw_t io_new_psw; /* 0x1f0 */ + psw_t return_psw; /* 0x200 */ + __u32 sync_io_word; /* 0x210 */ + __u8 pad8[0xc00-0x214]; /* 0x214 */ + /* System info area */ + __u64 save_area[16]; /* 0xc00 */ + __u64 cregs_save_area[16]; /* 0xc80 */ + __u32 access_regs_save_area[16];/* 0xd00 */ + __u64 kernel_stack; /* 0xd40 */ + __u64 kernel_level; /* 0xd48 */ + /* entry.S sensitive area start */ + /* Next 6 words are the s390 equivalent of irq_stat */ + __u32 __softirq_active; /* 0xd50 */ + __u32 __softirq_mask; /* 0xd54 */ + __u32 __local_irq_count; /* 0xd58 */ + __u32 __local_bh_count; /* 0xd5c */ + __u32 __syscall_count; /* 0xd60 */ + __u8 pad10[0xd80-0xd64]; /* 0xd64 */ + struct cpuinfo_S390 cpu_data; /* 0xd80 */ + __u32 ipl_device; /* 0xdb8 */ + __u32 pad13; /* 0xdbc was lsw word of ipl_device until a bug was found DJB */ + /* entry.S sensitive area end */ + + /* SMP info area: defined by DJB */ + __u64 jiffy_timer_cc; /* 0xdc0 */ + __u64 ext_call_fast; /* 0xdc8 */ + __u64 ext_call_queue; /* 0xdd0 */ + __u64 ext_call_count; /* 0xdd8 */ + + __u8 pad11[0xe00-0xde0]; /* 0xde0 */ + + /* 0xe00 is used as indicator for dump tools */ + /* whether the kernel died with panic() or not */ + __u32 panic_magic; /* 0xe00 */ + + /* Align to the top 1k of prefix area */ + __u8 pad12[0x1000-0xe04]; /* 0xe04 */ +} __attribute__((packed)); /* End structure*/ + +extern __inline__ void set_prefix(__u32 address) +{ + __asm__ __volatile__ ("spx %0" : : "m" (address) : "memory" ); +} + +#define S390_lowcore (*((struct _lowcore *) 0)) +extern struct _lowcore *lowcore_ptr[]; + +#ifndef CONFIG_SMP +#define get_cpu_lowcore(cpu) S390_lowcore +#define safe_get_cpu_lowcore(cpu) S390_lowcore +#else +#define get_cpu_lowcore(cpu) (*lowcore_ptr[cpu]) +#define safe_get_cpu_lowcore(cpu) \ + ((cpu)==smp_processor_id() ? S390_lowcore:(*lowcore_ptr[(cpu)])) +#endif +#endif /* __ASSEMBLY__ */ + +#define __PANIC_MAGIC 0xDEADC0DE + +#endif + diff --git a/include/asm-s390x/major.h b/include/asm-s390x/major.h new file mode 100644 index 000000000..f07022803 --- /dev/null +++ b/include/asm-s390x/major.h @@ -0,0 +1,150 @@ +#ifndef _LINUX_MAJOR_H +#define _LINUX_MAJOR_H + +/* + * This file has definitions for major device numbers. + * For the device number assignments, see Documentation/devices.txt. + */ + +/* limits */ + +/* + * Important: Don't change this to 256. Major number 255 is and must be + * reserved for future expansion into a larger dev_t space. + */ +#define MAX_CHRDEV 255 +#define MAX_BLKDEV 255 + +#define UNNAMED_MAJOR 0 +#define MEM_MAJOR 1 +#define RAMDISK_MAJOR 1 +#define FLOPPY_MAJOR 2 +#define PTY_MASTER_MAJOR 2 +#define IDE0_MAJOR 3 +#define PTY_SLAVE_MAJOR 3 +#define HD_MAJOR IDE0_MAJOR +#define TTY_MAJOR 4 +#define TTYAUX_MAJOR 5 +#define LP_MAJOR 6 +#define VCS_MAJOR 7 +#define LOOP_MAJOR 7 +#define SCSI_DISK0_MAJOR 8 +#define SCSI_TAPE_MAJOR 9 +#define MD_MAJOR 9 +#define MISC_MAJOR 10 +#define SCSI_CDROM_MAJOR 11 +#define QIC02_TAPE_MAJOR 12 +#define XT_DISK_MAJOR 13 +#define SOUND_MAJOR 14 +#define CDU31A_CDROM_MAJOR 15 +#define JOYSTICK_MAJOR 15 +#define GOLDSTAR_CDROM_MAJOR 16 +#define OPTICS_CDROM_MAJOR 17 +#define SANYO_CDROM_MAJOR 18 +#define CYCLADES_MAJOR 19 +#define CYCLADESAUX_MAJOR 20 +#define MITSUMI_X_CDROM_MAJOR 20 +#define MFM_ACORN_MAJOR 21 /* ARM Linux /dev/mfm */ +#define SCSI_GENERIC_MAJOR 21 +#define Z8530_MAJOR 34 +#define DIGI_MAJOR 23 +#define IDE1_MAJOR 22 +#define DIGICU_MAJOR 22 +#define MITSUMI_CDROM_MAJOR 23 +#define CDU535_CDROM_MAJOR 24 +#define STL_SERIALMAJOR 24 +#define MATSUSHITA_CDROM_MAJOR 25 +#define STL_CALLOUTMAJOR 25 +#define MATSUSHITA_CDROM2_MAJOR 26 +#define QIC117_TAPE_MAJOR 27 +#define MATSUSHITA_CDROM3_MAJOR 27 +#define MATSUSHITA_CDROM4_MAJOR 28 +#define STL_SIOMEMMAJOR 28 +#define ACSI_MAJOR 28 +#define AZTECH_CDROM_MAJOR 29 +#define GRAPHDEV_MAJOR 29 /* SparcLinux & Linux/68k /dev/fb */ +#define SHMIQ_MAJOR 85 /* Linux/mips, SGI /dev/shmiq */ +#define CM206_CDROM_MAJOR 32 +#define IDE2_MAJOR 33 +#define IDE3_MAJOR 34 +#define NETLINK_MAJOR 36 +#define PS2ESDI_MAJOR 36 +#define IDETAPE_MAJOR 37 +#define Z2RAM_MAJOR 37 +#define APBLOCK_MAJOR 38 /* AP1000 Block device */ +#define DDV_MAJOR 39 /* AP1000 DDV block device */ +#define NBD_MAJOR 43 /* Network block device */ +#define RISCOM8_NORMAL_MAJOR 48 +#define DAC960_MAJOR 48 /* 48..55 */ +#define RISCOM8_CALLOUT_MAJOR 49 +#define MKISS_MAJOR 55 +#define DSP56K_MAJOR 55 /* DSP56001 processor device */ + +#define IDE4_MAJOR 56 +#define IDE5_MAJOR 57 + +#define SCSI_DISK1_MAJOR 65 +#define SCSI_DISK2_MAJOR 66 +#define SCSI_DISK3_MAJOR 67 +#define SCSI_DISK4_MAJOR 68 +#define SCSI_DISK5_MAJOR 69 +#define SCSI_DISK6_MAJOR 70 +#define SCSI_DISK7_MAJOR 71 + + +#define LVM_BLK_MAJOR 58 /* Logical Volume Manager */ + +#define COMPAQ_SMART2_MAJOR 72 +#define COMPAQ_SMART2_MAJOR1 73 +#define COMPAQ_SMART2_MAJOR2 74 +#define COMPAQ_SMART2_MAJOR3 75 +#define COMPAQ_SMART2_MAJOR4 76 +#define COMPAQ_SMART2_MAJOR5 77 +#define COMPAQ_SMART2_MAJOR6 78 +#define COMPAQ_SMART2_MAJOR7 79 + +#define SPECIALIX_NORMAL_MAJOR 75 +#define SPECIALIX_CALLOUT_MAJOR 76 + +#define DASD_MAJOR 94 + +#define LVM_CHAR_MAJOR 109 /* Logical Volume Manager */ + +#define MDISK_MAJOR 64 + +#define I2O_MAJOR 80 /* 80->87 */ + +#define IDE6_MAJOR 88 +#define IDE7_MAJOR 89 +#define IDE8_MAJOR 90 +#define IDE9_MAJOR 91 + +#define AURORA_MAJOR 79 + +#define RTF_MAJOR 150 +#define RAW_MAJOR 162 + +#define USB_ACM_MAJOR 166 +#define USB_ACM_AUX_MAJOR 167 +#define USB_CHAR_MAJOR 180 + +#define UNIX98_PTY_MASTER_MAJOR 128 +#define UNIX98_PTY_MAJOR_COUNT 8 +#define UNIX98_PTY_SLAVE_MAJOR (UNIX98_PTY_MASTER_MAJOR+UNIX98_PTY_MAJOR_COUNT) + +/* + * Tests for SCSI devices. + */ + +#define SCSI_DISK_MAJOR(M) ((M) == SCSI_DISK0_MAJOR || \ + ((M) >= SCSI_DISK1_MAJOR && (M) <= SCSI_DISK7_MAJOR)) + +#define SCSI_BLK_MAJOR(M) \ + (SCSI_DISK_MAJOR(M) \ + || (M) == SCSI_CDROM_MAJOR) + +static __inline__ int scsi_blk_major(int m) { + return SCSI_BLK_MAJOR(m); +} + +#endif diff --git a/include/asm-s390x/mathemu.h b/include/asm-s390x/mathemu.h new file mode 100644 index 000000000..c78d97b43 --- /dev/null +++ b/include/asm-s390x/mathemu.h @@ -0,0 +1,48 @@ +/* + * arch/s390/kernel/mathemu.h + * IEEE floating point emulation. + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) + */ + +#ifndef __MATHEMU__ +#define __MATHEMU__ + +extern int math_emu_b3(__u8 *, struct pt_regs *); +extern int math_emu_ed(__u8 *, struct pt_regs *); +extern void math_emu_ldr(__u8 *); +extern void math_emu_ler(__u8 *); +extern void math_emu_std(__u8 *, struct pt_regs *); +extern void math_emu_ld(__u8 *, struct pt_regs *); +extern void math_emu_ste(__u8 *, struct pt_regs *); +extern void math_emu_le(__u8 *, struct pt_regs *); +extern int math_emu_lfpc(__u8 *, struct pt_regs *); +extern int math_emu_stfpc(__u8 *, struct pt_regs *); +extern int math_emu_srnm(__u8 *, struct pt_regs *); + + +extern __u64 __adddf3(__u64,__u64); +extern __u64 __subdf3(__u64,__u64); +extern __u64 __muldf3(__u64,__u64); +extern __u64 __divdf3(__u64,__u64); +extern long __cmpdf2(__u64,__u64); +extern __u64 __negdf2(__u64); +extern __u64 __absdf2(__u64); +extern __u32 __addsf3(__u32,__u32); +extern __u32 __subsf3(__u32,__u32); +extern __u32 __mulsf3(__u32,__u32); +extern __u32 __divsf3(__u32,__u32); +extern __u32 __negsf2(__u32); +extern __u32 __abssf2(__u32); +extern long __cmpsf2(__u32,__u32); +extern __u32 __truncdfsf2(__u64); +extern __u32 __fixsfsi(__u32); +extern __u32 __fixdfsi(__u64); +extern __u64 __floatsidf(__u32); +extern __u32 __floatsisf(__u32); +extern __u64 __extendsfdf2(__u32); + +#endif /* __MATHEMU__ */ + diff --git a/include/asm-s390x/misc390.h b/include/asm-s390x/misc390.h new file mode 100644 index 000000000..3a48a7385 --- /dev/null +++ b/include/asm-s390x/misc390.h @@ -0,0 +1,15 @@ +/* + * include/asm-s390/misc390.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) + */ + +#define allocaligned2(type,name,number,align) \ + __u8 name##buff[(sizeof(type)*(number+1))-1]; \ + type *name=(type *)(((__u32)(&name##buff[align-1]))&(-align)) + +#define allocaligned(type,name,number) allocaligned2(type,name,number,__alignof__(type)) + +extern void s390_daemonize(char *name,unsigned long mask,int use_init_fs); diff --git a/include/asm-s390x/mman.h b/include/asm-s390x/mman.h new file mode 100644 index 000000000..8fbe65fd5 --- /dev/null +++ b/include/asm-s390x/mman.h @@ -0,0 +1,46 @@ +/* + * include/asm-s390/mman.h + * + * S390 version + * + * Derived from "include/asm-i386/mman.h" + */ + +#ifndef __S390_MMAN_H__ +#define __S390_MMAN_H__ + +#define PROT_READ 0x1 /* page can be read */ +#define PROT_WRITE 0x2 /* page can be written */ +#define PROT_EXEC 0x4 /* page can be executed */ +#define PROT_NONE 0x0 /* page can not be accessed */ + +#define MAP_SHARED 0x01 /* Share changes */ +#define MAP_PRIVATE 0x02 /* Changes are private */ +#define MAP_TYPE 0x0f /* Mask for type of mapping */ +#define MAP_FIXED 0x10 /* Interpret addr exactly */ +#define MAP_ANONYMOUS 0x20 /* don't use a file */ + +#define MAP_GROWSDOWN 0x0100 /* stack-like segment */ +#define MAP_DENYWRITE 0x0800 /* ETXTBSY */ +#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ +#define MAP_LOCKED 0x2000 /* pages are locked */ +#define MAP_NORESERVE 0x4000 /* don't check for reservations */ + +#define MS_ASYNC 1 /* sync memory asynchronously */ +#define MS_INVALIDATE 2 /* invalidate the caches */ +#define MS_SYNC 4 /* synchronous memory sync */ + +#define MCL_CURRENT 1 /* lock all current mappings */ +#define MCL_FUTURE 2 /* lock all future mappings */ + +#define MADV_NORMAL 0x0 /* default page-in behavior */ +#define MADV_RANDOM 0x1 /* page-in minimum required */ +#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */ +#define MADV_WILLNEED 0x3 /* pre-fault pages */ +#define MADV_DONTNEED 0x4 /* discard these pages */ + +/* compatibility flags */ +#define MAP_ANON MAP_ANONYMOUS +#define MAP_FILE 0 + +#endif /* __S390_MMAN_H__ */ diff --git a/include/asm-s390x/mmu.h b/include/asm-s390x/mmu.h new file mode 100644 index 000000000..ccd36d266 --- /dev/null +++ b/include/asm-s390x/mmu.h @@ -0,0 +1,7 @@ +#ifndef __MMU_H +#define __MMU_H + +/* Default "unsigned long" context */ +typedef unsigned long mm_context_t; + +#endif diff --git a/include/asm-s390x/mmu_context.h b/include/asm-s390x/mmu_context.h new file mode 100644 index 000000000..2af3f46da --- /dev/null +++ b/include/asm-s390x/mmu_context.h @@ -0,0 +1,45 @@ +/* + * include/asm-s390/mmu_context.h + * + * S390 version + * + * Derived from "include/asm-i386/mmu_context.h" + */ + +#ifndef __S390_MMU_CONTEXT_H +#define __S390_MMU_CONTEXT_H + +/* + * get a new mmu context.. S390 don't know about contexts. + */ +#define init_new_context(tsk,mm) 0 + +#define destroy_context(mm) flush_tlb_mm(mm) + +static inline void enter_lazy_tlb(struct mm_struct *mm, + struct task_struct *tsk, unsigned cpu) +{ +} + +static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, + struct task_struct *tsk, unsigned cpu) +{ + unsigned long pgd; + + if (prev != next) { + pgd = (__pa(next->pgd)&PAGE_MASK) | (_REGION_TABLE|USER_STD_MASK); + /* Load page tables */ + asm volatile(" lctlg 7,7,%0\n" /* secondary space */ + " lctlg 13,13,%0\n" /* home space */ + : : "m" (pgd) ); + } + set_bit(cpu, &next->cpu_vm_mask); +} + +extern inline void activate_mm(struct mm_struct *prev, + struct mm_struct *next) +{ + switch_mm(prev, next, current, smp_processor_id()); +} + +#endif diff --git a/include/asm-s390x/module.h b/include/asm-s390x/module.h new file mode 100644 index 000000000..173869666 --- /dev/null +++ b/include/asm-s390x/module.h @@ -0,0 +1,11 @@ +#ifndef _ASM_S390_MODULE_H +#define _ASM_S390_MODULE_H +/* + * This file contains the s390 architecture specific module code. + */ + +#define module_map(x) vmalloc(x) +#define module_unmap(x) vfree(x) +#define module_arch_init(x) (0) + +#endif /* _ASM_S390_MODULE_H */ diff --git a/include/asm-s390x/msgbuf.h b/include/asm-s390x/msgbuf.h new file mode 100644 index 000000000..a131dec56 --- /dev/null +++ b/include/asm-s390x/msgbuf.h @@ -0,0 +1,27 @@ +#ifndef _S390_MSGBUF_H +#define _S390_MSGBUF_H + +/* + * The msqid64_ds structure for S/390 architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 2 miscellaneous 64-bit values + */ + +struct msqid64_ds { + struct ipc64_perm msg_perm; + __kernel_time_t msg_stime; /* last msgsnd time */ + __kernel_time_t msg_rtime; /* last msgrcv time */ + __kernel_time_t msg_ctime; /* last change time */ + unsigned long msg_cbytes; /* current number of bytes on queue */ + unsigned long msg_qnum; /* number of messages in queue */ + unsigned long msg_qbytes; /* max number of bytes on queue */ + __kernel_pid_t msg_lspid; /* pid of last msgsnd */ + __kernel_pid_t msg_lrpid; /* last receive pid */ + unsigned long __unused1; + unsigned long __unused2; +}; + +#endif /* _S390_MSGBUF_H */ diff --git a/include/asm-s390x/namei.h b/include/asm-s390x/namei.h new file mode 100644 index 000000000..3e286bdde --- /dev/null +++ b/include/asm-s390x/namei.h @@ -0,0 +1,21 @@ +/* + * include/asm-s390/namei.h + * + * S390 version + * + * Derived from "include/asm-i386/namei.h" + * + * Included from linux/fs/namei.c + */ + +#ifndef __S390_NAMEI_H +#define __S390_NAMEI_H + +/* This dummy routine maybe changed to something useful + * for /usr/gnemul/ emulation stuff. + * Look at asm-sparc/namei.h for details. + */ + +#define __emul_prefix() NULL + +#endif /* __S390_NAMEI_H */ diff --git a/include/asm-s390x/page.h b/include/asm-s390x/page.h new file mode 100644 index 000000000..9a41c8261 --- /dev/null +++ b/include/asm-s390x/page.h @@ -0,0 +1,94 @@ +/* + * include/asm-s390/page.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Hartmut Penner (hpenner@de.ibm.com) + */ + +#ifndef _S390_PAGE_H +#define _S390_PAGE_H + +/* PAGE_SHIFT determines the page size */ +#define PAGE_SHIFT 12 +#define PAGE_SIZE (1UL << PAGE_SHIFT) +#define PAGE_MASK (~(PAGE_SIZE-1)) + +#ifdef __KERNEL__ +#ifndef __ASSEMBLY__ + +/* + * gcc uses builtin, i.e. MVCLE for both operations + */ + +#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) +#define copy_page(to,from) memcpy((void *)(to), (void *)(from), PAGE_SIZE) + +#define clear_user_page(page, vaddr) clear_page(page) +#define copy_user_page(to, from, vaddr) copy_page(to, from) + +#define BUG() do { \ + printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \ + __asm__ __volatile__(".long 0"); \ +} while (0) + +#define PAGE_BUG(page) do { \ + BUG(); \ +} while (0) + +/* Pure 2^n version of get_order */ +extern __inline__ int get_order(unsigned long size) +{ + int order; + + size = (size-1) >> (PAGE_SHIFT-1); + order = -1; + do { + size >>= 1; + order++; + } while (size); + return order; +} + +/* + * These are used to make use of C type-checking.. + */ +typedef struct { unsigned long pte; } pte_t; +typedef struct { + unsigned long pmd0; + unsigned long pmd1; + } pmd_t; +typedef struct { unsigned long pgd; } pgd_t; +typedef struct { unsigned long pgprot; } pgprot_t; + +#define pte_val(x) ((x).pte) +#define pmd_val(x) ((x).pmd0) +#define pmd_val1(x) ((x).pmd1) +#define pgd_val(x) ((x).pgd) +#define pgprot_val(x) ((x).pgprot) + +#define __pte(x) ((pte_t) { (x) } ) +#define __pmd(x) ((pmd_t) { (x) } ) +#define __pgd(x) ((pgd_t) { (x) } ) +#define __pgprot(x) ((pgprot_t) { (x) } ) + +#endif /* !__ASSEMBLY__ */ + +/* to align the pointer to the (next) page boundary */ +#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) + +/* + * + * + */ + +#define __PAGE_OFFSET 0x0UL +#define PAGE_OFFSET 0x0UL +#define __pa(x) (unsigned long)(x) +#define __va(x) (void *)(x) +#define virt_to_page(kaddr) (mem_map + (__pa(kaddr) >> PAGE_SHIFT)) +#define VALID_PAGE(page) ((page - mem_map) < max_mapnr) + +#endif /* __KERNEL__ */ + +#endif /* _S390_PAGE_H */ diff --git a/include/asm-s390x/param.h b/include/asm-s390x/param.h new file mode 100644 index 000000000..fc5aec78c --- /dev/null +++ b/include/asm-s390x/param.h @@ -0,0 +1,32 @@ +/* + * include/asm-s390/param.h + * + * S390 version + * + * Derived from "include/asm-i386/param.h" + */ + +#ifndef _ASMS390_PARAM_H +#define _ASMS390_PARAM_H + +#ifndef HZ +#define HZ 100 +#endif + +#define EXEC_PAGESIZE 4096 + +#ifndef NGROUPS +#define NGROUPS 32 +#endif + +#ifndef NOGROUP +#define NOGROUP (-1) +#endif + +#define MAXHOSTNAMELEN 64 /* max length of hostname */ + +#ifdef __KERNEL__ +# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */ +#endif + +#endif diff --git a/include/asm-s390x/pgalloc.h b/include/asm-s390x/pgalloc.h new file mode 100644 index 000000000..adcaa1467 --- /dev/null +++ b/include/asm-s390x/pgalloc.h @@ -0,0 +1,315 @@ +/* + * include/asm-s390/pgalloc.h + * + * S390 version + * Copyright (C) 1999, 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Hartmut Penner (hpenner@de.ibm.com) + * Martin Schwidefsky (schwidefsky@de.ibm.com) + * + * Derived from "include/asm-i386/pgalloc.h" + * Copyright (C) 1994 Linus Torvalds + */ + +#ifndef _S390_PGALLOC_H +#define _S390_PGALLOC_H + +#include <linux/config.h> +#include <asm/processor.h> +#include <linux/threads.h> + +#define pgd_quicklist (S390_lowcore.cpu_data.pgd_quick) +#define pmd_quicklist (S390_lowcore.cpu_data.pmd_quick) +#define pte_quicklist (S390_lowcore.cpu_data.pte_quick) +#define pgtable_cache_size (S390_lowcore.cpu_data.pgtable_cache_sz) + +/* + * Allocate and free page tables. The xxx_kernel() versions are + * used to allocate a kernel page table - this turns on ASN bits + * if any. + */ + +/* + * page directory allocation/free routines. + */ +extern __inline__ pgd_t *get_pgd_slow (void) +{ + int i; + pgd_t *ret = (pgd_t *)__get_free_pages(GFP_KERNEL,2); + if (ret) + for (i = 0; i < PTRS_PER_PGD; i++) + pgd_clear(ret + i); + return ret; +} + +extern __inline__ pgd_t *get_pgd_fast (void) +{ + unsigned long *ret = pgd_quicklist; + + if (ret != NULL) { + pgd_quicklist = (unsigned long *)(*ret); + ret[0] = ret[1]; + pgtable_cache_size -= 4; + } + return (pgd_t *) ret; +} + +extern __inline__ pgd_t *pgd_alloc (void) +{ + pgd_t *pgd; + + pgd = get_pgd_fast(); + if (!pgd) + pgd = get_pgd_slow(); + return pgd; +} + +extern __inline__ void free_pgd_fast (pgd_t *pgd) +{ + *(unsigned long *) pgd = (unsigned long) pgd_quicklist; + pgd_quicklist = (unsigned long *) pgd; + pgtable_cache_size += 4; +} + +extern __inline__ void free_pgd_slow (pgd_t *pgd) +{ + free_pages((unsigned long) pgd, 2); +} + +#define pgd_free(pgd) free_pgd_fast(pgd) + +/* + * page middle directory allocation/free routines. + */ +extern pmd_t empty_bad_pmd_table[]; +extern pmd_t *get_pmd_slow(pgd_t *pgd, unsigned long address); + +extern __inline__ pmd_t *get_pmd_fast (void) +{ + unsigned long *ret = (unsigned long *) pmd_quicklist; + if (ret != NULL) { + pmd_quicklist = (unsigned long *)(*ret); + ret[0] = ret[1]; + pgtable_cache_size -= 4; + } + return (pmd_t *) ret; +} + +extern __inline__ void free_pmd_fast (pmd_t *pmd) +{ + if (pmd == empty_bad_pmd_table) + return; + *(unsigned long *) pmd = (unsigned long) pmd_quicklist; + pmd_quicklist = (unsigned long *) pmd; + pgtable_cache_size += 4; +} + +extern __inline__ void free_pmd_slow (pmd_t *pmd) +{ + free_pages((unsigned long) pmd, 2); +} + +extern __inline__ pmd_t *pmd_alloc (pgd_t *pgd, unsigned long vmaddr) +{ + unsigned long offset; + + offset = (vmaddr >> PMD_SHIFT) & (PTRS_PER_PMD - 1); + if (pgd_none(*pgd)) { + pmd_t *pmd_page = get_pmd_fast(); + + if (!pmd_page) + return get_pmd_slow(pgd, offset); + pgd_set(pgd, pmd_page); + return pmd_page + offset; + } + if (pgd_bad(*pgd)) + BUG(); + return (pmd_t *) pgd_page(*pgd) + offset; +} + +#define pmd_alloc_kernel(pgd, addr) pmd_alloc(pgd, addr) +#define pmd_free_kernel(pmd) free_pmd_fast(pmd) +#define pmd_free(pmd) free_pmd_fast(pmd) + +/* + * page table entry allocation/free routines. + */ +extern pte_t empty_bad_pte_table[]; +extern pte_t *get_pte_slow (pmd_t *pmd, unsigned long address_preadjusted); + +extern __inline__ pte_t *get_pte_fast (void) +{ + unsigned long *ret = (unsigned long *) pte_quicklist; + + if (ret != NULL) { + pte_quicklist = (unsigned long *)(*ret); + ret[0] = ret[1]; + pgtable_cache_size--; + } + return (pte_t *) ret; +} + +extern __inline__ void free_pte_fast (pte_t *pte) +{ + if (pte == empty_bad_pte_table) + return; + *(unsigned long *) pte = (unsigned long) pte_quicklist; + pte_quicklist = (unsigned long *) pte; + pgtable_cache_size++; +} + +extern __inline__ void free_pte_slow (pte_t *pte) +{ + free_page((unsigned long) pte); +} + +extern __inline__ pte_t *pte_alloc (pmd_t *pmd, unsigned long vmaddr) +{ + unsigned long offset; + + offset = (vmaddr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); + if (pmd_none(*pmd)) { + pte_t *pte_page = get_pte_fast(); + + if (!pte_page) + return get_pte_slow(pmd, offset); + pmd_set(pmd, pte_page); + return pte_page + offset; + } + if (pmd_bad(*pmd)) + BUG(); + return (pte_t *) pmd_page(*pmd) + offset; +} + +#define pte_alloc_kernel(pmd, addr) pte_alloc(pmd, addr) +#define pte_free_kernel(pte) free_pte_fast(pte) +#define pte_free(pte) free_pte_fast(pte) + +extern int do_check_pgt_cache (int, int); + +/* + * This establishes kernel virtual mappings (e.g., as a result of a + * vmalloc call). Since s390-esame uses a separate kernel page table, + * there is nothing to do here... :) + */ +#define set_pgdir(vmaddr, entry) do { } while(0) + +/* + * TLB flushing: + * + * - flush_tlb() flushes the current mm struct TLBs + * - flush_tlb_all() flushes all processes TLBs + * called only from vmalloc/vfree + * - flush_tlb_mm(mm) flushes the specified mm context TLB's + * - flush_tlb_page(vma, vmaddr) flushes one page + * - flush_tlb_range(mm, start, end) flushes a range of pages + * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables + */ + +/* + * S/390 has three ways of flushing TLBs + * 'ptlb' does a flush of the local processor + * 'csp' flushes the TLBs on all PUs of a SMP + * 'ipte' invalidates a pte in a page table and flushes that out of + * the TLBs of all PUs of a SMP + */ + +#define local_flush_tlb() \ +do { __asm__ __volatile__("ptlb": : :"memory"); } while (0) + + +#ifndef CONFIG_SMP + +/* + * We always need to flush, since s390 does not flush tlb + * on each context switch + */ + +#define flush_tlb() local_flush_tlb() +#define flush_tlb_all() local_flush_tlb() +#define flush_tlb_mm(mm) local_flush_tlb() +#define flush_tlb_page(vma, va) local_flush_tlb() +#define flush_tlb_range(mm, start, end) local_flush_tlb() + +#else + +#include <asm/smp.h> + +static inline void global_flush_tlb(void) +{ + long dummy = 0; + + __asm__ __volatile__ ( + " la 4,3(%0)\n" + " nill 4,0xfffc\n" + " la 4,1(4)\n" + " slr 2,2\n" + " slr 3,3\n" + " csp 2,4" + : : "a" (&dummy) : "2", "3", "4" ); +} + +/* + * We only have to do global flush of tlb if process run since last + * flush on any other pu than current. + * If we have threads (mm->count > 1) we always do a global flush, + * since the process runs on more than one processor at the same time. + */ +static inline void __flush_tlb_mm(struct mm_struct * mm) +{ + if ((smp_num_cpus > 1) && + ((atomic_read(&mm->mm_count) != 1) || + (mm->cpu_vm_mask != (1UL << smp_processor_id())))) { + mm->cpu_vm_mask = (1UL << smp_processor_id()); + global_flush_tlb(); + } else { + local_flush_tlb(); + } +} + +#define flush_tlb() __flush_tlb_mm(current->mm) +#define flush_tlb_all() global_flush_tlb() +#define flush_tlb_mm(mm) __flush_tlb_mm(mm) +#define flush_tlb_page(vma, va) __flush_tlb_mm((vma)->vm_mm) +#define flush_tlb_range(mm, start, end) __flush_tlb_mm(mm) + +#endif + +extern inline void flush_tlb_pgtables(struct mm_struct *mm, + unsigned long start, unsigned long end) +{ + /* S/390 does not keep any page table caches in TLB */ +} + + +static inline int ptep_test_and_clear_and_flush_young(struct vm_area_struct *vma, + unsigned long address, pte_t *ptep) +{ + /* No need to flush TLB; bits are in storage key */ + return ptep_test_and_clear_young(ptep); +} + +static inline int ptep_test_and_clear_and_flush_dirty(struct vm_area_struct *vma, + unsigned long address, pte_t *ptep) +{ + /* No need to flush TLB; bits are in storage key */ + return ptep_test_and_clear_dirty(ptep); +} + +static inline pte_t ptep_invalidate(struct vm_area_struct *vma, + unsigned long address, pte_t *ptep) +{ + pte_t pte = *ptep; + if (!(pte_val(pte) & _PAGE_INVALID)) + __asm__ __volatile__ ("ipte %0,%1" : : "a" (ptep), "a" (address)); + pte_clear(ptep); + return pte; +} + +static inline void ptep_establish(struct vm_area_struct *vma, + unsigned long address, pte_t *ptep, pte_t entry) +{ + ptep_invalidate(vma, address, ptep); + set_pte(ptep, entry); +} + +#endif /* _S390_PGALLOC_H */ diff --git a/include/asm-s390x/pgtable.h b/include/asm-s390x/pgtable.h new file mode 100644 index 000000000..f73fc215c --- /dev/null +++ b/include/asm-s390x/pgtable.h @@ -0,0 +1,486 @@ +/* + * include/asm-s390/pgtable.h + * + * S390 64bit version + * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Hartmut Penner (hp@de.ibm.com) + * Ulrich Weigand (weigand@de.ibm.com) + * Martin Schwidefsky (schwidefsky@de.ibm.com) + * + * Derived from "include/asm-i386/pgtable.h" + */ + +#ifndef _ASM_S390_PGTABLE_H +#define _ASM_S390_PGTABLE_H + +/* + * The Linux memory management assumes a three-level page table setup. On + * the S390, we use that, but "fold" the mid level into the top-level page + * table, so that we physically have the same two-level page table as the + * S390 mmu expects. + * + * This file contains the functions and defines necessary to modify and use + * the S390 page table tree. + */ +#ifndef __ASSEMBLY__ +#include <asm/processor.h> +#include <linux/threads.h> + +extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096))); +extern void paging_init(void); + +/* Caches aren't brain-dead on S390. */ +#define flush_cache_all() do { } while (0) +#define flush_cache_mm(mm) do { } while (0) +#define flush_cache_range(mm, start, end) do { } while (0) +#define flush_cache_page(vma, vmaddr) do { } while (0) +#define flush_page_to_ram(page) do { } while (0) +#define flush_dcache_page(page) do { } while (0) +#define flush_icache_range(start, end) do { } while (0) +#define flush_icache_page(vma,pg) do { } while (0) + +/* + * The S390 doesn't have any external MMU info: the kernel page + * tables contain all the necessary information. + */ +#define update_mmu_cache(vma, address, pte) do { } while (0) + +/* + * ZERO_PAGE is a global shared page that is always zero: used + * for zero-mapped memory areas etc.. + */ +extern char empty_zero_page[PAGE_SIZE]; +#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) +#endif /* !__ASSEMBLY__ */ + +/* + * Certain architectures need to do special things when PTEs + * within a page table are directly modified. Thus, the following + * hook is made available. + */ +#define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval)) + +/* + * PMD_SHIFT determines the size of the area a second-level page + * table can map + */ +#define PMD_SHIFT 21 +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) + +/* PGDIR_SHIFT determines what a third-level page table entry can map */ +#define PGDIR_SHIFT 31 +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) + +/* + * entries per page directory level: the S390 is two to five-level, + * currently we use a 3 level lookup + */ +#define PTRS_PER_PTE 512 +#define PTRS_PER_PMD 1024 +#define PTRS_PER_PGD 2048 + +/* + * pgd entries used up by user/kernel: + */ +#define USER_PTRS_PER_PGD 2048 +#define USER_PGD_PTRS 2048 +#define KERNEL_PGD_PTRS 2048 +#define FIRST_USER_PGD_NR 0 + +#define pte_ERROR(e) \ + printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e)) +#define pmd_ERROR(e) \ + printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e)) +#define pgd_ERROR(e) \ + printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) + +#ifndef __ASSEMBLY__ +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) \ + & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END (0x40000000000L) + + +/* + * A pagetable entry of S390 has following format: + * | PFRA |0IP0| OS | + * 0000000000111111111122222222223333333333444444444455555555556666 + * 0123456789012345678901234567890123456789012345678901234567890123 + * + * I Page-Invalid Bit: Page is not available for address-translation + * P Page-Protection Bit: Store access not possible for page + * + * A segmenttable entry of S390 has following format: + * | P-table origin | TT + * 0000000000111111111122222222223333333333444444444455555555556666 + * 0123456789012345678901234567890123456789012345678901234567890123 + * + * I Segment-Invalid Bit: Segment is not available for address-translation + * C Common-Segment Bit: Segment is not private (PoP 3-30) + * P Page-Protection Bit: Store access not possible for page + * TT Type 00 + * + * A region table entry of S390 has following format: + * | S-table origin | TF TTTL + * 0000000000111111111122222222223333333333444444444455555555556666 + * 0123456789012345678901234567890123456789012345678901234567890123 + * + * I Segment-Invalid Bit: Segment is not available for address-translation + * TT Type 01 + * TF + * TL Table lenght + * + * The regiontable origin of S390 has following format: + * | region table origon | DTTL + * 0000000000111111111122222222223333333333444444444455555555556666 + * 0123456789012345678901234567890123456789012345678901234567890123 + * + * X Space-Switch event: + * G Segment-Invalid Bit: + * P Private-Space Bit: + * S Storage-Alteration: + * R Real space + * TL Table-Length: + * + * A storage key has the following format: + * | ACC |F|R|C|0| + * 0 3 4 5 6 7 + * ACC: access key + * F : fetch protection bit + * R : referenced bit + * C : changed bit + */ + +/* Bits in the page table entry */ +#define _PAGE_PRESENT 0x001 /* Software */ +#define _PAGE_RO 0x200 /* HW read-only */ +#define _PAGE_INVALID 0x400 /* HW invalid */ + +/* Bits in the segment table entry */ +#define _PMD_ENTRY_INV 0x20 /* invalid segment table entry */ +#define _PMD_ENTRY 0x00 + +/* Bits in the region third table entry */ +#define _PGD_ENTRY_INV 0x20 /* invalid region table entry */ +#define _PGD_ENTRY 0x07 + +/* + * User and kernel page directory + */ +#define _REGION_THIRD 0x4 +#define _REGION_THIRD_LEN 0x3 +#define _REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN) + +/* Bits in the storage key */ +#define _PAGE_CHANGED 0x02 /* HW changed bit */ +#define _PAGE_REFERENCED 0x04 /* HW referenced bit */ + +/* + * No mapping available + */ +#define PAGE_INVALID __pgprot(_PAGE_INVALID) +#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_INVALID) +#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_RO) +#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_RO) +#define PAGE_SHARED __pgprot(_PAGE_PRESENT ) +#define PAGE_KERNEL __pgprot(_PAGE_PRESENT ) + +/* + * The S390 can't do page protection for execute, and considers that the + * same are read. Also, write permissions imply read permissions. This is + * the closest we can get.. + */ +#define __P000 PAGE_NONE +#define __P001 PAGE_READONLY +#define __P010 PAGE_COPY +#define __P011 PAGE_COPY +#define __P100 PAGE_READONLY +#define __P101 PAGE_READONLY +#define __P110 PAGE_COPY +#define __P111 PAGE_COPY + +#define __S000 PAGE_NONE +#define __S001 PAGE_READONLY +#define __S010 PAGE_SHARED +#define __S011 PAGE_SHARED +#define __S100 PAGE_READONLY +#define __S101 PAGE_READONLY +#define __S110 PAGE_SHARED +#define __S111 PAGE_SHARED + +/* + * Permanent address of a page. + */ +#define page_address(page) ((page)->virtual) +#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) + +/* + * pgd/pmd/pte query functions + */ +extern inline int pgd_present(pgd_t pgd) { return pgd_val(pgd) != 0; } +extern inline int pgd_none(pgd_t pgd) { return pgd_val(pgd) & _PGD_ENTRY_INV; } +extern inline int pgd_bad(pgd_t pgd) +{ + return (pgd_val(pgd) & (~PAGE_MASK & ~_PGD_ENTRY_INV)) != _PGD_ENTRY; +} + +extern inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) != 0; } +extern inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PMD_ENTRY_INV; } +extern inline int pmd_bad(pmd_t pmd) +{ + return (pmd_val(pmd) & (~PAGE_MASK & ~_PMD_ENTRY_INV)) != _PMD_ENTRY; +} + +extern inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; } +extern inline int pte_none(pte_t pte) +{ + return ((pte_val(pte) & + (_PAGE_INVALID | _PAGE_RO | _PAGE_PRESENT)) == _PAGE_INVALID); +} + +#define pte_same(a,b) (pte_val(a) == pte_val(b)) + +/* + * query functions pte_write/pte_dirty/pte_young only work if + * pte_present() is true. Undefined behaviour if not.. + */ +extern inline int pte_write(pte_t pte) +{ + return (pte_val(pte) & _PAGE_RO) == 0; +} + +extern inline int pte_dirty(pte_t pte) +{ + int skey; + + asm volatile ("iske %0,%1" : "=d" (skey) : "a" (pte_val(pte))); + return skey & _PAGE_CHANGED; +} + +extern inline int pte_young(pte_t pte) +{ + int skey; + + asm volatile ("iske %0,%1" : "=d" (skey) : "a" (pte_val(pte))); + return skey & _PAGE_REFERENCED; +} + +/* + * pgd/pmd/pte modification functions + */ +extern inline void pgd_clear(pgd_t * pgdp) +{ + pgd_val(*pgdp) = _PGD_ENTRY_INV | _PGD_ENTRY; +} + +extern inline void pmd_clear(pmd_t * pmdp) +{ + pmd_val(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY; + pmd_val1(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY; +} + +extern inline void pte_clear(pte_t *ptep) +{ + pte_val(*ptep) = _PAGE_INVALID; +} + +#define PTE_INIT(x) pte_clear(x) + +/* + * The following pte_modification functions only work if + * pte_present() is true. Undefined behaviour if not.. + */ +extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) +{ + pte_val(pte) = (pte_val(pte) & PAGE_MASK) | pgprot_val(newprot); + return pte; +} + +extern inline pte_t pte_wrprotect(pte_t pte) +{ + pte_val(pte) |= _PAGE_RO; + return pte; +} + +extern inline pte_t pte_mkwrite(pte_t pte) +{ + pte_val(pte) &= ~_PAGE_RO; + return pte; +} + +extern inline pte_t pte_mkclean(pte_t pte) +{ + /* We can't clear the changed bit atomically. The iske/and/sske + * sequence has a race condition with the page referenced bit. + * At the moment pte_mkclean is always followed by a pte_mkold. + * So its safe to ignore the problem for now. Hope this will + * never change ... */ + asm volatile ("sske %0,%1" + : : "d" (0), "a" (pte_val(pte))); + return pte; +} + +extern inline pte_t pte_mkdirty(pte_t pte) +{ + /* We can't set the changed bit atomically either. For now we + * set (!) the page referenced bit. */ + asm volatile ("sske %0,%1" + : : "d" (_PAGE_CHANGED|_PAGE_REFERENCED), + "a" (pte_val(pte))); + return pte; +} + +extern inline pte_t pte_mkold(pte_t pte) +{ + asm volatile ("rrbe 0,%0" : : "a" (pte_val(pte))); + return pte; +} + +extern inline pte_t pte_mkyoung(pte_t pte) +{ + /* To set the referenced bit we read the first word from the real + * page with a special instruction: load using real address (lura). + * Isn't S/390 a nice architecture ?! */ + asm volatile ("lura 0,%0" : : "a" (pte_val(pte) & PAGE_MASK) : "0" ); + return pte; +} + +static inline int ptep_test_and_clear_young(pte_t *ptep) +{ + int ccode; + + asm volatile ("rrbe 0,%1\n\t" + "ipm %0\n\t" + "srl %0,28\n\t" : "=d" (ccode) : "a" (pte_val(*ptep))); + return ccode & 2; +} + +static inline int ptep_test_and_clear_dirty(pte_t *ptep) +{ + int skey; + + asm volatile ("iske %0,%1" : "=d" (skey) : "a" (*ptep)); + if ((skey & _PAGE_CHANGED) == 0) + return 0; + /* We can't clear the changed bit atomically. For now we + * clear (!) the page referenced bit. */ + asm volatile ("sske %0,%1" + : : "d" (0), "a" (*ptep)); + return 1; +} + +static inline pte_t ptep_get_and_clear(pte_t *ptep) +{ + pte_t pte = *ptep; + pte_clear(ptep); + return pte; +} + +static inline void ptep_set_wrprotect(pte_t *ptep) +{ + pte_t old_pte = *ptep; + set_pte(ptep, pte_wrprotect(old_pte)); +} + +static inline void ptep_mkdirty(pte_t *ptep) +{ + pte_mkdirty(*ptep); +} + +/* + * Conversion functions: convert a page and protection to a page entry, + * and a page entry and page directory to the page they refer to. + */ +extern inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot) +{ + pte_t __pte; + pte_val(__pte) = physpage + pgprot_val(pgprot); + return __pte; +} +#define mk_pte(page,pgprot) mk_pte_phys(__pa(((page)-mem_map)<<PAGE_SHIFT),pgprot) + +#define pte_page(x) (mem_map+(unsigned long)((pte_val(x) >> PAGE_SHIFT))) + +extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep) +{ + pmd_val(*pmdp) = _PMD_ENTRY | __pa(ptep); + pmd_val1(*pmdp) = _PMD_ENTRY | __pa(ptep+256); +} + +extern inline void pgd_set(pgd_t * pgdp, pmd_t * pmdp) +{ + pgd_val(*pgdp) = _PGD_ENTRY | __pa(pmdp); +} + +#define pmd_page(pmd) \ + ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) + +/* to find an entry in a page-table-directory */ +#define pgd_index(address) ((address >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) +#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) + +#define pgd_page(pmd) \ + ((unsigned long) __va(pgd_val(pmd) & PAGE_MASK)) + +/* to find an entry in a kernel page-table-directory */ +#define pgd_offset_k(address) pgd_offset(&init_mm, address) + +/* Find an entry in the second-level page table.. */ +#define pmd_offset(dir,addr) \ + ((pmd_t *) pgd_page(*(dir)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))) + +/* Find an entry in the third-level page table.. */ +#define pte_offset(dir,addr) \ + ((pte_t *) pmd_page(*(dir)) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) + +/* + * A page-table entry has some bits we have to treat in a special way. + * Bits 52 and bit 55 have to be zero, otherwise an specification + * exception will occur instead of a page translation exception. The + * specifiation exception has the bad habit not to store necessary + * information in the lowcore. + * Bit 53 and bit 54 are the page invalid bit and the page protection + * bit. We set both to indicate a swapped page. + * Bit 63 is used as the software page present bit. If a page is + * swapped this obviously has to be zero. + * This leaves the bits 0-51 and bits 56-62 to store type and offset. + * We use the 7 bits from 56-62 for the type and the 52 bits from 0-51 + * for the offset. + * | offset |0110|type |0 + * 0000000000111111111122222222223333333333444444444455555555556666 + * 0123456789012345678901234567890123456789012345678901234567890123 + */ +extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset) +{ + pte_t pte; + pte_val(pte) = (type << 1) | (offset << 12) | _PAGE_INVALID | _PAGE_RO; + pte_val(pte) &= 0xfffffffffffff6fe; /* better to be paranoid */ + return pte; +} + +#define SWP_TYPE(entry) (((entry).val >> 1) & 0x3f) +#define SWP_OFFSET(entry) ((entry).val >> 12) +#define SWP_ENTRY(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) }) + +#define pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) +#define swp_entry_to_pte(x) ((pte_t) { (x).val }) + +#endif /* !__ASSEMBLY__ */ + +/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ +#define PageSkip(page) (0) +#define kern_addr_valid(addr) (1) + +#endif /* _S390_PAGE_H */ + diff --git a/include/asm-s390x/poll.h b/include/asm-s390x/poll.h new file mode 100644 index 000000000..011747b53 --- /dev/null +++ b/include/asm-s390x/poll.h @@ -0,0 +1,33 @@ +/* + * include/asm-s390/poll.h + * + * S390 version + * + * Derived from "include/asm-i386/poll.h" + */ + +#ifndef __S390_POLL_H +#define __S390_POLL_H + +/* These are specified by iBCS2 */ +#define POLLIN 0x0001 +#define POLLPRI 0x0002 +#define POLLOUT 0x0004 +#define POLLERR 0x0008 +#define POLLHUP 0x0010 +#define POLLNVAL 0x0020 + +/* The rest seem to be more-or-less nonstandard. Check them! */ +#define POLLRDNORM 0x0040 +#define POLLRDBAND 0x0080 +#define POLLWRNORM 0x0100 +#define POLLWRBAND 0x0200 +#define POLLMSG 0x0400 + +struct pollfd { + int fd; + short events; + short revents; +}; + +#endif diff --git a/include/asm-s390x/posix_types.h b/include/asm-s390x/posix_types.h new file mode 100644 index 000000000..70ff9dc51 --- /dev/null +++ b/include/asm-s390x/posix_types.h @@ -0,0 +1,74 @@ +/* + * include/asm-s390/posix_types.h + * + * S390 version + * + * Derived from "include/asm-i386/posix_types.h" + */ + +#ifndef __ARCH_S390_POSIX_TYPES_H +#define __ARCH_S390_POSIX_TYPES_H + +/* + * This file is generally used by user-level software, so you need to + * be a little careful about namespace pollution etc. Also, we cannot + * assume GCC is being used. + */ + +typedef unsigned int __kernel_dev_t; +typedef unsigned int __kernel_ino_t; +typedef unsigned int __kernel_mode_t; +typedef unsigned int __kernel_nlink_t; +typedef long __kernel_off_t; +typedef long long __kernel_loff_t; +typedef int __kernel_pid_t; +typedef int __kernel_ipc_pid_t; +typedef unsigned int __kernel_uid_t; +typedef unsigned int __kernel_gid_t; +typedef unsigned long __kernel_size_t; +typedef long __kernel_ssize_t; +typedef long __kernel_ptrdiff_t; +typedef long __kernel_time_t; +typedef long __kernel_suseconds_t; +typedef long __kernel_clock_t; +typedef int __kernel_daddr_t; +typedef char * __kernel_caddr_t; +typedef unsigned long __kernel_sigset_t; /* at least 32 bits */ +typedef unsigned short __kernel_uid16_t; +typedef unsigned short __kernel_gid16_t; + +typedef __kernel_uid_t __kernel_old_uid_t; +typedef __kernel_gid_t __kernel_old_gid_t; +typedef __kernel_uid_t __kernel_uid32_t; +typedef __kernel_gid_t __kernel_gid32_t; + +typedef struct { +#if defined(__KERNEL__) || defined(__USE_ALL) + int val[2]; +#else /* !defined(__KERNEL__) && !defined(__USE_ALL)*/ + int __val[2]; +#endif /* !defined(__KERNEL__) && !defined(__USE_ALL)*/ +} __kernel_fsid_t; + + +#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) + +#ifndef _S390_BITOPS_H +#include <asm/bitops.h> +#endif + +#undef __FD_SET +#define __FD_SET(fd,fdsetp) set_bit(fd,fdsetp) + +#undef __FD_CLR +#define __FD_CLR(fd,fdsetp) clear_bit(fd,fdsetp) + +#undef __FD_ISSET +#define __FD_ISSET(fd,fdsetp) test_bit(fd,fdsetp) + +#undef __FD_ZERO +#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp))) + +#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)*/ + +#endif diff --git a/include/asm-s390x/processor.h b/include/asm-s390x/processor.h new file mode 100644 index 000000000..ea6561100 --- /dev/null +++ b/include/asm-s390x/processor.h @@ -0,0 +1,227 @@ +/* + * include/asm-s390/processor.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Hartmut Penner (hp@de.ibm.com), + * Martin Schwidefsky (schwidefsky@de.ibm.com) + * + * Derived from "include/asm-i386/processor.h" + * Copyright (C) 1994, Linus Torvalds + */ + +#ifndef __ASM_S390_PROCESSOR_H +#define __ASM_S390_PROCESSOR_H + +#include <asm/page.h> +#include <asm/ptrace.h> + +/* + * Default implementation of macro that returns current + * instruction pointer ("program counter"). + */ +#define current_text_addr() ({ void *pc; __asm__("basr %0,0":"=a"(pc)); pc; }) + +/* + * CPU type and hardware bug flags. Kept separately for each CPU. + * Members of this structure are referenced in head.S, so think twice + * before touching them. [mj] + */ + +typedef struct +{ + unsigned int version : 8; + unsigned int ident : 24; + unsigned int machine : 16; + unsigned int unused : 16; +} __attribute__ ((packed)) cpuid_t; + +struct cpuinfo_S390 +{ + cpuid_t cpu_id; + unsigned long loops_per_jiffy; + unsigned long *pgd_quick; + unsigned long *pmd_quick; + unsigned long *pte_quick; + unsigned long pgtable_cache_sz; + __u16 cpu_addr; + __u16 cpu_nr; + __u16 pad[2]; +}; + +extern void print_cpu_info(struct cpuinfo_S390 *); + +/* Lazy FPU handling on uni-processor */ +extern struct task_struct *last_task_used_math; + +#define S390_FLAG_31BIT 0x01UL + +/* + * User space process size: 4TB (default). + */ +#define TASK_SIZE (0x40000000000UL) +#define TASK31_SIZE (0x80000000UL) + +/* This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE ((current->thread.flags & S390_FLAG_31BIT) ? \ + (TASK31_SIZE / 2) : (TASK_SIZE / 2)) + +#define THREAD_SIZE (4*PAGE_SIZE) + +typedef struct { + __u32 ar4; +} mm_segment_t; + +/* if you change the thread_struct structure, you must + * update the _TSS_* defines in entry.S + */ + +struct thread_struct + { + struct pt_regs *regs; /* the user registers can be found on*/ + s390_fp_regs fp_regs; + __u32 ar2; /* kernel access register 2 */ + __u32 ar4; /* kernel access register 4 */ + addr_t ksp; /* kernel stack pointer */ + addr_t user_seg; /* HSTD */ + addr_t prot_addr; /* address of protection-excep. */ + __u32 error_code; /* error-code of last prog-excep. */ + __u32 trap_no; + per_struct per_info;/* Must be aligned on an 4 byte boundary*/ + addr_t ieee_instruction_pointer; + /* Used to give failing instruction back to user for ieee exceptions */ + unsigned long flags; /* various flags */ +}; + +typedef struct thread_struct thread_struct; + +#define INIT_MMAP \ +{ &init_mm, 0, 0, NULL, PAGE_SHARED, \ +VM_READ | VM_WRITE | VM_EXEC, 1, NULL,NULL } + +#define INIT_THREAD { (struct pt_regs *) 0, \ + { 0,{{0},{0},{0},{0},{0},{0},{0},{0},{0},{0}, \ + {0},{0},{0},{0},{0},{0}}}, \ + 0, 0, \ + sizeof(init_stack) + (addr_t) &init_stack, \ + (__pa((addr_t) &swapper_pg_dir[0]) + _REGION_TABLE),\ + 0,0,0, \ + (per_struct) {{{{0,}}},0,0,0,0,{{0,}}}, \ + 0 \ +} + +/* need to define ... */ +#define start_thread(regs, new_psw, new_stackp) do { \ + regs->psw.mask = _USER_PSW_MASK; \ + regs->psw.addr = new_psw; \ + regs->gprs[15] = new_stackp; \ +} while (0) + +#define start_thread31(regs, new_psw, new_stackp) do { \ + regs->psw.mask = _USER_PSW_MASK & ~(1L << 32); \ + regs->psw.addr = new_psw; \ + regs->gprs[15] = new_stackp; \ +} while (0) + + +/* Forward declaration, a strange C thing */ +struct mm_struct; + +/* Free all resources held by a thread. */ +extern void release_thread(struct task_struct *); +extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); + +/* Copy and release all segment info associated with a VM */ +#define copy_segments(nr, mm) do { } while (0) +#define release_segments(mm) do { } while (0) + +/* + * Return saved PC of a blocked thread. used in kernel/sched + */ +extern inline unsigned long thread_saved_pc(struct thread_struct *t) +{ + return (t->regs) ? ((unsigned long)t->regs->psw.addr) : 0; +} + +unsigned long get_wchan(struct task_struct *p); +#define KSTK_EIP(tsk) ((tsk)->thread.regs->psw.addr) +#define KSTK_ESP(tsk) ((tsk)->thread.ksp) + +/* Allocation and freeing of basic task resources. */ +/* + * NOTE! The task struct and the stack go together + */ +#define alloc_task_struct() \ + ((struct task_struct *) __get_free_pages(GFP_KERNEL,2)) +#define free_task_struct(p) free_pages((unsigned long)(p),2) +#define get_task_struct(tsk) atomic_inc(&virt_to_page(tsk)->count) + +#define init_task (init_task_union.task) +#define init_stack (init_task_union.stack) + +/* + * Set of msr bits that gdb can change on behalf of a process. + */ +/* Only let our hackers near the condition codes */ +#define PSW_MASK_DEBUGCHANGE 0x0000300000000000UL +/* Don't let em near the addressing mode either */ +#define PSW_ADDR_DEBUGCHANGE 0xFFFFFFFFFFFFFFFFUL +#define PSW_ADDR_MASK 0xFFFFFFFFFFFFFFFFUL +/* Program event recording mask */ +#define PSW_PER_MASK 0x4000000000000000UL +#define USER_STD_MASK 0x0000000000000080UL +#define PSW_PROBLEM_STATE 0x0001000000000000UL + +/* + * Function to drop a processor into disabled wait state + */ + +static inline void disabled_wait(addr_t code) +{ + char psw_buffer[2*sizeof(psw_t)]; + char ctl_buf[8]; + psw_t *dw_psw = (psw_t *)(((unsigned long) &psw_buffer+sizeof(psw_t)-1) + & -sizeof(psw_t)); + + dw_psw->mask = 0x0002000180000000; + dw_psw->addr = code; + /* + * Store status and then load disabled wait psw, + * the processor is dead afterwards + */ + asm volatile (" stctg 0,0,0(%1)\n" + " ni 4(%1),0xef\n" /* switch off protection */ + " lctlg 0,0,0(%1)\n" + " lghi 1,0x1000\n" + " stpt 0x328(1)\n" /* store timer */ + " stckc 0x330(1)\n" /* store clock comparator */ + " stpx 0x318(1)\n" /* store prefix register */ + " stam 0,15,0x340(1)\n" /* store access registers */ + " stfpc 0x31c(1)\n" /* store fpu control */ + " std 0,0x200(1)\n" /* store f0 */ + " std 1,0x208(1)\n" /* store f1 */ + " std 2,0x210(1)\n" /* store f2 */ + " std 3,0x218(1)\n" /* store f3 */ + " std 4,0x220(1)\n" /* store f4 */ + " std 5,0x228(1)\n" /* store f5 */ + " std 6,0x230(1)\n" /* store f6 */ + " std 7,0x238(1)\n" /* store f7 */ + " std 8,0x240(1)\n" /* store f8 */ + " std 9,0x248(1)\n" /* store f9 */ + " std 10,0x250(1)\n" /* store f10 */ + " std 11,0x258(1)\n" /* store f11 */ + " std 12,0x260(1)\n" /* store f12 */ + " std 13,0x268(1)\n" /* store f13 */ + " std 14,0x270(1)\n" /* store f14 */ + " std 15,0x278(1)\n" /* store f15 */ + " stmg 0,15,0x280(1)\n" /* store general registers */ + " stctg 0,15,0x380(1)\n" /* store control registers */ + " oi 0x384(1),0x10\n" /* fake protection bit */ + " lpswe 0(%0)" + : : "a" (dw_psw), "a" (&ctl_buf) : "0", "1"); +} + +#endif /* __ASM_S390_PROCESSOR_H */ + diff --git a/include/asm-s390x/ptrace.h b/include/asm-s390x/ptrace.h new file mode 100644 index 000000000..d2559f39a --- /dev/null +++ b/include/asm-s390x/ptrace.h @@ -0,0 +1,326 @@ +/* + * include/asm-s390/ptrace.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) + */ + +#ifndef _S390_PTRACE_H +#define _S390_PTRACE_H +#include <linux/config.h> +#include <asm/s390-regs-common.h> +#include <asm/current.h> +#include <linux/types.h> +#include <asm/setup.h> +#include <linux/stddef.h> + + +#define S390_REGS \ +S390_REGS_COMMON \ +addr_t orig_gpr2; + +typedef struct +{ + S390_REGS +} __attribute__ ((packed)) s390_regs; + +struct pt_regs +{ + S390_REGS + __u32 trap; +} __attribute__ ((packed)); + +#if CONFIG_REMOTE_DEBUG +typedef struct +{ + S390_REGS + __u32 trap; + addr_t crs[16]; + s390_fp_regs fp_regs; +} __attribute__ ((packed)) gdb_pt_regs; +#endif + + +typedef struct +{ + addr_t cr[3]; +} per_cr_words __attribute__((packed)); + +#define PER_EM_MASK 0x00000000E8000000UL +typedef struct +{ + unsigned :32; + unsigned em_branching:1; + unsigned em_instruction_fetch:1; + /* Switching on storage alteration automatically fixes + the storage alteration event bit in the users std. */ + unsigned em_storage_alteration:1; + unsigned em_gpr_alt_unused:1; + unsigned em_store_real_address:1; + unsigned :3; + unsigned branch_addr_ctl:1; + unsigned :1; + unsigned storage_alt_space_ctl:1; + unsigned :5; + unsigned :16; + addr_t starting_addr; + addr_t ending_addr; +} per_cr_bits __attribute__((packed)); + +typedef struct +{ + __u16 perc_atmid; /* 0x096 */ + addr_t address; /* 0x098 */ + __u8 access_id; /* 0x0a1 */ +} per_lowcore_words __attribute__((packed)); + +typedef struct +{ + unsigned perc_branching:1; /* 0x096 */ + unsigned perc_instruction_fetch:1; + unsigned perc_storage_alteration:1; + unsigned perc_gpr_alt_unused:1; + unsigned perc_store_real_address:1; + unsigned :3; + unsigned atmid_psw_bit_31:1; + unsigned atmid_validity_bit:1; + unsigned atmid_psw_bit_32:1; + unsigned atmid_psw_bit_5:1; + unsigned atmid_psw_bit_16:1; + unsigned atmid_psw_bit_17:1; + unsigned ai:2; + addr_t address; /* 0x098 */ + unsigned :4; /* 0x0a1 */ + unsigned access_id:4; +} per_lowcore_bits __attribute__((packed)); + + +typedef enum +{ + primary_asce, + ar_asce, + secondary_asce, + home_space_asce +} per_ai_codes; + + + +typedef struct +{ + union + { + per_cr_words words; + per_cr_bits bits; + } control_regs __attribute__((packed)); + /* Use these flags instead of setting em_instruction_fetch */ + /* directly they are used so that single stepping can be */ + /* switched on & off while not affecting other tracing */ + unsigned single_step:1; + unsigned instruction_fetch:1; + unsigned :30; + /* These addresses are copied into cr10 & cr11 if single stepping + is switched off */ + addr_t starting_addr; + addr_t ending_addr; + union + { + per_lowcore_words words; + per_lowcore_bits bits; + } lowcore; +} per_struct __attribute__((packed)); + + + +/* this struct defines the way the registers are stored on the + stack during a system call. If you change the pt_regs structure, + you'll need to change user.h too. + + N.B. if you modify the pt_regs struct the strace command also has to be + modified & recompiled ( just wait till we have gdb going ). + +*/ + +struct user_regs_struct +{ + S390_REGS + s390_fp_regs fp_regs; +/* These per registers are in here so that gdb can modify them itself + * as there is no "official" ptrace interface for hardware watchpoints. + * this is the way intel does it + */ + per_struct per_info; + addr_t ieee_instruction_pointer; + /* Used to give failing instruction back to user for ieee exceptions */ +}; + +typedef struct user_regs_struct user_regs_struct; + +typedef struct pt_regs pt_regs; + +#ifdef __KERNEL__ +#define user_mode(regs) (((regs)->psw.mask & PSW_PROBLEM_STATE) != 0) +#define instruction_pointer(regs) ((regs)->psw.addr) +extern void show_regs(struct pt_regs * regs); +extern char *task_show_regs(struct task_struct *task, char *buffer); +#endif + + + + + +#define FIX_PSW(addr) ((unsigned long)(addr)) + +#define MULT_PROCPTR_TYPES ((CONFIG_BINFMT_ELF)&&(CONFIG_BINFMT_TOC)) + +typedef struct +{ + long addr; + long toc; +} routine_descriptor; +extern void fix_routine_descriptor_regs(routine_descriptor *rdes,pt_regs *regs); +extern __inline__ void +fix_routine_descriptor_regs(routine_descriptor *rdes,pt_regs *regs) +{ + regs->psw.addr=FIX_PSW(rdes->addr); + regs->gprs[12]=rdes->toc; +} + +/* + * Compiler optimisation should save this stuff from being non optimal + * & remove uneccessary code ( isnt gcc great DJB. ) + */ + +/*I'm just using this an indicator of what binformat we are using + * (DJB) N.B. this needs to stay a macro unfortunately as I am otherwise + * dereferencing incomplete pointer types in with load_toc_binary + */ +#if MULT_PROCPTR_TYPES +#define uses_routine_descriptors() \ +(current->binfmt->load_binary==load_toc_binary) +#else +#if CONFIG_BINFMT_TOC +#define uses_routine_descriptors() 1 +#else +#define uses_routine_descriptors() 0 +#endif +#endif + +#define pt_off(ptreg) offsetof(user_regs_struct,ptreg) +enum +{ + PT_PSWMASK=pt_off(psw.mask), + PT_PSWADDR=pt_off(psw.addr), + PT_GPR0=pt_off(gprs[0]), + PT_GPR1=pt_off(gprs[1]), + PT_GPR2=pt_off(gprs[2]), + PT_GPR3=pt_off(gprs[3]), + PT_GPR4=pt_off(gprs[4]), + PT_GPR5=pt_off(gprs[5]), + PT_GPR6=pt_off(gprs[6]), + PT_GPR7=pt_off(gprs[7]), + PT_GPR8=pt_off(gprs[8]), + PT_GPR9=pt_off(gprs[9]), + PT_GPR10=pt_off(gprs[10]), + PT_GPR11=pt_off(gprs[11]), + PT_GPR12=pt_off(gprs[12]), + PT_GPR13=pt_off(gprs[13]), + PT_GPR14=pt_off(gprs[14]), + PT_GPR15=pt_off(gprs[15]), + PT_ACR0=pt_off(acrs[0]), + PT_ACR1=pt_off(acrs[1]), + PT_ACR2=pt_off(acrs[2]), + PT_ACR3=pt_off(acrs[3]), + PT_ACR4=pt_off(acrs[4]), + PT_ACR5=pt_off(acrs[5]), + PT_ACR6=pt_off(acrs[6]), + PT_ACR7=pt_off(acrs[7]), + PT_ACR8=pt_off(acrs[8]), + PT_ACR9=pt_off(acrs[9]), + PT_ACR10=pt_off(acrs[10]), + PT_ACR11=pt_off(acrs[11]), + PT_ACR12=pt_off(acrs[12]), + PT_ACR13=pt_off(acrs[13]), + PT_ACR14=pt_off(acrs[14]), + PT_ACR15=pt_off(acrs[15]), + PT_ORIGGPR2=pt_off(orig_gpr2), + PT_FPC=pt_off(fp_regs.fpc), +/* + * A nasty fact of life that the ptrace api + * only supports passing of longs. + */ + PT_FPR0=pt_off(fp_regs.fprs[0].d), + PT_FPR1=pt_off(fp_regs.fprs[1].d), + PT_FPR2=pt_off(fp_regs.fprs[2].d), + PT_FPR3=pt_off(fp_regs.fprs[3].d), + PT_FPR4=pt_off(fp_regs.fprs[4].d), + PT_FPR5=pt_off(fp_regs.fprs[5].d), + PT_FPR6=pt_off(fp_regs.fprs[6].d), + PT_FPR7=pt_off(fp_regs.fprs[7].d), + PT_FPR8=pt_off(fp_regs.fprs[8].d), + PT_FPR9=pt_off(fp_regs.fprs[9].d), + PT_FPR10=pt_off(fp_regs.fprs[10].d), + PT_FPR11=pt_off(fp_regs.fprs[11].d), + PT_FPR12=pt_off(fp_regs.fprs[12].d), + PT_FPR13=pt_off(fp_regs.fprs[13].d), + PT_FPR14=pt_off(fp_regs.fprs[14].d), + PT_FPR15=pt_off(fp_regs.fprs[15].d), + PT_CR_9=pt_off(per_info.control_regs.words.cr[0]), + PT_CR_10=pt_off(per_info.control_regs.words.cr[1]), + PT_CR_11=pt_off(per_info.control_regs.words.cr[2]), + PT_IEEE_IP=pt_off(ieee_instruction_pointer), + PT_LASTOFF=PT_IEEE_IP, + PT_ENDREGS=sizeof(user_regs_struct)-1 +}; + +#define PTRACE_AREA \ +__u32 len; \ +addr_t kernel_addr; \ +addr_t process_addr; + +typedef struct +{ + PTRACE_AREA +} ptrace_area; + +/* + 390 specific non posix ptrace requests + I chose unusual values so they are unlikely to clash with future ptrace definitions. + */ +#define PTRACE_PEEKUSR_AREA 0x5000 +#define PTRACE_POKEUSR_AREA 0x5001 +#define PTRACE_PEEKTEXT_AREA 0x5002 +#define PTRACE_PEEKDATA_AREA 0x5003 +#define PTRACE_POKETEXT_AREA 0x5004 +#define PTRACE_POKEDATA_AREA 0x5005 +/* PT_PROT definition is loosely based on hppa bsd definition in gdb/hppab-nat.c */ +#define PTRACE_PROT 21 + +typedef enum +{ + ptprot_set_access_watchpoint, + ptprot_set_write_watchpoint, + ptprot_disable_watchpoint +} ptprot_flags; + +typedef struct +{ + addr_t lowaddr; + addr_t hiaddr; + ptprot_flags prot; +} ptprot_area; +#endif + + + + + + + + + + + + + + diff --git a/include/asm-s390x/queue.h b/include/asm-s390x/queue.h new file mode 100644 index 000000000..c817d23b3 --- /dev/null +++ b/include/asm-s390x/queue.h @@ -0,0 +1,170 @@ +/* + * include/asm-s390/queue.h + * + * S390 version + * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) + * + * A little set of queue utilies. + */ +#include <linux/stddef.h> +#include <asm/types.h> + +typedef struct queue +{ + struct queue *next; +} queue; + +typedef queue list; + +typedef struct +{ + queue *head; + queue *tail; +} qheader; + +static __inline__ void init_queue(qheader *qhead) +{ + memset(qhead,0,sizeof(*qhead)); +} + +static __inline__ void enqueue_tail(qheader *qhead,queue *member) +{ + queue *tail=qhead->tail; + member->next=NULL; + + if(member) + { + if(tail) + tail->next=member; + else + + qhead->head=member; + qhead->tail=member; + member->next=NULL; + } +} + +static __inline__ queue *dequeue_head(qheader *qhead) +{ + queue *head=qhead->head,*next_head; + + if(head) + { + next_head=head->next; + qhead->head=next_head; + if(!next_head) + qhead->tail=NULL; + } + return(head); +} + +static __inline__ void init_list(list **lhead) +{ + *lhead=NULL; +} + +static __inline__ void add_to_list(list **lhead,list *member) +{ + member->next=*lhead; + *lhead=member; +} + +static __inline__ list *remove_listhead(list **lhead) +{ + list *oldhead=*lhead; + + if(oldhead) + *lhead=(*lhead)->next; + return(oldhead); +} + +static __inline__ void add_to_list_tail(list **lhead,list *member) +{ + list *curr,*prev; + if(*lhead==NULL) + *lhead=member; + else + { + prev=*lhead; + for(curr=(*lhead)->next;curr!=NULL;curr=curr->next) + prev=curr; + prev->next=member; + } +} +static __inline__ void add_to_list_tail_null(list **lhead,list *member) +{ + member->next=NULL; + add_to_list_tail_null(lhead,member); +} + + +static __inline__ int is_in_list(list *lhead,list *member) +{ + list *curr; + + for(curr=lhead;curr!=NULL;curr=curr->next) + if(curr==member) + return(TRUE); + return(FALSE); +} + +static __inline__ int get_prev(list *lhead,list *member,list **prev) +{ + list *curr; + + *prev=NULL; + for(curr=lhead;curr!=NULL;curr=curr->next) + { + if(curr==member) + return(TRUE); + *prev=curr; + } + *prev=NULL; + return(FALSE); +} + + + +static __inline__ int remove_from_list(list **lhead,list *member) +{ + list *prev; + + if(get_prev(*lhead,member,&prev)) + { + + if(prev) + prev->next=member->next; + else + *lhead=member->next; + return(TRUE); + } + return(FALSE); +} + +static __inline__ int remove_from_queue(qheader *qhead,queue *member) +{ + queue *prev; + + if(get_prev(qhead->head,(list *)member,(list **)&prev)) + { + + if(prev) + { + prev->next=member->next; + if(prev->next==NULL) + qhead->tail=prev; + } + else + { + if(qhead->head==qhead->tail) + qhead->tail=NULL; + qhead->head=member->next; + } + return(TRUE); + } + return(FALSE); +} + + + diff --git a/include/asm-s390x/resource.h b/include/asm-s390x/resource.h new file mode 100644 index 000000000..4e0f8e7ba --- /dev/null +++ b/include/asm-s390x/resource.h @@ -0,0 +1,56 @@ +/* + * include/asm-s390/resource.h + * + * S390 version + * + * Derived from "include/asm-i386/resources.h" + */ + +#ifndef _S390_RESOURCE_H +#define _S390_RESOURCE_H + +/* + * Resource limits + */ + +#define RLIMIT_CPU 0 /* CPU time in ms */ +#define RLIMIT_FSIZE 1 /* Maximum filesize */ +#define RLIMIT_DATA 2 /* max data size */ +#define RLIMIT_STACK 3 /* max stack size */ +#define RLIMIT_CORE 4 /* max core file size */ +#define RLIMIT_RSS 5 /* max resident set size */ +#define RLIMIT_NPROC 6 /* max number of processes */ +#define RLIMIT_NOFILE 7 /* max number of open files */ +#define RLIMIT_MEMLOCK 8 /* max locked-in-memory address space */ +#define RLIMIT_AS 9 /* address space limit */ +#define RLIMIT_LOCKS 10 /* maximum file locks held */ + +#define RLIM_NLIMITS 11 + +/* + * SuS says limits have to be unsigned. + * Which makes a ton more sense anyway. + */ +#define RLIM_INFINITY (~0UL) + +#ifdef __KERNEL__ + +#define INIT_RLIMITS \ +{ \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { _STK_LIM, RLIM_INFINITY }, \ + { 0, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { 0, 0 }, \ + { INR_OPEN, INR_OPEN }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ + { RLIM_INFINITY, RLIM_INFINITY }, \ +} + +#endif /* __KERNEL__ */ + +#endif + diff --git a/include/asm-s390x/s390-gdbregs.h b/include/asm-s390x/s390-gdbregs.h new file mode 100644 index 000000000..1d94ee78c --- /dev/null +++ b/include/asm-s390x/s390-gdbregs.h @@ -0,0 +1,89 @@ +/* + * include/asm-s390/s390-gdbregs.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) + * + * used both by the linux kernel for remote debugging & gdb + */ + +#ifndef _S390_GDBREGS_H +#define _S390_GDBREGS_H + +#ifdef __KERNEL__ +#include <asm/s390-regs-common.h> +#else +#include <s390x/s390-regs-common.h> +#endif +#define S390_MAX_INSTR_SIZE 6 +#define NUM_REGS (2+NUM_GPRS+NUM_ACRS+NUM_CRS+1+NUM_FPRS) +#define FIRST_ACR (2+NUM_GPRS) +#define LAST_ACR (FIRST_ACR+NUM_ACRS-1) +#define FIRST_CR (FIRST_ACR+NUM_ACRS) +#define LAST_CR (FIRST_CR+NUM_CRS-1) + +#define PSWM_REGNUM 0 +#define PC_REGNUM 1 +#define GP0_REGNUM 2 /* GPR register 0 */ +#define GP_LAST_REGNUM (GP0_REGNUM+NUM_GPRS-1) +#define RETADDR_REGNUM (GP0_REGNUM+14) /* Usually return address */ +#define SP_REGNUM (GP0_REGNUM+15) /* Contains address of top of stack */ +#define FP_REGNUM SP_REGNUM /* needed in findvar.c still */ +#define FRAME_REGNUM (GP0_REGNUM+11) +#define FPC_REGNUM (GP0_REGNUM+NUM_GPRS+NUM_ACRS+NUM_CRS) +#define FP0_REGNUM (FPC_REGNUM+1) /* FPR (Floating point) register 0 */ +#define FPLAST_REGNUM (FP0_REGNUM+NUM_FPRS-1) /* Last floating point register */ + +/* The top of this structure is as similar as possible to a pt_regs structure to */ +/* simplify code */ +typedef struct +{ + S390_REGS_COMMON + __u32 crs[NUM_CRS]; + s390_fp_regs fp_regs; +} s390_gdb_regs __attribute__((packed)); + +#define REGISTER_NAMES \ +{ \ +"pswm","pswa", \ +"gpr0","gpr1","gpr2","gpr3","gpr4","gpr5","gpr6","gpr7", \ +"gpr8","gpr9","gpr10","gpr11","gpr12","gpr13","gpr14","gpr15", \ +"acr0","acr1","acr2","acr3","acr4","acr5","acr6","acr7", \ +"acr8","acr9","acr10","acr11","acr12","acr13","acr14","acr15", \ +"cr0","cr1","cr2","cr3","cr4","cr5","cr6","cr7", \ +"cr8","cr9","cr10","cr11","cr12","cr13","cr14","cr15", \ +"fpc", \ +"fpr0","fpr1","fpr2","fpr3","fpr4","fpr5","fpr6","fpr7", \ +"fpr8","fpr9","fpr10","fpr11","fpr12","fpr13","fpr14","fpr15" \ +} + +/* Index within `registers' of the first byte of the space for + register N. */ + +#define ACR0_OFFSET ((PSW_MASK_SIZE+PSW_ADDR_SIZE)+(GPR_SIZE*NUM_GPRS)) +#define CR0_OFFSET (ACR0_OFFSET+(ACR_SIZE+NUM_ACRS)) +#define FPC_OFFSET (CR0_OFFSET+(CR_SIZE*NUM_CRS)) +#define FP0_OFFSET (FPC_OFFSET+(FPC_SIZE+FPC_PAD_SIZE)) + +#define REGISTER_BYTES \ +((FP0_OFFSET)+(FPR_SIZE*NUM_FPRS)) + +#define REGISTER_BYTE(N) ((N)<=GP_LAST_REGNUM ? (N)*8: \ +(N) <= LAST_ACR ? (ACR0_OFFSET+(((N)-FIRST_ACR)*ACR_SIZE)): \ +(N) <= LAST_CR ? (CR0_OFFSET+(((N)-FIRST_CR)*CR_SIZE)): \ +(N) == FPC_REGNUM ? FPC_OFFSET:(FP0_OFFSET+(((N)-FP0_REGNUM)*FPR_SIZE))) + +#endif + + + + + + + + + + + + diff --git a/include/asm-s390x/s390-regs-common.h b/include/asm-s390x/s390-regs-common.h new file mode 100644 index 000000000..cd93f3ef4 --- /dev/null +++ b/include/asm-s390x/s390-regs-common.h @@ -0,0 +1,115 @@ +/* + * include/asm-s390/s390-regs-common.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) + * + * this file is designed to keep as much compatibility between + * gdb's representation of registers & the kernels representation of registers + * as possible so as to minimise translation between gdb registers & + * kernel registers please keep this matched with gdb & strace + */ + +#ifndef _S390_REGS_COMMON_H +#define _S390_REGS_COMMON_H +#ifndef __ASSEMBLY__ +#include <asm/types.h> +#endif +#if defined(WANT_S390_TGT_DEFS) || defined(__KERNEL__) +#define REGISTER_SIZE 8 +#endif +#define NUM_GPRS 16 +#define GPR_SIZE 8 +#define PSW_MASK_SIZE 8 +#define PSW_ADDR_SIZE 8 +#define NUM_FPRS 16 +#define FPR_SIZE 8 +#define FPC_SIZE 4 +#define FPC_PAD_SIZE 4 /* gcc insists on aligning the fpregs */ +#define NUM_CRS 16 +#define CR_SIZE 8 +#define NUM_ACRS 16 +#define ACR_SIZE 4 + +#define STACK_FRAME_OVERHEAD 160 /* size of minimum stack frame */ + +#ifndef __ASSEMBLY__ +/* this typedef defines how a Program Status Word looks like */ +typedef struct +{ + __u64 mask; + __u64 addr; +} psw_t __attribute__ ((aligned(8))); + +typedef __u64 gpr_t; + +/* 2 __u32's are used for floats instead to compile with a __STRICT_ANSI__ defined */ +typedef union +{ +#ifdef __KERNEL__ + __u64 d; /* mathemu.h gets upset otherwise */ +#else + double d; /* ansi c dosen't like long longs & make sure that */ + /* alignments are identical for both compiles */ +#endif + struct + { + __u32 hi; + __u32 lo; + } fp; + __u32 f; +} freg_t; + +typedef struct +{ +/* + The compiler appears to like aligning freg_t on an 8 byte boundary + so I always access fpregs, this was causing fun when I was doing + coersions. + */ + __u32 fpc; + freg_t fprs[NUM_FPRS]; +} s390_fp_regs; + +#define FPC_EXCEPTION_MASK 0xF8000000 +#define FPC_FLAGS_MASK 0x00F80000 +#define FPC_DXC_MASK 0x0000FF00 +#define FPC_RM_MASK 0x00000003 +#define FPC_VALID_MASK ((FPC_EXCEPTION_MASK|FPC_FLAGS_MASK| \ + FPC_DXC_MASK|FPC_RM_MASK)) + + +/* + gdb structures & the kernel have this much always in common + */ +#define S390_REGS_COMMON \ +psw_t psw; \ +__u64 gprs[NUM_GPRS]; \ +__u32 acrs[NUM_ACRS]; \ + +typedef struct +{ + S390_REGS_COMMON +} s390_regs_common __attribute__ ((packed)); + + +/* Sequence of bytes for breakpoint illegal instruction. */ +#define S390_BREAKPOINT {0x0,0x1} +#define S390_BREAKPOINT_U16 ((__u16)0x0001) +#define S390_SYSCALL_OPCODE ((__u16)0x0a00) +#define S390_SYSCALL_SIZE 2 +#if defined(WANT_S390_TGT_DEFS) || defined(__KERNEL__) +#define ADDR_BITS_REMOVE(addr) ((addr)) +#endif +#endif +#endif + + + + + + + + + diff --git a/include/asm-s390x/s390_ext.h b/include/asm-s390x/s390_ext.h new file mode 100644 index 000000000..08a080441 --- /dev/null +++ b/include/asm-s390x/s390_ext.h @@ -0,0 +1,30 @@ +#ifndef _S390_EXTINT_H +#define _S390_EXTINT_H + +/* + * include/asm-s390/s390_ext.h + * + * S390 version + * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com), + * Martin Schwidefsky (schwidefsky@de.ibm.com) + */ + +typedef void (*ext_int_handler_t)(struct pt_regs *regs, __u16 code); + +/* + * Warning: if you change ext_int_info_t you have to change the + * external interrupt handler in entry.S too. + */ +typedef struct ext_int_info_t { + struct ext_int_info_t *next; + ext_int_handler_t handler; + __u16 code; +} __attribute__ ((packed)) ext_int_info_t; + +extern ext_int_info_t *ext_int_hash[]; + +int register_external_interrupt(__u16 code, ext_int_handler_t handler); +int unregister_external_interrupt(__u16 code, ext_int_handler_t handler); + +#endif diff --git a/include/asm-s390x/s390dyn.h b/include/asm-s390x/s390dyn.h new file mode 100644 index 000000000..a728ddf33 --- /dev/null +++ b/include/asm-s390x/s390dyn.h @@ -0,0 +1,50 @@ +/* + * arch/s390/kernel/s390dyn.h + * S/390 data definitions for dynamic device attachment + * + * S390 version + * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Ingo Adlung (adlung@de.ibm.com) + */ + +#ifndef __s390dyn_h +#define __s390dyn_h + +struct _devreg; + +typedef int (* oper_handler_func_t)( int irq, + struct _devreg *dreg); + +typedef struct _devreg_hc_t { + __u16 ctype; + __u8 cmode; + __u16 dtype; + __u8 dmode; + } __attribute__ ((packed)) devreg_hc_t; + +typedef struct _devreg { + union { + int devno; + devreg_hc_t hc; /* has controller info */ + } ci; + + int flag; + oper_handler_func_t oper_func; + struct _devreg *prev; + struct _devreg *next; +} devreg_t; + +#define DEVREG_EXACT_MATCH 0x00000001 +#define DEVREG_MATCH_DEV_TYPE 0x00000002 +#define DEVREG_MATCH_CU_TYPE 0x00000004 +#define DEVREG_NO_CU_INFO 0x00000008 +#define DEVREG_NO_DEV_INFO 0x00000010 + +#define DEVREG_TYPE_DEVNO 0x80000000 +#define DEVREG_TYPE_DEVCHARS 0x40000000 + +int s390_device_register ( devreg_t *drinfo ); +int s390_device_unregister( devreg_t *dreg ); +devreg_t * s390_search_devreg ( ioinfo_t *ioinfo ); + +#endif /* __s390dyn */ diff --git a/include/asm-s390x/s390io.h b/include/asm-s390x/s390io.h new file mode 100644 index 000000000..1a5a0f094 --- /dev/null +++ b/include/asm-s390x/s390io.h @@ -0,0 +1,95 @@ +/* + * arch/s390/kernel/s390io.h + * + * S390 version + * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Ingo Adlung (adlung@de.ibm.com) + */ + +#ifndef __s390io_h +#define __s390io_h + +/* + * IRQ data structure used by I/O subroutines + * + * Note : If bit flags are added, the "unused" value must be + * decremented accordingly ! + */ +typedef struct _ioinfo { + unsigned int irq; /* aka. subchannel number */ + spinlock_t irq_lock; /* irq lock */ + + struct _ioinfo *prev; + struct _ioinfo *next; + + union { + unsigned int info; + struct { + unsigned int busy : 1; /* device currently in use */ + unsigned int oper : 1; /* device is operational */ + unsigned int fast : 1; /* post with "channel end", ... */ + /* ... don't wait for "device end" */ + /* ... from do_IO() parameters */ + unsigned int ready : 1; /* interrupt handler registered */ + unsigned int haltio : 1; /* halt_IO in process */ + unsigned int doio : 1; /* do_IO in process */ + unsigned int doio_q : 1; /* do_IO queued - only possible ... */ + /* ... if 'fast' is set too */ + unsigned int w4final : 1; /* wait for final status, internally */ + /* ... used with 'fast' setting only */ + unsigned int repall : 1; /* report every interrupt status */ + unsigned int unready : 1; /* deregister irq handler in process */ + unsigned int d_disable : 1; /* delayed disabling required */ + unsigned int w4sense : 1; /* SENSE status pending */ + unsigned int syncio : 1; /* synchronous I/O requested */ + unsigned int consns : 1; /* concurrent sense is available */ + unsigned int delsense : 1; /* delayed SENSE required */ + unsigned int s_pend : 1; /* status pending condition */ + unsigned int pgid : 1; /* "path group ID" is valid */ + unsigned int pgid_supp : 1; /* "path group ID" command is supported */ + unsigned int esid : 1; /* Ext. SenseID supported by HW */ + unsigned int rcd : 1; /* RCD supported by HW */ + unsigned int repnone : 1; /* don't call IRQ handler on interrupt */ + unsigned int newreq : 1; /* new register interface */ + unsigned int dval : 1; /* device number valid */ + unsigned int unknown : 1; /* unknown device - if SenseID failed */ + unsigned int unused : (sizeof(unsigned int)*8 - 24); /* unused */ + } __attribute__ ((packed)) flags; + } ui; + + unsigned long u_intparm; /* user interruption parameter */ + senseid_t senseid; /* SenseID info */ + irq_desc_t irq_desc; /* irq descriptor */ + not_oper_handler_func_t nopfunc; /* not oper handler */ + __u8 ulpm; /* logical path mask used for I/O */ + __u8 opm; /* path mask of operational paths */ + __u16 devno; /* device number */ + pgid_t pgid; /* path group ID */ + schib_t schib; /* subchannel information block */ + orb_t orb; /* operation request block */ + devstat_t devstat; /* device status */ + ccw1_t *qcpa; /* queued channel program */ + ccw1_t senseccw; /* ccw for sense command */ + __u8 sense_data[32];/* buffer for basic sense */ + unsigned int stctl; /* accumulated status control from irb */ + unsigned long qintparm; /* queued interruption parameter */ + unsigned long qflag; /* queued flags */ + __u8 qlpm; /* queued logical path mask */ + __u32 syncnt; /* sync I/O recursive usage count */ + + } __attribute__ ((aligned(8))) ioinfo_t; + +#define IOINFO_FLAGS_BUSY 0x80000000 +#define IOINFO_FLAGS_OPER 0x40000000 +#define IOINFO_FLAGS_FAST 0x20000000 +#define IOINFO_FLAGS_READY 0x10000000 +#define IOINFO_FLAGS_HALTIO 0x08000000 +#define IOINFO_FLAGS_DOIO 0x04000000 +#define IOINFO_FLAGS_DOIO_Q 0x02000000 +#define IOINFO_FLAGS_W4FINAL 0x01000000 +#define IOINFO_FLAGS_REPALL 0x00800000 + +extern ioinfo_t *ioinfo[]; + +#endif /* __s390io_h */ + diff --git a/include/asm-s390x/s390mach.h b/include/asm-s390x/s390mach.h new file mode 100644 index 000000000..961e17ecf --- /dev/null +++ b/include/asm-s390x/s390mach.h @@ -0,0 +1,106 @@ +/* + * arch/s390/kernel/s390mach.h + * S/390 data definitions for machine check processing + * + * S390 version + * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Ingo Adlung (adlung@de.ibm.com) + */ + +#ifndef __s390mach_h +#define __s390mach_h + +#include <asm/types.h> + +typedef struct _mci { + __u32 to_be_defined_1 : 9; + __u32 cp : 1; /* channel-report pending */ + __u32 to_be_defined_2 : 22; + __u32 to_be_defined_3; + } mci_t; + +// +// machine-check-interruption code +// +typedef struct _mcic { + union _mcc { + __u64 mcl; /* machine check int. code - long info */ + mci_t mcd; /* machine check int. code - details */ + } mcc; +} __attribute__ ((packed)) mcic_t; + +// +// Channel Report Word +// +typedef struct _crw { + __u32 res1 : 1; /* reserved zero */ + __u32 slct : 1; /* solicited */ + __u32 oflw : 1; /* overflow */ + __u32 chn : 1; /* chained */ + __u32 rsc : 4; /* reporting source code */ + __u32 anc : 1; /* ancillary report */ + __u32 res2 : 1; /* reserved zero */ + __u32 erc : 6; /* error-recovery code */ + __u32 rsid : 16; /* reporting-source ID */ +} __attribute__ ((packed)) crw_t; + +#define CRW_RSC_MONITOR 0x2 /* monitoring facility */ +#define CRW_RSC_SCH 0x3 /* subchannel */ +#define CRW_RSC_CPATH 0x4 /* channel path */ +#define CRW_RSC_CONFIG 0x9 /* configuration-alert facility */ +#define CRW_RSC_CSS 0xB /* channel subsystem */ + +#define CRW_ERC_EVENT 0x00 /* event information pending */ +#define CRW_ERC_AVAIL 0x01 /* available */ +#define CRW_ERC_INIT 0x02 /* initialized */ +#define CRW_ERC_TERROR 0x03 /* temporary error */ +#define CRW_ERC_IPARM 0x04 /* installed parm initialized */ +#define CRW_ERC_TERM 0x05 /* terminal */ +#define CRW_ERC_PERRN 0x06 /* perm. error, fac. not init */ +#define CRW_ERC_PERRI 0x07 /* perm. error, facility init */ +#define CRW_ERC_PMOD 0x08 /* installed parameters modified */ + +#define MAX_CRW_PENDING 1024 +#define MAX_MACH_PENDING 1024 + +// +// CRW Entry +// +typedef struct _crwe { + crw_t crw; + struct _crwe *crwe_next; +} __attribute__ ((packed)) crwe_t; + +typedef struct _mache { + spinlock_t lock; + unsigned int status; + mcic_t mcic; + union _mc { + crwe_t *crwe; /* CRW if applicable */ + } mc; + struct _mache *next; + struct _mache *prev; +} mache_t; + +#define MCHCHK_STATUS_TO_PROCESS 0x00000001 +#define MCHCHK_STATUS_IN_PROGRESS 0x00000002 +#define MCHCHK_STATUS_WAITING 0x00000004 + +void s390_init_machine_check( void ); +void s390_do_machine_check ( void ); +void s390_do_crw_pending ( crwe_t *pcrwe ); + +extern __inline__ int stcrw( __u32 *pcrw ) +{ + int ccode; + + __asm__ __volatile__( + "STCRW 0(%1)\n\t" + "IPM %0\n\t" + "SRL %0,28\n\t" + : "=d" (ccode) : "a" (pcrw) + : "cc", "1" ); + return ccode; +} + +#endif /* __s390mach */ diff --git a/include/asm-s390x/scatterlist.h b/include/asm-s390x/scatterlist.h new file mode 100644 index 000000000..e9cfe86f6 --- /dev/null +++ b/include/asm-s390x/scatterlist.h @@ -0,0 +1,13 @@ +#ifndef _ASMS390X_SCATTERLIST_H +#define _ASMS390X_SCATTERLIST_H + +struct scatterlist { + char * address; /* Location data is to be transferred to */ + char * alt_address; /* Location of actual if address is a + * dma indirect buffer. NULL otherwise */ + unsigned int length; +}; + +#define ISA_DMA_THRESHOLD (0xffffffffffffffff) + +#endif /* _ASMS390X_SCATTERLIST_H */ diff --git a/include/asm-s390x/segment.h b/include/asm-s390x/segment.h new file mode 100644 index 000000000..8bfce3475 --- /dev/null +++ b/include/asm-s390x/segment.h @@ -0,0 +1,4 @@ +#ifndef _ASM_SEGMENT_H +#define _ASM_SEGMENT_H + +#endif diff --git a/include/asm-s390x/semaphore-helper.h b/include/asm-s390x/semaphore-helper.h new file mode 100644 index 000000000..d822e9a80 --- /dev/null +++ b/include/asm-s390x/semaphore-helper.h @@ -0,0 +1,100 @@ +/* + * include/asm-s390/semaphore-helper.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * + * Derived from "include/asm-i386/semaphore-helper.h" + * (C) Copyright 1996 Linus Torvalds + * (C) Copyright 1999 Andrea Arcangeli + */ + +#ifndef _S390_SEMAPHORE_HELPER_H +#define _S390_SEMAPHORE_HELPER_H + +/* + * These two _must_ execute atomically wrt each other. + * + * This is trivially done with load_locked/store_cond, + * but on the x86 we need an external synchronizer. + */ +static inline void wake_one_more(struct semaphore * sem) +{ + unsigned long flags; + + spin_lock_irqsave(&semaphore_wake_lock, flags); + sem->waking++; + spin_unlock_irqrestore(&semaphore_wake_lock, flags); +} + +static inline int waking_non_zero(struct semaphore *sem) +{ + unsigned long flags; + int ret = 0; + + spin_lock_irqsave(&semaphore_wake_lock, flags); + if (sem->waking > 0) { + sem->waking--; + ret = 1; + } + spin_unlock_irqrestore(&semaphore_wake_lock, flags); + return ret; +} + +/* + * waking_non_zero_interruptible: + * 1 got the lock + * 0 go to sleep + * -EINTR interrupted + * + * If we give up we must undo our count-decrease we previously did in down(). + * Subtle: up() can continue to happens and increase the semaphore count + * even during our critical section protected by the spinlock. So + * we must remeber to undo the sem->waking that will be run from + * wake_one_more() some time soon, if the semaphore count become > 0. + */ +static inline int waking_non_zero_interruptible(struct semaphore *sem, + struct task_struct *tsk) +{ + unsigned long flags; + int ret = 0; + + spin_lock_irqsave(&semaphore_wake_lock, flags); + if (sem->waking > 0) { + sem->waking--; + ret = 1; + } else if (signal_pending(tsk)) { + if (atomic_inc_and_test_greater_zero(&sem->count)) + sem->waking--; + ret = -EINTR; + } + spin_unlock_irqrestore(&semaphore_wake_lock, flags); + return ret; +} + +/* + * waking_non_zero_trylock: + * 1 failed to lock + * 0 got the lock + * + * Implementation details are the same of the interruptible case. + */ +static inline int waking_non_zero_trylock(struct semaphore *sem) +{ + unsigned long flags; + int ret = 1; + + spin_lock_irqsave(&semaphore_wake_lock, flags); + if (sem->waking <= 0) + { + if (atomic_inc_and_test_greater_zero(&sem->count)) + sem->waking--; + } else { + sem->waking--; + ret = 0; + } + spin_unlock_irqrestore(&semaphore_wake_lock, flags); + return ret; +} + +#endif diff --git a/include/asm-s390x/semaphore.h b/include/asm-s390x/semaphore.h new file mode 100644 index 000000000..eda753caa --- /dev/null +++ b/include/asm-s390x/semaphore.h @@ -0,0 +1,191 @@ +/* + * include/asm-s390/semaphore.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * + * Derived from "include/asm-i386/semaphore.h" + * (C) Copyright 1996 Linus Torvalds + */ + +#ifndef _S390_SEMAPHORE_H +#define _S390_SEMAPHORE_H + +#include <asm/system.h> +#include <asm/atomic.h> +#include <linux/wait.h> + +struct semaphore { + atomic_t count; + int sleepers; + wait_queue_head_t wait; +}; + +#define __SEM_DEBUG_INIT(name) + +#define __SEMAPHORE_INITIALIZER(name,count) \ +{ ATOMIC_INIT(count), 0, __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ + __SEM_DEBUG_INIT(name) } + +#define __MUTEX_INITIALIZER(name) \ + __SEMAPHORE_INITIALIZER(name,1) + +#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ + struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) + +#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) +#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) + +static inline void sema_init (struct semaphore *sem, int val) +{ + *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val); +} + +static inline void init_MUTEX (struct semaphore *sem) +{ + sema_init(sem, 1); +} + +static inline void init_MUTEX_LOCKED (struct semaphore *sem) +{ + sema_init(sem, 0); +} + +asmlinkage void __down_failed(void /* special register calling convention */); +asmlinkage int __down_failed_interruptible(void /* params in registers */); +asmlinkage int __down_failed_trylock(void /* params in registers */); +asmlinkage void __up_wakeup(void /* special register calling convention */); + +asmlinkage void __down(struct semaphore * sem); +asmlinkage int __down_interruptible(struct semaphore * sem); +asmlinkage int __down_trylock(struct semaphore * sem); +asmlinkage void __up(struct semaphore * sem); + +static inline void down(struct semaphore * sem) +{ + if (atomic_dec_return(&sem->count) < 0) + __down(sem); +} + +static inline int down_interruptible(struct semaphore * sem) +{ + int ret = 0; + + if (atomic_dec_return(&sem->count) < 0) + ret = __down_interruptible(sem); + return ret; +} + +static inline int down_trylock(struct semaphore * sem) +{ + int ret = 0; + + if (atomic_dec_return(&sem->count) < 0) + ret = __down_trylock(sem); + return ret; +} + +static inline void up(struct semaphore * sem) +{ + if (atomic_inc_return(&sem->count) <= 0) + __up(sem); +} + +/* rw mutexes (should that be mutices? =) -- throw rw + * spinlocks and semaphores together, and this is what we + * end up with... + * + * The lock is initialized to BIAS. This way, a writer + * subtracts BIAS ands gets 0 for the case of an uncontended + * lock. Readers decrement by 1 and see a positive value + * when uncontended, negative if there are writers waiting + * (in which case it goes to sleep). + * + * The value 0x01000000 supports up to 128 processors and + * lots of processes. BIAS must be chosen such that subl'ing + * BIAS once per CPU will result in the long remaining + * negative. + * + * In terms of fairness, this should result in the lock + * flopping back and forth between readers and writers + * under heavy use. + * + * -ben + */ +struct rw_semaphore { + atomic_t count; + volatile unsigned int write_bias_granted; + volatile unsigned int read_bias_granted; + wait_queue_head_t wait; + wait_queue_head_t write_bias_wait; +}; + +#define RW_LOCK_BIAS 0x01000000 + +#define __RWSEM_DEBUG_INIT /* */ + +#define __RWSEM_INITIALIZER(name,count) \ +{ ATOMIC_INIT(count), 0, 0, __WAIT_QUEUE_HEAD_INITIALIZER((name).wait), \ + __WAIT_QUEUE_HEAD_INITIALIZER((name).write_bias_wait) \ + __SEM_DEBUG_INIT(name) __RWSEM_DEBUG_INIT } + +#define __DECLARE_RWSEM_GENERIC(name,count) \ + struct rw_semaphore name = __RWSEM_INITIALIZER(name,count) + +#define DECLARE_RWSEM(name) __DECLARE_RWSEM_GENERIC(name,RW_LOCK_BIAS) +#define DECLARE_RWSEM_READ_LOCKED(name) __DECLARE_RWSEM_GENERIC(name,RW_LOCK_BIAS-1) +#define DECLARE_RWSEM_WRITE_LOCKED(name) __DECLARE_RWSEM_GENERIC(name,0) + +static inline void init_rwsem(struct rw_semaphore *sem) +{ + atomic_set(&sem->count, RW_LOCK_BIAS); + sem->read_bias_granted = 0; + sem->write_bias_granted = 0; + init_waitqueue_head(&sem->wait); + init_waitqueue_head(&sem->write_bias_wait); +} + +extern void __down_read_failed(int, struct rw_semaphore *); +extern void __down_write_failed(int, struct rw_semaphore *); +extern void __rwsem_wake(int, struct rw_semaphore *); + +static inline void down_read(struct rw_semaphore *sem) +{ + int count; + count = atomic_dec_return(&sem->count); + if (count < 0) + __down_read_failed(count, sem); +} + +static inline void down_write(struct rw_semaphore *sem) +{ + int count; + count = atomic_add_return (-RW_LOCK_BIAS, &sem->count); + if (count < 0) + __down_write_failed(count, sem); +} + +/* When a reader does a release, the only significant + * case is when there was a writer waiting, and we've + * bumped the count to 0: we must wake the writer up. + */ +static inline void up_read(struct rw_semaphore *sem) +{ + int count; + count = atomic_inc_return(&sem->count); + if (count == 0) + __rwsem_wake(count, sem); +} + +/* releasing the writer is easy -- just release it and + * wake up any sleepers. + */ +static inline void up_write(struct rw_semaphore *sem) +{ + int count; + count = atomic_add_return(RW_LOCK_BIAS, &sem->count); + if (count >= 0 && count < RW_LOCK_BIAS) + __rwsem_wake(count, sem); +} + +#endif diff --git a/include/asm-s390x/sembuf.h b/include/asm-s390x/sembuf.h new file mode 100644 index 000000000..13bba13a2 --- /dev/null +++ b/include/asm-s390x/sembuf.h @@ -0,0 +1,22 @@ +#ifndef _S390_SEMBUF_H +#define _S390_SEMBUF_H + +/* + * The semid64_ds structure for S/390 architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 2 miscellaneous 32-bit values + */ + +struct semid64_ds { + struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ + __kernel_time_t sem_otime; /* last semop time */ + __kernel_time_t sem_ctime; /* last change time */ + unsigned long sem_nsems; /* no. of semaphores in array */ + unsigned long __unused1; + unsigned long __unused2; +}; + +#endif /* _S390_SEMBUF_H */ diff --git a/include/asm-s390x/setup.h b/include/asm-s390x/setup.h new file mode 100644 index 000000000..6dda6a54c --- /dev/null +++ b/include/asm-s390x/setup.h @@ -0,0 +1,52 @@ +/* + * include/asm-s390/setup.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + */ + +#ifndef _ASM_S390_SETUP_H +#define _ASM_S390_SETUP_H + +#define PARMAREA 0x10400 + +#ifndef __ASSEMBLER__ + +#define ORIG_ROOT_DEV (*(unsigned long *) (0x10400)) +#define MOUNT_ROOT_RDONLY (*(unsigned short *) (0x10408)) +#define MEMORY_SIZE (*(unsigned long *) (0x1040a)) +#define MACHINE_FLAGS (*(unsigned long *) (0x10412)) +#define INITRD_START (*(unsigned long *) (0x1041a)) +#define INITRD_SIZE (*(unsigned long *) (0x10422)) +#define RAMDISK_FLAGS (*(unsigned short *) (0x1042a)) +#define COMMAND_LINE ((char *) (0x10480)) + +#else + +#define ORIG_ROOT_DEV 0x10400 +#define MOUNT_ROOT_RDONLY 0x10408 +#define MEMORY_SIZE 0x1040a +#define MACHINE_FLAGS 0x10412 +#define INITRD_START 0x1041a +#define INITRD_SIZE 0x10422 +#define RAMDISK_FLAGS 0x1042a +#define COMMAND_LINE 0x10480 + +#endif + +#define COMMAND_LINE_SIZE 896 +/* + * Machine features detected in head.S + */ +#define MACHINE_IS_VM (MACHINE_FLAGS & 1) +#define MACHINE_IS_P390 (MACHINE_FLAGS & 4) + +#define RAMDISK_ORIGIN 0x800000 +#define RAMDISK_SIZE 0x800000 +#define RAMDISK_BLKSIZE 0x1000 +#define RAMDISK_IMAGE_START_MASK 0x07FF +#define RAMDISK_PROMPT_FLAG 0x8000 +#define RAMDISK_LOAD_FLAG 0x4000 + + +#endif diff --git a/include/asm-s390x/shmbuf.h b/include/asm-s390x/shmbuf.h new file mode 100644 index 000000000..0fbcdef50 --- /dev/null +++ b/include/asm-s390x/shmbuf.h @@ -0,0 +1,38 @@ +#ifndef _S390_SHMBUF_H +#define _S390_SHMBUF_H + +/* + * The shmid64_ds structure for S/390 architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 2 miscellaneous 32-bit values + */ + +struct shmid64_ds { + struct ipc64_perm shm_perm; /* operation perms */ + size_t shm_segsz; /* size of segment (bytes) */ + __kernel_time_t shm_atime; /* last attach time */ + __kernel_time_t shm_dtime; /* last detach time */ + __kernel_time_t shm_ctime; /* last change time */ + __kernel_pid_t shm_cpid; /* pid of creator */ + __kernel_pid_t shm_lpid; /* pid of last operator */ + unsigned long shm_nattch; /* no. of current attaches */ + unsigned long __unused1; + unsigned long __unused2; +}; + +struct shminfo64 { + unsigned long shmmax; + unsigned long shmmin; + unsigned long shmmni; + unsigned long shmseg; + unsigned long shmall; + unsigned long __unused1; + unsigned long __unused2; + unsigned long __unused3; + unsigned long __unused4; +}; + +#endif /* _S390_SHMBUF_H */ diff --git a/include/asm-s390x/shmparam.h b/include/asm-s390x/shmparam.h new file mode 100644 index 000000000..c2e0c0508 --- /dev/null +++ b/include/asm-s390x/shmparam.h @@ -0,0 +1,13 @@ +/* + * include/asm-s390/shmparam.h + * + * S390 version + * + * Derived from "include/asm-i386/shmparam.h" + */ +#ifndef _ASM_S390_SHMPARAM_H +#define _ASM_S390_SHMPARAM_H + +#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ + +#endif /* _ASM_S390_SHMPARAM_H */ diff --git a/include/asm-s390x/sigcontext.h b/include/asm-s390x/sigcontext.h new file mode 100644 index 000000000..68aaebfbe --- /dev/null +++ b/include/asm-s390x/sigcontext.h @@ -0,0 +1,56 @@ +/* + * include/asm-s390/sigcontext.h + * + * S390 version + * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation + */ + +#ifndef _ASM_S390_SIGCONTEXT_H +#define _ASM_S390_SIGCONTEXT_H + +#define __NUM_GPRS 16 +#define __NUM_FPRS 16 +#define __NUM_ACRS 16 + +/* Has to be at least _NSIG_WORDS from asm/signal.h */ +#define _SIGCONTEXT_NSIG 64 +#define _SIGCONTEXT_NSIG_BPW 64 +/* Size of stack frame allocated when calling signal handler. */ +#define __SIGNAL_FRAMESIZE 160 +#define _SIGCONTEXT_NSIG_WORDS (_SIGCONTEXT_NSIG / _SIGCONTEXT_NSIG_BPW) +#define _SIGMASK_COPY_SIZE (sizeof(unsigned long)*_SIGCONTEXT_NSIG_WORDS) + +typedef struct +{ + unsigned long mask; + unsigned long addr; +} _psw_t __attribute__ ((aligned(8))); + +typedef struct +{ + _psw_t psw; + unsigned long gprs[__NUM_GPRS]; + unsigned int acrs[__NUM_ACRS]; +} _s390_regs_common __attribute__ ((packed)); + +typedef struct +{ + unsigned int fpc; + double fprs[__NUM_FPRS]; +} _s390_fp_regs; + +typedef struct +{ + _s390_regs_common regs; + _s390_fp_regs fpregs; +} _sigregs; + +struct sigcontext +{ + unsigned long oldmask[_SIGCONTEXT_NSIG_WORDS]; + _sigregs *sregs; +}; + + +#endif + diff --git a/include/asm-s390x/siginfo.h b/include/asm-s390x/siginfo.h new file mode 100644 index 000000000..876e8baae --- /dev/null +++ b/include/asm-s390x/siginfo.h @@ -0,0 +1,240 @@ +/* + * include/asm-s390/siginfo.h + * + * S390 version + * + * Derived from "include/asm-i386/siginfo.h" + */ + +#ifndef _S390_SIGINFO_H +#define _S390_SIGINFO_H + +#include <linux/types.h> + +/* XXX: This structure was copied from the Alpha; is there an iBCS version? */ + +typedef union sigval { + int sival_int; + void *sival_ptr; +} sigval_t; + +#define SI_MAX_SIZE 128 +#define SI_PAD_SIZE ((SI_MAX_SIZE/sizeof(int)) - 3) + +typedef struct siginfo { + int si_signo; + int si_errno; + int si_code; + + union { + int _pad[SI_PAD_SIZE]; + + /* kill() */ + struct { + pid_t _pid; /* sender's pid */ + uid_t _uid; /* sender's uid */ + } _kill; + + /* POSIX.1b timers */ + struct { + unsigned int _timer1; + unsigned int _timer2; + } _timer; + + /* POSIX.1b signals */ + struct { + pid_t _pid; /* sender's pid */ + uid_t _uid; /* sender's uid */ + sigval_t _sigval; + } _rt; + + /* SIGCHLD */ + struct { + pid_t _pid; /* which child */ + uid_t _uid; /* sender's uid */ + int _status; /* exit code */ + clock_t _utime; + clock_t _stime; + } _sigchld; + + /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ + struct { + void *_addr; /* faulting insn/memory ref. */ + } _sigfault; + + /* SIGPOLL */ + struct { + int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ + int _fd; + } _sigpoll; + } _sifields; +} siginfo_t; + +/* + * How these fields are to be accessed. + */ +#define si_pid _sifields._kill._pid +#define si_uid _sifields._kill._uid +#define si_status _sifields._sigchld._status +#define si_utime _sifields._sigchld._utime +#define si_stime _sifields._sigchld._stime +#define si_value _sifields._rt._sigval +#define si_int _sifields._rt._sigval.sival_int +#define si_ptr _sifields._rt._sigval.sival_ptr +#define si_addr _sifields._sigfault._addr +#define si_band _sifields._sigpoll._band +#define si_fd _sifields._sigpoll._fd + +#ifdef __KERNEL__ +#define __SI_MASK 0xffff0000 +#define __SI_KILL (0 << 16) +#define __SI_TIMER (1 << 16) +#define __SI_POLL (2 << 16) +#define __SI_FAULT (3 << 16) +#define __SI_CHLD (4 << 16) +#define __SI_RT (5 << 16) +#define __SI_CODE(T,N) ((T) << 16 | ((N) & 0xffff)) +#else +#define __SI_KILL 0 +#define __SI_TIMER 0 +#define __SI_POLL 0 +#define __SI_FAULT 0 +#define __SI_CHLD 0 +#define __SI_RT 0 +#define __SI_CODE(T,N) (N) +#endif + +/* + * si_code values + * Digital reserves positive values for kernel-generated signals. + */ +#define SI_USER 0 /* sent by kill, sigsend, raise */ +#define SI_KERNEL 0x80 /* sent by the kernel from somewhere */ +#define SI_QUEUE -1 /* sent by sigqueue */ +#define SI_TIMER -2 /* sent by timer expiration */ +#define SI_MESGQ -3 /* sent by real time mesq state change */ +#define SI_ASYNCIO -4 /* sent by AIO completion */ +#define SI_SIGIO -5 /* sent by queued SIGIO */ + +#define SI_FROMUSER(siptr) ((siptr)->si_code <= 0) +#define SI_FROMKERNEL(siptr) ((siptr)->si_code > 0) + +/* + * SIGILL si_codes + */ +#define ILL_ILLOPC 1 /* illegal opcode */ +#define ILL_ILLOPN 2 /* illegal operand */ +#define ILL_ILLADR 3 /* illegal addressing mode */ +#define ILL_ILLTRP 4 /* illegal trap */ +#define ILL_PRVOPC 5 /* privileged opcode */ +#define ILL_PRVREG 6 /* privileged register */ +#define ILL_COPROC 7 /* coprocessor error */ +#define ILL_BADSTK 8 /* internal stack error */ +#define NSIGILL 8 + +/* + * SIGFPE si_codes + */ +#define FPE_INTDIV 1 /* integer divide by zero */ +#define FPE_INTOVF 2 /* integer overflow */ +#define FPE_FLTDIV 3 /* floating point divide by zero */ +#define FPE_FLTOVF 4 /* floating point overflow */ +#define FPE_FLTUND 5 /* floating point underflow */ +#define FPE_FLTRES 6 /* floating point inexact result */ +#define FPE_FLTINV 7 /* floating point invalid operation */ +#define FPE_FLTSUB 8 /* subscript out of range */ +#define NSIGFPE 8 + +/* + * SIGSEGV si_codes + */ +#define SEGV_MAPERR 1 /* address not mapped to object */ +#define SEGV_ACCERR 2 /* invalid permissions for mapped object */ +#define NSIGSEGV 2 + +/* + * SIGBUS si_codes + */ +#define BUS_ADRALN 1 /* invalid address alignment */ +#define BUS_ADRERR 2 /* non-existant physical address */ +#define BUS_OBJERR 3 /* object specific hardware error */ +#define NSIGBUS 3 + +/* + * SIGTRAP si_codes + */ +#define TRAP_BRKPT 1 /* process breakpoint */ +#define TRAP_TRACE 2 /* process trace trap */ +#define NSIGTRAP 2 + +/* + * SIGCHLD si_codes + */ +#define CLD_EXITED 1 /* child has exited */ +#define CLD_KILLED 2 /* child was killed */ +#define CLD_DUMPED 3 /* child terminated abnormally */ +#define CLD_TRAPPED 4 /* traced child has trapped */ +#define CLD_STOPPED 5 /* child has stopped */ +#define CLD_CONTINUED 6 /* stopped child has continued */ +#define NSIGCHLD + +/* + * SIGPOLL si_codes + */ +#define POLL_IN 1 /* data input available */ +#define POLL_OUT 2 /* output buffers available */ +#define POLL_MSG 3 /* input message available */ +#define POLL_ERR 4 /* i/o error */ +#define POLL_PRI 5 /* high priority input available */ +#define POLL_HUP 6 /* device disconnected */ +#define NSIGPOLL 6 + +/* + * sigevent definitions + * + * It seems likely that SIGEV_THREAD will have to be handled from + * userspace, libpthread transmuting it to SIGEV_SIGNAL, which the + * thread manager then catches and does the appropriate nonsense. + * However, everything is written out here so as to not get lost. + */ +#define SIGEV_SIGNAL 0 /* notify via signal */ +#define SIGEV_NONE 1 /* other notification: meaningless */ +#define SIGEV_THREAD 2 /* deliver via thread creation */ + +#define SIGEV_MAX_SIZE 64 +#define SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE/sizeof(int)) - 3) + +typedef struct sigevent { + sigval_t sigev_value; + int sigev_signo; + int sigev_notify; + union { + int _pad[SIGEV_PAD_SIZE]; + + struct { + void (*_function)(sigval_t); + void *_attribute; /* really pthread_attr_t */ + } _sigev_thread; + } _sigev_un; +} sigevent_t; + +#define sigev_notify_function _sigev_un._sigev_thread._function +#define sigev_notify_attributes _sigev_un._sigev_thread._attribute + +#ifdef __KERNEL__ +#include <linux/string.h> + +extern inline void copy_siginfo(siginfo_t *to, siginfo_t *from) +{ + if (from->si_code < 0) + memcpy(to, from, sizeof(siginfo_t)); + else + /* _sigchld is currently the largest know union member */ + memcpy(to, from, 3*sizeof(int) + sizeof(from->_sifields._sigchld)); +} + +extern int copy_siginfo_to_user(siginfo_t *to, siginfo_t *from); + +#endif /* __KERNEL__ */ + +#endif diff --git a/include/asm-s390x/signal.h b/include/asm-s390x/signal.h new file mode 100644 index 000000000..e849415cc --- /dev/null +++ b/include/asm-s390x/signal.h @@ -0,0 +1,185 @@ +/* + * include/asm-s390/signal.h + * + * S390 version + * + * Derived from "include/asm-i386/signal.h" + */ + +#ifndef _ASMS390_SIGNAL_H +#define _ASMS390_SIGNAL_H + +#include <linux/types.h> + +/* Avoid too many header ordering problems. */ +struct siginfo; + +#ifdef __KERNEL__ +/* Most things should be clean enough to redefine this at will, if care + is taken to make libc match. */ +#include <asm/sigcontext.h> +#define _NSIG _SIGCONTEXT_NSIG +#define _NSIG_BPW _SIGCONTEXT_NSIG_BPW +#define _NSIG_WORDS _SIGCONTEXT_NSIG_WORDS + +typedef unsigned long old_sigset_t; /* at least 32 bits */ + +typedef struct { + unsigned long sig[_NSIG_WORDS]; +} sigset_t; + +#else +/* Here we must cater to libcs that poke about in kernel headers. */ + +#define NSIG 32 +typedef unsigned long sigset_t; + +#endif /* __KERNEL__ */ + +#define SIGHUP 1 +#define SIGINT 2 +#define SIGQUIT 3 +#define SIGILL 4 +#define SIGTRAP 5 +#define SIGABRT 6 +#define SIGIOT 6 +#define SIGBUS 7 +#define SIGFPE 8 +#define SIGKILL 9 +#define SIGUSR1 10 +#define SIGSEGV 11 +#define SIGUSR2 12 +#define SIGPIPE 13 +#define SIGALRM 14 +#define SIGTERM 15 +#define SIGSTKFLT 16 +#define SIGCHLD 17 +#define SIGCONT 18 +#define SIGSTOP 19 +#define SIGTSTP 20 +#define SIGTTIN 21 +#define SIGTTOU 22 +#define SIGURG 23 +#define SIGXCPU 24 +#define SIGXFSZ 25 +#define SIGVTALRM 26 +#define SIGPROF 27 +#define SIGWINCH 28 +#define SIGIO 29 +#define SIGPOLL SIGIO +/* +#define SIGLOST 29 +*/ +#define SIGPWR 30 +#define SIGUNUSED 31 + +/* These should not be considered constants from userland. */ +#define SIGRTMIN 32 +#define SIGRTMAX (_NSIG-1) + +/* + * SA_FLAGS values: + * + * SA_ONSTACK indicates that a registered stack_t will be used. + * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the + * SA_RESTART flag to get restarting signals (which were the default long ago) + * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. + * SA_RESETHAND clears the handler when the signal is delivered. + * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. + * SA_NODEFER prevents the current signal from being masked in the handler. + * + * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single + * Unix names RESETHAND and NODEFER respectively. + */ +#define SA_NOCLDSTOP 0x00000001 +#define SA_NOCLDWAIT 0x00000002 /* not supported yet */ +#define SA_SIGINFO 0x00000004 +#define SA_ONSTACK 0x08000000 +#define SA_RESTART 0x10000000 +#define SA_NODEFER 0x40000000 +#define SA_RESETHAND 0x80000000 + +#define SA_NOMASK SA_NODEFER +#define SA_ONESHOT SA_RESETHAND +#define SA_INTERRUPT 0x20000000 /* dummy -- ignored */ + +#define SA_RESTORER 0x04000000 + +/* + * sigaltstack controls + */ +#define SS_ONSTACK 1 +#define SS_DISABLE 2 + +#define MINSIGSTKSZ 2048 +#define SIGSTKSZ 8192 + +#ifdef __KERNEL__ + +/* + * These values of sa_flags are used only by the kernel as part of the + * irq handling routines. + * + * SA_INTERRUPT is also used by the irq handling routines. + * SA_SHIRQ is for shared interrupt support on PCI and EISA. + */ +#define SA_PROBE SA_ONESHOT +#define SA_SAMPLE_RANDOM SA_RESTART +#define SA_SHIRQ 0x04000000 +#endif + +#define SIG_BLOCK 0 /* for blocking signals */ +#define SIG_UNBLOCK 1 /* for unblocking signals */ +#define SIG_SETMASK 2 /* for setting the signal mask */ + +/* Type of a signal handler. */ +typedef void (*__sighandler_t)(int); + +#define SIG_DFL ((__sighandler_t)0) /* default signal handling */ +#define SIG_IGN ((__sighandler_t)1) /* ignore signal */ +#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */ + +#ifdef __KERNEL__ +struct old_sigaction { + __sighandler_t sa_handler; + old_sigset_t sa_mask; + unsigned long sa_flags; + void (*sa_restorer)(void); +}; + +struct sigaction { + __sighandler_t sa_handler; + unsigned long sa_flags; + void (*sa_restorer)(void); + sigset_t sa_mask; /* mask last for extensibility */ +}; + +struct k_sigaction { + struct sigaction sa; +}; +#else +/* Here we must cater to libcs that poke about in kernel headers. */ + +struct sigaction { + union { + __sighandler_t _sa_handler; + void (*_sa_sigaction)(int, struct siginfo *, void *); + } _u; + sigset_t sa_mask; + unsigned long sa_flags; + void (*sa_restorer)(void); +}; + +#define sa_handler _u._sa_handler +#define sa_sigaction _u._sa_sigaction + +#endif /* __KERNEL__ */ + +typedef struct sigaltstack { + void *ss_sp; + int ss_flags; + size_t ss_size; +} stack_t; + + +#endif diff --git a/include/asm-s390x/sigp.h b/include/asm-s390x/sigp.h new file mode 100644 index 000000000..6835d5df7 --- /dev/null +++ b/include/asm-s390x/sigp.h @@ -0,0 +1,159 @@ +/* + * include/asm-s390/sigp.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), + * Martin Schwidefsky (schwidefsky@de.ibm.com) + * + * sigp.h by D.J. Barrow (c) IBM 1999 + * contains routines / structures for signalling other S/390 processors in an + * SMP configuration. + */ + +#ifndef __SIGP__ +#define __SIGP__ + +#include <asm/ptrace.h> +#include <asm/misc390.h> +#include <asm/atomic.h> + +/* get real cpu address from logical cpu number */ +extern volatile int __cpu_logical_map[]; + +typedef enum +{ + sigp_unassigned=0x0, + sigp_sense, + sigp_external_call, + sigp_emergency_signal, + sigp_start, + sigp_stop, + sigp_restart, + sigp_unassigned1, + sigp_unassigned2, + sigp_stop_and_store_status, + sigp_unassigned3, + sigp_initial_cpu_reset, + sigp_cpu_reset, + sigp_set_prefix, + sigp_store_status_at_address, + sigp_store_extended_status_at_address +} sigp_order_code; + +typedef __u32 sigp_status_word; + +typedef enum +{ + sigp_order_code_accepted=0, + sigp_status_stored, + sigp_busy, + sigp_not_operational +} sigp_ccode; + + +/* + * Definitions for the external call + */ + +/* 'Bit' signals, asynchronous */ +typedef enum +{ + ec_schedule=0, + ec_restart, + ec_halt, + ec_power_off, + ec_bit_last +} ec_bit_sig; + +/* Signals which come with a parameter area */ +typedef enum +{ + ec_callback_sync, + ec_callback_async +} ec_cmd_sig; + +/* state information for signals */ +typedef enum +{ + ec_pending, + ec_executing, + ec_done +} ec_state; + +/* header for the queuing of callbacks */ +typedef struct ec_ext_call +{ + ec_cmd_sig cmd; + atomic_t status; + struct ec_ext_call *next; + void (*func)(void *info); + void *info; +} ec_ext_call; + +/* + * Signal processor + */ +extern __inline__ sigp_ccode +signal_processor(__u16 cpu_addr, sigp_order_code order_code) +{ + sigp_ccode ccode; + + __asm__ __volatile__( + " sgr 1,1\n" /* parameter=0 in gpr 1 */ + " sigp 1,%1,0(%2)\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) + : "d" (__cpu_logical_map[cpu_addr]), "a" (order_code) + : "cc" , "memory", "1" ); + return ccode; +} + +/* + * Signal processor with parameter + */ +extern __inline__ sigp_ccode +signal_processor_p(__u64 parameter,__u16 cpu_addr,sigp_order_code order_code) +{ + sigp_ccode ccode; + + __asm__ __volatile__( + " lgr 1,%1\n" /* parameter in gpr 1 */ + " sigp 1,%2,0(%3)\n" + " ipm %0\n" + " srl %0,28\n" + : "=d" (ccode) + : "d" (parameter), "d" (__cpu_logical_map[cpu_addr]), + "a" (order_code) + : "cc" , "memory", "1" ); + return ccode; +} + +/* + * Signal processor with parameter and return status + */ +extern __inline__ sigp_ccode +signal_processor_ps(__u32 *statusptr, __u64 parameter, + __u16 cpu_addr, sigp_order_code order_code) +{ + sigp_ccode ccode; + + __asm__ __volatile__( + " sgr 2,2\n" /* clear status so it doesn't contain rubbish if not saved. */ + " lgr 3,%2\n" /* parameter in gpr 3 */ + " sigp 2,%3,0(%4)\n" + " stg 2,%1\n" + " ipm %0\n" + " srl %0,28\n" + : "=d" (ccode), "=m" (*statusptr) + : "d" (parameter), "d" (__cpu_logical_map[cpu_addr]), + "a" (order_code) + : "cc" , "memory", "2" , "3" + ); + return ccode; +} + +#endif __SIGP__ + + diff --git a/include/asm-s390x/smp.h b/include/asm-s390x/smp.h new file mode 100644 index 000000000..fe723f044 --- /dev/null +++ b/include/asm-s390x/smp.h @@ -0,0 +1,78 @@ +/* + * include/asm-s390/smp.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), + * Martin Schwidefsky (schwidefsky@de.ibm.com) + */ +#ifndef __ASM_SMP_H +#define __ASM_SMP_H +#include <linux/config.h> +#ifdef CONFIG_SMP +#ifndef __ASSEMBLY__ + +#include <asm/lowcore.h> +#include <linux/kernel.h> // FOR FASTCALL definition + +#define smp_processor_id() (current->processor) +#define NO_PROC_ID 0xFF /* No processor magic marker */ + +/* + * This magic constant controls our willingness to transfer + * a process across CPUs. Such a transfer incurs misses on the L1 + * cache, and on a P6 or P5 with multiple L2 caches L2 hits. My + * gut feeling is this will vary by board in value. For a board + * with separate L2 cache it probably depends also on the RSS, and + * for a board with shared L2 cache it ought to decay fast as other + * processes are run. + */ + +#define PROC_CHANGE_PENALTY 20 /* Schedule penalty */ + +extern void count_cpus(void); + +extern __inline__ int cpu_logical_map(int cpu) +{ + return cpu; +} + +extern __inline__ int cpu_number_map(int cpu) +{ + return cpu; +} + +extern __inline__ __u16 hard_smp_processor_id(void) +{ + __u16 cpu_address; + + __asm__ ("stap %0\n" : "=m" (cpu_address)); + return cpu_address; +} + +#define cpu_logical_map(cpu) (cpu) + +void smp_local_timer_interrupt(struct pt_regs * regs); + +/* + s390 specific smp.c headers + */ +typedef struct +{ + int intresting; + sigp_ccode ccode; + __u32 status; + __u16 cpu; +} sigp_info; + +sigp_ccode +smp_ext_call(int cpu, void (*callback)(void *info), void *info, int wait); +void smp_ext_call_others(void (*callback)(void *info), void *info, int wait); +sigp_ccode smp_ext_bitcall(int cpu, ec_bit_sig sig); +void smp_ext_bitcall_others(ec_bit_sig sig); + +int smp_signal_others(sigp_order_code order_code,__u32 parameter, + int spin,sigp_info *info); +#endif +#endif +#endif diff --git a/include/asm-s390x/smplock.h b/include/asm-s390x/smplock.h new file mode 100644 index 000000000..1f6485fb0 --- /dev/null +++ b/include/asm-s390x/smplock.h @@ -0,0 +1,62 @@ +/* + * include/asm-s390/smplock.h + * + * S390 version + * + * Derived from "include/asm-i386/smplock.h" + */ + +#include <linux/interrupt.h> +#include <linux/spinlock.h> + +extern spinlock_t kernel_flag; + +#define kernel_locked() spin_is_locked(&kernel_flag) + +/* + * Release global kernel lock and global interrupt lock + */ +#define release_kernel_lock(task, cpu) \ +do { \ + if (task->lock_depth >= 0) \ + spin_unlock(&kernel_flag); \ + release_irqlock(cpu); \ + __sti(); \ +} while (0) + +/* + * Re-acquire the kernel lock + */ +#define reacquire_kernel_lock(task) \ +do { \ + if (task->lock_depth >= 0) \ + spin_lock(&kernel_flag); \ +} while (0) + + +/* + * Getting the big kernel lock. + * + * This cannot happen asynchronously, + * so we only need to worry about other + * CPU's. + */ +/* + * Getting the big kernel lock. + * + * This cannot happen asynchronously, + * so we only need to worry about other + * CPU's. + */ +extern __inline__ void lock_kernel(void) +{ + if (!++current->lock_depth) + spin_lock(&kernel_flag); +} + +extern __inline__ void unlock_kernel(void) +{ + if (--current->lock_depth < 0) + spin_unlock(&kernel_flag); +} + diff --git a/include/asm-s390x/socket.h b/include/asm-s390x/socket.h new file mode 100644 index 000000000..0d00c3b54 --- /dev/null +++ b/include/asm-s390x/socket.h @@ -0,0 +1,69 @@ +/* + * include/asm-s390/socket.h + * + * S390 version + * + * Derived from "include/asm-i386/socket.h" + */ + +#ifndef _ASM_SOCKET_H +#define _ASM_SOCKET_H + +#include <asm/sockios.h> + +/* For setsockoptions(2) */ +#define SOL_SOCKET 1 + +#define SO_DEBUG 1 +#define SO_REUSEADDR 2 +#define SO_TYPE 3 +#define SO_ERROR 4 +#define SO_DONTROUTE 5 +#define SO_BROADCAST 6 +#define SO_SNDBUF 7 +#define SO_RCVBUF 8 +#define SO_KEEPALIVE 9 +#define SO_OOBINLINE 10 +#define SO_NO_CHECK 11 +#define SO_PRIORITY 12 +#define SO_LINGER 13 +#define SO_BSDCOMPAT 14 +/* To add :#define SO_REUSEPORT 15 */ +#define SO_PASSCRED 16 +#define SO_PEERCRED 17 +#define SO_RCVLOWAT 18 +#define SO_SNDLOWAT 19 +#define SO_RCVTIMEO 20 +#define SO_SNDTIMEO 21 + +/* Security levels - as per NRL IPv6 - don't actually do anything */ +#define SO_SECURITY_AUTHENTICATION 22 +#define SO_SECURITY_ENCRYPTION_TRANSPORT 23 +#define SO_SECURITY_ENCRYPTION_NETWORK 24 + +#define SO_BINDTODEVICE 25 + +/* Socket filtering */ +#define SO_ATTACH_FILTER 26 +#define SO_DETACH_FILTER 27 + +#define SO_PEERNAME 28 +#define SO_TIMESTAMP 29 +#define SCM_TIMESTAMP SO_TIMESTAMP + +/* Nast libc5 fixup - bletch */ +#if defined(__KERNEL__) +/* Socket types. */ +#define SOCK_STREAM 1 /* stream (connection) socket */ +#define SOCK_DGRAM 2 /* datagram (conn.less) socket */ +#define SOCK_RAW 3 /* raw socket */ +#define SOCK_RDM 4 /* reliably-delivered message */ +#define SOCK_SEQPACKET 5 /* sequential packet socket */ +#define SOCK_PACKET 10 /* linux specific way of */ + /* getting packets at the dev */ + /* level. For writing rarp and */ + /* other similar things on the */ + /* user level. */ +#endif + +#endif /* _ASM_SOCKET_H */ diff --git a/include/asm-s390x/sockios.h b/include/asm-s390x/sockios.h new file mode 100644 index 000000000..412aeb4dd --- /dev/null +++ b/include/asm-s390x/sockios.h @@ -0,0 +1,20 @@ +/* + * include/asm-s390/sockios.h + * + * S390 version + * + * Derived from "include/asm-i386/sockios.h" + */ + +#ifndef __ARCH_S390_SOCKIOS__ +#define __ARCH_S390_SOCKIOS__ + +/* Socket-level I/O control calls. */ +#define FIOSETOWN 0x8901 +#define SIOCSPGRP 0x8902 +#define FIOGETOWN 0x8903 +#define SIOCGPGRP 0x8904 +#define SIOCATMARK 0x8905 +#define SIOCGSTAMP 0x8906 /* Get stamp */ + +#endif diff --git a/include/asm-s390x/softirq.h b/include/asm-s390x/softirq.h new file mode 100644 index 000000000..ce1254eba --- /dev/null +++ b/include/asm-s390x/softirq.h @@ -0,0 +1,35 @@ +/* + * include/asm-s390/softirq.h + * + * S390 version + * + * Derived from "include/asm-i386/softirq.h" + */ + +#ifndef __ASM_SOFTIRQ_H +#define __ASM_SOFTIRQ_H + +#ifndef __LINUX_SMP_H +#include <linux/smp.h> +#endif + +#include <asm/atomic.h> +#include <asm/hardirq.h> +#include <asm/lowcore.h> + +#define cpu_bh_disable(cpu) do { local_bh_count(cpu)++; barrier(); } while (0) +#define cpu_bh_enable(cpu) do { barrier(); local_bh_count(cpu)--; } while (0) + +#define local_bh_disable() cpu_bh_disable(smp_processor_id()) +#define local_bh_enable() cpu_bh_enable(smp_processor_id()) + +#define in_softirq() (local_bh_count(smp_processor_id()) != 0) + +#endif /* __ASM_SOFTIRQ_H */ + + + + + + + diff --git a/include/asm-s390x/spinlock.h b/include/asm-s390x/spinlock.h new file mode 100644 index 000000000..260be9b71 --- /dev/null +++ b/include/asm-s390x/spinlock.h @@ -0,0 +1,119 @@ +/* + * include/asm-s390/spinlock.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) + * + * Derived from "include/asm-i386/spinlock.h" + */ + +#ifndef __ASM_SPINLOCK_H +#define __ASM_SPINLOCK_H + +/* + * Simple spin lock operations. There are two variants, one clears IRQ's + * on the local processor, one does not. + * + * We make no fairness assumptions. They have a cost. + */ + +typedef struct { + volatile unsigned int lock; +} spinlock_t __attribute__ ((aligned (8))); + +#define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 } +#define spin_lock_init(lp) do { (lp)->lock = 0; } while(0) +#define spin_unlock_wait(lp) do { barrier(); } while(((volatile spinlock_t *)(lp))->lock) +#define spin_is_locked(x) ((x)->lock != 0) + +extern inline void spin_lock(spinlock_t *lp) +{ + __asm__ __volatile(" bras 1,1f\n" + "0: # diag 0,0,68\n" + "1: slr 0,0\n" + " cs 0,1,%1\n" + " jl 0b\n" + : "=m" (lp->lock) + : "0" (lp->lock) : "0", "1", "cc" ); +} + +extern inline int spin_trylock(spinlock_t *lp) +{ + unsigned int result; + __asm__ __volatile(" slr %1,%1\n" + " basr 1,0\n" + "0: cs %1,1,%0" + : "=m" (lp->lock), "=&d" (result) + : "0" (lp->lock) : "1", "cc" ); + return !result; +} + +extern inline void spin_unlock(spinlock_t *lp) +{ + __asm__ __volatile(" xc 0(4,%0),0(%0)\n" + " bcr 15,0" + : /* no output */ : "a" (lp) : "memory", "cc" ); +} + +/* + * Read-write spinlocks, allowing multiple readers + * but only one writer. + * + * NOTE! it is quite common to have readers in interrupts + * but no interrupt writers. For those circumstances we + * can "mix" irq-safe locks - any writer needs to get a + * irq-safe write-lock, but readers can get non-irqsafe + * read-locks. + */ +typedef struct { + volatile unsigned long lock; + volatile unsigned long owner_pc; +} rwlock_t; + +#define RW_LOCK_UNLOCKED (rwlock_t) { 0, 0 } + +#define read_lock(rw) \ + asm volatile(" la 1,%0\n" \ + " lg 2,0(1)\n" \ + " j 1f\n" \ + "0: # diag 0,0,68\n" \ + "1: nihh 2,0x7fff\n" /* clear high (=write) bit */ \ + " la 3,1(2)\n" /* one more reader */ \ + " csg 2,3,0(1)\n" /* try to write new value */ \ + " jl 0b" \ + : "+m" ((rw)->lock) : : "1", "2", "3", "cc" ); + +#define read_unlock(rw) \ + asm volatile(" la 1,%0\n" \ + " lg 2,0(1)\n" \ + " j 1f\n" \ + "0: # diag 0,0,68\n" \ + "1: lgr 3,2\n" \ + " bctgr 3,0\n" /* one less reader */ \ + " csg 2,3,0(1)\n" \ + " jl 0b" \ + : "+m" ((rw)->lock) : : "1", "2", "3", "cc" ); + +#define write_lock(rw) \ + asm volatile(" la 1,%0\n" \ + " llihh 3,0x8000\n" /* new lock value = 0x80...0 */ \ + " j 1f\n" \ + "0: # diag 0,0,68\n" \ + "1: slgr 2,2\n" /* old lock value must be 0 */ \ + " csg 2,3,0(1)\n" \ + " jl 0b" \ + : "+m" ((rw)->lock) : : "1", "2", "3", "cc" ); + +#define write_unlock(rw) \ + asm volatile(" la 1,%0\n" \ + " slgr 3,3\n" /* new lock value = 0 */ \ + " j 1f\n" \ + "0: # diag 0,0,68\n" \ + "1: llihh 2,0x8000\n" /* old lock value must be 0x8..0 */\ + " csg 2,3,0(1)\n" \ + " jl 0b" \ + : "+m" ((rw)->lock) : : "1", "2", "3", "cc" ); + +#endif /* __ASM_SPINLOCK_H */ + diff --git a/include/asm-s390x/stat.h b/include/asm-s390x/stat.h new file mode 100644 index 000000000..6973d5cf4 --- /dev/null +++ b/include/asm-s390x/stat.h @@ -0,0 +1,33 @@ +/* + * include/asm-s390x/stat.h + * + * S390 version + * + * Derived from "include/asm-i386/stat.h" + */ + +#ifndef _S390_STAT_H +#define _S390_STAT_H + +struct stat { + unsigned long st_dev; + unsigned long st_ino; + unsigned long st_nlink; + unsigned int st_mode; + unsigned int st_uid; + unsigned int st_gid; + unsigned int __pad1; + unsigned long st_rdev; + unsigned long st_size; + unsigned long st_atime; + unsigned long __reserved0; /* reserved for atime.nanoseconds */ + unsigned long st_mtime; + unsigned long __reserved1; /* reserved for mtime.nanoseconds */ + unsigned long st_ctime; + unsigned long __reserved2; /* reserved for ctime.nanoseconds */ + unsigned long st_blksize; + long st_blocks; + unsigned long __unused[3]; +}; + +#endif diff --git a/include/asm-s390x/statfs.h b/include/asm-s390x/statfs.h new file mode 100644 index 000000000..900d00e54 --- /dev/null +++ b/include/asm-s390x/statfs.h @@ -0,0 +1,33 @@ +/* + * include/asm-s390/statfs.h + * + * S390 version + * + * Derived from "include/asm-i386/statfs.h" + */ + +#ifndef _S390_STATFS_H +#define _S390_STATFS_H + +#ifndef __KERNEL_STRICT_NAMES + +#include <linux/types.h> + +typedef __kernel_fsid_t fsid_t; + +#endif + +struct statfs { + int f_type; + int f_bsize; + long f_blocks; + long f_bfree; + long f_bavail; + long f_files; + long f_ffree; + __kernel_fsid_t f_fsid; + int f_namelen; + int f_spare[6]; +}; + +#endif diff --git a/include/asm-s390x/string.h b/include/asm-s390x/string.h new file mode 100644 index 000000000..84a173bc4 --- /dev/null +++ b/include/asm-s390x/string.h @@ -0,0 +1,121 @@ +/* + * include/asm-s390/string.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), + */ + +#ifndef _S390_STRING_H_ +#define _S390_STRING_H_ + +#ifdef __KERNEL__ + +#ifndef _LINUX_TYPES_H +#include <linux/types.h> +#endif + +#define __HAVE_ARCH_MEMCHR +#define __HAVE_ARCH_MEMCPY +#define __HAVE_ARCH_MEMSET +#define __HAVE_ARCH_STRCAT +#define __HAVE_ARCH_STRCMP +#define __HAVE_ARCH_STRCPY +#define __HAVE_ARCH_STRLEN +#define __HAVE_ARCH_STRNCPY + +#undef __HAVE_ARCH_MEMMOVE +#undef __HAVE_ARCH_STRNICMP +#undef __HAVE_ARCH_STRNCAT +#undef __HAVE_ARCH_STRNCMP +#undef __HAVE_ARCH_STRCHR +#undef __HAVE_ARCH_STRRCHR +#undef __HAVE_ARCH_STRNLEN +#undef __HAVE_ARCH_STRSPN +#undef __HAVE_ARCH_STRPBRK +#undef __HAVE_ARCH_STRTOK +#undef __HAVE_ARCH_BCOPY +#undef __HAVE_ARCH_MEMCMP +#undef __HAVE_ARCH_MEMSCAN +#undef __HAVE_ARCH_STRSTR + +extern void *memset(void *, int, size_t); +extern void *memcpy(void *, const void *, size_t); +extern void *memmove(void *, const void *, size_t); +extern char *strncpy(char *, const char *, size_t); +extern int strcmp(const char *,const char *); + +#undef __HAVE_ARCH_MEMCHR +#if 0 +static inline void * memchr(const void * cs,int c,size_t count) +{ + void *ptr; + + __asm__ __volatile__ (" lgr 0,%2\n" + " lgr 1,%1\n" + " la %0,0(%3,%1)\n" + "0: srst %0,1\n" + " jo 0b\n" + " brc 13,1f\n" + " slgr %0,%0\n" + "1:" + : "=&a" (ptr) : "a" (cs), "d" (c), "d" (count) + : "cc", "0", "1" ); + return ptr; +} +#endif + +static __inline__ char *strcpy(char *dest, const char *src) +{ + char *tmp = dest; + + __asm__ __volatile__ (" slgr 0,0\n" + "0: mvst %0,%1\n" + " jo 0b" + : "+&a" (dest), "+&a" (src) : + : "cc", "memory", "0" ); + return tmp; +} + +#undef __HAVE_ARCH_STRLEN +#if 0 +static __inline__ size_t strlen(const char *s) +{ + size_t len; + + __asm__ __volatile__ (" slgr 0,0\n" + " lgr %0,%1\n" + "0: srst 0,%0\n" + " jo 0b\n" + " lgr %0,0\n" + " sgr %0,%1" + : "=&a" (len) : "a" (s) + : "cc", "0" ); + return len; +} +#endif + +#undef __HAVE_ARCH_STRCAT +#if 0 +static __inline__ char *strcat(char *dest, const char *src) +{ + char *tmp = dest; + + __asm__ __volatile__ (" slgr 0,0\n" + "0: srst 0,%0\n" + " jo 0b\n" + " lgr %0,0\n" + " slgr 0,0\n" + "1: mvst %0,%1\n" + " jo 1b" + : "+&a" (dest), "+&a" (src) : + : "cc", "memory", "0" ); + return tmp; +} +#endif + +extern void *alloca(size_t); +#endif /* __KERNEL__ */ + +#endif /* __S390_STRING_H_ */ + diff --git a/include/asm-s390x/system.h b/include/asm-s390x/system.h new file mode 100644 index 000000000..9d77dbc68 --- /dev/null +++ b/include/asm-s390x/system.h @@ -0,0 +1,264 @@ +/* + * include/asm-s390/system.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), + * + * Derived from "include/asm-i386/system.h" + */ + +#ifndef __ASM_SYSTEM_H +#define __ASM_SYSTEM_H + +#include <linux/config.h> +#ifdef __KERNEL__ +#include <asm/lowcore.h> +#endif +#include <linux/kernel.h> + +#define prepare_to_switch() do { } while(0) +#define switch_to(prev,next,last) do { \ + if (prev == next) \ + break; \ + save_fp_regs(&prev->thread.fp_regs); \ + restore_fp_regs(&next->thread.fp_regs); \ + last = resume(&prev->thread,&next->thread); \ +} while (0) + +struct task_struct; + +#define nop() __asm__ __volatile__ ("nop") + +#define xchg(ptr,x) \ + ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(void *)(ptr),sizeof(*(ptr)))) + + +static inline unsigned long __xchg(unsigned long x, void * ptr, int size) +{ + switch (size) { + case 1: + asm volatile ( + " lghi 1,3\n" + " nr 1,%0\n" /* isolate last 2 bits */ + " xr %0,1\n" /* align ptr */ + " bras 2,0f\n" + " icm 1,8,%1\n" /* for ptr&3 == 0 */ + " stcm 0,8,%1\n" + " icm 1,4,%1\n" /* for ptr&3 == 1 */ + " stcm 0,4,%1\n" + " icm 1,2,%1\n" /* for ptr&3 == 2 */ + " stcm 0,2,%1\n" + " icm 1,1,%1\n" /* for ptr&3 == 3 */ + " stcm 0,1,%1\n" + "0: sll 1,3\n" + " la 2,0(1,2)\n" /* r2 points to an icm */ + " l 0,0(%0)\n" /* get fullword */ + "1: lr 1,0\n" /* cs loop */ + " ex 0,0(2)\n" /* insert x */ + " cs 0,1,0(%0)\n" + " jl 1b\n" + " ex 0,4(2)" /* store *ptr to x */ + : "+&a" (ptr), "+m" (x) : + : "memory", "0", "1", "2"); + case 2: + if(((addr_t)ptr)&1) + panic("misaligned (__u16 *) in __xchg\n"); + asm volatile ( + " lghi 1,2\n" + " nr 1,%0\n" /* isolate bit 2^1 */ + " xr %0,1\n" /* align ptr */ + " bras 2,0f\n" + " icm 1,12,%1\n" /* for ptr&2 == 0 */ + " stcm 0,12,%1\n" + " icm 1,3,%1\n" /* for ptr&2 == 1 */ + " stcm 0,3,%1\n" + "0: sll 1,2\n" + " la 2,0(1,2)\n" /* r2 points to an icm */ + " l 0,0(%0)\n" /* get fullword */ + "1: lr 1,0\n" /* cs loop */ + " ex 0,0(2)\n" /* insert x */ + " cs 0,1,0(%0)\n" + " jl 1b\n" + " ex 0,4(2)" /* store *ptr to x */ + : "+&a" (ptr), "+m" (x) : + : "memory", "0", "1", "2"); + break; + case 4: + if(((addr_t)ptr)&3) + panic("misaligned (__u32 *) in __xchg\n"); + asm volatile ( + " l 0,0(%1)\n" + "0: cs 0,%0,0(%1)\n" + " jl 0b\n" + " lgfr %0,0\n" + : "+d" (x) : "a" (ptr) + : "memory", "0" ); + break; + case 8: + if(((addr_t)ptr)&7) + panic("misaligned (__u64 *) in __xchg\n"); + asm volatile ( + " lg 0,0(%1)\n" + "0: csg 0,%0,0(%1)\n" + " jl 0b\n" + " lgr %0,0\n" + : "+d" (x) : "a" (ptr) + : "memory", "0" ); + break; + default: + abort(); + } + return x; +} + +/* + * Force strict CPU ordering. + * And yes, this is required on UP too when we're talking + * to devices. + * + * This is very similar to the ppc eieio/sync instruction in that is + * does a checkpoint syncronisation & makes sure that + * all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ). + */ + +#define eieio() __asm__ __volatile__ ("BCR 15,0") +# define SYNC_OTHER_CORES(x) eieio() +#define mb() eieio() +#define rmb() eieio() +#define wmb() eieio() +#define smp_mb() mb() +#define smp_rmb() rmb() +#define smp_wmb() wmb() +#define smp_mb__before_clear_bit() smp_mb() +#define smp_mb__after_clear_bit() smp_mb() + +#define set_mb(var, value) do { var = value; mb(); } while (0) +#define set_wmb(var, value) do { var = value; wmb(); } while (0) + +/* interrupt control.. */ +#define __sti() ({ \ + unsigned long dummy; \ + __asm__ __volatile__ ( \ + "stosm %0,0x03" : "=m" (dummy) : : "memory"); \ + }) + +#define __cli() ({ \ + unsigned long flags; \ + __asm__ __volatile__ ( \ + "stnsm %0,0xFC" : "=m" (flags) : : "memory"); \ + flags; \ + }) + +#define __save_flags(x) \ + __asm__ __volatile__("stosm %0,0" : "=m" (x) : : "memory") + +#define __restore_flags(x) \ + __asm__ __volatile__("ssm %0" : : "m" (x) : "memory") + +#define __load_psw(psw) \ + __asm__ __volatile__("lpswe %0" : : "m" (psw)); + +#define __ctl_load(array, low, high) ({ \ + __asm__ __volatile__ ( \ + " la 1,%0\n" \ + " bras 2,0f\n" \ + " lctlg 0,0,0(1)\n" \ + "0: ex %1,0(2)" \ + : : "m" (array), "a" (((low)<<4)+(high)) : "1", "2" ); \ + }) + +#define __ctl_store(array, low, high) ({ \ + __asm__ __volatile__ ( \ + " la 1,%0\n" \ + " bras 2,0f\n" \ + " stctg 0,0,0(1)\n" \ + "0: ex %1,0(2)" \ + : "=m" (array) : "a" (((low)<<4)+(high)): "1", "2" ); \ + }) + +#define __ctl_set_bit(cr, bit) ({ \ + __u8 dummy[24]; \ + __asm__ __volatile__ ( \ + " la 1,%0\n" /* align to 8 byte */ \ + " aghi 1,7\n" \ + " nill 1,0xfff8\n" \ + " bras 2,0f\n" /* skip indirect insns */ \ + " stctg 0,0,0(1)\n" \ + " lctlg 0,0,0(1)\n" \ + "0: ex %1,0(2)\n" /* execute stctl */ \ + " lg 0,0(1)\n" \ + " ogr 0,%2\n" /* set the bit */ \ + " stg 0,0(1)\n" \ + "1: ex %1,6(2)" /* execute lctl */ \ + : "=m" (dummy) : "a" (cr*17), "a" (1L<<(bit)) \ + : "0", "1", "2"); \ + }) + +#define __ctl_clear_bit(cr, bit) ({ \ + __u8 dummy[24]; \ + __asm__ __volatile__ ( \ + " la 1,%0\n" /* align to 8 byte */ \ + " aghi 1,7\n" \ + " nill 1,0xfff8\n" \ + " bras 2,0f\n" /* skip indirect insns */ \ + " stctg 0,0,0(1)\n" \ + " lctlg 0,0,0(1)\n" \ + "0: ex %1,0(2)\n" /* execute stctl */ \ + " lg 0,0(1)\n" \ + " ngr 0,%2\n" /* set the bit */ \ + " stg 0,0(1)\n" \ + "1: ex %1,6(2)" /* execute lctl */ \ + : "=m" (dummy) : "a" (cr*17), "a" (~(1L<<(bit))) \ + : "0", "1", "2"); \ + }) + +/* For spinlocks etc */ +#define local_irq_save(x) ((x) = __cli()) +#define local_irq_restore(x) __restore_flags(x) +#define local_irq_disable() __cli() +#define local_irq_enable() __sti() + +#ifdef CONFIG_SMP + +extern void __global_cli(void); +extern void __global_sti(void); + +extern unsigned long __global_save_flags(void); +extern void __global_restore_flags(unsigned long); +#define cli() __global_cli() +#define sti() __global_sti() +#define save_flags(x) ((x)=__global_save_flags()) +#define restore_flags(x) __global_restore_flags(x) + +extern void smp_ctl_set_bit(int cr, int bit); +extern void smp_ctl_clear_bit(int cr, int bit); +#define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit) +#define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit) + +#else + +#define cli() __cli() +#define sti() __sti() +#define save_flags(x) __save_flags(x) +#define restore_flags(x) __restore_flags(x) + +#define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit) +#define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit) + + +#endif + +#ifdef __KERNEL__ +extern struct task_struct *resume(void *,void *); + +extern int save_fp_regs1(s390_fp_regs *fpregs); +extern void save_fp_regs(s390_fp_regs *fpregs); +extern int restore_fp_regs1(s390_fp_regs *fpregs); +extern void restore_fp_regs(s390_fp_regs *fpregs); +#endif + +#endif + + + diff --git a/include/asm-s390x/termbits.h b/include/asm-s390x/termbits.h new file mode 100644 index 000000000..cfbe7a36a --- /dev/null +++ b/include/asm-s390x/termbits.h @@ -0,0 +1,180 @@ +/* + * include/asm-s390/termbits.h + * + * S390 version + * + * Derived from "include/asm-i386/termbits.h" + */ + +#ifndef __ARCH_S390_TERMBITS_H__ +#define __ARCH_S390_TERMBITS_H__ + +#include <linux/posix_types.h> + +typedef unsigned char cc_t; +typedef unsigned int speed_t; +typedef unsigned int tcflag_t; + +#define NCCS 19 +struct termios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ +}; + +/* c_cc characters */ +#define VINTR 0 +#define VQUIT 1 +#define VERASE 2 +#define VKILL 3 +#define VEOF 4 +#define VTIME 5 +#define VMIN 6 +#define VSWTC 7 +#define VSTART 8 +#define VSTOP 9 +#define VSUSP 10 +#define VEOL 11 +#define VREPRINT 12 +#define VDISCARD 13 +#define VWERASE 14 +#define VLNEXT 15 +#define VEOL2 16 + +/* c_iflag bits */ +#define IGNBRK 0000001 +#define BRKINT 0000002 +#define IGNPAR 0000004 +#define PARMRK 0000010 +#define INPCK 0000020 +#define ISTRIP 0000040 +#define INLCR 0000100 +#define IGNCR 0000200 +#define ICRNL 0000400 +#define IUCLC 0001000 +#define IXON 0002000 +#define IXANY 0004000 +#define IXOFF 0010000 +#define IMAXBEL 0020000 + +/* c_oflag bits */ +#define OPOST 0000001 +#define OLCUC 0000002 +#define ONLCR 0000004 +#define OCRNL 0000010 +#define ONOCR 0000020 +#define ONLRET 0000040 +#define OFILL 0000100 +#define OFDEL 0000200 +#define NLDLY 0000400 +#define NL0 0000000 +#define NL1 0000400 +#define CRDLY 0003000 +#define CR0 0000000 +#define CR1 0001000 +#define CR2 0002000 +#define CR3 0003000 +#define TABDLY 0014000 +#define TAB0 0000000 +#define TAB1 0004000 +#define TAB2 0010000 +#define TAB3 0014000 +#define XTABS 0014000 +#define BSDLY 0020000 +#define BS0 0000000 +#define BS1 0020000 +#define VTDLY 0040000 +#define VT0 0000000 +#define VT1 0040000 +#define FFDLY 0100000 +#define FF0 0000000 +#define FF1 0100000 + +/* c_cflag bit meaning */ +#define CBAUD 0010017 +#define B0 0000000 /* hang up */ +#define B50 0000001 +#define B75 0000002 +#define B110 0000003 +#define B134 0000004 +#define B150 0000005 +#define B200 0000006 +#define B300 0000007 +#define B600 0000010 +#define B1200 0000011 +#define B1800 0000012 +#define B2400 0000013 +#define B4800 0000014 +#define B9600 0000015 +#define B19200 0000016 +#define B38400 0000017 +#define EXTA B19200 +#define EXTB B38400 +#define CSIZE 0000060 +#define CS5 0000000 +#define CS6 0000020 +#define CS7 0000040 +#define CS8 0000060 +#define CSTOPB 0000100 +#define CREAD 0000200 +#define PARENB 0000400 +#define PARODD 0001000 +#define HUPCL 0002000 +#define CLOCAL 0004000 +#define CBAUDEX 0010000 +#define B57600 0010001 +#define B115200 0010002 +#define B230400 0010003 +#define B460800 0010004 +#define B500000 0010005 +#define B576000 0010006 +#define B921600 0010007 +#define B1000000 0010010 +#define B1152000 0010011 +#define B1500000 0010012 +#define B2000000 0010013 +#define B2500000 0010014 +#define B3000000 0010015 +#define B3500000 0010016 +#define B4000000 0010017 +#define CIBAUD 002003600000 /* input baud rate (not used) */ +#define CMSPAR 010000000000 /* mark or space (stick) parity */ +#define CRTSCTS 020000000000 /* flow control */ + +/* c_lflag bits */ +#define ISIG 0000001 +#define ICANON 0000002 +#define XCASE 0000004 +#define ECHO 0000010 +#define ECHOE 0000020 +#define ECHOK 0000040 +#define ECHONL 0000100 +#define NOFLSH 0000200 +#define TOSTOP 0000400 +#define ECHOCTL 0001000 +#define ECHOPRT 0002000 +#define ECHOKE 0004000 +#define FLUSHO 0010000 +#define PENDIN 0040000 +#define IEXTEN 0100000 + +/* tcflow() and TCXONC use these */ +#define TCOOFF 0 +#define TCOON 1 +#define TCIOFF 2 +#define TCION 3 + +/* tcflush() and TCFLSH use these */ +#define TCIFLUSH 0 +#define TCOFLUSH 1 +#define TCIOFLUSH 2 + +/* tcsetattr uses these */ +#define TCSANOW 0 +#define TCSADRAIN 1 +#define TCSAFLUSH 2 + +#endif diff --git a/include/asm-s390x/termios.h b/include/asm-s390x/termios.h new file mode 100644 index 000000000..bab0d5947 --- /dev/null +++ b/include/asm-s390x/termios.h @@ -0,0 +1,114 @@ +/* + * include/asm-s390/termios.h + * + * S390 version + * + * Derived from "include/asm-i386/termios.h" + */ + +#ifndef _S390_TERMIOS_H +#define _S390_TERMIOS_H + +#include <asm/termbits.h> +#include <asm/ioctls.h> + + +struct winsize { + unsigned short ws_row; + unsigned short ws_col; + unsigned short ws_xpixel; + unsigned short ws_ypixel; +}; + +#define NCC 8 +struct termio { + unsigned short c_iflag; /* input mode flags */ + unsigned short c_oflag; /* output mode flags */ + unsigned short c_cflag; /* control mode flags */ + unsigned short c_lflag; /* local mode flags */ + unsigned char c_line; /* line discipline */ + unsigned char c_cc[NCC]; /* control characters */ +}; + +/* modem lines */ +#define TIOCM_LE 0x001 +#define TIOCM_DTR 0x002 +#define TIOCM_RTS 0x004 +#define TIOCM_ST 0x008 +#define TIOCM_SR 0x010 +#define TIOCM_CTS 0x020 +#define TIOCM_CAR 0x040 +#define TIOCM_RNG 0x080 +#define TIOCM_DSR 0x100 +#define TIOCM_CD TIOCM_CAR +#define TIOCM_RI TIOCM_RNG +#define TIOCM_OUT1 0x2000 +#define TIOCM_OUT2 0x4000 +#define TIOCM_LOOP 0x8000 + +/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ + +/* line disciplines */ +#define N_TTY 0 +#define N_SLIP 1 +#define N_MOUSE 2 +#define N_PPP 3 +#define N_STRIP 4 +#define N_AX25 5 +#define N_X25 6 /* X.25 async */ +#define N_6PACK 7 +#define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ +#define N_R3964 9 /* Reserved for Simatic R3964 module */ +#define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ +#define N_IRDA 11 /* Linux IR - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ +#define N_HDLC 13 /* synchronous HDLC */ + +#ifdef __KERNEL__ + +/* intr=^C quit=^\ erase=del kill=^U + eof=^D vtime=\0 vmin=\1 sxtc=\0 + start=^Q stop=^S susp=^Z eol=\0 + reprint=^R discard=^U werase=^W lnext=^V + eol2=\0 +*/ +#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" + +/* + * Translate a "termio" structure into a "termios". Ugh. + */ + +#define user_termio_to_kernel_termios(termios, termio) \ +({ \ + unsigned short tmp; \ + get_user(tmp, &(termio)->c_iflag); \ + (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \ + get_user(tmp, &(termio)->c_oflag); \ + (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \ + get_user(tmp, &(termio)->c_cflag); \ + (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \ + get_user(tmp, &(termio)->c_lflag); \ + (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \ + get_user((termios)->c_line, &(termio)->c_line); \ + copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ +}) + +/* + * Translate a "termios" structure into a "termio". Ugh. + */ +#define kernel_termios_to_user_termio(termio, termios) \ +({ \ + put_user((termios)->c_iflag, &(termio)->c_iflag); \ + put_user((termios)->c_oflag, &(termio)->c_oflag); \ + put_user((termios)->c_cflag, &(termio)->c_cflag); \ + put_user((termios)->c_lflag, &(termio)->c_lflag); \ + put_user((termios)->c_line, &(termio)->c_line); \ + copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ +}) + +#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios)) +#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios)) + +#endif /* __KERNEL__ */ + +#endif /* _S390_TERMIOS_H */ diff --git a/include/asm-s390x/timex.h b/include/asm-s390x/timex.h new file mode 100644 index 000000000..ad97e0eda --- /dev/null +++ b/include/asm-s390x/timex.h @@ -0,0 +1,29 @@ +/* + * include/asm-s390/timex.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * + * Derived from "include/asm-i386/timex.h" + * Copyright (C) 1992, Linus Torvalds + */ + +#ifndef _ASM_S390_TIMEX_H +#define _ASM_S390_TIMEX_H + +#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ +#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */ +#define FINETUNE ((((((long)LATCH * HZ - CLOCK_TICK_RATE) << SHIFT_HZ) * \ + (1000000/CLOCK_TICK_FACTOR) / (CLOCK_TICK_RATE/CLOCK_TICK_FACTOR)) \ + << (SHIFT_SCALE-SHIFT_HZ)) / HZ) + +typedef unsigned long cycles_t; + +extern cycles_t cacheflush_time; + +static inline cycles_t get_cycles(void) +{ + return 0; +} + +#endif diff --git a/include/asm-s390x/todclk.h b/include/asm-s390x/todclk.h new file mode 100644 index 000000000..92a27a9d4 --- /dev/null +++ b/include/asm-s390x/todclk.h @@ -0,0 +1,19 @@ +/* + * File...........: linux/include/asm/todclk.h + * Author(s)......: Holger Smolinski <Holger.Smolinski@de.ibm.com> + * Bugreports.to..: <Linux390@de.ibm.com> + * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000 + * + * History of changes (starts July 2000) + */ + +#ifndef __ASM_TODCLK_H +#define __ASM_TODCLK_H + +#define TOD_uSEC (0x1000ULL) +#define TOD_mSEC (1000 * TOD_uSEC) +#define TOD_SEC (1000 * TOD_mSEC) +#define TOD_MIN (60 * TOD_SEC) +#define TOD_HOUR (60 * TOD_MIN) + +#endif diff --git a/include/asm-s390x/types.h b/include/asm-s390x/types.h new file mode 100644 index 000000000..b3eca30be --- /dev/null +++ b/include/asm-s390x/types.h @@ -0,0 +1,69 @@ +/* + * include/asm-s390/types.h + * + * S390 version + * + * Derived from "include/asm-i386/types.h" + */ + +#ifndef _S390_TYPES_H +#define _S390_TYPES_H + +typedef unsigned short umode_t; + +/* + * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the + * header files exported to user space + */ + +typedef __signed__ char __s8; +typedef unsigned char __u8; + +typedef __signed__ short __s16; +typedef unsigned short __u16; + +typedef __signed__ int __s32; +typedef unsigned int __u32; + +typedef __signed__ long __s64; +typedef unsigned long __u64; + +/* + * A address type so that arithmetic can be done on it & it can be upgraded to + * 64 bit when neccessary + */ + +typedef unsigned long addr_t; +typedef signed long saddr_t; + +/* + * These aren't exported outside the kernel to avoid name space clashes + */ +#ifdef __KERNEL__ + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +typedef signed char s8; +typedef unsigned char u8; + +typedef signed short s16; +typedef unsigned short u16; + +typedef signed int s32; +typedef unsigned int u32; + +typedef signed long s64; +typedef unsigned long u64; + +#define BITS_PER_LONG 64 + +typedef u32 dma_addr_t; + +#endif /* __KERNEL__ */ +#endif diff --git a/include/asm-s390x/uaccess.h b/include/asm-s390x/uaccess.h new file mode 100644 index 000000000..419d87afc --- /dev/null +++ b/include/asm-s390x/uaccess.h @@ -0,0 +1,559 @@ +/* + * include/asm-s390/uaccess.h + * + * S390 version + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Author(s): Hartmut Penner (hpenner@de.ibm.com), + * Martin Schwidefsky (schwidefsky@de.ibm.com) + * + * Derived from "include/asm-i386/uaccess.h" + */ +#ifndef __S390_UACCESS_H +#define __S390_UACCESS_H + +/* + * User space memory access functions + */ +#include <linux/sched.h> + +#define VERIFY_READ 0 +#define VERIFY_WRITE 1 + + +/* + * The fs value determines whether argument validity checking should be + * performed or not. If get_fs() == USER_DS, checking is performed, with + * get_fs() == KERNEL_DS, checking is bypassed. + * + * For historical reasons, these macros are grossly misnamed. + */ + +#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) + + +#define KERNEL_DS MAKE_MM_SEG(0) +#define USER_DS MAKE_MM_SEG(1) + +#define get_ds() (KERNEL_DS) +#define get_fs() (current->addr_limit) +#define set_fs(x) ({asm volatile("sar 4,%0"::"a" ((x).ar4));\ + current->addr_limit = (x);}) + +#define segment_eq(a,b) ((a).ar4 == (b).ar4) + + +#define __access_ok(addr,size) (1) + +#define access_ok(type,addr,size) __access_ok(addr,size) + +extern inline int verify_area(int type, const void * addr, unsigned long size) +{ + return access_ok(type,addr,size)?0:-EFAULT; +} + +/* + * The exception table consists of pairs of addresses: the first is the + * address of an instruction that is allowed to fault, and the second is + * the address at which the program should continue. No registers are + * modified, so it is entirely up to the continuation code to figure out + * what to do. + * + * All the routines below use bits of fixup code that are out of line + * with the main instruction path. This means when everything is well, + * we don't even have to jump over them. Further, they do not intrude + * on our cache or tlb entries. + */ + +struct exception_table_entry +{ + unsigned long insn, fixup; +}; + +/* Returns 0 if exception not found and fixup otherwise. */ +extern unsigned long search_exception_table(unsigned long); + + +/* + * These are the main single-value transfer routines. They automatically + * use the right size if we just have the right pointer type. + */ + +extern inline int __put_user_asm_8(__u64 x, void *ptr) +{ + int err; + + __asm__ __volatile__ ( " sr %1,%1\n" + " la 4,%0\n" + " sacf 512\n" + "0: stg %2,0(4)\n" + "1: sacf 0\n" + ".section .fixup,\"ax\"\n" + "2: lhi %1,%h3\n" + " jg 1b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + " .align 8\n" + " .quad 0b,2b\n" + ".previous" + : "=m" (*((__u64*) ptr)) , "=&d" (err) + : "d" (x), "K" (-EFAULT) + : "4" ); + return err; +} +extern inline int __put_user_asm_4(__u32 x, void *ptr) +{ + int err; + + __asm__ __volatile__ ( " sr %1,%1\n" + " la 4,%0\n" + " sacf 512\n" + "0: st %2,0(4)\n" + "1: sacf 0\n" + ".section .fixup,\"ax\"\n" + "2: lhi %1,%h3\n" + " jg 1b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + " .align 8\n" + " .quad 0b,2b\n" + ".previous" + : "=m" (*((__u32*) ptr)) , "=&d" (err) + : "d" (x), "K" (-EFAULT) + : "4" ); + return err; +} + +extern inline int __put_user_asm_2(__u16 x, void *ptr) +{ + int err; + + __asm__ __volatile__ ( " sr %1,%1\n" + " la 4,%0\n" + " sacf 512\n" + "0: sth %2,0(4)\n" + "1: sacf 0\n" + ".section .fixup,\"ax\"\n" + "2: lhi %1,%h3\n" + " jg 1b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + " .align 8\n" + " .quad 0b,2b\n" + ".previous" + : "=m" (*((__u16*) ptr)) , "=&d" (err) + : "d" (x), "K" (-EFAULT) + : "4" ); + return err; +} + +extern inline int __put_user_asm_1(__u8 x, void *ptr) +{ + int err; + + __asm__ __volatile__ ( " sr %1,%1\n" + " la 4,%0\n" + " sacf 512\n" + "0: stc %2,0(4)\n" + "1: sacf 0\n" + ".section .fixup,\"ax\"\n" + "2: lhi %1,%h3\n" + " jg 1b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + " .align 8\n" + " .quad 0b,2b\n" + ".previous" + : "=m" (*((__u8*) ptr)) , "=&d" (err) + : "d" (x), "K" (-EFAULT) + : "1", "4" ); + return err; +} + +/* + * (u?)(u64) ... autsch, but that the only way we can suppress the + * warnings when compiling binfmt_elf.c + */ +#define __put_user(x, ptr) \ +({ \ + int __pu_err; \ + switch (sizeof (*(ptr))) { \ + case 1: \ + __pu_err = __put_user_asm_1((__u8)(__u64)(x),(ptr));\ + break; \ + case 2: \ + __pu_err = __put_user_asm_2((__u16)(__u64)(x),(ptr));\ + break; \ + case 4: \ + __pu_err = __put_user_asm_4((__u32)(__u64)(x),(ptr));\ + break; \ + case 8: \ + __pu_err = __put_user_asm_8((__u64)(x),(ptr));\ + break; \ + default: \ + __pu_err = __put_user_bad(); \ + break; \ + } \ + __pu_err; \ +}) + +#define put_user(x, ptr) \ +({ \ + long __pu_err = -EFAULT; \ + __typeof__(*(ptr)) *__pu_addr = (ptr); \ + __typeof__(*(ptr)) __x = (x); \ + if (__access_ok((long)__pu_addr,sizeof(*(ptr)))) { \ + __pu_err = 0; \ + __put_user((__x), (__pu_addr)); \ + } \ + __pu_err; \ +}) + +extern int __put_user_bad(void); + + +#define __get_user_asm_8(x, ptr, err) \ +({ \ + __asm__ __volatile__ ( " sr %1,%1\n" \ + " la 4,%2\n" \ + " sacf 512\n" \ + "0: lg %0,0(4)\n" \ + "1: sacf 0\n" \ + ".section .fixup,\"ax\"\n" \ + "2: lhi %1,%h3\n" \ + " jg 1b\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 8\n" \ + " .quad 0b,2b\n" \ + ".previous" \ + : "=d" (x) , "=&d" (err) \ + : "m" (*(const __u64*)(ptr)),"K" (-EFAULT) \ + : "4" ); \ +}) +#define __get_user_asm_4(x, ptr, err) \ +({ \ + __asm__ __volatile__ ( " sr %1,%1\n" \ + " la 4,%2\n" \ + " sacf 512\n" \ + "0: l %0,0(4)\n" \ + "1: sacf 0\n" \ + ".section .fixup,\"ax\"\n" \ + "2: lhi %1,%h3\n" \ + " jg 1b\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 8\n" \ + " .quad 0b,2b\n" \ + ".previous" \ + : "=d" (x) , "=&d" (err) \ + : "m" (*(const __u32*)(ptr)),"K" (-EFAULT) \ + : "4" ); \ +}) + +#define __get_user_asm_2(x, ptr, err) \ +({ \ + __asm__ __volatile__ ( " sr %1,%1\n" \ + " la 4,%2\n" \ + " sacf 512\n" \ + "0: lh %0,0(4)\n" \ + "1: sacf 0\n" \ + ".section .fixup,\"ax\"\n" \ + "2: lhi %1,%h3\n" \ + " jg 1b\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 8\n" \ + " .quad 0b,2b\n" \ + ".previous" \ + : "=d" (x) , "=&d" (err) \ + : "m" (*(const __u16*)(ptr)),"K" (-EFAULT) \ + : "4" ); \ +}) + +#define __get_user_asm_1(x, ptr, err) \ +({ \ + __asm__ __volatile__ ( " sr %1,%1\n" \ + " la 4,%2\n" \ + " sr %0,%0\n" \ + " sacf 512\n" \ + "0: ic %0,0(4)\n" \ + "1: sacf 0\n" \ + ".section .fixup,\"ax\"\n" \ + "2: lhi %1,%h3\n" \ + " jg 1b\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 8\n" \ + " .quad 0b,2b\n" \ + ".previous" \ + : "=d" (x) , "=&d" (err) \ + : "m" (*(const __u8*)(ptr)),"K" (-EFAULT) \ + : "4" ); \ +}) + +#define __get_user(x, ptr) \ +({ \ + int __gu_err; \ + switch (sizeof(*(ptr))) { \ + case 1: \ + __get_user_asm_1(x,ptr,__gu_err); \ + break; \ + case 2: \ + __get_user_asm_2(x,ptr,__gu_err); \ + break; \ + case 4: \ + __get_user_asm_4(x,ptr,__gu_err); \ + break; \ + case 8: \ + __get_user_asm_8(x,ptr,__gu_err); \ + break; \ + default: \ + (x) = 0; \ + __gu_err = __get_user_bad(); \ + break; \ + } \ + __gu_err; \ +}) + +#define get_user(x, ptr) \ +({ \ + long __gu_err = -EFAULT; \ + __typeof__(ptr) __gu_addr = (ptr); \ + __typeof__(*(ptr)) __x; \ + if (__access_ok((long)__gu_addr,sizeof(*(ptr)))) { \ + __gu_err = 0; \ + __get_user((__x), (__gu_addr)); \ + (x) = __x; \ + } \ + else \ + (x) = 0; \ + __gu_err; \ +}) + +extern int __get_user_bad(void); + +/* + * access register are set up, that 4 points to secondary (user) , 2 to primary (kernel) + */ + +asmlinkage void __copy_from_user_fixup(void /* special calling convention */); +asmlinkage void __copy_to_user_fixup(void /* special calling convention */); + +extern inline unsigned long +__copy_to_user_asm(void* to, const void* from, long n) +{ + + __asm__ __volatile__ ( " lgr 2,%2\n" + " lgr 4,%1\n" + " lgr 3,%0\n" + " lgr 5,3\n" + " sacf 512\n" + "0: mvcle 4,2,0\n" + " jo 0b\n" + " sacf 0\n" + " lgr %0,3\n" + ".section __ex_table,\"a\"\n" + " .align 8\n" + " .quad 0b,__copy_to_user_fixup\n" + ".previous" + : "+&d" (n) : "d" (to), "d" (from) + : "1", "2", "3", "4", "5" ); + return n; +} + +#define __copy_to_user(to, from, n) \ +({ \ + __copy_to_user_asm(to,from,n); \ +}) + +#define copy_to_user(to, from, n) \ +({ \ + long err = 0; \ + __typeof__(n) __n = (n); \ + if (__access_ok(to,__n)) { \ + err = __copy_to_user_asm(to,from,__n); \ + } \ + else \ + err = __n; \ + err; \ +}) + +extern inline unsigned long +__copy_from_user_asm(void* to, const void* from, long n) +{ + __asm__ __volatile__ ( " lgr 2,%1\n" + " lgr 4,%2\n" + " lgr 3,%0\n" + " lgr 5,3\n" + " sacf 512\n" + "0: mvcle 2,4,0\n" + " jo 0b\n" + " sacf 0\n" + " lgr %0,5\n" + ".section __ex_table,\"a\"\n" + " .align 8\n" + " .quad 0b,__copy_from_user_fixup\n" + ".previous" + : "+&d" (n) : "d" (to), "d" (from) + : "1", "2", "3", "4", "5" ); + return n; +} + + +#define __copy_from_user(to, from, n) \ +({ \ + __copy_from_user_asm(to,from,n); \ +}) + +#define copy_from_user(to, from, n) \ +({ \ + long err = 0; \ + __typeof__(n) __n = (n); \ + if (__access_ok(from,__n)) { \ + err = __copy_from_user_asm(to,from,__n); \ + } \ + else \ + err = __n; \ + err; \ +}) + +/* + * Copy a null terminated string from userspace. + */ + +static inline long +__strncpy_from_user(char *dst, const char *src, long count) +{ + long len; + __asm__ __volatile__ ( " slgr %0,%0\n" + " lgr 2,%1\n" + " lgr 4,%2\n" + " slr 3,3\n" + " sacf 512\n" + "0: ic 3,0(%0,4)\n" + "1: stc 3,0(%0,2)\n" + " aghi %0,1\n" + " cgr %0,%3\n" + " je 2f\n" + " ltr 3,3\n" + " jne 0b\n" + "2: sacf 0\n" + "3:\n" + ".section .fixup,\"ax\"\n" + "4: lghi %0,%h4\n" + " jg 3b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + " .align 8\n" + " .quad 0b,4b\n" + " .quad 1b,4b\n" + ".previous" + : "=&a" (len) + : "a" (dst), "d" (src), "d" (count), + "K" (-EFAULT) + : "2" ,"3", "4" ); + return len; +} + +static inline long +strncpy_from_user(char *dst, const char *src, long count) +{ + long res = -EFAULT; + if (access_ok(VERIFY_READ, src, 1)) + res = __strncpy_from_user(dst, src, count); + return res; +} + +/* + * Return the size of a string (including the ending 0) + * + * Return 0 for error + */ +static inline unsigned long +strnlen_user(const char * src, unsigned long n) +{ +#if 0 + __asm__ __volatile__ (" algr %0,%1\n" + " slgr 0,0\n" + " lgr 4,%1\n" + " sacf 512\n" + "0: srst %0,4\n" + " jo 0b\n" + " slgr %0,%1\n" + " aghi %0,1\n" + "1: sacf 0\n" + ".section .fixup,\"ax\"\n" + "2: slgr %0,%0\n" + " jg 1b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + " .align 8\n" + " .quad 0b,2b\n" + ".previous" + : "+&a" (n) : "d" (src) + : "cc", "0", "4" ); +#else + __asm__ __volatile__ (" lgr 4,%1\n" + " sacf 512\n" + "0: cli 0(4),0x00\n" + " la 4,1(4)\n" + " je 1f\n" + " brctg %0,0b\n" + "1: lgr %0,4\n" + " slgr %0,%1\n" + "2: sacf 0\n" + ".section .fixup,\"ax\"\n" + "3: slgr %0,%0\n" + " jg 2b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + " .align 8\n" + " .quad 0b,3b\n" + ".previous" + : "+&a" (n) : "d" (src) + : "cc", "4" ); +#endif + return n; +} +#define strlen_user(str) strnlen_user(str, ~0UL) + +/* + * Zero Userspace + */ + +static inline unsigned long +__clear_user(void *to, unsigned long n) +{ + __asm__ __volatile__ ( " sacf 512\n" + " lgr 4,%1\n" + " lgr 5,%0\n" + " sgr 2,2\n" + " sgr 3,3\n" + "0: mvcle 4,2,0\n" + " jo 0b\n" + "1: sacf 0\n" + " lgr %0,5\n" + ".section __ex_table,\"a\"\n" + " .align 8\n" + " .quad 0b,__copy_to_user_fixup\n" + ".previous" + : "+&a" (n) + : "a" (to) + : "cc", "1", "2", "3", "4", "5" ); + return n; +} + +static inline unsigned long +clear_user(void *to, unsigned long n) +{ + if (access_ok(VERIFY_WRITE, to, n)) + n = __clear_user(to, n); + return n; +} + +#endif /* _S390_UACCESS_H */ + + + + + diff --git a/include/asm-s390x/ucontext.h b/include/asm-s390x/ucontext.h new file mode 100644 index 000000000..d4e39ae77 --- /dev/null +++ b/include/asm-s390x/ucontext.h @@ -0,0 +1,22 @@ +/* + * include/asm-s390/ucontext.h + * + * S390 version + * + * Derived from "include/asm-i386/ucontext.h" + */ + +#ifndef _ASM_S390_UCONTEXT_H +#define _ASM_S390_UCONTEXT_H + +struct ucontext { + unsigned long uc_flags; + struct ucontext *uc_link; + stack_t uc_stack; + sigset_t uc_sigmask; /* mask last for extensibility */ + struct sigcontext *sc; /* Added for pthread support */ +}; + + + +#endif /* !_ASM_S390_UCONTEXT_H */ diff --git a/include/asm-s390x/unaligned.h b/include/asm-s390x/unaligned.h new file mode 100644 index 000000000..8ee86dbed --- /dev/null +++ b/include/asm-s390x/unaligned.h @@ -0,0 +1,24 @@ +/* + * include/asm-s390/unaligned.h + * + * S390 version + * + * Derived from "include/asm-i386/unaligned.h" + */ + +#ifndef __S390_UNALIGNED_H +#define __S390_UNALIGNED_H + +/* + * The S390 can do unaligned accesses itself. + * + * The strange macros are there to make sure these can't + * be misused in a way that makes them not work on other + * architectures where unaligned accesses aren't as simple. + */ + +#define get_unaligned(ptr) (*(ptr)) + +#define put_unaligned(val, ptr) ((void)( *(ptr) = (val) )) + +#endif diff --git a/include/asm-s390x/unistd.h b/include/asm-s390x/unistd.h new file mode 100644 index 000000000..1ac8474ee --- /dev/null +++ b/include/asm-s390x/unistd.h @@ -0,0 +1,346 @@ +/* + * include/asm-s390/unistd.h + * + * S390 version + * + * Derived from "include/asm-i386/unistd.h" + */ + +#ifndef _ASM_S390_UNISTD_H_ +#define _ASM_S390_UNISTD_H_ + +/* + * This file contains the system call numbers. + */ + +#define __NR_exit 1 +#define __NR_fork 2 +#define __NR_read 3 +#define __NR_write 4 +#define __NR_open 5 +#define __NR_close 6 +#define __NR_creat 8 +#define __NR_link 9 +#define __NR_unlink 10 +#define __NR_execve 11 +#define __NR_chdir 12 +#define __NR_mknod 14 +#define __NR_chmod 15 +#define __NR_lseek 19 +#define __NR_getpid 20 +#define __NR_mount 21 +#define __NR_umount 22 +#define __NR_ptrace 26 +#define __NR_alarm 27 +#define __NR_pause 29 +#define __NR_utime 30 +#define __NR_access 33 +#define __NR_nice 34 +#define __NR_sync 36 +#define __NR_kill 37 +#define __NR_rename 38 +#define __NR_mkdir 39 +#define __NR_rmdir 40 +#define __NR_dup 41 +#define __NR_pipe 42 +#define __NR_times 43 +#define __NR_brk 45 +#define __NR_signal 48 +#define __NR_acct 51 +#define __NR_umount2 52 +#define __NR_ioctl 54 +#define __NR_fcntl 55 +#define __NR_setpgid 57 +#define __NR_umask 60 +#define __NR_chroot 61 +#define __NR_ustat 62 +#define __NR_dup2 63 +#define __NR_getppid 64 +#define __NR_getpgrp 65 +#define __NR_setsid 66 +#define __NR_sigaction 67 +#define __NR_sigsuspend 72 +#define __NR_sigpending 73 +#define __NR_sethostname 74 +#define __NR_setrlimit 75 +#define __NR_getrusage 77 +#define __NR_gettimeofday 78 +#define __NR_settimeofday 79 +#define __NR_symlink 83 +#define __NR_readlink 85 +#define __NR_uselib 86 +#define __NR_swapon 87 +#define __NR_reboot 88 +#define __NR_readdir 89 +#define __NR_mmap 90 +#define __NR_munmap 91 +#define __NR_truncate 92 +#define __NR_ftruncate 93 +#define __NR_fchmod 94 +#define __NR_getpriority 96 +#define __NR_setpriority 97 +#define __NR_statfs 99 +#define __NR_fstatfs 100 +#define __NR_socketcall 102 +#define __NR_syslog 103 +#define __NR_setitimer 104 +#define __NR_getitimer 105 +#define __NR_stat 106 +#define __NR_lstat 107 +#define __NR_fstat 108 +#define __NR_vhangup 111 +#define __NR_idle 112 +#define __NR_wait4 114 +#define __NR_swapoff 115 +#define __NR_sysinfo 116 +#define __NR_ipc 117 +#define __NR_fsync 118 +#define __NR_sigreturn 119 +#define __NR_clone 120 +#define __NR_setdomainname 121 +#define __NR_uname 122 +#define __NR_adjtimex 124 +#define __NR_mprotect 125 +#define __NR_sigprocmask 126 +#define __NR_create_module 127 +#define __NR_init_module 128 +#define __NR_delete_module 129 +#define __NR_get_kernel_syms 130 +#define __NR_quotactl 131 +#define __NR_getpgid 132 +#define __NR_fchdir 133 +#define __NR_bdflush 134 +#define __NR_sysfs 135 +#define __NR_personality 136 +#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ +#define __NR_getdents 141 +#define __NR_select 142 +#define __NR_flock 143 +#define __NR_msync 144 +#define __NR_readv 145 +#define __NR_writev 146 +#define __NR_getsid 147 +#define __NR_fdatasync 148 +#define __NR__sysctl 149 +#define __NR_mlock 150 +#define __NR_munlock 151 +#define __NR_mlockall 152 +#define __NR_munlockall 153 +#define __NR_sched_setparam 154 +#define __NR_sched_getparam 155 +#define __NR_sched_setscheduler 156 +#define __NR_sched_getscheduler 157 +#define __NR_sched_yield 158 +#define __NR_sched_get_priority_max 159 +#define __NR_sched_get_priority_min 160 +#define __NR_sched_rr_get_interval 161 +#define __NR_nanosleep 162 +#define __NR_mremap 163 +#define __NR_query_module 167 +#define __NR_poll 168 +#define __NR_nfsservctl 169 +#define __NR_prctl 172 +#define __NR_rt_sigreturn 173 +#define __NR_rt_sigaction 174 +#define __NR_rt_sigprocmask 175 +#define __NR_rt_sigpending 176 +#define __NR_rt_sigtimedwait 177 +#define __NR_rt_sigqueueinfo 178 +#define __NR_rt_sigsuspend 179 +#define __NR_pread 180 +#define __NR_pwrite 181 +#define __NR_getcwd 183 +#define __NR_capget 184 +#define __NR_capset 185 +#define __NR_sigaltstack 186 +#define __NR_sendfile 187 +#define __NR_vfork 190 +#define __NR_getrlimit 191 /* SuS compliant getrlimit */ +#define __NR_lchown 198 +#define __NR_getuid 199 +#define __NR_getgid 200 +#define __NR_geteuid 201 +#define __NR_getegid 202 +#define __NR_setreuid 203 +#define __NR_setregid 204 +#define __NR_getgroups 205 +#define __NR_setgroups 206 +#define __NR_fchown 207 +#define __NR_setresuid 208 +#define __NR_getresuid 209 +#define __NR_setresgid 210 +#define __NR_getresgid 211 +#define __NR_chown 212 +#define __NR_setuid 213 +#define __NR_setgid 214 +#define __NR_setfsuid 215 +#define __NR_setfsgid 216 +#define __NR_pivot_root 217 +#define __NR_mincore 218 +#define __NR_madvise 219 +#define __NR_getdents64 220 +#define __NR_fcntl64 221 + + +/* user-visible error numbers are in the range -1 - -122: see <asm-s390/errno.h> */ + +#define __syscall_return(type, res) \ +do { \ + if ((unsigned long)(res) >= (unsigned long)(-125)) { \ + errno = -(res); \ + res = -1; \ + } \ + return (type) (res); \ +} while (0) + +#define _svc_clobber "2", "cc", "memory" + +#define _syscall0(type,name) \ +type name(void) { \ + long __res; \ + __asm__ __volatile__ ( \ + " svc %b1\n" \ + " lr %0,2" \ + : "=d" (__res) \ + : "i" (__NR_##name) \ + : _svc_clobber ); \ + __syscall_return(type,__res); \ +} + +#define _syscall1(type,name,type1,arg1) \ +type name(type1 arg1) { \ + register type1 __arg1 asm("2") = arg1; \ + long __res; \ + __asm__ __volatile__ ( \ + " svc %b1\n" \ + " lr %0,2" \ + : "=d" (__res) \ + : "i" (__NR_##name), \ + "d" (__arg1) \ + : _svc_clobber ); \ + __syscall_return(type,__res); \ +} + +#define _syscall2(type,name,type1,arg1,type2,arg2) \ +type name(type1 arg1, type2 arg2) { \ + register type1 __arg1 asm("2") = arg1; \ + register type2 __arg2 asm("3") = arg2; \ + long __res; \ + __asm__ __volatile__ ( \ + " svc %b1\n" \ + " lr %0,2" \ + : "=d" (__res) \ + : "i" (__NR_##name), \ + "d" (__arg1), \ + "d" (__arg2) \ + : _svc_clobber ); \ + __syscall_return(type,__res); \ +} + +#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3)\ +type name(type1 arg1, type2 arg2, type3 arg3) { \ + register type1 __arg1 asm("2") = arg1; \ + register type2 __arg2 asm("3") = arg2; \ + register type3 __arg3 asm("4") = arg3; \ + long __res; \ + __asm__ __volatile__ ( \ + " svc %b1\n" \ + " lr %0,2" \ + : "=d" (__res) \ + : "i" (__NR_##name), \ + "d" (__arg1), \ + "d" (__arg2), \ + "d" (__arg3) \ + : _svc_clobber ); \ + __syscall_return(type,__res); \ +} + +#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,\ + type4,name4) \ +type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \ + register type1 __arg1 asm("2") = arg1; \ + register type2 __arg2 asm("3") = arg2; \ + register type3 __arg3 asm("4") = arg3; \ + register type4 __arg4 asm("5") = arg4; \ + long __res; \ + __asm__ __volatile__ ( \ + " svc %b1\n" \ + " lr %0,2" \ + : "=d" (__res) \ + : "i" (__NR_##name), \ + "d" (__arg1), \ + "d" (__arg2), \ + "d" (__arg3), \ + "d" (__arg4) \ + : _svc_clobber ); \ + __syscall_return(type,__res); \ +} + +#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,\ + type4,name4,type5,name5) \ +type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, \ + type5 arg5) { \ + register type1 __arg1 asm("2") = arg1; \ + register type2 __arg2 asm("3") = arg2; \ + register type3 __arg3 asm("4") = arg3; \ + register type4 __arg4 asm("5") = arg4; \ + register type5 __arg5 asm("6") = arg5; \ + long __res; \ + __asm__ __volatile__ ( \ + " svc %b1\n" \ + " lr %0,2" \ + : "=d" (__res) \ + : "i" (__NR_##name), \ + "d" (__arg1), \ + "d" (__arg2), \ + "d" (__arg3), \ + "d" (__arg4), \ + "d" (__arg5) \ + : _svc_clobber ); \ + __syscall_return(type,__res); \ +} + +#ifdef __KERNEL_SYSCALLS__ + +/* + * we need this inline - forking from kernel space will result + * in NO COPY ON WRITE (!!!), until an execve is executed. This + * is no problem, but for the stack. This is handled by not letting + * main() use the stack at all after fork(). Thus, no function + * calls - which means inline code for fork too, as otherwise we + * would use the stack upon exit from 'fork()'. + * + * Actually only pause and fork are needed inline, so that there + * won't be any messing with the stack from main(), but we define + * some others too. + */ +#define __NR__exit __NR_exit +static inline _syscall0(int,idle) +static inline _syscall0(int,pause) +static inline _syscall0(int,sync) +static inline _syscall0(pid_t,setsid) +static inline _syscall3(int,write,int,fd,const char *,buf,off_t,count) +static inline _syscall3(int,read,int,fd,char *,buf,off_t,count) +static inline _syscall3(off_t,lseek,int,fd,off_t,offset,int,count) +static inline _syscall1(int,dup,int,fd) +static inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp) +static inline _syscall3(int,open,const char *,file,int,flag,int,mode) +static inline _syscall1(int,close,int,fd) +static inline _syscall1(int,_exit,int,exitcode) +static inline _syscall1(int,delete_module,const char *,name) +static inline _syscall2(long,stat,char *,filename,struct stat *,statbuf) + +extern int sys_wait4(int, int *, int, struct rusage *); +static inline pid_t waitpid(int pid, int * wait_stat, int flags) +{ + return sys_wait4(pid, wait_stat, flags, NULL); +} + +static inline pid_t wait(int * wait_stat) +{ + return waitpid(-1,wait_stat,0); +} + +#endif + +#endif /* _ASM_S390_UNISTD_H_ */ diff --git a/include/asm-s390x/user.h b/include/asm-s390x/user.h new file mode 100644 index 000000000..2e91b881b --- /dev/null +++ b/include/asm-s390x/user.h @@ -0,0 +1,77 @@ +/* + * include/asm-s390/user.h + * + * S390 version + * + * Derived from "include/asm-i386/usr.h" + */ + +#ifndef _S390_USER_H +#define _S390_USER_H + +#include <asm/page.h> +#include <linux/ptrace.h> +/* Core file format: The core file is written in such a way that gdb + can understand it and provide useful information to the user (under + linux we use the 'trad-core' bfd). There are quite a number of + obstacles to being able to view the contents of the floating point + registers, and until these are solved you will not be able to view the + contents of them. Actually, you can read in the core file and look at + the contents of the user struct to find out what the floating point + registers contain. + The actual file contents are as follows: + UPAGE: 1 page consisting of a user struct that tells gdb what is present + in the file. Directly after this is a copy of the task_struct, which + is currently not used by gdb, but it may come in useful at some point. + All of the registers are stored as part of the upage. The upage should + always be only one page. + DATA: The data area is stored. We use current->end_text to + current->brk to pick up all of the user variables, plus any memory + that may have been malloced. No attempt is made to determine if a page + is demand-zero or if a page is totally unused, we just cover the entire + range. All of the addresses are rounded in such a way that an integral + number of pages is written. + STACK: We need the stack information in order to get a meaningful + backtrace. We need to write the data from (esp) to + current->start_stack, so we round each of these off in order to be able + to write an integer number of pages. + The minimum core file size is 3 pages, or 12288 bytes. +*/ + + +/* + * This is the old layout of "struct pt_regs", and + * is still the layout used by user mode (the new + * pt_regs doesn't have all registers as the kernel + * doesn't use the extra segment registers) + */ + +/* When the kernel dumps core, it starts by dumping the user struct - + this will be used by gdb to figure out where the data and stack segments + are within the file, and what virtual addresses to use. */ +struct user { +/* We start with the registers, to mimic the way that "memory" is returned + from the ptrace(3,...) function. */ + struct user_regs_struct regs; /* Where the registers are actually stored */ +/* The rest of this junk is to help gdb figure out what goes where */ + size_t u_tsize; /* Text segment size (pages). */ + size_t u_dsize; /* Data segment size (pages). */ + size_t u_ssize; /* Stack segment size (pages). */ + unsigned long start_code; /* Starting virtual address of text. */ + unsigned long start_stack; /* Starting virtual address of stack area. + This is actually the bottom of the stack, + the top of the stack is always found in the + gprs[15] register. */ + long int signal; /* Signal that caused the core dump. */ + struct user_regs_struct *u_ar0; + /* Used by gdb to help find the values for */ + /* the registers. */ + unsigned long magic; /* To uniquely identify a core file */ + char u_comm[32]; /* User command that was responsible */ +}; +#define NBPG PAGE_SIZE +#define UPAGES 1 +#define HOST_TEXT_START_ADDR (u.start_code) +#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) + +#endif /* _S390_USER_H */ diff --git a/include/asm-s390x/xor.h b/include/asm-s390x/xor.h new file mode 100644 index 000000000..c82eb12a5 --- /dev/null +++ b/include/asm-s390x/xor.h @@ -0,0 +1 @@ +#include <asm-generic/xor.h> diff --git a/include/asm-sh/socket.h b/include/asm-sh/socket.h index 6bba7306e..b06e82455 100644 --- a/include/asm-sh/socket.h +++ b/include/asm-sh/socket.h @@ -43,6 +43,8 @@ #define SO_TIMESTAMP 29 #define SCM_TIMESTAMP SO_TIMESTAMP +#define SO_ACCEPTCONN 30 + /* Nast libc5 fixup - bletch */ #if defined(__KERNEL__) /* Socket types. */ diff --git a/include/asm-sh/termios.h b/include/asm-sh/termios.h index 106e675d9..f36d7ea3a 100644 --- a/include/asm-sh/termios.h +++ b/include/asm-sh/termios.h @@ -51,7 +51,7 @@ struct termio { #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IR - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IR - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ #define N_SYNC_PPP 14 diff --git a/include/asm-sparc/highmem.h b/include/asm-sparc/highmem.h index 179f1a3cb..9945bcb7e 100644 --- a/include/asm-sparc/highmem.h +++ b/include/asm-sparc/highmem.h @@ -2,7 +2,7 @@ * highmem.h: virtual kernel memory mappings for high memory * * Used in CONFIG_HIGHMEM systems for memory pages which - * are not addressable by direct kernel virtual adresses. + * are not addressable by direct kernel virtual addresses. * * Copyright (C) 1999 Gerhard Wichert, Siemens AG * Gerhard.Wichert@pdb.siemens.de diff --git a/include/asm-sparc/socket.h b/include/asm-sparc/socket.h index 256f5c165..330e18db3 100644 --- a/include/asm-sparc/socket.h +++ b/include/asm-sparc/socket.h @@ -1,4 +1,4 @@ -/* $Id: socket.h,v 1.15 2000/07/08 00:20:43 davem Exp $ */ +/* $Id: socket.h,v 1.16 2001/01/30 07:48:30 davem Exp $ */ #ifndef _ASM_SOCKET_H #define _ASM_SOCKET_H @@ -22,6 +22,7 @@ #define SO_SNDLOWAT 0x1000 #define SO_RCVTIMEO 0x2000 #define SO_SNDTIMEO 0x4000 +#define SO_ACCEPTCONN 0x8000 /* wha!??? */ #define SO_DONTLINGER (~SO_LINGER) /* Older SunOS compat. hack */ diff --git a/include/asm-sparc/termios.h b/include/asm-sparc/termios.h index d92fb867b..a05f65856 100644 --- a/include/asm-sparc/termios.h +++ b/include/asm-sparc/termios.h @@ -1,4 +1,4 @@ -/* $Id: termios.h,v 1.30 1999/12/02 09:57:46 davem Exp $ */ +/* $Id: termios.h,v 1.31 2001/02/05 05:54:29 davem Exp $ */ #ifndef _SPARC_TERMIOS_H #define _SPARC_TERMIOS_H @@ -66,7 +66,7 @@ struct winsize { #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IrDa - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IrDa - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ #define N_SYNC_PPP 14 /* synchronous PPP */ diff --git a/include/asm-sparc64/socket.h b/include/asm-sparc64/socket.h index e28c54a97..25d2831af 100644 --- a/include/asm-sparc64/socket.h +++ b/include/asm-sparc64/socket.h @@ -1,4 +1,4 @@ -/* $Id: socket.h,v 1.8 2000/07/08 00:20:43 davem Exp $ */ +/* $Id: socket.h,v 1.9 2001/01/30 07:48:30 davem Exp $ */ #ifndef _ASM_SOCKET_H #define _ASM_SOCKET_H @@ -22,6 +22,7 @@ #define SO_SNDLOWAT 0x1000 #define SO_RCVTIMEO 0x2000 #define SO_SNDTIMEO 0x4000 +#define SO_ACCEPTCONN 0x8000 /* wha!??? */ #define SO_DONTLINGER (~SO_LINGER) /* Older SunOS compat. hack */ diff --git a/include/asm-sparc64/termios.h b/include/asm-sparc64/termios.h index 578e07251..082b57ac7 100644 --- a/include/asm-sparc64/termios.h +++ b/include/asm-sparc64/termios.h @@ -1,4 +1,4 @@ -/* $Id: termios.h,v 1.9 1999/12/02 09:57:53 davem Exp $ */ +/* $Id: termios.h,v 1.10 2001/02/05 05:54:29 davem Exp $ */ #ifndef _SPARC64_TERMIOS_H #define _SPARC64_TERMIOS_H @@ -66,7 +66,7 @@ struct winsize { #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IrDa - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IrDa - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ #define N_SYNC_PPP 14 /* synchronous PPP */ diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 4fce3f847..f5bfb4eac 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -82,13 +82,11 @@ typedef int acpi_dstate_t; /* PM_TMR masks */ #define ACPI_TMR_VAL_EXT 0x00000100 #define ACPI_TMR_MASK 0x00ffffff -#define ACPI_TMR_HZ 3580000 /* 3.58 MHz */ +#define ACPI_TMR_HZ 3579545 /* 3.58 MHz */ +#define ACPI_TMR_KHZ (ACPI_TMR_HZ / 1000) -/* strangess to avoid integer overflow */ #define ACPI_MICROSEC_TO_TMR_TICKS(val) \ - (((val) * (ACPI_TMR_HZ / 10000)) / 100) -#define ACPI_TMR_TICKS_TO_MICROSEC(ticks) \ - (((ticks) * 100) / (ACPI_TMR_HZ / 10000)) + (((val) * (ACPI_TMR_KHZ)) / 1000) /* PM2_CNT flags */ #define ACPI_ARB_DIS 0x01 @@ -147,6 +145,9 @@ enum ACPI_C1_TIME, ACPI_C2_TIME, ACPI_C3_TIME, + ACPI_C1_COUNT, + ACPI_C2_COUNT, + ACPI_C3_COUNT, ACPI_S0_SLP_TYP, ACPI_S1_SLP_TYP, ACPI_S5_SLP_TYP, diff --git a/include/linux/agp_backend.h b/include/linux/agp_backend.h index a9d0af58a..221be1c68 100644 --- a/include/linux/agp_backend.h +++ b/include/linux/agp_backend.h @@ -59,6 +59,12 @@ enum chipset_type { AMD_GENERIC, AMD_IRONGATE, ALI_M1541, + ALI_M1621, + ALI_M1631, + ALI_M1632, + ALI_M1641, + ALI_M1647, + ALI_M1651, ALI_GENERIC }; diff --git a/include/linux/coda_linux.h b/include/linux/coda_linux.h index f5e795919..de20ba7c3 100644 --- a/include/linux/coda_linux.h +++ b/include/linux/coda_linux.h @@ -17,7 +17,7 @@ #include <linux/sched.h> #include <linux/mm.h> #include <linux/vmalloc.h> -#include <linux/malloc.h> +#include <linux/slab.h> #include <linux/wait.h> #include <linux/types.h> #include <linux/fs.h> diff --git a/include/linux/dasd.h b/include/linux/dasd.h deleted file mode 100644 index 98c3c0424..000000000 --- a/include/linux/dasd.h +++ /dev/null @@ -1,225 +0,0 @@ - -#ifndef DASD_H -#define DASD_H - -/* First of all the external stuff */ -#include <linux/ioctl.h> -#include <linux/major.h> -#include <linux/wait.h> - -#define IOCTL_LETTER 'D' -#define BIODASDFORMAT _IO(IOCTL_LETTER,0) /* Format the volume or an extent */ -#define BIODASDDISABLE _IO(IOCTL_LETTER,1) /* Disable the volume (for Linux) */ -#define BIODASDENABLE _IO(IOCTL_LETTER,2) /* Enable the volume (for Linux) */ -/* Stuff for reading and writing the Label-Area to/from user space */ -#define BIODASDGTVLBL _IOR(IOCTL_LETTER,3,dasd_volume_label_t) -#define BIODASDSTVLBL _IOW(IOCTL_LETTER,4,dasd_volume_label_t) -#define BIODASDRWTB _IOWR(IOCTL_LETTER,5,int) -#define BIODASDRSID _IOR(IOCTL_LETTER,6,senseid_t) - -typedef -union { - char bytes[512]; - struct { - /* 80 Bytes of Label data */ - char identifier[4]; /* e.g. "LNX1", "VOL1" or "CMS1" */ - char label[6]; /* Given by user */ - char security; - char vtoc[5]; /* Null in "LNX1"-labelled partitions */ - char reserved0[5]; - long ci_size; - long blk_per_ci; - long lab_per_ci; - char reserved1[4]; - char owner[0xe]; - char no_part; - char reserved2[0x1c]; - /* 16 Byte of some information on the dasd */ - short blocksize; - char nopart; - char unused; - long unused2[3]; - /* 7*10 = 70 Bytes of partition data */ - struct { - char type; - long start; - long size; - char unused; - } part[7]; - } __attribute__ ((packed)) label; -} dasd_volume_label_t; - -typedef union { - struct { - unsigned long no; - unsigned int ct; - } __attribute__ ((packed)) input; - struct { - unsigned long noct; - } __attribute__ ((packed)) output; -} __attribute__ ((packed)) dasd_xlate_t; - -int dasd_init (void); -#ifdef MODULE -int init_module (void); -void cleanup_module (void); -#endif /* MODULE */ - -/* Definitions for blk.h */ -/* #define DASD_MAGIC 0x44415344 is ascii-"DASD" */ -/* #define dasd_MAGIC 0x64617364; is ascii-"dasd" */ -#define DASD_MAGIC 0xC4C1E2C4 /* is ebcdic-"DASD" */ -#define dasd_MAGIC 0x8481A284 /* is ebcdic-"dasd" */ -#define DASD_NAME "dasd" -#define DASD_PARTN_BITS 2 -#define DASD_MAX_DEVICES (256>>DASD_PARTN_BITS) - -#define MAJOR_NR DASD_MAJOR -#define PARTN_BITS DASD_PARTN_BITS - -#ifdef __KERNEL__ -/* Now lets turn to the internal sbtuff */ -/* - define the debug levels: - - 0 No debugging output to console or syslog - - 1 Log internal errors to syslog, ignore check conditions - - 2 Log internal errors and check conditions to syslog - - 3 Log internal errors to console, log check conditions to syslog - - 4 Log internal errors and check conditions to console - - 5 panic on internal errors, log check conditions to console - - 6 panic on both, internal errors and check conditions - */ -#define DASD_DEBUG 4 - -#define DASD_PROFILE -/* - define the level of paranoia - - 0 quite sure, that things are going right - - 1 sanity checking, only to avoid panics - - 2 normal sanity checking - - 3 extensive sanity checks - - 4 exhaustive debug messages - */ -#define DASD_PARANOIA 2 - -/* - define the depth of flow control, which is logged as a check condition - - 0 No flow control messages - - 1 Entry of functions logged like check condition - - 2 Entry and exit of functions logged like check conditions - - 3 Internal structure broken down - - 4 unrolling of loops,... - */ -#define DASD_FLOW_CONTROL 0 - -#if DASD_DEBUG > 0 -#define PRINT_DEBUG(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) -#define PRINT_INFO(x...) printk ( KERN_INFO PRINTK_HEADER x ) -#define PRINT_WARN(x...) printk ( KERN_WARNING PRINTK_HEADER x ) -#define PRINT_ERR(x...) printk ( KERN_ERR PRINTK_HEADER x ) -#define PRINT_FATAL(x...) panic ( PRINTK_HEADER x ) -#else -#define PRINT_DEBUG(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) -#define PRINT_INFO(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) -#define PRINT_WARN(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) -#define PRINT_ERR(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) -#define PRINT_FATAL(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) -#endif /* DASD_DEBUG */ - -#define INTERNAL_ERRMSG(x,y...) \ -"Internal error: in file " __FILE__ " line: %d: " x, __LINE__, y -#define INTERNAL_CHKMSG(x,y...) \ -"Inconsistency: in file " __FILE__ " line: %d: " x, __LINE__, y -#define INTERNAL_FLWMSG(x,y...) \ -"Flow control: file " __FILE__ " line: %d: " x, __LINE__, y - -#if DASD_DEBUG > 4 -#define INTERNAL_ERROR(x...) PRINT_FATAL ( INTERNAL_ERRMSG ( x ) ) -#elif DASD_DEBUG > 2 -#define INTERNAL_ERROR(x...) PRINT_ERR ( INTERNAL_ERRMSG ( x ) ) -#elif DASD_DEBUG > 0 -#define INTERNAL_ERROR(x...) PRINT_WARN ( INTERNAL_ERRMSG ( x ) ) -#else -#define INTERNAL_ERROR(x...) -#endif /* DASD_DEBUG */ - -#if DASD_DEBUG > 5 -#define INTERNAL_CHECK(x...) PRINT_FATAL ( INTERNAL_CHKMSG ( x ) ) -#elif DASD_DEBUG > 3 -#define INTERNAL_CHECK(x...) PRINT_ERR ( INTERNAL_CHKMSG ( x ) ) -#elif DASD_DEBUG > 1 -#define INTERNAL_CHECK(x...) PRINT_WARN ( INTERNAL_CHKMSG ( x ) ) -#else -#define INTERNAL_CHECK(x...) -#endif /* DASD_DEBUG */ - -#if DASD_DEBUG > 3 -#define INTERNAL_FLOW(x...) PRINT_ERR ( INTERNAL_FLWMSG ( x ) ) -#elif DASD_DEBUG > 2 -#define INTERNAL_FLOW(x...) PRINT_WARN ( INTERNAL_FLWMSG ( x ) ) -#else -#define INTERNAL_FLOW(x...) -#endif /* DASD_DEBUG */ - -#if DASD_FLOW_CONTROL > 0 -#define FUNCTION_ENTRY(x) INTERNAL_FLOW( x "entered %s\n","" ); -#else -#define FUNCTION_ENTRY(x) -#endif /* DASD_FLOW_CONTROL */ - -#if DASD_FLOW_CONTROL > 1 -#define FUNCTION_EXIT(x) INTERNAL_FLOW( x "exited %s\n","" ); -#else -#define FUNCTION_EXIT(x) -#endif /* DASD_FLOW_CONTROL */ - -#if DASD_FLOW_CONTROL > 2 -#define FUNCTION_CONTROL(x...) INTERNAL_FLOW( x ); -#else -#define FUNCTION_CONTROL(x...) -#endif /* DASD_FLOW_CONTROL */ - -#if DASD_FLOW_CONTROL > 3 -#define LOOP_CONTROL(x...) INTERNAL_FLOW( x ); -#else -#define LOOP_CONTROL(x...) -#endif /* DASD_FLOW_CONTROL */ - -#define DASD_DO_IO_SLEEP 0x01 -#define DASD_DO_IO_NOLOCK 0x02 -#define DASD_DO_IO_NODEC 0x04 - -#define DASD_NOT_FORMATTED 0x01 - -extern wait_queue_head_t dasd_waitq; - -#undef DEBUG_DASD_MALLOC -#ifdef DEBUG_DASD_MALLOC -void *b; -#define kmalloc(x...) (PRINT_INFO(" kmalloc %p\n",b=kmalloc(x)),b) -#define kfree(x) PRINT_INFO(" kfree %p\n",x);kfree(x) -#define get_free_page(x...) (PRINT_INFO(" gfp %p\n",b=get_free_page(x)),b) -#define __get_free_pages(x...) (PRINT_INFO(" gfps %p\n",b=__get_free_pages(x)),b) -#endif /* DEBUG_DASD_MALLOC */ - -#endif /* __KERNEL__ */ -#endif /* DASD_H */ - -/* - * Overrides for Emacs so that we follow Linus's tabbing style. - * Emacs will notice this stuff at the end of the file and automatically - * adjust the settings for this buffer only. This must remain at the end - * of the file. - * --------------------------------------------------------------------------- - * Local variables: - * c-indent-level: 4 - * c-brace-imaginary-offset: 0 - * c-brace-offset: -4 - * c-argdecl-indent: 4 - * c-label-offset: -4 - * c-continued-statement-offset: 4 - * c-continued-brace-offset: 0 - * indent-tabs-mode: nil - * tab-width: 8 - * End: - */ diff --git a/include/linux/dcache.h b/include/linux/dcache.h index 0d6f9ac13..74f377c06 100644 --- a/include/linux/dcache.h +++ b/include/linux/dcache.h @@ -27,21 +27,28 @@ struct qstr { unsigned int hash; }; +struct dentry_stat_t { + int nr_dentry; + int nr_unused; + int age_limit; /* age in seconds */ + int want_pages; /* pages requested by system */ + int dummy[2]; +}; +extern struct dentry_stat_t dentry_stat; + /* Name hashing routines. Initial hash value */ +/* Hash courtesy of the R5 hash in reiserfs modulo sign bits */ #define init_name_hash() 0 /* partial hash update function. Assume roughly 4 bits per character */ static __inline__ unsigned long partial_name_hash(unsigned long c, unsigned long prevhash) { - prevhash = (prevhash << 4) | (prevhash >> (8*sizeof(unsigned long)-4)); - return prevhash ^ c; + return (prevhash + (c << 4) + (c >> 4)) * 11; } /* Finally: cut down the number of bits to a int value (and try to avoid losing bits) */ static __inline__ unsigned long end_name_hash(unsigned long hash) { - if (sizeof(hash) > sizeof(unsigned int)) - hash += hash >> 4*sizeof(hash); return (unsigned int) hash; } diff --git a/include/linux/elevator.h b/include/linux/elevator.h index 9e9b27dfa..1a8bb5c39 100644 --- a/include/linux/elevator.h +++ b/include/linux/elevator.h @@ -1,14 +1,12 @@ #ifndef _LINUX_ELEVATOR_H #define _LINUX_ELEVATOR_H -#define ELEVATOR_DEBUG - typedef void (elevator_fn) (struct request *, elevator_t *, struct list_head *, struct list_head *, int); typedef int (elevator_merge_fn) (request_queue_t *, struct request **, struct list_head *, - struct buffer_head *, int, int, int); + struct buffer_head *, int, int); typedef void (elevator_merge_cleanup_fn) (request_queue_t *, struct request *, int); @@ -26,11 +24,11 @@ struct elevator_s unsigned int queue_ID; }; -int elevator_noop_merge(request_queue_t *, struct request **, struct list_head *, struct buffer_head *, int, int, int); +int elevator_noop_merge(request_queue_t *, struct request **, struct list_head *, struct buffer_head *, int, int); void elevator_noop_merge_cleanup(request_queue_t *, struct request *, int); void elevator_noop_merge_req(struct request *, struct request *); -int elevator_linus_merge(request_queue_t *, struct request **, struct list_head *, struct buffer_head *, int, int, int); +int elevator_linus_merge(request_queue_t *, struct request **, struct list_head *, struct buffer_head *, int, int); void elevator_linus_merge_cleanup(request_queue_t *, struct request *, int); void elevator_linus_merge_req(struct request *, struct request *); @@ -68,8 +66,9 @@ extern void elevator_init(elevator_t *, elevator_t); (s1)->rq_dev < (s2)->rq_dev) #define BHRQ_IN_ORDER(bh, rq) \ - (((bh)->b_rdev == (rq)->rq_dev && \ - (bh)->b_rsector < (rq)->sector)) + ((((bh)->b_rdev == (rq)->rq_dev && \ + (bh)->b_rsector < (rq)->sector)) || \ + (bh)->b_rdev < (rq)->rq_dev) static inline int elevator_request_latency(elevator_t * elevator, int rw) { diff --git a/include/linux/elf.h b/include/linux/elf.h index 3fe04c45e..34d8e93ae 100644 --- a/include/linux/elf.h +++ b/include/linux/elf.h @@ -74,6 +74,8 @@ typedef __u64 Elf64_Word; #define EM_X8664 62 /* AMD x86-64 */ +#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */ + /* * This is an interim value that we will use until the committee comes * up with a final number. diff --git a/include/linux/fs.h b/include/linux/fs.h index 686aef31a..a5f4cddaf 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -53,6 +53,14 @@ struct files_stat_struct { int max_files; /* tunable */ }; extern struct files_stat_struct files_stat; + +struct inodes_stat_t { + int nr_inodes; + int nr_unused; + int dummy[5]; +}; +extern struct inodes_stat_t inodes_stat; + extern int max_super_blocks, nr_super_blocks; extern int leases_enable, dir_notify_enable, lease_break_time; diff --git a/include/linux/hfs_fs.h b/include/linux/hfs_fs.h index 0f619399e..05de50628 100644 --- a/include/linux/hfs_fs.h +++ b/include/linux/hfs_fs.h @@ -2,7 +2,7 @@ * linux/include/linux/hfs_fs.h * * Copyright (C) 1995-1997 Paul H. Hargrove - * This file may be distributed under the terms of the GNU Public License. + * This file may be distributed under the terms of the GNU General Public License. * * The source code distribution of the Columbia AppleTalk Package for * UNIX, version 6.0, (CAP) was used as a specification of the diff --git a/include/linux/hfs_fs_i.h b/include/linux/hfs_fs_i.h index 4416d7837..8ae2ef99c 100644 --- a/include/linux/hfs_fs_i.h +++ b/include/linux/hfs_fs_i.h @@ -2,7 +2,7 @@ * linux/include/linux/hfs_fs_i.h * * Copyright (C) 1995, 1996 Paul H. Hargrove - * This file may be distributed under the terms of the GNU Public License. + * This file may be distributed under the terms of the GNU General Public License. * * This file defines the type (struct hfs_inode_info) and the two * subordinate types hfs_extent and hfs_file. diff --git a/include/linux/hfs_fs_sb.h b/include/linux/hfs_fs_sb.h index 826f388c5..037ebd428 100644 --- a/include/linux/hfs_fs_sb.h +++ b/include/linux/hfs_fs_sb.h @@ -2,7 +2,7 @@ * linux/include/linux/hfs_fs_sb.h * * Copyright (C) 1995-1997 Paul H. Hargrove - * This file may be distributed under the terms of the GNU Public License. + * This file may be distributed under the terms of the GNU General Public License. * * This file defines the type (struct hfs_sb_info) which contains the * HFS-specific information in the in-core superblock. diff --git a/include/linux/hfs_sysdep.h b/include/linux/hfs_sysdep.h index cefce233d..fa98ce32a 100644 --- a/include/linux/hfs_sysdep.h +++ b/include/linux/hfs_sysdep.h @@ -2,7 +2,7 @@ * linux/include/linux/hfs_sysdep.h * * Copyright (C) 1996-1997 Paul H. Hargrove - * This file may be distributed under the terms of the GNU Public License. + * This file may be distributed under the terms of the GNU General Public License. * * This file contains constants, types and inline * functions for various system dependent things. @@ -17,7 +17,7 @@ #ifndef _HFS_SYSDEP_H #define _HFS_SYSDEP_H -#include <linux/malloc.h> +#include <linux/slab.h> #include <linux/types.h> #include <linux/locks.h> #include <linux/fs.h> diff --git a/include/linux/highmem.h b/include/linux/highmem.h index eb5405d33..de8eea018 100644 --- a/include/linux/highmem.h +++ b/include/linux/highmem.h @@ -38,7 +38,7 @@ static inline void *kmap(struct page *page) { return page_address(page); } #define kunmap_atomic(page,idx) kunmap(page) #define bh_kmap(bh) ((bh)->b_data) -#define bh_kunmap(bh) do { } while (0); +#define bh_kunmap(bh) do { } while (0) #endif /* CONFIG_HIGHMEM */ diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index 9d214fadc..cba5d1601 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -146,7 +146,7 @@ extern struct tasklet_head tasklet_hi_vec[NR_CPUS]; #ifdef CONFIG_SMP #define tasklet_trylock(t) (!test_and_set_bit(TASKLET_STATE_RUN, &(t)->state)) -#define tasklet_unlock_wait(t) while (test_bit(TASKLET_STATE_RUN, &(t)->state)) { /* NOTHING */ } +#define tasklet_unlock_wait(t) while (test_bit(TASKLET_STATE_RUN, &(t)->state)) { barrier(); } #define tasklet_unlock(t) clear_bit(TASKLET_STATE_RUN, &(t)->state) #else #define tasklet_trylock(t) 1 diff --git a/include/linux/isdn.h b/include/linux/isdn.h index 23cf7ed73..8397578f6 100644 --- a/include/linux/isdn.h +++ b/include/linux/isdn.h @@ -1,4 +1,4 @@ -/* $Id: isdn.h,v 1.111 2000/11/25 17:01:02 kai Exp $ +/* $Id: isdn.h,v 1.111.6.1 2001/02/07 11:31:31 kai Exp $ * Main header for the Linux ISDN subsystem (linklevel). * @@ -196,7 +196,7 @@ typedef struct { #include <asm/io.h> #include <linux/kernel.h> #include <linux/signal.h> -#include <linux/malloc.h> +#include <linux/slab.h> #include <linux/timer.h> #include <linux/wait.h> #include <linux/tty.h> @@ -592,23 +592,6 @@ typedef struct { char *private; } infostruct; -typedef struct isdn_module { - struct isdn_module *prev; - struct isdn_module *next; - char *name; - int (*get_free_channel)(int, int, int, int, int); - int (*free_channel)(int, int, int); - int (*status_callback)(isdn_ctrl *); - int (*command)(isdn_ctrl *); - int (*receive_callback)(int, int, struct sk_buff *); - int (*writebuf_skb)(int, int, int, struct sk_buff *); - int (*net_start_xmit)(struct sk_buff *, struct net_device *); - int (*net_receive)(struct net_device *, struct sk_buff *); - int (*net_open)(struct net_device *); - int (*net_close)(struct net_device *); - int priority; -} isdn_module; - #define DRV_FLAG_RUNNING 1 #define DRV_FLAG_REJBUS 2 #define DRV_FLAG_LOADED 4 @@ -668,7 +651,6 @@ typedef struct isdn_devt { atomic_t v110use[ISDN_MAX_CHANNELS];/* Usage-Semaphore for stream */ isdn_v110_stream *v110[ISDN_MAX_CHANNELS]; /* V.110 private data */ struct semaphore sem; /* serialize list access*/ - isdn_module *modules; unsigned long global_features; #ifdef CONFIG_DEVFS_FS devfs_handle_t devfs_handle_isdninfo; diff --git a/include/linux/kdev_t.h b/include/linux/kdev_t.h index aeee1fbee..7ef189ef0 100644 --- a/include/linux/kdev_t.h +++ b/include/linux/kdev_t.h @@ -1,6 +1,6 @@ #ifndef _LINUX_KDEV_T_H #define _LINUX_KDEV_T_H -#ifdef __KERNEL__ +#if defined(__KERNEL__) || defined(_LVM_H_INCLUDE) /* As a preparation for the introduction of larger device numbers, we introduce a type kdev_t to hold them. No information about @@ -101,7 +101,7 @@ static inline kdev_t to_kdev_t(int dev) return MKDEV(major, minor); } -#else /* __KERNEL__ */ +#else /* __KERNEL__ || _LVM_H_INCLUDE */ /* Some programs want their definitions of MAJOR and MINOR and MKDEV @@ -110,5 +110,5 @@ from the kernel sources. These must be the externally visible ones. #define MAJOR(dev) ((dev)>>8) #define MINOR(dev) ((dev) & 0xff) #define MKDEV(ma,mi) ((ma)<<8 | (mi)) -#endif /* __KERNEL__ */ +#endif /* __KERNEL__ || _LVM_H_INCLUDE */ #endif diff --git a/include/linux/kernelcapi.h b/include/linux/kernelcapi.h index 2677f9646..5bdcd805e 100644 --- a/include/linux/kernelcapi.h +++ b/include/linux/kernelcapi.h @@ -1,5 +1,5 @@ /* - * $Id: kernelcapi.h,v 1.8.6.1 2000/11/28 09:36:56 kai Exp $ + * $Id: kernelcapi.h,v 1.8.6.2 2001/02/07 11:31:31 kai Exp $ * * Kernel CAPI 2.0 Interface for Linux * @@ -10,8 +10,8 @@ #ifndef __KERNELCAPI_H__ #define __KERNELCAPI_H__ -#define CAPI_MAXAPPL 20 /* maximum number of applications */ -#define CAPI_MAXCONTR 10 /* maximum number of controller */ +#define CAPI_MAXAPPL 128 /* maximum number of applications */ +#define CAPI_MAXCONTR 16 /* maximum number of controller */ #define CAPI_MAXDATAWINDOW 8 diff --git a/include/linux/list.h b/include/linux/list.h index ed38faa21..48fea84b4 100644 --- a/include/linux/list.h +++ b/include/linux/list.h @@ -1,7 +1,7 @@ #ifndef _LINUX_LIST_H #define _LINUX_LIST_H -#ifdef __KERNEL__ +#if defined(__KERNEL__) || defined(_LVM_H_INCLUDE) /* * Simple doubly linked list implementation. @@ -149,6 +149,6 @@ static __inline__ void list_splice(struct list_head *list, struct list_head *hea #define list_for_each(pos, head) \ for (pos = (head)->next; pos != (head); pos = pos->next) -#endif /* __KERNEL__ */ +#endif /* __KERNEL__ || _LVM_H_INCLUDE */ #endif diff --git a/include/linux/lvm.h b/include/linux/lvm.h index 4e95eb73d..e1e701a91 100644 --- a/include/linux/lvm.h +++ b/include/linux/lvm.h @@ -95,15 +95,8 @@ */ #endif /* #ifdef __KERNEL__ */ -#ifndef __KERNEL__ -#define __KERNEL__ #include <linux/kdev_t.h> #include <linux/list.h> -#undef __KERNEL__ -#else -#include <linux/kdev_t.h> -#include <linux/list.h> -#endif /* #ifndef __KERNEL__ */ #include <asm/types.h> #include <linux/major.h> diff --git a/include/linux/mm.h b/include/linux/mm.h index 713b01316..f6c7cc6e2 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -200,8 +200,8 @@ static inline void set_page_dirty(struct page * page) smp_mb__before_clear_bit(); \ if (!test_and_clear_bit(PG_locked, &(page)->flags)) BUG(); \ smp_mb__after_clear_bit(); \ - if (waitqueue_active(&page->wait)) \ - wake_up(&page->wait); \ + if (waitqueue_active(&(page)->wait)) \ + wake_up(&(page)->wait); \ } while (0) #define PageError(page) test_bit(PG_error, &(page)->flags) #define SetPageError(page) set_bit(PG_error, &(page)->flags) diff --git a/include/linux/module.h b/include/linux/module.h index 7f416d7fb..afa2e66f0 100644 --- a/include/linux/module.h +++ b/include/linux/module.h @@ -249,12 +249,6 @@ static const struct gtype##_id * __module_##gtype##_table \ __attribute__ ((unused)) = name #define MODULE_DEVICE_TABLE(type,name) \ MODULE_GENERIC_TABLE(type##_device,name) -/* not put to .modinfo section to avoid section type conflicts */ - -/* The attributes of a section are set the first time the section is - seen; we want .modinfo to not be allocated. */ - -__asm__(".section .modinfo\n\t.previous"); /* Define the module variable, and usage macros. */ extern struct module __this_module; diff --git a/include/linux/mtd/ftl.h b/include/linux/mtd/ftl.h index 4fc425262..2745605c0 100644 --- a/include/linux/mtd/ftl.h +++ b/include/linux/mtd/ftl.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/linux/mtd/map.h b/include/linux/mtd/map.h index f7f8ad01f..71fc46b1a 100644 --- a/include/linux/mtd/map.h +++ b/include/linux/mtd/map.h @@ -1,6 +1,6 @@ /* Overhauled routines for dealing with different mmap regions of flash */ -/* $Id: map.h,v 1.10 2000/12/04 13:18:33 dwmw2 Exp $ */ +/* $Id: map.h,v 1.10.2.2 2001/01/09 00:44:51 dwmw2 Exp $ */ #ifndef __LINUX_MTD_MAP_H__ #define __LINUX_MTD_MAP_H__ @@ -8,7 +8,7 @@ #include <linux/config.h> #include <linux/types.h> #include <linux/mtd/mtd.h> -#include <linux/malloc.h> +#include <linux/slab.h> /* The map stuff is very simple. You fill in your struct map_info with a handful of routines for accessing the device, making sure they handle @@ -44,7 +44,7 @@ struct map_info { void (*write32)(struct map_info *, __u32, unsigned long); void (*copy_to)(struct map_info *, unsigned long, const void *, ssize_t); - void (*set_vpp)(int); + void (*set_vpp)(struct map_info *, int); /* We put these two here rather than a single void *map_priv, because we want mappers to be able to have quickly-accessible cache for the 'currently-mapped page' without the _extra_ @@ -108,7 +108,7 @@ static inline void map_destroy(struct mtd_info *mtd) kfree(mtd); } -#define ENABLE_VPP(map) do { if(map->set_vpp) map->set_vpp(1); } while(0) -#define DISABLE_VPP(map) do { if(map->set_vpp) map->set_vpp(0); } while(0) +#define ENABLE_VPP(map) do { if(map->set_vpp) map->set_vpp(map, 1); } while(0) +#define DISABLE_VPP(map) do { if(map->set_vpp) map->set_vpp(map, 0); } while(0) #endif /* __LINUX_MTD_MAP_H__ */ diff --git a/include/linux/ncp_fs.h b/include/linux/ncp_fs.h index 7d67f410b..919fc654a 100644 --- a/include/linux/ncp_fs.h +++ b/include/linux/ncp_fs.h @@ -196,7 +196,7 @@ struct ncp_entry_info { #ifdef DEBUG_NCP_MALLOC -#include <linux/malloc.h> +#include <linux/slab.h> extern int ncp_malloced; extern int ncp_current_malloced; diff --git a/include/linux/nubus.h b/include/linux/nubus.h index 5f46ddd93..adf59d870 100644 --- a/include/linux/nubus.h +++ b/include/linux/nubus.h @@ -319,4 +319,4 @@ extern inline void *nubus_slot_addr(int slot) return (void *)(0xF0000000|(slot<<24)); } -#endif LINUX_NUBUS_H +#endif /* LINUX_NUBUS_H */ diff --git a/include/linux/parport.h b/include/linux/parport.h index 71fc1398b..8f0cd76ce 100644 --- a/include/linux/parport.h +++ b/include/linux/parport.h @@ -229,7 +229,7 @@ struct pardevice { unsigned long int time; unsigned long int timeslice; volatile long int timeout; - unsigned int waiting; + unsigned long waiting; /* long req'd for set_bit --RR */ struct pardevice *waitprev; struct pardevice *waitnext; void * sysctl_table; diff --git a/include/linux/pci.h b/include/linux/pci.h index a78410716..205abe61e 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -565,9 +565,9 @@ static inline int pcibios_find_class (unsigned int class_code, unsigned short in { return PCIBIOS_DEVICE_NOT_FOUND; } #define _PCI_NOP(o,s,t) \ - static inline int pcibios_##o##_config_##s## (u8 bus, u8 dfn, u8 where, t val) \ + static inline int pcibios_##o##_config_##s (u8 bus, u8 dfn, u8 where, t val) \ { return PCIBIOS_FUNC_NOT_SUPPORTED; } \ - static inline int pci_##o##_config_##s## (struct pci_dev *dev, int where, t val) \ + static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \ { return PCIBIOS_FUNC_NOT_SUPPORTED; } #define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \ _PCI_NOP(o,word,u16 x) \ diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 2708be9ab..664ec0d6b 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -141,6 +141,7 @@ #define PCI_DEVICE_ID_COMPAQ_NETEL100PI 0xae43 #define PCI_DEVICE_ID_COMPAQ_NETEL100I 0xb011 #define PCI_DEVICE_ID_COMPAQ_CISS 0xb060 +#define PCI_DEVICE_ID_COMPAQ_CISSB 0xb178 #define PCI_DEVICE_ID_COMPAQ_THUNDER 0xf130 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3B 0xf150 @@ -689,13 +690,23 @@ #define PCI_DEVICE_ID_CERN_HIPPI_DST 0x0021 #define PCI_DEVICE_ID_CERN_HIPPI_SRC 0x0022 -#define PCI_VENDOR_ID_NVIDIA 0x10de -#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020 -#define PCI_DEVICE_ID_NVIDIA_TNT2 0x0028 -#define PCI_DEVICE_ID_NVIDIA_UTNT2 0x0029 -#define PCI_DEVICE_ID_NVIDIA_VTNT2 0x002C -#define PCI_DEVICE_ID_NVIDIA_UVTNT2 0x002D -#define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0 +#define PCI_VENDOR_ID_NVIDIA 0x10de +#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020 +#define PCI_DEVICE_ID_NVIDIA_TNT2 0x0028 +#define PCI_DEVICE_ID_NVIDIA_UTNT2 0x0029 +#define PCI_DEVICE_ID_NVIDIA_VTNT2 0x002C +#define PCI_DEVICE_ID_NVIDIA_UVTNT2 0x002D +#define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0 +#define PCI_DEVICE_ID_NVIDIA_GEFORCE_SDR 0x0100 +#define PCI_DEVICE_ID_NVIDIA_GEFORCE_DDR 0x0101 +#define PCI_DEVICE_ID_NVIDIA_QUADRO 0x0103 +#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX 0x0110 +#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX2 0x0111 +#define PCI_DEVICE_ID_NVIDIA_QUADRO2_MXR 0x0113 +#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS 0x0150 +#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS2 0x0151 +#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_ULTRA 0x0152 +#define PCI_DEVICE_ID_NVIDIA_QUADRO2_PRO 0x0153 #define PCI_VENDOR_ID_IMS 0x10e0 #define PCI_DEVICE_ID_IMS_8849 0x8849 diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h index da8f6b3dc..e142bb812 100644 --- a/include/linux/proc_fs.h +++ b/include/linux/proc_fs.h @@ -2,7 +2,7 @@ #define _LINUX_PROC_FS_H #include <linux/config.h> -#include <linux/malloc.h> +#include <linux/slab.h> /* * The proc filesystem constants/structures diff --git a/include/linux/raid/raid5.h b/include/linux/raid/raid5.h index d46dbd512..93a81473e 100644 --- a/include/linux/raid/raid5.h +++ b/include/linux/raid/raid5.h @@ -57,9 +57,9 @@ * * Buffers for the md device that arrive via make_request are attached * to the appropriate stripe in one of two lists linked on b_reqnext. - * One list for read requests, one for write. There should never be - * more than one buffer on the two lists together, but we are not - * guaranteed of that so we allow for more. + * One list (bh_read) for read requests, one (bh_write) for write. + * There should never be more than one buffer on the two lists + * together, but we are not guaranteed of that so we allow for more. * * If a buffer is on the read list when the associated cache buffer is * Uptodate, the data is copied into the read buffer and it's b_end_io @@ -70,16 +70,18 @@ * that the Uptodate bit is set. Once they have checked that they may * take buffers off the read queue. * - * When a buffer on the write_list is committed for write, it is - * marked clean, copied into the cache buffer, which is then marked - * dirty, and moved onto a third list, the written list. Once both - * the parity block and the cached buffer are successfully written, - * any buffer on a written list can be returned with b_end_io. - * - * The write_list and read_list lists act as fifos. They are protected by the - * device_lock which can be claimed when a stripe_lock is held. - * The device_lock is only for list manipulations and will only be held for a very - * short time. It can be claimed from interrupts. + * When a buffer on the write list is committed for write is it copied + * into the cache buffer, which is then marked dirty, and moved onto a + * third list, the written list (bh_written). Once both the parity + * block and the cached buffer are successfully written, any buffer on + * a written list can be returned with b_end_io. + * + * The write list and read list both act as fifos. The read list is + * protected by the device_lock. The write and written lists are + * protected by the stripe lock. The device_lock, which can be + * claimed while the stipe lock is held, is only for list + * manipulations and will only be held for a very short time. It can + * be claimed from interrupts. * * * Stripes in the stripe cache can be on one of two lists (or on diff --git a/include/linux/reiserfs_fs.h b/include/linux/reiserfs_fs.h index 277281d6d..97dbc0034 100644 --- a/include/linux/reiserfs_fs.h +++ b/include/linux/reiserfs_fs.h @@ -15,7 +15,7 @@ #include <linux/types.h> #ifdef __KERNEL__ -#include <linux/malloc.h> +#include <linux/slab.h> #include <linux/tqueue.h> #endif diff --git a/include/linux/sched.h b/include/linux/sched.h index a382b6736..68c48ae0c 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -551,7 +551,7 @@ extern long FASTCALL(sleep_on_timeout(wait_queue_head_t *q, extern void FASTCALL(interruptible_sleep_on(wait_queue_head_t *q)); extern long FASTCALL(interruptible_sleep_on_timeout(wait_queue_head_t *q, signed long timeout)); -extern void FASTCALL(wake_up_process(struct task_struct * tsk)); +extern int FASTCALL(wake_up_process(struct task_struct * tsk)); #define wake_up(x) __wake_up((x),TASK_UNINTERRUPTIBLE | TASK_INTERRUPTIBLE, 1) #define wake_up_nr(x, nr) __wake_up((x),TASK_UNINTERRUPTIBLE | TASK_INTERRUPTIBLE, nr) diff --git a/include/linux/serial.h b/include/linux/serial.h index 7d4178a54..b5ed862a9 100644 --- a/include/linux/serial.h +++ b/include/linux/serial.h @@ -139,8 +139,9 @@ struct serial_uart_config { #define ASYNC_CHECK_CD 0x02000000 /* i.e., CLOCAL */ #define ASYNC_SHARE_IRQ 0x01000000 /* for multifunction cards --- no longer used */ +#define ASYNC_NO_FLOW 0x00800000 /* No flow control serial console */ -#define ASYNC_INTERNAL_FLAGS 0xFF000000 /* Internal flags */ +#define ASYNC_INTERNAL_FLAGS 0xFF800000 /* Internal flags */ /* * Multiport serial configuration structure --- external structure @@ -177,5 +178,7 @@ struct serial_icounter_struct { extern int register_serial(struct serial_struct *req); extern void unregister_serial(int line); +/* Allow complicated architectures to specify rs_table[] at run time */ +extern int early_serial_setup(struct serial_struct *req); #endif /* __KERNEL__ */ #endif /* _LINUX_SERIAL_H */ diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 17e48d0e9..24404cfda 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -153,7 +153,7 @@ struct sk_buff { /* * Handling routines are only of interest to the kernel */ -#include <linux/malloc.h> +#include <linux/slab.h> #include <asm/system.h> @@ -878,29 +878,48 @@ static inline void __skb_queue_purge(struct sk_buff_head *list) } /** - * dev_alloc_skb - allocate an skbuff for sending + * __dev_alloc_skb - allocate an skbuff for sending * @length: length to allocate + * @gfp_mask: get_free_pages mask, passed to alloc_skb * * Allocate a new &sk_buff and assign it a usage count of one. The * buffer has unspecified headroom built in. Users should allocate * the headroom they think they need without accounting for the * built in space. The built in space is used for optimisations. * - * %NULL is returned in there is no free memory. Although this function - * allocates memory it can be called from an interrupt. + * %NULL is returned in there is no free memory. */ -static inline struct sk_buff *dev_alloc_skb(unsigned int length) +static inline struct sk_buff *__dev_alloc_skb(unsigned int length, + int gfp_mask) { struct sk_buff *skb; - skb = alloc_skb(length+16, GFP_ATOMIC); + skb = alloc_skb(length+16, gfp_mask); if (skb) skb_reserve(skb,16); return skb; } /** + * dev_alloc_skb - allocate an skbuff for sending + * @length: length to allocate + * + * Allocate a new &sk_buff and assign it a usage count of one. The + * buffer has unspecified headroom built in. Users should allocate + * the headroom they think they need without accounting for the + * built in space. The built in space is used for optimisations. + * + * %NULL is returned in there is no free memory. Although this function + * allocates memory it can be called from an interrupt. + */ + +static inline struct sk_buff *dev_alloc_skb(unsigned int length) +{ + return __dev_alloc_skb(length, GFP_ATOMIC); +} + +/** * skb_cow - copy a buffer if need be * @skb: buffer to copy * @headroom: needed headroom diff --git a/include/linux/smb.h b/include/linux/smb.h index 1382db0dc..9f39c09d8 100644 --- a/include/linux/smb.h +++ b/include/linux/smb.h @@ -93,14 +93,6 @@ struct smb_fattr { unsigned long f_blocks; }; -struct smb_dirent { - struct smb_fattr attr; - - int f_pos; - int len; - __u8 name[SMB_MAXNAMELEN]; -}; - enum smb_conn_state { CONN_VALID, /* everything's fine */ CONN_INVALID, /* Something went wrong, but did not @@ -120,11 +112,13 @@ enum smb_conn_state { #define SMB_HEADER_LEN 37 /* includes everything up to, but not * including smb_bcc */ -#define SMB_DEF_MAX_XMIT 32768 -#define SMB_INITIAL_PACKET_SIZE 4000 -/* Allocate max. 1 page */ -#define TRANS2_MAX_TRANSFER (4096-17) +#define SMB_INITIAL_PACKET_SIZE 4000 +#define SMB_MAX_PACKET_SIZE 32768 + +/* reserve this much space for trans2 parameters. Shouldn't have to be more + than 10 or so, but OS/2 seems happier like this. */ +#define SMB_TRANS2_MAX_PARAM 64 #endif #endif diff --git a/include/linux/smb_fs.h b/include/linux/smb_fs.h index 501ea4b96..4a811a20d 100644 --- a/include/linux/smb_fs.h +++ b/include/linux/smb_fs.h @@ -20,23 +20,31 @@ /* __kernel_uid_t can never change, so we have to use __kernel_uid32_t */ #define SMB_IOC_GETMOUNTUID32 _IOR('u', 3, __kernel_uid32_t) + #ifdef __KERNEL__ +#include <linux/pagemap.h> +#include <linux/vmalloc.h> +#include <linux/smb_mount.h> #include <asm/unaligned.h> + +/* macro names are short for word, double-word, long value (?) */ #define WVAL(buf,pos) \ -(le16_to_cpu(get_unaligned((__u16 *)((__u8 *)(buf) + (pos))))) + (le16_to_cpu(get_unaligned((u16 *)((u8 *)(buf) + (pos))))) #define DVAL(buf,pos) \ -(le32_to_cpu(get_unaligned((__u32 *)((__u8 *)(buf) + (pos))))) + (le32_to_cpu(get_unaligned((u32 *)((u8 *)(buf) + (pos))))) +#define LVAL(buf,pos) \ + (le64_to_cpu(get_unaligned((u64 *)((u8 *)(buf) + (pos))))) #define WSET(buf,pos,val) \ -put_unaligned(cpu_to_le16((__u16)(val)), (__u16 *)((__u8 *)(buf) + (pos))) + put_unaligned(cpu_to_le16((u16)(val)), (u16 *)((u8 *)(buf) + (pos))) #define DSET(buf,pos,val) \ -put_unaligned(cpu_to_le32((__u32)(val)), (__u32 *)((__u8 *)(buf) + (pos))) + put_unaligned(cpu_to_le32((u32)(val)), (u32 *)((u8 *)(buf) + (pos))) +#define LSET(buf,pos,val) \ + put_unaligned(cpu_to_le64((u64)(val)), (u64 *)((u8 *)(buf) + (pos))) /* where to find the base of the SMB packet proper */ -#define smb_base(buf) ((__u8 *)(((__u8 *)(buf))+4)) - -#include <linux/vmalloc.h> +#define smb_base(buf) ((u8 *)(((u8 *)(buf))+4)) #ifdef DEBUG_SMB_MALLOC @@ -70,7 +78,6 @@ smb_vfree(void *obj) /* * Flags for the in-memory inode */ -#define SMB_F_CACHEVALID 0x01 /* directory cache valid */ #define SMB_F_LOCALWRITE 0x02 /* file modified locally */ @@ -89,8 +96,54 @@ smb_vfree(void *obj) #define SMB_CAP_LARGE_READX 0x4000 -/* linux/fs/smbfs/mmap.c */ -int smb_mmap(struct file *, struct vm_area_struct *); +/* + * This is the time we allow an inode, dentry or dir cache to live. It is bad + * for performance to have shorter ttl on an inode than on the cache. It can + * cause refresh on each inode for a dir listing ... one-by-one + */ +#define SMB_MAX_AGE(server) (((server)->mnt->ttl * HZ) / 1000) + +static inline void +smb_age_dentry(struct smb_sb_info *server, struct dentry *dentry) +{ + dentry->d_time = jiffies - SMB_MAX_AGE(server); +} + +struct smb_cache_head { + time_t mtime; /* unused */ + unsigned long time; /* cache age */ + unsigned long end; /* last valid fpos in cache */ + int eof; +}; + +#define SMB_DIRCACHE_SIZE ((int)(PAGE_CACHE_SIZE/sizeof(struct dentry *))) +union smb_dir_cache { + struct smb_cache_head head; + struct dentry *dentry[SMB_DIRCACHE_SIZE]; +}; + +#define SMB_FIRSTCACHE_SIZE ((int)((SMB_DIRCACHE_SIZE * \ + sizeof(struct dentry *) - sizeof(struct smb_cache_head)) / \ + sizeof(struct dentry *))) + +#define SMB_DIRCACHE_START (SMB_DIRCACHE_SIZE - SMB_FIRSTCACHE_SIZE) + +struct smb_cache_control { + struct smb_cache_head head; + struct page *page; + union smb_dir_cache *cache; + unsigned long fpos, ofs; + int filled, valid, idx; +}; + +static inline int +smb_is_open(struct inode *i) +{ + return (i->u.smbfs_i.open == SMB_SERVER(i)->generation); +} + + +/* FIXME! the prototype list is probably not correct. Automate? */ /* linux/fs/smbfs/file.c */ extern struct inode_operations smb_file_inode_operations; @@ -100,6 +153,7 @@ extern struct address_space_operations smb_file_aops; /* linux/fs/smbfs/dir.c */ extern struct inode_operations smb_dir_inode_operations; extern struct file_operations smb_dir_operations; +void smb_new_dentry(struct dentry *dentry); void smb_renew_times(struct dentry *); /* linux/fs/smbfs/ioctl.c */ @@ -108,16 +162,15 @@ int smb_ioctl (struct inode *, struct file *, unsigned int, unsigned long); /* linux/fs/smbfs/inode.c */ struct super_block *smb_read_super(struct super_block *, void *, int); void smb_get_inode_attr(struct inode *, struct smb_fattr *); +void smb_set_inode_attr(struct inode *, struct smb_fattr *); void smb_invalidate_inodes(struct smb_sb_info *); int smb_revalidate_inode(struct dentry *); int smb_notify_change(struct dentry *, struct iattr *); -unsigned long smb_invent_inos(unsigned long); struct inode *smb_iget(struct super_block *, struct smb_fattr *); /* linux/fs/smbfs/proc.c */ int smb_setcodepage(struct smb_sb_info *server, struct smb_nls_codepage *cp); __u32 smb_len(unsigned char *); -__u8 *smb_encode_smb_length(__u8 *, __u32); __u8 *smb_setup_header(struct smb_sb_info *, __u8, __u16, __u16); int smb_get_rsize(struct smb_sb_info *); int smb_get_wsize(struct smb_sb_info *); @@ -133,32 +186,21 @@ int smb_proc_mv(struct dentry *, struct dentry *); int smb_proc_mkdir(struct dentry *); int smb_proc_rmdir(struct dentry *); int smb_proc_unlink(struct dentry *); -int smb_proc_readdir(struct dentry *, int, void *); +int smb_proc_readdir(struct file *filp, void *dirent, filldir_t filldir, + struct smb_cache_control *ctl); int smb_proc_getattr(struct dentry *, struct smb_fattr *); int smb_proc_setattr(struct dentry *, struct smb_fattr *); int smb_proc_settime(struct dentry *, struct smb_fattr *); int smb_proc_dskattr(struct super_block *, struct statfs *); -int smb_proc_reconnect(struct smb_sb_info *); -int smb_proc_connect(struct smb_sb_info *); int smb_proc_disconnect(struct smb_sb_info *); int smb_proc_trunc(struct smb_sb_info *, __u16, __u32); void smb_init_root_dirent(struct smb_sb_info *, struct smb_fattr *); -static inline int -smb_is_open(struct inode *i) -{ - return (i->u.smbfs_i.open == SMB_SERVER(i)->generation); -} - /* linux/fs/smbfs/sock.c */ int smb_round_length(int); int smb_valid_socket(struct inode *); void smb_close_socket(struct smb_sb_info *); -int smb_release(struct smb_sb_info *server); -int smb_connect(struct smb_sb_info *server); int smb_request(struct smb_sb_info *server); -int smb_request_read_raw(struct smb_sb_info *, unsigned char *, int); -int smb_request_write_raw(struct smb_sb_info *, unsigned const char *, int); int smb_catch_keepalive(struct smb_sb_info *server); int smb_dont_catch_keepalive(struct smb_sb_info *server); int smb_trans2_request(struct smb_sb_info *server, __u16 trans2_command, @@ -169,69 +211,14 @@ int smb_trans2_request(struct smb_sb_info *server, __u16 trans2_command, /* fs/smbfs/cache.c */ -/* - * The cache index describes the pages mapped starting - * at offset PAGE_SIZE. We keep only a minimal amount - * of information here. - */ -struct cache_index { - unsigned short num_entries; - unsigned short space; - struct cache_block * block; -}; - -#define NINDEX (PAGE_SIZE-64)/sizeof(struct cache_index) -/* - * The cache head is mapped as the page at offset 0. - */ -struct cache_head { - int valid; - int status; /* error code or 0 */ - int entries; /* total entries */ - int pages; /* number of data pages */ - int idx; /* index of current data page */ - struct cache_index index[NINDEX]; -}; - -/* - * An array of cache_entry structures holds information - * for each object in the cache_block. - */ -struct cache_entry { - ino_t ino; - unsigned short namelen; - unsigned short offset; -}; - -/* - * The cache blocks hold the actual data. The entry table grows up - * while the names grow down, and we have space until they meet. - */ -struct cache_block { - union { - struct cache_entry table[1]; - char names[PAGE_SIZE]; - } cb_data; -}; - -/* - * To return an entry, we can pass a reference to the - * name instead of having to copy it. - */ -struct cache_dirent { - ino_t ino; - unsigned long pos; - int len; - char * name; -}; +void smb_invalid_dir_cache(struct inode * dir); +void smb_invalidate_dircache_entries(struct dentry *parent); +struct dentry * smb_dget_fpos(struct dentry *dentry, struct dentry *parent, + unsigned long fpos); +int smb_fill_cache(struct file *filp, void *dirent, filldir_t filldir, + struct smb_cache_control *ctrl, struct qstr *qname, + struct smb_fattr *entry); -struct cache_head * smb_get_dircache(struct dentry *); -void smb_init_dircache(struct cache_head *); -void smb_free_dircache(struct cache_head *); -int smb_refill_dircache(struct cache_head *, struct dentry *); -void smb_add_to_cache(struct cache_head *, struct cache_dirent *, off_t); -int smb_find_in_cache(struct cache_head *, off_t, struct cache_dirent *); -void smb_invalid_dir_cache(struct inode *); #endif /* __KERNEL__ */ diff --git a/include/linux/smb_fs_i.h b/include/linux/smb_fs_i.h index 8dca9066b..e0faddbb3 100644 --- a/include/linux/smb_fs_i.h +++ b/include/linux/smb_fs_i.h @@ -26,7 +26,7 @@ struct smb_inode_info { __u16 attr; /* Attribute fields, DOS value */ __u16 access; /* Access mode */ - __u16 cache_valid; /* dircache valid? */ + __u16 flags; /* status flags */ unsigned long oldmtime; /* last time refreshed */ unsigned long closed; /* timestamp when closed */ unsigned openers; /* number of fileid users */ diff --git a/include/linux/smb_mount.h b/include/linux/smb_mount.h index ea240db51..fe65cdb6c 100644 --- a/include/linux/smb_mount.h +++ b/include/linux/smb_mount.h @@ -50,6 +50,9 @@ struct smb_mount_data_kernel { u32 flags; + /* maximum age in jiffies (inode, dentry and dircache) */ + int ttl; + struct smb_nls_codepage codepage; }; diff --git a/include/linux/telephony.h b/include/linux/telephony.h index 4e38e8ccb..01a87694c 100644 --- a/include/linux/telephony.h +++ b/include/linux/telephony.h @@ -43,6 +43,11 @@ * the telephony products they support under Linux) * *****************************************************************************/ +#define QTI_PHONEJACK 100 +#define QTI_LINEJACK 300 +#define QTI_PHONEJACK_LITE 400 +#define QTI_PHONEJACK_PCI 500 +#define QTI_PHONECARD 600 /****************************************************************************** * @@ -91,7 +96,7 @@ typedef struct { int namelen; char name[80]; } PHONE_CID; - + #define PHONE_RING _IO ('q', 0x83) #define PHONE_HOOKSTATE _IO ('q', 0x84) #define PHONE_MAXRINGS _IOW ('q', 0x85, char) diff --git a/include/linux/wait.h b/include/linux/wait.h index 6b281ccad..61cd98962 100644 --- a/include/linux/wait.h +++ b/include/linux/wait.h @@ -19,30 +19,10 @@ #include <asm/processor.h> /* - * Temporary debugging help until all code is converted to the new - * waitqueue usage. + * Debug control. Slow but useful. */ #define WAITQUEUE_DEBUG 0 -#if WAITQUEUE_DEBUG -extern int printk(const char *fmt, ...); -#define WQ_BUG() do { \ - printk("wq bug, forcing oops.\n"); \ - BUG(); \ -} while (0) - -#define CHECK_MAGIC(x) if (x != (long)&(x)) \ - { printk("bad magic %lx (should be %lx), ", (long)x, (long)&(x)); WQ_BUG(); } - -#define CHECK_MAGIC_WQHEAD(x) do { \ - if (x->__magic != (long)&(x->__magic)) { \ - printk("bad magic %lx (should be %lx, creator %lx), ", \ - x->__magic, (long)&(x->__magic), x->__creator); \ - WQ_BUG(); \ - } \ -} while (0) -#endif - struct __wait_queue { unsigned int flags; #define WQ_FLAG_EXCLUSIVE 0x01 @@ -99,24 +79,70 @@ struct __wait_queue_head { }; typedef struct __wait_queue_head wait_queue_head_t; + +/* + * Debugging macros. We eschew `do { } while (0)' because gcc can generate + * spurious .aligns. + */ +#if WAITQUEUE_DEBUG +#define WQ_BUG() BUG() +#define CHECK_MAGIC(x) \ + do { \ + if ((x) != (long)&(x)) { \ + printk("bad magic %lx (should be %lx), ", \ + (long)x, (long)&(x)); \ + WQ_BUG(); \ + } \ + } while (0) +#define CHECK_MAGIC_WQHEAD(x) \ + do { \ + if ((x)->__magic != (long)&((x)->__magic)) { \ + printk("bad magic %lx (should be %lx, creator %lx), ", \ + (x)->__magic, (long)&((x)->__magic), (x)->__creator); \ + WQ_BUG(); \ + } \ + } while (0) +#define WQ_CHECK_LIST_HEAD(list) \ + do { \ + if (!list->next || !list->prev) \ + WQ_BUG(); \ + } while(0) +#define WQ_NOTE_WAKER(tsk) \ + do { \ + tsk->__waker = (long)__builtin_return_address(0); \ + } while (0) +#else +#define WQ_BUG() +#define CHECK_MAGIC(x) +#define CHECK_MAGIC_WQHEAD(x) +#define WQ_CHECK_LIST_HEAD(list) +#define WQ_NOTE_WAKER(tsk) +#endif + +/* + * Macros for declaration and initialisaton of the datatypes + */ + #if WAITQUEUE_DEBUG -# define __WAITQUEUE_DEBUG_INIT(name) \ - , (long)&(name).__magic, 0 -# define __WAITQUEUE_HEAD_DEBUG_INIT(name) \ - , (long)&(name).__magic, (long)&(name).__magic +# define __WAITQUEUE_DEBUG_INIT(name) (long)&(name).__magic, 0 +# define __WAITQUEUE_HEAD_DEBUG_INIT(name) (long)&(name).__magic, (long)&(name).__magic #else # define __WAITQUEUE_DEBUG_INIT(name) # define __WAITQUEUE_HEAD_DEBUG_INIT(name) #endif -#define __WAITQUEUE_INITIALIZER(name,task) \ - { 0x0, task, { NULL, NULL } __WAITQUEUE_DEBUG_INIT(name)} -#define DECLARE_WAITQUEUE(name,task) \ - wait_queue_t name = __WAITQUEUE_INITIALIZER(name,task) +#define __WAITQUEUE_INITIALIZER(name, tsk) { \ + task: tsk, \ + task_list: { NULL, NULL }, \ + __WAITQUEUE_DEBUG_INIT(name)} + +#define DECLARE_WAITQUEUE(name, tsk) \ + wait_queue_t name = __WAITQUEUE_INITIALIZER(name, tsk) -#define __WAIT_QUEUE_HEAD_INITIALIZER(name) \ -{ WAITQUEUE_RW_LOCK_UNLOCKED, { &(name).task_list, &(name).task_list } \ - __WAITQUEUE_HEAD_DEBUG_INIT(name)} +#define __WAIT_QUEUE_HEAD_INITIALIZER(name) { \ + lock: WAITQUEUE_RW_LOCK_UNLOCKED, \ + task_list: { &(name).task_list, &(name).task_list }, \ + __WAITQUEUE_HEAD_DEBUG_INIT(name)} #define DECLARE_WAIT_QUEUE_HEAD(name) \ wait_queue_head_t name = __WAIT_QUEUE_HEAD_INITIALIZER(name) @@ -135,8 +161,7 @@ static inline void init_waitqueue_head(wait_queue_head_t *q) #endif } -static inline void init_waitqueue_entry(wait_queue_t *q, - struct task_struct *p) +static inline void init_waitqueue_entry(wait_queue_t *q, struct task_struct *p) { #if WAITQUEUE_DEBUG if (!q || !p) diff --git a/include/math-emu/op-2.h b/include/math-emu/op-2.h index 184eb3c3b..e639d534e 100644 --- a/include/math-emu/op-2.h +++ b/include/math-emu/op-2.h @@ -79,7 +79,7 @@ else \ { \ X##_f0 = (X##_f1 >> ((N) - _FP_W_TYPE_SIZE) | \ - (((X##_f1 << (sz - (N))) | X##_f0) != 0)); \ + (((X##_f1 << (2*_FP_W_TYPE_SIZE - (N))) | X##_f0) != 0)); \ X##_f1 = 0; \ } \ } while (0) diff --git a/include/net/ip_fib.h b/include/net/ip_fib.h index 804f34927..3b84c5bff 100644 --- a/include/net/ip_fib.h +++ b/include/net/ip_fib.h @@ -276,4 +276,4 @@ static inline void fib_res_put(struct fib_result *res) } -#endif _NET_FIB_H +#endif /* _NET_FIB_H */ diff --git a/include/net/irda/irda.h b/include/net/irda/irda.h index 41ad4aa0f..bb78341f2 100644 --- a/include/net/irda/irda.h +++ b/include/net/irda/irda.h @@ -177,9 +177,10 @@ typedef union { */ struct irda_skb_cb { magic_t magic; /* Be sure that we can trust the information */ - __u32 speed; /* The Speed this frame should be sent with */ + __u32 next_speed; /* The Speed to be set *after* this frame */ __u16 mtt; /* Minimum turn around time */ __u16 xbofs; /* Number of xbofs required, used by SIR mode */ + __u16 next_xbofs; /* Number of xbofs required *after* this frame */ void *context; /* May be used by drivers */ void (*destructor)(struct sk_buff *skb); /* Used for flow control */ __u16 xbofs_delay; /* Number of xbofs used for generating the mtt */ diff --git a/include/net/irda/irda_device.h b/include/net/irda/irda_device.h index ac66f61bd..5e59c7545 100644 --- a/include/net/irda/irda_device.h +++ b/include/net/irda/irda_device.h @@ -218,30 +218,55 @@ extern inline __u16 irda_get_mtt(struct sk_buff *skb) #endif /* - * Function irda_get_speed (skb) + * Function irda_get_next_speed (skb) * - * Extact the speed this frame should be sent out with from the skb + * Extract the speed that should be set *after* this frame from the skb * + * Note : return -1 for user space frames */ -#define irda_get_speed(skb) ( \ +#define irda_get_next_speed(skb) ( \ (((struct irda_skb_cb*) skb->cb)->magic == LAP_MAGIC) ? \ - ((struct irda_skb_cb *)(skb->cb))->speed : 9600 \ + ((struct irda_skb_cb *)(skb->cb))->next_speed : -1 \ ) #if 0 -extern inline __u32 irda_get_speed(struct sk_buff *skb) +extern inline __u32 irda_get_next_speed(struct sk_buff *skb) { __u32 speed; if (((struct irda_skb_cb *)(skb->cb))->magic != LAP_MAGIC) - speed = 9600; + speed = -1; else - speed = ((struct irda_skb_cb *)(skb->cb))->speed; + speed = ((struct irda_skb_cb *)(skb->cb))->next_speed; return speed; } #endif +/* + * Function irda_get_next_xbofs (skb) + * + * Extract the xbofs that should be set for this frame from the skb + * + * Note : default to 10 for user space frames + */ +#define irda_get_xbofs(skb) ( \ + (((struct irda_skb_cb*) skb->cb)->magic == LAP_MAGIC) ? \ + ((struct irda_skb_cb *)(skb->cb))->xbofs : 10 \ +) + +/* + * Function irda_get_next_xbofs (skb) + * + * Extract the xbofs that should be set *after* this frame from the skb + * + * Note : return -1 for user space frames + */ +#define irda_get_next_xbofs(skb) ( \ + (((struct irda_skb_cb*) skb->cb)->magic == LAP_MAGIC) ? \ + ((struct irda_skb_cb *)(skb->cb))->next_xbofs : -1 \ +) + #endif /* IRDA_DEVICE_H */ diff --git a/include/net/irda/irlap.h b/include/net/irda/irlap.h index 3c1b95f50..d7fbe69cd 100644 --- a/include/net/irda/irlap.h +++ b/include/net/irda/irlap.h @@ -168,7 +168,7 @@ struct irlap_cb { hashbin_t *discovery_log; discovery_t *discovery_cmd; - __u32 speed; + __u32 speed; /* Link speed */ struct qos_info qos_tx; /* QoS requested by peer */ struct qos_info qos_rx; /* QoS requested by self */ @@ -179,6 +179,7 @@ struct irlap_cb { int mtt_required; /* Minumum turnaround time required */ int xbofs_delay; /* Nr of XBOF's used to MTT */ int bofs_count; /* Negotiated extra BOFs */ + int next_bofs; /* Negotiated extra BOFs after next frame */ #ifdef CONFIG_IRDA_COMPRESSION struct irda_compressor compressor; @@ -237,7 +238,7 @@ void irlap_wait_min_turn_around(struct irlap_cb *, struct qos_info *); void irlap_init_qos_capabilities(struct irlap_cb *, struct qos_info *); void irlap_apply_default_connection_parameters(struct irlap_cb *self); -void irlap_apply_connection_parameters(struct irlap_cb *self); +void irlap_apply_connection_parameters(struct irlap_cb *self, int now); void irlap_set_local_busy(struct irlap_cb *self, int status); #define IRLAP_GET_HEADER_SIZE(self) 2 /* Will be different when we get VFIR */ diff --git a/include/net/irda/irlap_frame.h b/include/net/irda/irlap_frame.h index 2c28accc1..99a2a95e6 100644 --- a/include/net/irda/irlap_frame.h +++ b/include/net/irda/irlap_frame.h @@ -110,6 +110,7 @@ struct snrm_frame { __u8 ncaddr; } PACK; +void irlap_queue_xmit(struct irlap_cb *self, struct sk_buff *skb); void irlap_send_discovery_xid_frame(struct irlap_cb *, int S, __u8 s, __u8 command, discovery_t *discovery); void irlap_send_snrm_frame(struct irlap_cb *, struct qos_info *); diff --git a/include/net/irda/qos.h b/include/net/irda/qos.h index d95f7ead9..ab4574975 100644 --- a/include/net/irda/qos.h +++ b/include/net/irda/qos.h @@ -100,10 +100,19 @@ void irda_qos_compute_intersection(struct qos_info *, struct qos_info *); __u32 irlap_max_line_capacity(__u32 speed, __u32 max_turn_time); __u32 irlap_requested_line_capacity(struct qos_info *qos); -__u32 irlap_min_turn_time_in_bytes(__u32 speed, __u32 min_turn_time); int msb_index(__u16 byte); void irda_qos_bits_to_value(struct qos_info *qos); +/* So simple, how could we not inline those two ? + * Note : one byte is 10 bits if you include start and stop bits + * Jean II */ +#define irlap_min_turn_time_in_bytes(speed, min_turn_time) ( \ + speed * min_turn_time / 10000000 \ +) +#define irlap_xbofs_in_usec(speed, xbofs) ( \ + xbofs * 10000000 / speed \ +) + #endif diff --git a/include/net/scm.h b/include/net/scm.h index 98c2dc916..e26b43f5e 100644 --- a/include/net/scm.h +++ b/include/net/scm.h @@ -63,5 +63,5 @@ static __inline__ void scm_recv(struct socket *sock, struct msghdr *msg, } -#endif __LINUX_NET_SCM_H +#endif /* __LINUX_NET_SCM_H */ diff --git a/include/pcmcia/bulkmem.h b/include/pcmcia/bulkmem.h index c9bdab7a1..c21d64d62 100644 --- a/include/pcmcia/bulkmem.h +++ b/include/pcmcia/bulkmem.h @@ -18,7 +18,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/pcmcia/bus_ops.h b/include/pcmcia/bus_ops.h index bd4c2958f..d99634af1 100644 --- a/include/pcmcia/bus_ops.h +++ b/include/pcmcia/bus_ops.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/pcmcia/ciscode.h b/include/pcmcia/ciscode.h index d449b4234..7fd7da26d 100644 --- a/include/pcmcia/ciscode.h +++ b/include/pcmcia/ciscode.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/pcmcia/cisreg.h b/include/pcmcia/cisreg.h index 884d46de0..803d2c369 100644 --- a/include/pcmcia/cisreg.h +++ b/include/pcmcia/cisreg.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/pcmcia/cistpl.h b/include/pcmcia/cistpl.h index 5f9701fe2..a14f0b913 100644 --- a/include/pcmcia/cistpl.h +++ b/include/pcmcia/cistpl.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/pcmcia/cs.h b/include/pcmcia/cs.h index bfbf3d744..2bd505c96 100644 --- a/include/pcmcia/cs.h +++ b/include/pcmcia/cs.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/pcmcia/cs_types.h b/include/pcmcia/cs_types.h index 186ce9f3e..f6382c4ba 100644 --- a/include/pcmcia/cs_types.h +++ b/include/pcmcia/cs_types.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/pcmcia/driver_ops.h b/include/pcmcia/driver_ops.h index bb95644b3..7aae5e1de 100644 --- a/include/pcmcia/driver_ops.h +++ b/include/pcmcia/driver_ops.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/pcmcia/ds.h b/include/pcmcia/ds.h index e50033bc6..65a5d07a3 100644 --- a/include/pcmcia/ds.h +++ b/include/pcmcia/ds.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/pcmcia/ftl.h b/include/pcmcia/ftl.h index deab295b6..62a8071f2 100644 --- a/include/pcmcia/ftl.h +++ b/include/pcmcia/ftl.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/pcmcia/mem_op.h b/include/pcmcia/mem_op.h index d7f70599d..e80560075 100644 --- a/include/pcmcia/mem_op.h +++ b/include/pcmcia/mem_op.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/pcmcia/memory.h b/include/pcmcia/memory.h index c87a3645f..ef87944dd 100644 --- a/include/pcmcia/memory.h +++ b/include/pcmcia/memory.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use diff --git a/include/pcmcia/ss.h b/include/pcmcia/ss.h index e50861c1b..02f3b8e87 100644 --- a/include/pcmcia/ss.h +++ b/include/pcmcia/ss.h @@ -16,7 +16,7 @@ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the - * terms of the GNU Public License version 2 (the "GPL"), in which + * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use |