diff options
| -rw-r--r-- | arch/mips/mm/r4xx0.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/mm/r4xx0.c b/arch/mips/mm/r4xx0.c index f83f41df8..974343069 100644 --- a/arch/mips/mm/r4xx0.c +++ b/arch/mips/mm/r4xx0.c @@ -2432,6 +2432,14 @@ try_again: flush_cache_all(); write_32bit_cp0_register(CP0_WIRED, 0); + + /* + * You should never change this register: + * - On R4600 1.7 the tlbp never hits for pages smaller than + * the value in the c0_pagemask register. + * - The entire mm handling assumes the c0_pagemask register to + * be set for 4kb pages. + */ write_32bit_cp0_register(CP0_PAGEMASK, PM_4K); flush_tlb_all(); } |