diff options
| -rw-r--r-- | arch/mips64/sgi-ip27/ip27-init.c | 17 | ||||
| -rw-r--r-- | arch/mips64/sgi-ip27/ip27-klnuma.c | 8 | ||||
| -rw-r--r-- | include/asm-mips64/smp.h | 24 | ||||
| -rw-r--r-- | include/asm-mips64/sn/types.h | 1 |
4 files changed, 35 insertions, 15 deletions
diff --git a/arch/mips64/sgi-ip27/ip27-init.c b/arch/mips64/sgi-ip27/ip27-init.c index 0aae67a69..28bb7243c 100644 --- a/arch/mips64/sgi-ip27/ip27-init.c +++ b/arch/mips64/sgi-ip27/ip27-init.c @@ -1,3 +1,12 @@ +/* + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file "COPYING" in the main directory of this + * archive for more details. + * + * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com) + * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc. + */ + #include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> @@ -26,11 +35,9 @@ #define CPU_NONE (cpuid_t)-1 -#define CPUMASK_CLRALL(p) (p) = 0 -#define CPUMASK_SETB(p, bit) (p) |= 1 << (bit) -#define CPUMASK_CLRB(p, bit) (p) &= ~(1ULL << (bit)) -#define CPUMASK_TSTB(p, bit) ((p) & (1ULL << (bit))) - +/* + * The following should work till 64 nodes, ie 128p SN0s. + */ #define CNODEMASK_CLRALL(p) (p) = 0 #define CNODEMASK_TSTB(p, bit) ((p) & (1ULL << (bit))) #define CNODEMASK_SETB(p, bit) ((p) |= 1ULL << (bit)) diff --git a/arch/mips64/sgi-ip27/ip27-klnuma.c b/arch/mips64/sgi-ip27/ip27-klnuma.c index 5891e017e..c0accd440 100644 --- a/arch/mips64/sgi-ip27/ip27-klnuma.c +++ b/arch/mips64/sgi-ip27/ip27-klnuma.c @@ -1,6 +1,7 @@ /* * Ported from IRIX to Linux by Kanoj Sarcar, 06/08/00. - * Copyright 2000 Silicon Graphics, Inc. + * Copyright 2000 - 2001 Silicon Graphics, Inc. + * Copyright 2000 - 2001 Kanoj Sarcar (kanoj@sgi.com) */ #include <linux/config.h> #include <linux/init.h> @@ -9,6 +10,7 @@ #include <linux/string.h> #include <asm/page.h> +#include <asm/smp.h> #include <asm/sn/types.h> #include <asm/sn/arch.h> #include <asm/sn/gda.h> @@ -17,10 +19,6 @@ #include <asm/sn/mapped_kernel.h> #include <asm/sn/sn_private.h> -#define CPUMASK_CLRALL(p) (p) = 0 -#define CPUMASK_SETB(p, bit) (p) |= 1 << (bit) -#define CPUMASK_TSTB(p, bit) ((p) & (1ULL << (bit))) - extern char _end; static cpumask_t ktext_repmask; diff --git a/include/asm-mips64/smp.h b/include/asm-mips64/smp.h index 9b9bf41e3..8ec23cc47 100644 --- a/include/asm-mips64/smp.h +++ b/include/asm-mips64/smp.h @@ -1,16 +1,25 @@ +/* + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file "COPYING" in the main directory of this + * archive for more details. + * + * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com) + * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc. + */ + #ifndef __ASM_SMP_H #define __ASM_SMP_H #include <linux/config.h> +#include <linux/threads.h> #ifdef CONFIG_SMP -#include <linux/threads.h> #include <linux/irq.h> #if 0 struct cpuinfo_mips { /* XXX */ - unsigned long loops_per_jiffy; + unsigned long loops_per_sec; unsigned long last_asn; unsigned long *pgd_cache; unsigned long *pte_cache; @@ -38,8 +47,15 @@ extern int __cpu_number_map[NR_CPUS]; extern int __cpu_logical_map[NR_CPUS]; #define cpu_logical_map(cpu) __cpu_logical_map[cpu] -#endif +#endif /* CONFIG_SMP */ #define NO_PROC_ID (-1) -#endif __ASM_SMP_H +typedef unsigned long cpumask_t; + +#define CPUMASK_CLRALL(p) (p) = 0 +#define CPUMASK_SETB(p, bit) (p) |= 1 << (bit) +#define CPUMASK_CLRB(p, bit) (p) &= ~(1ULL << (bit)) +#define CPUMASK_TSTB(p, bit) ((p) & (1ULL << (bit))) + +#endif /* __ASM_SMP_H */ diff --git a/include/asm-mips64/sn/types.h b/include/asm-mips64/sn/types.h index 40aced527..8652fd35d 100644 --- a/include/asm-mips64/sn/types.h +++ b/include/asm-mips64/sn/types.h @@ -13,7 +13,6 @@ #include <linux/types.h> typedef unsigned long cpuid_t; -typedef unsigned long cpumask_t; typedef unsigned long cnodemask_t; typedef signed short nasid_t; /* node id in numa-as-id space */ typedef signed short cnodeid_t; /* node id in compact-id space */ |