diff options
Diffstat (limited to 'arch/m68k/q40')
-rw-r--r-- | arch/m68k/q40/Makefile | 14 | ||||
-rw-r--r-- | arch/m68k/q40/README | 121 | ||||
-rw-r--r-- | arch/m68k/q40/config.c | 425 | ||||
-rw-r--r-- | arch/m68k/q40/q40ints.c | 347 |
4 files changed, 907 insertions, 0 deletions
diff --git a/arch/m68k/q40/Makefile b/arch/m68k/q40/Makefile new file mode 100644 index 000000000..90858884f --- /dev/null +++ b/arch/m68k/q40/Makefile @@ -0,0 +1,14 @@ +# +# Makefile for Linux arch/m68k/q40 source directory +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# +# Note 2! The CFLAGS definitions are now in the main makefile... + +O_TARGET := q40.o +O_OBJS := config.o q40ints.o + + +include $(TOPDIR)/Rules.make diff --git a/arch/m68k/q40/README b/arch/m68k/q40/README new file mode 100644 index 000000000..5433796cb --- /dev/null +++ b/arch/m68k/q40/README @@ -0,0 +1,121 @@ +Linux for the Q40 +================= + +You may try http://www.geocities.com/SiliconValley/Bay/2602/ for +some up to date information. Booter and other tools will be also +available from this place and ftp.uni-erlangen.de/linux/680x0/q40/ +and mirrors. + +Hints to documentation usually refer to the linux source tree in +/usr/src/linux unless URL given. + +It seems IRQ unmasking can't be safely done on a Q40. Autoprobing is +not yet implemented - do not try it! (See below) + +For a list of kernel commandline options read the documentation for the +particular device drivers. + +The floppy imposes a very high interrupt load on the CPU, approx 30K/s. +When something blocks interrupts (HD) it will loose some of them, so far +this is not known to have caused any data loss. On hihgly loaded systems +it can make the floppy very slow. Other Q40 OS' simply poll the floppy +for this reason - something that can't be done in Linux. +Only possible cure is getting a 82072 contoler with fifo instead of +the 8272A + +drivers used by the Q40, appart from the very obvious (console etc.): + drivers/char/q40_keyb.c # use PC keymaps for national keyboards + serial.c # normal PC driver - any speed + lp.c # printer driver + char/joystick/* # most of this should work + block/q40ide.c # startup for ide + ide* # see Documentation/ide.txt + floppy.c # normal PC driver, DMA emu in asm/floppy.h + # and arch/m68k/kernel/entry.S + # see drivers/block/README.fd + video/q40fb.c + misc/parport_pc.c + +Various other PC drivers can be enabled simply by adding them to +arch/m68k/config.in, especially 8 bit devices should be without any +problems. For cards using 16bit io/mem more care is required, like +checking byteorder issues, hacking memcpy_*_io etc. + + +Debugging +========= + +Upon startup the kernel will usually output "ABCQGHIJ" into the SRAM, +preceded by the booter signature. This is a trace just in case something +went wrong during earliest setup stages. +*Changed* to preserve SRAM contents by default, this is only done when +requested - SRAM must start with '%LX$' signature to do this. '-d' option +to 'lxx' loader enables this. + +SRAM can also be used as additional console device, use debug=mem. +This will save kernel startup msgs into SRAM, the screen will display +only the penguin - and shell prompt if it gets that far.. + +Serial console works and can also be used for debugging, provided serial +initialisation works. + +Most problems seem to be caused by fawlty or badly configured io-cards or +harddrives anyway..there are so many things that can go wrong here. +Make sure to configure the parallel port as SPP for first testing..the +Q40 may have trouble with parallel interrupts. + + +Q40 Hardware Description +======================== + +This is just an overview, see asm-m68k/* for details ask if you have any +questions. + +The Q40 consists of a 68040@40 MHz, 1MB video RAM, up to 32MB RAM, AT-style +keyboard interface, 1 Programmable LED, 2 8bit DACs and up to 1MB ROM, 1MB +shadow ROM. + +Most interfacing like floppy, hd, serial, parallel ports is done via ISA +slots. The ISA io and mem range is mapped (sparse&byteswapped!) into separate +regions of the memory. +The main interrupt register IIRQ_REG will indicate whether an IRQ was internal +or from some ISA devices, EIRQ_REG can distinguish up to 8 ISA IRQs. + +The Q40 custom chip is programmable to provide 2 periodic timers: + - 50 or 200 Hz - level 2, !!THIS CANT BE DISABLED!! + - 10 or 20 KHz - level 4 (and possibly 6 - hardware decoding..) + +Linux uses the 200 Hz interrupt for timer and beep by default. + + +Interrupts +========== + +q40 master chip handles only level triggered interrupts :-(( +further limitation is no disabling etc. Unless someone finds +some ingenious clue this means autoprobing will never work. +Parallel port interrupts cause most trouble.. + +IRQ sharing is not yet implemented. + + +Keyboard +======== + +q40 receives AT make/break codes from the keyboard, these are translated to +the PC scancodes x86 Linux uses. So by theory every national keyboard should +work just by loading the apropriate x86 keytable - see any national-HOWTO. + +Unfortunately the AT->PC translation isn't quite trivial and even worse, my +documentation of it is absolutely minimal - thus some exotic keys may not +behave exactly as expected. + +There is still hope that it can be fixed completely though. If you encounter +problems, email me idealy this: + - exact keypress/release sequence + - 'showkey -s' run on q40, non-X session + - 'showkey -s' run on a PC, non-X session + - AT codes as displayed by the q40 debuging ROM +btw if the showkey output from PC and Q40 doesn't differ then you have some +classic configuration problem - don't send me anything in this case + diff --git a/arch/m68k/q40/config.c b/arch/m68k/q40/config.c new file mode 100644 index 000000000..e3c35c60c --- /dev/null +++ b/arch/m68k/q40/config.c @@ -0,0 +1,425 @@ +/* + * arch/m68k/q40/config.c + * + * originally based on: + * + * linux/bvme/config.c + * + * Copyright (C) 1993 Hamish Macdonald + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file README.legal in the main directory of this archive + * for more details. + */ + +#include <stdarg.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/kd.h> +#include <linux/tty.h> +#include <linux/console.h> +#include <linux/linkage.h> +#include <linux/init.h> +#include <linux/major.h> + +#include <asm/bootinfo.h> +#include <asm/system.h> +#include <asm/pgtable.h> +#include <asm/setup.h> +#include <asm/irq.h> +#include <asm/traps.h> +#include <asm/machdep.h> +#include <asm/q40_master.h> +#include <asm/keyboard.h> + +extern void fd_floppy_eject(void); +extern void fd_floppy_setup(char *str, int *ints); + +extern void q40_process_int (int level, struct pt_regs *regs); +extern void (*q40_sys_default_handler[]) (int, void *, struct pt_regs *); /* added just for debugging */ +extern void q40_init_IRQ (void); +extern void q40_free_irq (unsigned int, void *); +extern int q40_get_irq_list (char *); +extern void q40_enable_irq (unsigned int); +extern void q40_disable_irq (unsigned int); +static void q40_get_model(char *model); +static int q40_get_hardware_list(char *buffer); +extern int q40_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), unsigned long flags, const char *devname, void *dev_id); +extern void q40_sched_init(void (*handler)(int, void *, struct pt_regs *)); +extern int q40_keyb_init(void); +extern int q40_kbdrate (struct kbd_repeat *); +extern unsigned long q40_gettimeoffset (void); +extern void q40_gettod (int *year, int *mon, int *day, int *hour, + int *min, int *sec); +extern int q40_hwclk (int, struct hwclk_time *); +extern int q40_set_clock_mmss (unsigned long); +extern void q40_reset (void); +extern void q40_waitbut(void); +void q40_set_vectors (void); +extern void (*kd_mksound)(unsigned int, unsigned int); +void q40_mksound(unsigned int /*freq*/, unsigned int /*ticks*/ ); + +extern char *saved_command_line; +extern char m68k_debug_device[]; +static void q40_mem_console_write(struct console *co, const char *b, + unsigned int count); + +static int ql_ticks=0; +static int sound_ticks=0; + +static unsigned char bcd2bin (unsigned char b); +static unsigned char bin2bcd (unsigned char b); + +static int q40_wait_key(struct console *co){return 0;} +static struct console q40_console_driver = { + "debug", + NULL, /* write */ + NULL, /* read */ + NULL, /* device */ + q40_wait_key, /* wait_key */ + NULL, /* unblank */ + NULL, /* setup */ + CON_PRINTBUFFER, + -1, + 0, + NULL +}; + + +/* Save tick handler routine pointer, will point to do_timer() in + * kernel/sched.c */ + +/* static void (*tick_handler)(int, void *, struct pt_regs *); */ + + +/* early debugging function:*/ +extern char *q40_mem_cptr; /*=(char *)0xff020000;*/ +static int _cpleft; + +static void q40_mem_console_write(struct console *co, const char *s, + unsigned int count) +{ + char *p=(char *)s; + + if (count<_cpleft) + while (count-- >0){ + *q40_mem_cptr=*p++; + q40_mem_cptr+=4; + _cpleft--; + } +} +#if 0 +void printq40(char *str) +{ + int l=strlen(str); + char *p=q40_mem_cptr; + + while (l-- >0 && _cpleft-- >0) + { + *p=*str++; + p+=4; + } + q40_mem_cptr=p; +} +#endif + +#if 0 +int q40_kbdrate (struct kbd_repeat *k) +{ + return 0; +} +#endif + +void q40_reset() +{ + + printk ("\n\n*******************************************\n" + "Called q40_reset : press the RESET button!! \n"); + printk( "*******************************************\n"); + + while(1) + ; +} + +static void q40_get_model(char *model) +{ + sprintf(model, "Q40"); +} + + +/* No hardware options on Q40? */ + +static int q40_get_hardware_list(char *buffer) +{ + *buffer = '\0'; + return 0; +} + + +__initfunc(void config_q40(void)) +{ + mach_sched_init = q40_sched_init; /* ok */ + /*mach_kbdrate = q40_kbdrate;*/ /* unneeded ?*/ + mach_keyb_init = q40_keyb_init; /* OK */ + mach_init_IRQ = q40_init_IRQ; + mach_gettimeoffset = q40_gettimeoffset; + mach_gettod = q40_gettod; + mach_hwclk = q40_hwclk; + mach_set_clock_mmss = q40_set_clock_mmss; +/* mach_mksound = q40_mksound; */ + mach_reset = q40_reset; /* use reset button instead !*/ + mach_free_irq = q40_free_irq; + mach_process_int = q40_process_int; + mach_get_irq_list = q40_get_irq_list; + mach_request_irq = q40_request_irq; + enable_irq = q40_enable_irq; + disable_irq = q40_disable_irq; + mach_default_handler = &q40_sys_default_handler; + mach_get_model = q40_get_model; /* no use..*/ + mach_get_hardware_list = q40_get_hardware_list; /* no use */ + kd_mksound = q40_mksound; + /*mach_kbd_leds = q40kbd_leds;*/ +#ifdef CONFIG_MAGIC_SYSRQ + mach_sysrq_key = 0x54; +#endif + conswitchp = &dummy_con; +#ifdef CONFIG_BLK_DEV_FD + mach_floppy_setup = fd_floppy_setup; + mach_floppy_eject = fd_floppy_eject; + /**/ +#endif + + mach_max_dma_address = 0; /* no DMA at all */ + + +/* userfull for early debuging stages writes kernel messages into SRAM */ + + if (!strncmp( m68k_debug_device,"mem",3 )) + { + /*printk("using NVRAM debug, q40_mem_cptr=%p\n",q40_mem_cptr);*/ + _cpleft=2000-((long)q40_mem_cptr-0xff020000)/4; + q40_console_driver.write = q40_mem_console_write; + register_console(&q40_console_driver); + } +} + + +int q40_parse_bootinfo(const struct bi_record *rec) +{ + return 1; /* unknown */ +} + +#define DAC_LEFT ((unsigned char *)0xff008000) +#define DAC_RIGHT ((unsigned char *)0xff008004) +void q40_mksound(unsigned int hz, unsigned int ticks) +{ + /* for now ignore hz, except that hz==0 switches off sound */ + /* simply alternate the ampl 0-255-0-.. at 200Hz */ + if (hz==0) + { + if (sound_ticks) + sound_ticks=1; /* atomic - no irq spinlock used */ + + *DAC_LEFT=0; + *DAC_RIGHT=0; + + return; + } + /* sound itself is done in q40_timer_int */ + if (sound_ticks == 0) sound_ticks=1000; /* pretty long beep */ + sound_ticks=ticks<<1; +} + +static void (*q40_timer_routine)(int, void *, struct pt_regs *); + +static void q40_timer_int (int irq, void *dev_id, struct pt_regs *fp) +{ +#if (HZ==10000) + master_outb(-1,SAMPLE_CLEAR_REG); +#else /* must be 50 or 100 */ + master_outb(-1,FRAME_CLEAR_REG); +#endif + +#if (HZ==100) + ql_ticks = ql_ticks ? 0 : 1; + if (sound_ticks) + { + unsigned char sval=(sound_ticks & 1) ? 0 : 255; + sound_ticks--; + *DAC_LEFT=sval; + *DAC_RIGHT=sval; + } + if (ql_ticks) return; +#endif + q40_timer_routine(irq, dev_id, fp); +} + + +void q40_sched_init (void (*timer_routine)(int, void *, struct pt_regs *)) +{ + int timer_irq; + + q40_timer_routine = timer_routine; + +#if (HZ==10000) + timer_irq=Q40_IRQ_TIMER; +#else + timer_irq=Q40_IRQ_FRAME; +#endif + + /*printk("registering sched/timer IRQ %d\n", timer_irq);*/ + + if (request_irq(timer_irq, q40_timer_int, 0, + "timer", q40_timer_int)) + panic ("Couldn't register timer int"); + +#if (HZ==10000) + master_outb(SAMPLE_LOW,SAMPLE_RATE_REG); + master_outb(-1,SAMPLE_CLEAR_REG); + master_outb(1,SAMPLE_ENABLE_REG); +#else + master_outb(-1,FRAME_CLEAR_REG); /* not necessary ? */ +#if (HZ==100) + master_outb( 1,FRAME_RATE_REG); +#endif +#endif +} + + +unsigned long q40_gettimeoffset (void) +{ +#if (HZ==100) + return 5000*(ql_ticks!=0); +#else + return 0; +#endif +} + +extern void q40_gettod (int *year, int *mon, int *day, int *hour, + int *min, int *sec) +{ + RTC_CTRL |= RTC_READ; + *year = bcd2bin (RTC_YEAR); + *mon = bcd2bin (RTC_MNTH)-1; + *day = bcd2bin (RTC_DATE); + *hour = bcd2bin (RTC_HOUR); + *min = bcd2bin (RTC_MINS); + *sec = bcd2bin (RTC_SECS); + RTC_CTRL &= ~(RTC_READ); + +} + +static unsigned char bcd2bin (unsigned char b) +{ + return ((b>>4)*10 + (b&15)); +} + +static unsigned char bin2bcd (unsigned char b) +{ + return (((b/10)*16) + (b%10)); +} + + +/* + * Looks like op is non-zero for setting the clock, and zero for + * reading the clock. + * + * struct hwclk_time { + * unsigned sec; 0..59 + * unsigned min; 0..59 + * unsigned hour; 0..23 + * unsigned day; 1..31 + * unsigned mon; 0..11 + * unsigned year; 00... + * int wday; 0..6, 0 is Sunday, -1 means unknown/don't set + * }; + */ + +int q40_hwclk(int op, struct hwclk_time *t) +{ + if (op) + { /* Write.... */ + RTC_CTRL |= RTC_WRITE; + + RTC_SECS = bin2bcd(t->sec); + RTC_MINS = bin2bcd(t->min); + RTC_HOUR = bin2bcd(t->hour); + RTC_DATE = bin2bcd(t->day); + RTC_MNTH = bin2bcd(t->mon + 1); + RTC_YEAR = bin2bcd(t->year%100); + if (t->wday >= 0) + RTC_DOW = bin2bcd(t->wday+1); + + RTC_CTRL &= ~(RTC_WRITE); + } + else + { /* Read.... */ + RTC_CTRL |= RTC_READ; + + t->year = bcd2bin (RTC_YEAR); + t->mon = bcd2bin (RTC_MNTH)-1; + t->day = bcd2bin (RTC_DATE); + t->hour = bcd2bin (RTC_HOUR); + t->min = bcd2bin (RTC_MINS); + t->sec = bcd2bin (RTC_SECS); + + RTC_CTRL &= ~(RTC_READ); + + if (t->year < 70) + t->year += 100; + t->wday = bcd2bin(RTC_DOW)-1; + + } + + return 0; +} + +/* + * Set the minutes and seconds from seconds value 'nowtime'. Fail if + * clock is out by > 30 minutes. Logic lifted from atari code. + * Algorithm is to wait for the 10ms register to change, and then to + * wait a short while, and then set it. + */ + +int q40_set_clock_mmss (unsigned long nowtime) +{ + int retval = 0; + short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; + + int rtc_minutes; + + + rtc_minutes = bcd2bin (RTC_MINS); + + if ((rtc_minutes < real_minutes + ? real_minutes - rtc_minutes + : rtc_minutes - real_minutes) < 30) + { + RTC_CTRL |= RTC_WRITE; + RTC_MINS = bin2bcd(real_minutes); + RTC_SECS = bin2bcd(real_seconds); + RTC_CTRL &= ~(RTC_WRITE); + } + else + retval = -1; + + + return retval; +} + +extern void q40kbd_init_hw(void); + +int q40_keyb_init (void) +{ + q40kbd_init_hw(); + return 0; +} + +#if 0 +/* dummy to cause */ +void q40_slow_io() +{ + return; +} +#endif diff --git a/arch/m68k/q40/q40ints.c b/arch/m68k/q40/q40ints.c new file mode 100644 index 000000000..e9b5a5b1f --- /dev/null +++ b/arch/m68k/q40/q40ints.c @@ -0,0 +1,347 @@ +/* + * arch/m68k/q40/q40ints.c + * + * Copyright (C) 1999 Richard Zidlicky + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + * + * losely based on bvme6000ints.c + * + */ + +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/string.h> + +#include <asm/ptrace.h> +#include <asm/system.h> +#include <asm/irq.h> +#include <asm/traps.h> + +#include <asm/q40_master.h> +#include <asm/q40ints.h> + +/* + * Q40 IRQs are defined as follows: + * 3,4,5,6,7,10,11,14,15 : ISA dev IRQs + * 16-31: reserved + * 32 : keyboard int + * 33 : frame int (50 Hz periodic timer) + * 34 : sample int (10/20 KHz periodic timer) + * +*/ + +extern int ints_inited; + + +void q40_irq2_handler (int, void *, struct pt_regs *fp); + + +extern void (*q40_sys_default_handler[]) (int, void *, struct pt_regs *); /* added just for debugging */ + +static void q40_defhand (int irq, void *dev_id, struct pt_regs *fp); +static void sys_default_handler(int lev, void *dev_id, struct pt_regs *regs); + +/* + * This should ideally be 4 elements only, for speed. + */ + +#define DEVNAME_SIZE 24 + +static struct { + void (*handler)(int, void *, struct pt_regs *); + unsigned long flags; + void *dev_id; + char devname[DEVNAME_SIZE]; + unsigned count; +} irq_tab[Q40_IRQ_MAX+1]; + +/* + * void q40_init_IRQ (void) + * + * Parameters: None + * + * Returns: Nothing + * + * This function is called during kernel startup to initialize + * the q40 IRQ handling routines. + */ + +void q40_init_IRQ (void) +{ + int i; + + for (i = 0; i <= Q40_IRQ_MAX; i++) { + irq_tab[i].handler = q40_defhand; + irq_tab[i].flags = IRQ_FLG_STD; + irq_tab[i].dev_id = NULL; + irq_tab[i].devname[0] = 0; + irq_tab[i].count = 0; + } + + /* setup handler for ISA ints */ + sys_request_irq(IRQ2,q40_irq2_handler, IRQ_FLG_LOCK, "q40 ISA and master chip", NULL); + + /* now enable some ints.. */ + +#if 0 /* has been abandoned */ + master_outb(1,SER_ENABLE_REG); +#endif + master_outb(1,EXT_ENABLE_REG); + + /* would be spurious ints by now, q40kbd_init_hw() does that */ + master_outb(0,KEY_IRQ_ENABLE_REG); +} + +int q40_request_irq(unsigned int irq, + void (*handler)(int, void *, struct pt_regs *), + unsigned long flags, const char *devname, void *dev_id) +{ + /*printk("q40_request_irq %d, %s\n",irq,devname);*/ + + if (irq > Q40_IRQ_MAX || (irq>15 && irq<32)) { + printk("%s: Incorrect IRQ %d from %s\n", __FUNCTION__, irq, devname); + return -ENXIO; + } + + /* test for ISA ints not implemented by HW */ + if (irq<15) + { + switch (irq){ + case 1: case 2: case 8: case 9: + case 12: case 13: + printk("%s: ISA IRQ %d from %s not implemented by HW\n", __FUNCTION__, irq, devname); + return -ENXIO; + default: + } + } + + if (irq<Q40_IRQ_TIMER) + { + if (irq==11) { + printk("warning IRQ 10 and 11 not distinguishable\n"); + irq=10; + } + if (!(irq_tab[irq].flags & IRQ_FLG_STD)) + { + if (irq_tab[irq].flags & IRQ_FLG_LOCK) + { + printk("%s: IRQ %d from %s is not replaceable\n", + __FUNCTION__, irq, irq_tab[irq].devname); + return -EBUSY; + } + if (flags & IRQ_FLG_REPLACE) + { + printk("%s: %s can't replace IRQ %d from %s\n", + __FUNCTION__, devname, irq, irq_tab[irq].devname); + return -EBUSY; + } + } + /*printk("IRQ %d set to handler %p\n",irq,handler);*/ + irq_tab[irq].handler = handler; + irq_tab[irq].flags = flags; + irq_tab[irq].dev_id = dev_id; + strncpy(irq_tab[irq].devname,devname,DEVNAME_SIZE); + return 0; + } + else { + /* Q40_IRQ_TIMER :somewhat special actions required here ..*/ + sys_request_irq(4,handler,flags,devname,dev_id); + sys_request_irq(6,handler,flags,devname,dev_id); + return 0; + } +} + +void q40_free_irq(unsigned int irq, void *dev_id) +{ + if (irq > Q40_IRQ_MAX || (irq>15 && irq<32)) { + printk("%s: Incorrect IRQ %d, dev_id %x \n", __FUNCTION__, irq, (unsigned)dev_id); + return; + } + + /* test for ISA ints not implemented by HW */ + if (irq<15) { + switch (irq){ + case 1: case 2: case 8: case 9: + case 12: case 13: + printk("%s: ISA IRQ %d from %x illegal\n", __FUNCTION__, irq, (unsigned)dev_id); + return; + default: + } + } + + if (irq<Q40_IRQ_TIMER){ + if (irq==11) irq=10; + if (irq_tab[irq].dev_id != dev_id) + printk("%s: Removing probably wrong IRQ %d from %s\n", + __FUNCTION__, irq, irq_tab[irq].devname); + + irq_tab[irq].handler = q40_defhand; + irq_tab[irq].flags = IRQ_FLG_STD; + irq_tab[irq].dev_id = NULL; + /* irq_tab[irq].devname = NULL; */ + } else { /* == Q40_IRQ_TIMER */ + sys_free_irq(4,dev_id); + sys_free_irq(6,dev_id); + } +} + +#if 1 +void q40_process_int (int level, struct pt_regs *fp) +{ + printk("unexpected interrupt %x\n",level); +} +#endif + +/* + * tables to translate bits into IRQ numbers + * it is a good idea to order the entries by priority + * +*/ + +struct IRQ_TABLE{ unsigned mask; int irq ;}; + +static struct IRQ_TABLE iirqs[]={ + {IRQ_FRAME_MASK,Q40_IRQ_FRAME}, + {IRQ_KEYB_MASK,Q40_IRQ_KEYBOARD}, + {0,0}}; +static struct IRQ_TABLE eirqs[]={ + {IRQ3_MASK,3}, /* ser 1 */ + {IRQ4_MASK,4}, /* ser 2 */ + {IRQ14_MASK,14}, /* IDE 1 */ + {IRQ15_MASK,15}, /* IDE 2 */ + {IRQ6_MASK,6}, /* floppy */ + {IRQ7_MASK,7}, /* par */ + + {IRQ5_MASK,5}, + {IRQ10_MASK,10}, + + + + + {0,0}}; + +/* complaiun only this many times about spurious ints : */ +static int ccleirq=60; /* ISA dev IRQ's*/ +static int cclirq=60; /* internal */ + +/* FIX: add IRQ_INPROGRESS,mask,unmask,probing.... */ + +void q40_irq2_handler (int vec, void *devname, struct pt_regs *fp) +{ + /* got level 2 interrupt, dispatch to ISA or keyboard IRQs */ + + unsigned mir=master_inb(IIRQ_REG); + unsigned mer; + int irq,i; + + /* + * more than 1 bit might be set, must handle atmost 1 int source, + * - handle only those with explicitly set handler + */ + + if ((mir&IRQ_SER_MASK) || (mir&IRQ_EXT_MASK)) + { + + /* some ISA dev caused the int */ + + mer=master_inb(EIRQ_REG); + + for (i=0; eirqs[i].mask; i++) + { + if (mer&(eirqs[i].mask)) + { + irq=eirqs[i].irq; + irq_tab[irq].count++; + if (irq_tab[irq].handler == q40_defhand ) + continue; /* ignore uninited INTs :-( */ + + irq_tab[irq].handler(irq,irq_tab[irq].dev_id,fp); + return; + } + } + if (ccleirq>0) + printk("ISA interrupt from unknown source? EIRQ_REG = %x\n",mer),ccleirq--; + } + else + { + /* internal */ + + for (i=0; iirqs[i].mask; i++) + { + if (mir&(iirqs[i].mask)) + { + irq=iirqs[i].irq; + irq_tab[irq].count++; + if (irq_tab[irq].handler == q40_defhand ) + continue; /* ignore uninited INTs :-( */ + + irq_tab[irq].handler(irq,irq_tab[irq].dev_id,fp); + return; + } + } + if (cclirq>0) + printk("internal level 2 interrupt from unknown source ? IIRQ_REG=%x\n",mir),cclirq--; + } +} + +int q40_get_irq_list (char *buf) +{ + int i, len = 0; + + for (i = 0; i <= Q40_IRQ_MAX; i++) { + if (irq_tab[i].count) + len += sprintf (buf+len, "Vec 0x%02x: %8d %s%s\n", + i, irq_tab[i].count, + irq_tab[i].devname[0] ? irq_tab[i].devname : "?", + irq_tab[i].handler == q40_defhand ? + " (now unassigned)" : ""); + } + return len; +} + + +static void q40_defhand (int irq, void *dev_id, struct pt_regs *fp) +{ +#if 0 + printk ("Unknown q40 interrupt 0x%02x\n", irq); +#endif +} +static void sys_default_handler(int lev, void *dev_id, struct pt_regs *regs) +{ +#if 0 + if (ints_inited) +#endif + printk ("Uninitialised interrupt level %d\n", lev); +#if 0 + else + printk ("Interrupt before interrupt initialisation\n"); +#endif +} + + void (*q40_sys_default_handler[SYS_IRQS]) (int, void *, struct pt_regs *) = { + sys_default_handler,sys_default_handler,sys_default_handler,sys_default_handler, + sys_default_handler,sys_default_handler,sys_default_handler,sys_default_handler + }; + +void q40_enable_irq (unsigned int irq) +{ +} + + +void q40_disable_irq (unsigned int irq) +{ +} + +unsigned long q40_probe_irq_on (void) +{ + printk("sorry, irq probing not yet implemented - reconfigure the driver to avoid this\n"); + return 0; +} +int q40_probe_irq_off (unsigned long irqs) +{ + return -1; +} |