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-rw-r--r--arch/mips/sgi/kernel/setup.c6
-rw-r--r--arch/mips/sgi/prom/misc.c53
-rw-r--r--arch/mips/sni/Makefile4
-rw-r--r--arch/mips/sni/pci.c40
-rw-r--r--arch/mips/sni/pcimt_scache.c34
-rw-r--r--arch/mips/sni/setup.c30
6 files changed, 83 insertions, 84 deletions
diff --git a/arch/mips/sgi/kernel/setup.c b/arch/mips/sgi/kernel/setup.c
index 982319bc2..c8c8afc89 100644
--- a/arch/mips/sgi/kernel/setup.c
+++ b/arch/mips/sgi/kernel/setup.c
@@ -3,12 +3,13 @@
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: setup.c,v 1.5 1997/09/13 02:19:18 ralf Exp $
+ * $Id: setup.c,v 1.6 1997/12/01 17:57:38 ralf Exp $
*/
#include <linux/kernel.h>
#include <linux/sched.h>
#include <asm/addrspace.h>
+#include <asm/bcache.h>
#include <asm/keyboard.h>
#include <asm/reboot.h>
#include <asm/vector.h>
@@ -83,6 +84,9 @@ void sgi_setup(void)
/* Init INDY memory controller. */
sgimc_init();
+ /* Now enable boardcaches, if any. */
+ indy_sc_init();
+
/* ARCS console environment variable is set to "g?" for
* graphics console, it is set to "d" for the first serial
* line and "d2" for the second serial line.
diff --git a/arch/mips/sgi/prom/misc.c b/arch/mips/sgi/prom/misc.c
index 53ee61cfe..b6ccd60c1 100644
--- a/arch/mips/sgi/prom/misc.c
+++ b/arch/mips/sgi/prom/misc.c
@@ -6,6 +6,7 @@
#include <linux/config.h>
#include <linux/kernel.h>
+#include <asm/bcache.h>
#include <asm/sgialib.h>
#include <asm/bootinfo.h>
#include <asm/system.h>
@@ -15,91 +16,59 @@ extern int initialize_kbd(void);
extern void *sgiwd93_host;
extern void reset_wd33c93(void *instance);
-static inline void shutoff_r4600_cache(void)
-{
- unsigned long tmp1, tmp2, tmp3;
-
- if(mips_cputype != CPU_R4600 &&
- mips_cputype != CPU_R4640 &&
- mips_cputype != CPU_R4700)
- return;
- printk("Disabling R4600 SCACHE\n");
- __asm__ __volatile__("
- .set noreorder
- .set mips3
- li %0, 0x1
- dsll %0, 31
- lui %1, 0x9000
- dsll32 %1, 0
- or %0, %1, %0
- mfc0 %2, $12
- nop; nop; nop; nop;
- li %1, 0x80
- mtc0 %1, $12
- nop; nop; nop; nop;
- sh $0, 0(%0)
- mtc0 $0, $12
- nop; nop; nop; nop;
- mtc0 %2, $12
- nop; nop; nop; nop;
- .set mips2
- .set reorder
- " : "=r" (tmp1), "=r" (tmp2), "=r" (tmp3));
-}
-
void prom_halt(void)
{
- shutoff_r4600_cache();
+ bcops->bc_disable();
initialize_kbd();
+ cli();
#if CONFIG_SCSI_SGIWD93
reset_wd33c93(sgiwd93_host);
#endif
- cli();
romvec->halt();
}
void prom_powerdown(void)
{
- shutoff_r4600_cache();
+ bcops->bc_disable();
initialize_kbd();
+ cli();
#if CONFIG_SCSI_SGIWD93
reset_wd33c93(sgiwd93_host);
#endif
- cli();
romvec->pdown();
}
/* XXX is this a soft reset basically? XXX */
void prom_restart(void)
{
- shutoff_r4600_cache();
+ bcops->bc_disable();
initialize_kbd();
+ cli();
#if CONFIG_SCSI_SGIWD93
reset_wd33c93(sgiwd93_host);
#endif
- cli();
romvec->restart();
}
void prom_reboot(void)
{
- shutoff_r4600_cache();
+ bcops->bc_disable();
initialize_kbd();
+ cli();
#if CONFIG_SCSI_SGIWD93
reset_wd33c93(sgiwd93_host);
#endif
- cli();
romvec->reboot();
}
void prom_imode(void)
{
- shutoff_r4600_cache();
+ bcops->bc_disable();
initialize_kbd();
+ cli();
#if CONFIG_SCSI_SGIWD93
reset_wd33c93(sgiwd93_host);
#endif
- cli();
romvec->imode();
}
diff --git a/arch/mips/sni/Makefile b/arch/mips/sni/Makefile
index 9bd570ff0..84622b55f 100644
--- a/arch/mips/sni/Makefile
+++ b/arch/mips/sni/Makefile
@@ -5,6 +5,8 @@
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
+# $Id: Makefile,v 1.2 1997/12/20 13:27:14 ralf Exp $
+#
.S.s:
$(CPP) $(CFLAGS) $< -o $*.s
@@ -13,7 +15,7 @@
all: sni.o
O_TARGET := sni.o
-O_OBJS := hw-access.o int-handler.o io.o pci.o reset.o setup.o
+O_OBJS := hw-access.o int-handler.o io.o pci.o pcimt_scache.o reset.o setup.o
int-handler.o: int-handler.S
diff --git a/arch/mips/sni/pci.c b/arch/mips/sni/pci.c
index 8a8016e70..8c2d773cd 100644
--- a/arch/mips/sni/pci.c
+++ b/arch/mips/sni/pci.c
@@ -4,6 +4,8 @@
* for more details.
*
* SNI specific PCI support for RM200/RM300.
+ *
+ * $Id: pci.c,v 1.3 1998/01/14 05:01:51 ralf Exp $
*/
#include <linux/config.h>
#include <linux/bios32.h>
@@ -16,13 +18,14 @@
#ifdef CONFIG_PCI
-extern inline u32 mkaddr(unsigned char bus, unsigned char dev_fn,
- unsigned char where)
-{
- return ((bus & 0xff) << 0x10) |
- ((dev_fn & 0xff) << 0x08) |
- (where & 0xfc);
-}
+#define mkaddr(bus, dev_fn, where) \
+do { \
+ if (bus == 0 && dev_fn >= PCI_DEVFN(8, 0)) \
+ return -1; \
+ *(volatile u32 *)PCIMT_CONFIG_ADDRESS = ((bus & 0xff) << 0x10) | \
+ ((dev_fn & 0xff) << 0x08) | \
+ (where & 0xfc); \
+} while(0);
static unsigned long sni_rm200_pcibios_fixup (unsigned long memory_start,
unsigned long memory_end)
@@ -32,6 +35,9 @@ static unsigned long sni_rm200_pcibios_fixup (unsigned long memory_start,
* Take care of RM300 revision D boards for where the network
* slot became an ordinary PCI slot.
*/
+ pcibios_write_config_byte(0, PCI_DEVFN(1, 0), PCI_INTERRUPT_LINE,
+ PCIMT_IRQ_SCSI);
+
return memory_start;
}
@@ -46,7 +52,7 @@ static int sni_rm200_pcibios_read_config_byte (unsigned char bus,
{
u32 res;
- *(volatile u32 *)PCIMT_CONFIG_ADDRESS = mkaddr(bus, dev_fn, where);
+ mkaddr(bus, dev_fn, where);
res = *(volatile u32 *)PCIMT_CONFIG_DATA;
res = (le32_to_cpu(res) >> ((where & 3) << 3)) & 0xff;
*val = res;
@@ -63,7 +69,7 @@ static int sni_rm200_pcibios_read_config_word (unsigned char bus,
if (where & 1)
return PCIBIOS_BAD_REGISTER_NUMBER;
- *(volatile u32 *)PCIMT_CONFIG_ADDRESS = mkaddr(bus, dev_fn, where);
+ mkaddr(bus, dev_fn, where);
res = *(volatile u32 *)PCIMT_CONFIG_DATA;
res = (le32_to_cpu(res) >> ((where & 3) << 3)) & 0xffff;
*val = res;
@@ -78,9 +84,9 @@ static int sni_rm200_pcibios_read_config_dword (unsigned char bus,
{
u32 res;
- if (where & 3)
+ if (where & 3)
return PCIBIOS_BAD_REGISTER_NUMBER;
- *(volatile u32 *)PCIMT_CONFIG_ADDRESS = mkaddr(bus, dev_fn, where);
+ mkaddr(bus, dev_fn, where);
res = *(volatile u32 *)PCIMT_CONFIG_DATA;
res = le32_to_cpu(res);
*val = res;
@@ -93,7 +99,9 @@ static int sni_rm200_pcibios_write_config_byte (unsigned char bus,
unsigned char where,
unsigned char val)
{
- /* To do */
+ mkaddr(bus, dev_fn, where);
+ *(volatile u8 *)(PCIMT_CONFIG_DATA + (where & 3)) = val;
+
return PCIBIOS_SUCCESSFUL;
}
@@ -102,7 +110,11 @@ static int sni_rm200_pcibios_write_config_word (unsigned char bus,
unsigned char where,
unsigned short val)
{
- /* To do */
+ if (where & 1)
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+ mkaddr(bus, dev_fn, where);
+ *(volatile u16 *)(PCIMT_CONFIG_DATA + (where & 3)) = le16_to_cpu(val);
+
return PCIBIOS_SUCCESSFUL;
}
@@ -113,7 +125,7 @@ static int sni_rm200_pcibios_write_config_dword (unsigned char bus,
{
if (where & 3)
return PCIBIOS_BAD_REGISTER_NUMBER;
- *(volatile u32 *)PCIMT_CONFIG_ADDRESS = mkaddr(bus, dev_fn, where);
+ mkaddr(bus, dev_fn, where);
*(volatile u32 *)PCIMT_CONFIG_DATA = le32_to_cpu(val);
return PCIBIOS_SUCCESSFUL;
diff --git a/arch/mips/sni/pcimt_scache.c b/arch/mips/sni/pcimt_scache.c
new file mode 100644
index 000000000..8c19fb623
--- /dev/null
+++ b/arch/mips/sni/pcimt_scache.c
@@ -0,0 +1,34 @@
+/*
+ * arch/mips/sni/pcimt_scache.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1997 by Ralf Baechle
+ *
+ * $Id: pcimt_scache.c,v 1.1 1997/12/20 13:13:40 ralf Exp $
+ */
+#include <linux/init.h>
+#include <asm/bcache.h>
+#include <asm/sni.h>
+
+__initfunc(void sni_pcimt_sc_init(void))
+{
+ unsigned int cacheconf, sc_size;
+
+ cacheconf = *(volatile unsigned int *)PCIMT_CACHECONF;
+ if ((cacheconf & 7) == 0) {
+ printk("No second level cache detected\n");
+ printk("WARNING: not activating second level cache, "
+ "tell ralf@gnu.org\n");
+ return;
+ }
+ if ((cacheconf & 7) >= 6) {
+ printk("Invalid second level cache size detected\n");
+ return;
+ }
+
+ sc_size = 128 << (cacheconf & 7);
+ printk("%dkb second level cache detected.\n", sc_size);
+}
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 41f64b618..6297fb369 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -7,7 +7,7 @@
*
* Copyright (C) 1996, 1997 by Ralf Baechle
*
- * $Id: setup.c,v 1.5 1997/12/01 16:19:12 ralf Exp $
+ * $Id: setup.c,v 1.6 1997/12/20 13:09:29 ralf Exp $
*/
#include <asm/ptrace.h>
#include <linux/ioport.h>
@@ -16,6 +16,7 @@
#include <linux/interrupt.h>
#include <linux/timex.h>
#include <linux/pci.h>
+#include <asm/bcache.h>
#include <asm/bootinfo.h>
#include <asm/keyboard.h>
#include <asm/io.h>
@@ -94,32 +95,8 @@ static inline void sni_pcimt_detect(void)
asic = (csmsr & 0x08) ? asic : !asic;
p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1");
printk("%s.\n", boardtype);
-
- cacheconf = *(volatile unsigned int *)PCIMT_CACHECONF;
- switch(cacheconf & 7) {
- case 0:
- printk("Secondary cache disabled\n");
- break;
- case 1:
- printk("256kb secondary cache\n");
- break;
- case 2:
- printk("512kb secondary cache\n");
- break;
- case 3:
- printk("1mb secondary cache\n");
- break;
- case 4:
- printk("2mb secondary cache\n");
- break;
- case 5:
- printk("4mb secondary cache\n");
- break;
- default:
- panic("invalid secondary cache size\n");
- }
}
-
+
__initfunc(void sni_rm200_pci_setup(void))
{
tag *atag;
@@ -149,6 +126,7 @@ __initfunc(void sni_rm200_pci_setup(void))
}
sni_pcimt_detect();
+ sni_pcimt_sc_init();
irq_setup = sni_irq_setup;
fd_cacheflush = sni_fd_cacheflush; // Will go away
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 07:46:52 +0000