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-rw-r--r--arch/mips/baget/irq.c1
-rw-r--r--arch/mips/dec/irq.c4
-rw-r--r--arch/mips/kernel/entry.S4
-rw-r--r--arch/mips/kernel/irq.c6
-rw-r--r--arch/mips/kernel/mips_ksyms.c1
-rw-r--r--arch/mips/kernel/scall_o32.S4
-rw-r--r--arch/mips/orion/irq.c5
-rw-r--r--arch/mips/orion/misc.c2
-rw-r--r--arch/mips/orion/setup.c2
-rw-r--r--arch/mips/sgi/kernel/indy_int.c4
10 files changed, 6 insertions, 27 deletions
diff --git a/arch/mips/baget/irq.c b/arch/mips/baget/irq.c
index 08b15a7a8..03d68ee17 100644
--- a/arch/mips/baget/irq.c
+++ b/arch/mips/baget/irq.c
@@ -29,7 +29,6 @@
#include <asm/baget/baget.h>
-irq_cpustat_t irq_stat [NR_CPUS];
unsigned long spurious_count = 0;
/*
diff --git a/arch/mips/dec/irq.c b/arch/mips/dec/irq.c
index 7551ae681..91e1ce463 100644
--- a/arch/mips/dec/irq.c
+++ b/arch/mips/dec/irq.c
@@ -31,10 +31,6 @@ extern volatile unsigned int *isr; /* address of the interrupt status register
extern volatile unsigned int *imr; /* address of the interrupt mask register */
extern decint_t dec_interrupt[NR_INTS];
-irq_cpustat_t irq_stat [NR_CPUS];
-
-unsigned int local_bh_count[NR_CPUS];
-unsigned int local_irq_count[NR_CPUS];
unsigned long spurious_count = 0;
static inline void mask_irq(unsigned int irq_nr)
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index bde21011f..bc56db51b 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -43,8 +43,8 @@ reschedule: jal schedule
EXPORT(ret_from_sys_call)
EXPORT(ret_from_irq)
.type ret_from_irq,@function
- lw t0, softirq_state
- lw t1, softirq_state+4 # unused delay slot
+ lw t0, irq_stat # softirq_active
+ lw t1, irq_stat+4 # softirq_mask. unused delay slot
and t0, t1
bnez t0, handle_softirq
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 54c2c3c81..fcb7a632f 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -47,8 +47,6 @@
* interrupt controllers, without having to do assembly magic.
*/
-irq_cpustat_t irq_stat [NR_CPUS];
-
/*
* This contains the irq mask for both 8259A irq controllers, it's an
* int so we can deal with the third PIC in some systems like the RM300.
@@ -63,8 +61,6 @@ static unsigned int cached_irq_mask = 0xffff;
#define cached_21 (__byte(0,cached_irq_mask))
#define cached_A1 (__byte(1,cached_irq_mask))
-unsigned int local_bh_count[NR_CPUS];
-unsigned int local_irq_count[NR_CPUS];
unsigned long spurious_count = 0;
/*
@@ -228,7 +224,7 @@ asmlinkage void do_IRQ(int irq, struct pt_regs * regs)
}
irq_exit(cpu);
- if (softirq_state[cpu].active&softirq_state[cpu].mask)
+ if (softirq_active(cpu)&softirq_mask(cpu))
do_softirq();
/* unmasking and bottom half handling is done magically for us. */
diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
index b58272f46..3b3c43111 100644
--- a/arch/mips/kernel/mips_ksyms.c
+++ b/arch/mips/kernel/mips_ksyms.c
@@ -140,4 +140,3 @@ EXPORT_SYMBOL(ide_ops);
#endif
EXPORT_SYMBOL(get_wchan);
-EXPORT_SYMBOL(irq_stat);
diff --git a/arch/mips/kernel/scall_o32.S b/arch/mips/kernel/scall_o32.S
index ddf69a964..bdc72ca4e 100644
--- a/arch/mips/kernel/scall_o32.S
+++ b/arch/mips/kernel/scall_o32.S
@@ -65,8 +65,8 @@ stack_done:
1: sw v0, PT_R2(sp) # result
EXPORT(o32_ret_from_sys_call)
- lw t0, softirq_state
- lw t1, softirq_state+4 # unused delay slot
+ lw t0, irq_stat # softirq_active
+ lw t1, irq_stat+4 # softirq_mask. unused delay slot
and t0, t1
bnez t0, o32_handle_softirq
diff --git a/arch/mips/orion/irq.c b/arch/mips/orion/irq.c
index f61690b85..1721b47ae 100644
--- a/arch/mips/orion/irq.c
+++ b/arch/mips/orion/irq.c
@@ -25,9 +25,6 @@
void (*board_time_init)(struct irqaction *irq);
extern asmlinkage void orionIRQ(void);
-irq_cpustat_t irq_stat [NR_CPUS];
-unsigned int local_bh_count[NR_CPUS];
-unsigned int local_irq_count[NR_CPUS];
unsigned long spurious_count = 0;
irq_desc_t irq_desc[NR_IRQS];
@@ -186,7 +183,7 @@ asmlinkage void do_IRQ(int irq, struct pt_regs * regs)
irq_exit(cpu);
- if (softirq_state[cpu].active&softirq_state[cpu].mask)
+ if (softirq_active(cpu)&softirq_mask(cpu))
do_softirq();
/* unmasking and bottom half handling is done magically for us. */
diff --git a/arch/mips/orion/misc.c b/arch/mips/orion/misc.c
index 1c6d9e2fa..0d8881058 100644
--- a/arch/mips/orion/misc.c
+++ b/arch/mips/orion/misc.c
@@ -35,10 +35,8 @@
#include <asm/stackframe.h>
#include <asm/system.h>
#include <asm/cpu.h>
-#include <linux/sched.h>
#include <linux/bootmem.h>
#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
#include <asm/mc146818rtc.h>
char arcs_cmdline[CL_SIZE] = {0, };
diff --git a/arch/mips/orion/setup.c b/arch/mips/orion/setup.c
index 8d4cc54f0..c247d6b52 100644
--- a/arch/mips/orion/setup.c
+++ b/arch/mips/orion/setup.c
@@ -35,10 +35,8 @@
#include <asm/stackframe.h>
#include <asm/system.h>
#include <asm/cpu.h>
-#include <linux/sched.h>
#include <linux/bootmem.h>
#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
#include <asm/mc146818rtc.h>
#include <asm/orion.h>
diff --git a/arch/mips/sgi/kernel/indy_int.c b/arch/mips/sgi/kernel/indy_int.c
index 06d8573cb..2e104bf79 100644
--- a/arch/mips/sgi/kernel/indy_int.c
+++ b/arch/mips/sgi/kernel/indy_int.c
@@ -55,8 +55,6 @@
* interrupt controllers, without having to do assembly magic.
*/
-irq_cpustat_t irq_stat [NR_CPUS];
-
/* #define DEBUG_SGINT */
struct sgi_int2_regs *sgi_i2regs;
@@ -72,8 +70,6 @@ static char lc3msk_to_irqnr[256];
extern asmlinkage void indyIRQ(void);
-unsigned int local_bh_count[NR_CPUS];
-unsigned int local_irq_count[NR_CPUS];
unsigned long spurious_count = 0;
/* Local IRQ's are layed out logically like this: