diff options
Diffstat (limited to 'drivers/net/hamradio/scc.c-noprocfs')
| -rw-r--r-- | drivers/net/hamradio/scc.c-noprocfs | 1926 |
1 files changed, 1926 insertions, 0 deletions
diff --git a/drivers/net/hamradio/scc.c-noprocfs b/drivers/net/hamradio/scc.c-noprocfs new file mode 100644 index 000000000..96ba211a3 --- /dev/null +++ b/drivers/net/hamradio/scc.c-noprocfs @@ -0,0 +1,1926 @@ +#define RCS_ID "$Id: scc.c,v 1.75 1998/11/04 15:15:01 jreuter Exp jreuter $" + +#define VERSION "4.0" +#define BANNER "Z8530 SCC driver version "VERSION".dl1bke by DL1BKE\n" + +/* + * Please use z8530drv-utils-4.0 with this version. + * ------------------ + * + * You can find a subset of the documentation in + * linux/Documentation/networking/z8530drv.txt. + */ + +/* + ******************************************************************** + * SCC.C - Linux driver for Z8530 based HDLC cards for AX.25 * + ******************************************************************** + + + ******************************************************************** + + Copyright (c) 1993, 2000 Joerg Reuter DL1BKE + + portions (c) 1993 Guido ten Dolle PE1NNZ + + ******************************************************************** + + The driver and the programs in the archive are UNDER CONSTRUCTION. + The code is likely to fail, and so your kernel could --- even + a whole network. + + This driver is intended for Amateur Radio use. If you are running it + for commercial purposes, please drop me a note. I am nosy... + + ...BUT: + + ! You m u s t recognize the appropriate legislations of your country ! + ! before you connect a radio to the SCC board and start to transmit or ! + ! receive. The GPL allows you to use the d r i v e r, NOT the RADIO! ! + + For non-Amateur-Radio use please note that you might need a special + allowance/licence from the designer of the SCC Board and/or the + MODEM. + + This program is free software; you can redistribute it and/or modify + it under the terms of the (modified) GNU General Public License + delivered with the Linux kernel source. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should find a copy of the GNU General Public License in + /usr/src/linux/COPYING; + + ******************************************************************** + + + Incomplete history of z8530drv: + ------------------------------- + + 1994-09-13 started to write the driver, rescued most of my own + code (and Hans Alblas' memory buffer pool concept) from + an earlier project "sccdrv" which was initiated by + Guido ten Dolle. Not much of the old driver survived, + though. The first version I put my hands on was sccdrv1.3 + from August 1993. The memory buffer pool concept + appeared in an unauthorized sccdrv version (1.5) from + August 1994. + + 1995-01-31 changed copyright notice to GPL without limitations. + + . + . <SNIP> + . + + 1996-10-05 New semester, new driver... + + * KISS TNC emulator removed (TTY driver) + * Source moved to drivers/net/ + * Includes Z8530 defines from drivers/net/z8530.h + * Uses sk_buffer memory management + * Reduced overhead of /proc/net/z8530drv output + * Streamlined quite a lot things + * Invents brand new bugs... ;-) + + The move to version number 3.0 reflects theses changes. + You can use 'kissbridge' if you need a KISS TNC emulator. + + 1996-12-13 Fixed for Linux networking changes. (G4KLX) + 1997-01-08 Fixed the remaining problems. + 1997-04-02 Hopefully fixed the problems with the new *_timer() + routines, added calibration code. + 1997-10-12 Made SCC_DELAY a CONFIG option, added CONFIG_SCC_TRXECHO + 1998-01-29 Small fix to avoid lock-up on initialization + 1998-09-29 Fixed the "grouping" bugs, tx_inhibit works again, + using dev->tx_queue_len now instead of MAXQUEUE now. + 1998-10-21 Postponed the spinlock changes, would need a lot of + testing I currently don't have the time to. Softdcd doesn't + work. + 1998-11-04 Softdcd does not work correctly in DPLL mode, in fact it + never did. The DPLL locks on noise, the SYNC unit sees + flags that aren't... Restarting the DPLL does not help + either, it resynchronizes too slow and the first received + frame gets lost. + 1999-02-21 Started to implement the new AX.25 device interface + 2000-07-18 Ported to 2.4.x + + Thanks to all who contributed to this driver with ideas and bug + reports! + + NB -- if you find errors, change something, please let me know + first before you distribute it... And please don't touch + the version number. Just replace my callsign in + "v4.0.dl1bke" with your own. Just to avoid confusion... + + If you want to add your modification to the linux distribution + please (!) contact me first. + + New versions of the driver will be announced on the linux-hams + mailing list on vger.kernel.org. To subscribe send an e-mail + to majordomo@vger.kernel.org with the following line in + the body of the mail: + + subscribe linux-hams + + The content of the "Subject" field will be ignored. + + vy 73, + Joerg Reuter ampr-net: dl1bke@db0pra.ampr.org + AX-25 : DL1BKE @ DB0ABH.#BAY.DEU.EU + Internet: jreuter@yaina.de + www : http://yaina.de/jreuter/ +*/ + +/* ----------------------------------------------------------------------- */ + +#undef SCC_DONT_CHECK /* don't look if the SCCs you specified are available */ + +#define SCC_MAXCHIPS 4 /* number of max. supported chips */ +#define SCC_BUFSIZE 384 /* must not exceed 4096 */ +#undef SCC_DEBUG + +#define SCC_DEFAULT_CLOCK 4915200 + /* default pclock if nothing is specified */ + +#define SCC_SIMPLE_MAC /* no rts/cts control by DDI layer */ +#define SCC_WATCHDOG_TIMEOUT 10 + /* ten seconds */ + +/* ----------------------------------------------------------------------- */ + +#include <linux/config.h> +#include <linux/module.h> +#include <linux/errno.h> +#include <linux/signal.h> +#include <linux/sched.h> +#include <linux/timer.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/string.h> +#include <linux/in.h> +#include <linux/fcntl.h> +#include <linux/ptrace.h> +#include <linux/malloc.h> +#include <linux/delay.h> +#include <linux/spinlock.h> + +#include <linux/skbuff.h> +#include <linux/netdevice.h> +#include <linux/if_ether.h> +#include <linux/if_arp.h> +#include <linux/socket.h> +#include <linux/init.h> + +#include <linux/ctype.h> +#include <linux/kernel.h> +#include <linux/proc_fs.h> + +#include <net/ax25.h> +#include <net/ax25dev.h> + +#include <asm/irq.h> + +#include <asm/system.h> +#include <asm/io.h> +#include <asm/uaccess.h> +#include <asm/bitops.h> + +#include <linux/scc.h> +#include "z8530.h" + +int scc_init(void); + +static void scc_tx_done(struct scc_channel *); +static void scc_kick_tx(struct scc_channel *); +static void scc_start_tx_timer(struct scc_channel *, void (*)(struct scc_channel *), unsigned long); +static void scc_tail(struct scc_channel *scc); +#ifndef SCC_SIMPLE_MAC +static void scc_tx_forced(struct scc_channel *scc); +static void scc_set_rts(struct scc_channel *scc); +#endif + +static void z8530_init(void); + +static void init_channel(struct scc_channel *scc); +static void scc_key_trx (struct scc_channel *scc, char tx); +static void scc_isr(int irq, void *dev_id, struct pt_regs *regs); +static void scc_init_timer(struct scc_channel *scc); + +static unsigned int scc_set_param(struct scc_channel *, struct scc_modem *); + +static unsigned int scc_ddi_report_dcd(struct net_device *); +static unsigned int scc_ddi_report_ptt(struct net_device *); +#ifndef SCC_SIMPLE_MAC +static unsigned int scc_ddi_report_cts(struct net_device *); +static void scc_ddi_set_rts(struct net_device *); +#endif +static void scc_ddi_set_bitrate(struct net_device *, unsigned int); +static void scc_ddi_param_update(struct net_device *); +static void scc_ddi_param_notify(struct net_device *, int, int, int); + +static int scc_net_setup(struct scc_channel *scc, unsigned char *name, int addev); +static int scc_net_init(struct net_device *dev); +static int scc_net_open(struct net_device *dev); +static int scc_net_close(struct net_device *dev); +static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb); +static int scc_net_tx(struct sk_buff *skb, struct net_device *dev); +static void scc_net_timeout(struct net_device *dev); +static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); +static int scc_net_set_mac_address(struct net_device *dev, void *addr); +static struct net_device_stats * scc_net_get_stats(struct net_device *dev); + +static unsigned char *SCC_DriverName = "scc"; + +static struct irqflags { unsigned char used : 1; } Ivec[16]; + +static struct scc_channel SCC_Info[2 * SCC_MAXCHIPS]; /* information per channel */ + +static struct scc_ctrl { + io_port chan_A; + io_port chan_B; + int irq; +} SCC_ctrl[SCC_MAXCHIPS+1]; + +static unsigned char Driver_Initialized = 0; +static int Nchips = 0; +static io_port Vector_Latch = 0; +static long IO_Delay = 0; +static spinlock_t IO_Spinlock = SPIN_LOCK_UNLOCKED; + + +/* ******************************************************************** */ +/* * Port Access Functions * */ +/* ******************************************************************** */ + +static inline unsigned char +Inb(io_port port) +{ + int r; + + r = inb(port); + if (IO_Delay) udelay(IO_Delay); + return r; +} + +static inline void +Outb(io_port port, unsigned char val) +{ + outb(val, port); + if (IO_Delay) udelay(IO_Delay); +} + +/* These provide interrupt save 2-step access to the Z8530 registers */ + +static unsigned char +InReg(io_port port, unsigned char reg) +{ + unsigned long flags; + unsigned char r; + + spin_lock_irqsave(&IO_Spinlock, flags); + if (IO_Delay) + { + outb(reg, port); + udelay(IO_Delay); + r=inb(port); + udelay(IO_Delay); + } else { + outb(reg, port); + r=inb(port); + } + spin_unlock_irqrestore(&IO_Spinlock, flags); + return r; +} + +static void +OutReg(io_port port, unsigned char reg, unsigned char val) +{ + unsigned long flags; + + spin_lock_irqsave(&IO_Spinlock, flags); + if (IO_Delay) + { + outb(reg, port); + udelay(IO_Delay); + outb(val, port); + udelay(IO_Delay); + } else { + outb(reg, port); + outb(val, port); + } + spin_unlock_irqrestore(&IO_Spinlock, flags); +} + +static inline +void wr(struct scc_channel *scc, unsigned char reg, unsigned char val) +{ + OutReg(scc->ctrl, reg, (scc->wreg[reg] = val)); +} + +static inline void +or(struct scc_channel *scc, unsigned char reg, unsigned char val) +{ + OutReg(scc->ctrl, reg, (scc->wreg[reg] |= val)); +} + +static inline void +cl(struct scc_channel *scc, unsigned char reg, unsigned char val) +{ + OutReg(scc->ctrl, reg, (scc->wreg[reg] &= ~val)); +} + +/* ******************************************************************** */ +/* * Interrupt Service Routines * */ +/* ******************************************************************** */ + + +static inline void flush_rx_FIFO(struct scc_channel *scc) +{ + int k; + + for (k=0; k<3; k++) + Inb(scc->data); + + if(scc->rx_buff != NULL) /* did we receive something? */ + { + scc->stat.rxerrs++; /* then count it as an error */ + kfree_skb(scc->rx_buff); + scc->rx_buff = NULL; + } +} + +static void start_hunt(struct scc_channel *scc) +{ + if ((scc->modem.clocksrc != CLK_EXTERNAL)) + OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */ + or(scc,R3,ENT_HM|RxENABLE); /* enable the receiver, hunt mode */ +} + +/* ----> four different interrupt handlers for Tx, Rx, changing of */ +/* DCD/CTS and Rx/Tx errors */ + +/* Transmitter interrupt handler */ +static inline void scc_txint(struct scc_channel *scc) +{ + struct sk_buff *skb; + + scc->stat.txints++; + skb = scc->tx_buff; + + /* send first octet */ + + if (skb == NULL) + { + netif_wake_queue(scc->dev); + scc_tx_done(scc); + Outb(scc->ctrl, RES_Tx_P); + return; + } + + /* End Of Frame... */ + + if (skb->len == 0) + { + Outb(scc->ctrl, RES_Tx_P); /* reset pending int */ + cl(scc, R10, ABUNDER); /* send CRC */ + dev_kfree_skb(skb); + scc->tx_buff = NULL; + scc_kick_tx(scc); /* next frame */ + return; + } + + /* send octet */ + + Outb(scc->data,*skb->data); + skb_pull(skb, 1); +} + + +/* External/Status interrupt handler */ +static inline void scc_exint(struct scc_channel *scc) +{ + unsigned char status,changes,chg_and_stat; + + scc->stat.exints++; + + status = InReg(scc->ctrl,R0); + changes = status ^ scc->status; + chg_and_stat = changes & status; + + /* ABORT: generated whenever DCD drops while receiving */ + + if (chg_and_stat & BRK_ABRT) /* Received an ABORT */ + flush_rx_FIFO(scc); + + /* HUNT: software DCD; on = waiting for SYNC, off = receiving frame */ + + if ((changes & SYNC_HUNT) && scc->modem.softdcd) + { + if (status & SYNC_HUNT) + { + scc->dcd = 0; + flush_rx_FIFO(scc); + if ((scc->modem.clocksrc != CLK_EXTERNAL)) + OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */ + } else { + scc->dcd = 1; + } + } + + /* DCD: on = start to receive packet, off = ABORT condition */ + /* (a successfully received packet generates a special condition int) */ + + if((changes & DCD) && !scc->modem.softdcd) /* DCD input changed state */ + { + if(status & DCD) /* DCD is now ON */ + { + start_hunt(scc); + scc->dcd = 1; + } else { /* DCD is now OFF */ + cl(scc,R3,ENT_HM|RxENABLE); /* disable the receiver */ + flush_rx_FIFO(scc); + scc->dcd = 0; + } + } + +#ifdef notdef + /* CTS: use external TxDelay (what's that good for?!) + * Anyway: If we _could_ use it (BayCom USCC uses CTS for + * own purposes) we _should_ use the "autoenable" feature + * of the Z8530 and not this interrupt... + */ + + if (chg_and_stat & CTS) /* CTS is now ON */ + { + if (scc->modem.txdelay == 0) /* zero TXDELAY = wait for CTS */ + scc_start_tx_timer(scc, t_txdelay, 0); + } +#endif + + if (scc->stat.tx_state == TXS_ACTIVE && (status & TxEOM)) + { + scc->stat.tx_under++; /* oops, an underrun! count 'em */ + Outb(scc->ctrl, RES_EXT_INT); /* reset ext/status interrupts */ + + if (scc->tx_buff != NULL) + { + dev_kfree_skb(scc->tx_buff); + scc->tx_buff = NULL; + } + + or(scc,R10,ABUNDER); + scc_tx_done(scc); + } + + scc->status = status; + Outb(scc->ctrl,RES_EXT_INT); +} + + +/* Receiver interrupt handler */ +static inline void scc_rxint(struct scc_channel *scc) +{ + struct sk_buff *skb; + + scc->stat.rxints++; + + if((scc->wreg[5] & RTS) && (scc->modem.fullduplex == 0)) + { + Inb(scc->data); /* discard char */ + or(scc,R3,ENT_HM); /* enter hunt mode for next flag */ + return; + } + + skb = scc->rx_buff; + + if (skb == NULL) + { + skb = dev_alloc_skb(scc->stat.bufsize); + if (skb == NULL) + { + scc->dev_stat.rx_dropped++; + scc->stat.nospace++; + Inb(scc->data); + or(scc, R3, ENT_HM); + return; + } + + scc->rx_buff = skb; + } + + if (skb->len > scc->stat.bufsize) + { +#ifdef notdef + printk(KERN_DEBUG "z8530drv: oops, scc_rxint() received huge frame...\n"); +#endif + kfree_skb(skb); + scc->rx_buff = NULL; + Inb(scc->data); + or(scc, R3, ENT_HM); + return; + } + + *(skb_put(skb, 1)) = Inb(scc->data); +} + + +/* Receive Special Condition interrupt handler */ +static inline void scc_spint(struct scc_channel *scc) +{ + unsigned char status; + struct sk_buff *skb; + + scc->stat.spints++; + + status = InReg(scc->ctrl,R1); /* read receiver status */ + + Inb(scc->data); /* throw away Rx byte */ + skb = scc->rx_buff; + + if(status & Rx_OVR) /* receiver overrun */ + { + scc->stat.rx_over++; /* count them */ + or(scc,R3,ENT_HM); /* enter hunt mode for next flag */ + + if (skb != NULL) + kfree_skb(skb); + scc->rx_buff = NULL; + } + + if(status & END_FR && skb != NULL) /* end of frame */ + { + /* CRC okay, frame ends on 8 bit boundary and received something ? */ + + if (!(status & CRC_ERR) && (status & 0xe) == RES8 && skb->len > 0) + { + /* ignore last received byte (first of the CRC bytes) */ + skb_trim(skb, skb->len-1); + scc_net_rx(scc, skb); + scc->rx_buff = NULL; + scc->stat.rxframes++; + } else { /* a bad frame */ + kfree_skb(skb); + scc->rx_buff = NULL; + scc->stat.rxerrs++; + } + } + + Outb(scc->ctrl,ERR_RES); +} + + +/* ----> interrupt service routine for the Z8530 <---- */ + +static void scc_isr_dispatch(struct scc_channel *scc, int vector) +{ + switch (vector & VECTOR_MASK) + { + case TXINT: scc_txint(scc); break; + case EXINT: scc_exint(scc); break; + case RXINT: scc_rxint(scc); break; + case SPINT: scc_spint(scc); break; + } +} + +/* If the card has a latch for the interrupt vector (like the PA0HZP card) + use it to get the number of the chip that generated the int. + If not: poll all defined chips. + */ + +#define SCC_IRQTIMEOUT 30000 + +static void scc_isr(int irq, void *dev_id, struct pt_regs *regs) +{ + unsigned char vector; + struct scc_channel *scc; + struct scc_ctrl *ctrl; + int k; + + if (Vector_Latch) + { + for(k=0; k < SCC_IRQTIMEOUT; k++) + { + Outb(Vector_Latch, 0); /* Generate INTACK */ + + /* Read the vector */ + if((vector=Inb(Vector_Latch)) >= 16 * Nchips) break; + if (vector & 0x01) break; + + scc=&SCC_Info[vector >> 3 ^ 0x01]; + if (!scc->dev) break; + + scc_isr_dispatch(scc, vector); + + OutReg(scc->ctrl,R0,RES_H_IUS); /* Reset Highest IUS */ + } + + if (k == SCC_IRQTIMEOUT) + printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?\n"); + + return; + } + + /* Find the SCC generating the interrupt by polling all attached SCCs + * reading RR3A (the interrupt pending register) + */ + + ctrl = SCC_ctrl; + while (ctrl->chan_A) + { + if (ctrl->irq != irq) + { + ctrl++; + continue; + } + + scc = NULL; + for (k = 0; InReg(ctrl->chan_A,R3) && k < SCC_IRQTIMEOUT; k++) + { + vector=InReg(ctrl->chan_B,R2); /* Read the vector */ + if (vector & 0x01) break; + + scc = &SCC_Info[vector >> 3 ^ 0x01]; + if (!scc->dev) break; + + scc_isr_dispatch(scc, vector); + } + + if (k == SCC_IRQTIMEOUT) + { + printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?!\n"); + break; + } + + /* This looks weird and it is. At least the BayCom USCC doesn't + * use the Interrupt Daisy Chain, thus we'll have to start + * all over again to be sure not to miss an interrupt from + * (any of) the other chip(s)... + * Honestly, the situation *is* braindamaged... + */ + + if (scc != NULL) + { + OutReg(scc->ctrl,R0,RES_H_IUS); + ctrl = SCC_ctrl; + } else + ctrl++; + } +} + + + +/* ******************************************************************** */ +/* * Init Channel */ +/* ******************************************************************** */ + + +/* ----> set SCC channel speed <---- */ + +static inline void set_brg(struct scc_channel *scc, unsigned int tc) +{ + cl(scc,R14,BRENABL); /* disable baudrate generator */ + wr(scc,R12,tc & 255); /* brg rate LOW */ + wr(scc,R13,tc >> 8); /* brg rate HIGH */ + or(scc,R14,BRENABL); /* enable baudrate generator */ +} + +static inline void set_speed(struct scc_channel *scc) +{ + unsigned long flags; + + spin_lock_irqsave(&scc->spinlocks.hwaccess, flags); + + if (scc->modem.speed > 0) /* paranoia... */ + set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2); + + spin_unlock_irqrestore(&scc->spinlocks.hwaccess, flags); +} + + +/* ----> initialize a SCC channel <---- */ + +static inline void init_brg(struct scc_channel *scc) +{ + wr(scc, R14, BRSRC); /* BRG source = PCLK */ + OutReg(scc->ctrl, R14, SSBR|scc->wreg[R14]); /* DPLL source = BRG */ + OutReg(scc->ctrl, R14, SNRZI|scc->wreg[R14]); /* DPLL NRZI mode */ +} + +/* + * Initialization according to the Z8530 manual (SGS-Thomson's version): + * + * 1. Modes and constants + * + * WR9 11000000 chip reset + * WR4 XXXXXXXX Tx/Rx control, async or sync mode + * WR1 0XX00X00 select W/REQ (optional) + * WR2 XXXXXXXX program interrupt vector + * WR3 XXXXXXX0 select Rx control + * WR5 XXXX0XXX select Tx control + * WR6 XXXXXXXX sync character + * WR7 XXXXXXXX sync character + * WR9 000X0XXX select interrupt control + * WR10 XXXXXXXX miscellaneous control (optional) + * WR11 XXXXXXXX clock control + * WR12 XXXXXXXX time constant lower byte (optional) + * WR13 XXXXXXXX time constant upper byte (optional) + * WR14 XXXXXXX0 miscellaneous control + * WR14 XXXSSSSS commands (optional) + * + * 2. Enables + * + * WR14 000SSSS1 baud rate enable + * WR3 SSSSSSS1 Rx enable + * WR5 SSSS1SSS Tx enable + * WR0 10000000 reset Tx CRG (optional) + * WR1 XSS00S00 DMA enable (optional) + * + * 3. Interrupt status + * + * WR15 XXXXXXXX enable external/status + * WR0 00010000 reset external status + * WR0 00010000 reset external status twice + * WR1 SSSXXSXX enable Rx, Tx and Ext/status + * WR9 000SXSSS enable master interrupt enable + * + * 1 = set to one, 0 = reset to zero + * X = user defined, S = same as previous init + * + * + * Note that the implementation differs in some points from above scheme. + * + */ + +static void init_channel(struct scc_channel *scc) +{ + unsigned long flags; + + spin_lock_irqsave(&scc->spinlocks.hwaccess, flags); + del_timer(&scc->tx_timer); + + wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */ + wr(scc,R1,0); /* no W/REQ operation */ + wr(scc,R3,Rx8|RxCRC_ENAB); /* RX 8 bits/char, CRC, disabled */ + wr(scc,R5,Tx8|DTR|TxCRC_ENAB); /* TX 8 bits/char, disabled, DTR */ + wr(scc,R6,0); /* SDLC address zero (not used) */ + wr(scc,R7,FLAG); /* SDLC flag value */ + wr(scc,R9,VIS); /* vector includes status */ + wr(scc,R10,(scc->modem.nrz? NRZ : NRZI)|CRCPS|ABUNDER); /* abort on underrun, preset CRC generator, NRZ(I) */ + wr(scc,R14, 0); + + +/* set clock sources: + + CLK_DPLL: normal halfduplex operation + + RxClk: use DPLL + TxClk: use DPLL + TRxC mode DPLL output + + CLK_EXTERNAL: external clocking (G3RUH or DF9IC modem) + + BayCom: others: + + TxClk = pin RTxC TxClk = pin TRxC + RxClk = pin TRxC RxClk = pin RTxC + + + CLK_DIVIDER: + RxClk = use DPLL + TxClk = pin RTxC + + BayCom: others: + pin TRxC = DPLL pin TRxC = BRG + (RxClk * 1) (RxClk * 32) +*/ + + + switch(scc->modem.clocksrc) + { + case CLK_DPLL: + wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP); + init_brg(scc); + break; + + case CLK_DIVIDER: + wr(scc, R11, ((scc->brand & BAYCOM)? TRxCDP : TRxCBR) | RCDPLL|TCRTxCP|TRxCOI); + init_brg(scc); + break; + + case CLK_EXTERNAL: + wr(scc, R11, (scc->brand & BAYCOM)? RCTRxCP|TCRTxCP : RCRTxCP|TCTRxCP); + OutReg(scc->ctrl, R14, DISDPLL); + break; + + } + + + if(scc->enhanced) + { + or(scc,R15,SHDLCE|FIFOE); /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */ + wr(scc,R7,AUTOEOM); + } + + if(scc->modem.softdcd || (InReg(scc->ctrl,R0) & DCD)) + /* DCD is now ON */ + { + start_hunt(scc); + } + + /* enable ABORT, DCD & SYNC/HUNT interrupts */ + + wr(scc,R15, BRKIE|TxUIE|(scc->modem.softdcd? SYNCIE:DCDIE)); + + Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */ + Outb(scc->ctrl,RES_EXT_INT); /* must be done twice */ + + or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */ + + scc->status = InReg(scc->ctrl,R0); /* read initial status */ + + or(scc,R9,MIE); /* master interrupt enable */ + + scc_init_timer(scc); + spin_unlock_irqrestore(&scc->spinlocks.hwaccess, flags); + + set_speed(scc); /* set baudrate */ +} + + +/* ******************************************************************** */ +/* * SCC timer functions * */ +/* ******************************************************************** */ + + +/* ----> scc_key_trx sets the time constant for the baudrate + generator and keys the transmitter <---- */ + +static void scc_key_trx(struct scc_channel *scc, char tx) +{ + unsigned long flags; + unsigned int time_const; + + if (scc->brand & PRIMUS) + Outb(scc->ctrl + 4, scc->option | (tx? 0x80 : 0)); + + if (scc->modem.speed < 300) + scc->modem.speed = 1200; + + time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2; + + spin_lock_irqsave(&scc->spinlocks.hwaccess, flags); + + if (tx) + { + or(scc, R1, TxINT_ENAB); /* t_maxkeyup may have reset these */ + or(scc, R15, TxUIE); + } + + if (scc->modem.clocksrc == CLK_DPLL) + { /* force simplex operation */ + if (tx) + { +#ifdef CONFIG_SCC_TRXECHO + cl(scc, R3, RxENABLE|ENT_HM); /* switch off receiver */ + cl(scc, R15, DCDIE|SYNCIE); /* No DCD changes, please */ +#endif + set_brg(scc, time_const); /* reprogram baudrate generator */ + + /* DPLL -> Rx clk, BRG -> Tx CLK, TRxC mode output, TRxC = BRG */ + wr(scc, R11, RCDPLL|TCBR|TRxCOI|TRxCBR); + + /* By popular demand: tx_inhibit */ + if (scc->modem.tx_inhibit) + { + or(scc,R5, TxENAB); + scc->wreg[R5] |= RTS; + } else { + or(scc,R5,RTS|TxENAB); /* set the RTS line and enable TX */ + } + } else { + cl(scc,R5,RTS|TxENAB); + + set_brg(scc, time_const); /* reprogram baudrate generator */ + + /* DPLL -> Rx clk, DPLL -> Tx CLK, TRxC mode output, TRxC = DPLL */ + wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP); + +#ifndef CONFIG_SCC_TRXECHO + if (scc->modem.softdcd) +#endif + { + or(scc,R15, scc->modem.softdcd? SYNCIE:DCDIE); + start_hunt(scc); + } + } + } else { + if (tx) + { +#ifdef CONFIG_SCC_TRXECHO + if (scc->modem.fullduplex == 0) + { + cl(scc, R3, RxENABLE); + cl(scc, R15, DCDIE|SYNCIE); + } +#endif + + if (scc->modem.tx_inhibit) + { + or(scc,R5, TxENAB); + scc->wreg[R5] |= RTS; + } else { + or(scc,R5,RTS|TxENAB); /* enable tx */ + } + } else { + cl(scc,R5,RTS|TxENAB); /* disable tx */ + + if ((scc->modem.fullduplex == 0) && +#ifndef CONFIG_SCC_TRXECHO + scc->modem.softdcd) +#else + 1) +#endif + { + or(scc, R15, scc->modem.softdcd? SYNCIE:DCDIE); + start_hunt(scc); + } + } + } + + spin_unlock_irqrestore(&scc->spinlocks.hwaccess, flags); +} + +static void scc_kick_tx(struct scc_channel *scc) +{ + struct sk_buff *skb; + unsigned long flags; + + spin_lock_irqsave(&scc->spinlocks.kick_tx, flags); + + skb = scc->tx_new; + scc->tx_new = NULL; + netif_wake_queue(scc->dev); + + if (skb == NULL) goto nada; + + if (skb->len == 0) /* Paranoia... */ + { + dev_kfree_skb(skb); + scc->tx_buff = NULL; + Outb(scc->ctrl, RES_Tx_P); + goto nada; + } + + scc->tx_buff = skb; + scc->stat.tx_state = TXS_ACTIVE; + OutReg(scc->ctrl, R0, RES_Tx_CRC); + /* reset CRC generator */ + or(scc,R10,ABUNDER); /* re-install underrun protection */ + Outb(scc->data,*skb->data); /* send byte */ + skb_pull(skb, 1); + + if (!scc->enhanced) /* reset EOM latch */ + Outb(scc->ctrl,RES_EOM_L); + + spin_unlock_irqrestore(&scc->spinlocks.kick_tx, flags); + return; + +nada: + scc_tx_done(scc); + spin_unlock_irqrestore(&scc->spinlocks.kick_tx, flags); + return; +} + +/* ----> SCC timer interrupt handler and friends. <---- */ + +static void scc_start_tx_timer(struct scc_channel *scc, void (*handler)(struct scc_channel *), unsigned long when) +{ + unsigned long flags; + + spin_lock_irqsave(&scc->spinlocks.timer, flags); + + del_timer(&scc->tx_timer); + + if (when != 0) + { + scc->tx_timer.data = (unsigned long) scc; + scc->tx_timer.function = (void (*)(unsigned long)) handler; + scc->tx_timer.expires = jiffies + (when*HZ)/1000; + add_timer(&scc->tx_timer); + } else { + handler(scc); + } + + spin_unlock_irqrestore(&scc->spinlocks.timer, flags); +} + +/* + * This is called from scc_txint() when there are no more frames to send. + * Not exactly a timer function, but it is a close friend of the family... + */ + +static void scc_tx_done(struct scc_channel *scc) +{ + scc->stat.tx_state = TXS_TAIL; + + if (scc->modem.tailtime != 0) + scc_start_tx_timer(scc, scc_tail, scc->modem.tailtime); + else + scc_tail(scc); +} + +#ifndef SCC_SIMPLE_MAC +static void scc_tx_forced(struct scc_channel *scc) +{ + scc->stat.tx_state = TXS_TAIL; + + if (scc->tx_new) + scc_kick_tx(scc); + else + // remain key-up'ed for the time of txdelay... + // what's the timeout in 6pack? + scc_start_tx_timer(scc, scc_tail, scc->modem.txdelay); +} +#endif + +static void scc_tx_start(struct scc_channel *scc, struct sk_buff *skb) +{ + scc->tx_new = skb; + + /* + * scc_set_rts may also start a tx delay wait time, if we + * get a frame to transmit within this time RTS would be set, + * shorten the tx delay time... + */ + + if (scc->stat.tx_state != TXS_TXDELAY) + { + scc->stat.tx_state = TXS_TXDELAY; + + if ( !(scc->wreg[R5] & RTS) ) + { + scc_key_trx(scc, TX_ON); + scc_start_tx_timer(scc, scc_kick_tx, scc->modem.txdelay); + } else { + scc_start_tx_timer(scc, scc_kick_tx, 0); + } + } +} + +#ifndef SCC_SIMPLE_MAC +static void scc_set_rts(struct scc_channel *scc) +{ + scc->stat.tx_state = TXS_TXDELAY; + + if ( !(scc->wreg[R5] & RTS) ) + { + scc_key_trx(scc, TX_ON); + scc_start_tx_timer(scc, scc_tx_forced, scc->modem.txdelay); + } else { + scc_start_tx_timer(scc, scc_tx_forced, 0); + } +} +#endif + +/* + * TAILTIME expired + */ + +static void scc_tail(struct scc_channel *scc) +{ + if (scc->tx_buff != NULL) + return; + + if (scc->tx_new != NULL) + { + scc_kick_tx(scc); + return; + } + + scc_key_trx(scc, TX_OFF); + scc->stat.tx_state = TXS_IDLE; +} + +static void scc_init_timer(struct scc_channel *scc) +{ + unsigned long flags; + + spin_lock_irqsave(&scc->spinlocks.timer, flags); + + scc->stat.tx_state = TXS_IDLE; + // FIXME: this can't be all, can it...? + + spin_unlock_irqrestore(&scc->spinlocks.timer, flags); +} + + +/* ******************************************************************** */ +/* * Set/get L1 parameters * */ +/* ******************************************************************** */ + + +/* + * this will set the (some, anyway...) MODEM parameters + */ + +static unsigned int scc_set_param(struct scc_channel *scc, struct scc_modem *modem) +{ + scc->modem.txdelay = modem->txdelay; + scc->modem.tailtime = modem->tailtime; + scc->modem.fullduplex = modem->fullduplex; + scc->modem.tx_inhibit = modem->tx_inhibit; + scc->modem.softdcd = modem->softdcd; + + + if (modem->softdcd) + { + or(scc, R15, SYNCIE); + cl(scc, R15, DCDIE); + start_hunt(scc); + } else { + or(scc, R15, DCDIE); + cl(scc, R15, SYNCIE); + } + + return 0; +} + +static unsigned int scc_ddi_report_dcd(struct net_device *dev) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; +/* printk(KERN_INFO "dcd=%d\n", scc->dcd); */ + return scc->dcd; +} + +static unsigned int scc_ddi_report_ptt(struct net_device *dev) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; +/* printk(KERN_INFO "rts=%d\n", (scc->wreg[R5] & RTS)? 1:0); */ + return (scc->wreg[R5] & RTS)? 1:0; +} + +#ifndef SCC_SIMPLE_MAC +static unsigned int scc_ddi_report_cts(struct net_device *dev) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; + int txs = scc->stat.tx_state; + +/* printk(KERN_INFO "cts=%d\n", ((txs == TXS_ACTIVE) || (txs == TXS_TAIL))? 1:0); */ + return ((txs == TXS_ACTIVE) || (txs == TXS_TAIL))? 1:0; +} + +static void scc_ddi_set_rts(struct net_device *dev) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; +/* printk(KERN_INFO "setrts\n"); */ + scc_set_rts(scc); +} +#endif + +static void scc_ddi_set_bitrate(struct net_device *dev, unsigned int speed) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; + scc->modem.speed = speed; + if (scc->stat.tx_state != TXS_ACTIVE) + set_speed(scc); +} + +/* Update general parameters so that they reflect our internal settings */ +static void scc_ddi_param_update(struct net_device *dev) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; + + ax25_dev_set_value(dev, AX25_VALUES_MEDIA_DUPLEX, scc->modem.fullduplex); + ax25_dev_set_value(dev, AX25_VALUES_MEDIA_RXBITRATE, scc->modem.speed); + ax25_dev_set_value(dev, AX25_VALUES_MEDIA_TXBITRATE, scc->modem.speed); + ax25_dev_set_value(dev, AX25_VALUES_MEDIA_TXDELAY, scc->modem.txdelay); + ax25_dev_set_value(dev, AX25_VALUES_MEDIA_TXTAIL, scc->modem.tailtime); + return; +} + +/* Called from upper layers when parameter was changed */ +static void scc_ddi_param_notify(struct net_device *dev, int valueno, int old, int new) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; + + switch (valueno) + { + case AX25_VALUES_MEDIA_DUPLEX: + if (!netif_running(dev)) scc->modem.fullduplex = new; + break; + case AX25_VALUES_MEDIA_RXBITRATE: + case AX25_VALUES_MEDIA_TXBITRATE: + scc_ddi_set_bitrate(dev, new); + break; + case AX25_VALUES_MEDIA_TXDELAY: + scc->modem.txdelay = new; + break; + case AX25_VALUES_MEDIA_TXTAIL: + scc->modem.tailtime = new; + break; + default: + break; + } + scc_ddi_param_update(dev); + return; +} + +/* ******************************************************************* */ +/* * Init channel structures, special HW, etc... * */ +/* ******************************************************************* */ + +/* + * Reset the Z8530s and setup special hardware + */ + +static void z8530_init(void) +{ + struct scc_channel *scc; + int chip, k; + unsigned long flags; + char *flag; + + + printk(KERN_INFO "Init Z8530 driver: %u channels, IRQ", Nchips*2); + + flag=" "; + for (k = 0; k < 16; k++) + if (Ivec[k].used) + { + printk("%s%d", flag, k); + flag=","; + } + printk("\n"); + + + /* reset and pre-init all chips in the system */ + for (chip = 0; chip < Nchips; chip++) + { + scc=&SCC_Info[2*chip]; + if (!scc->ctrl) continue; + + /* Special SCC cards */ + + if(scc->brand & EAGLE) /* this is an EAGLE card */ + Outb(scc->special,0x08); /* enable interrupt on the board */ + + if(scc->brand & (PC100 | PRIMUS)) /* this is a PC100/PRIMUS card */ + Outb(scc->special,scc->option); /* set the MODEM mode (0x22) */ + + + /* Reset and pre-init Z8530 */ + + spin_lock_irqsave(&scc->spinlocks.hwaccess, flags); + + Outb(scc->ctrl,0); + OutReg(scc->ctrl,R9,FHWRES); /* force hardware reset */ + udelay(100); /* give it 'a bit' more time than required */ + wr(scc, R2, chip*16); /* interrupt vector */ + wr(scc, R9, VIS); /* vector includes status */ + + spin_unlock_irqrestore(&scc->spinlocks.hwaccess, flags); + } + + + Driver_Initialized = 1; +} + +/* + * Allocate device structure, err, instance, and register driver + */ + +static int scc_net_setup(struct scc_channel *scc, unsigned char *name, int addev) +{ + struct net_device *dev; + + if (dev_get_by_name(name) != NULL) + { + printk(KERN_INFO "Z8530drv: device %s already exists.\n", name); + return -EEXIST; + } + + if ((scc->dev = (struct net_device *) kmalloc(sizeof(struct net_device), GFP_KERNEL)) == NULL) + return -ENOMEM; + + dev = scc->dev; + memset(dev, 0, sizeof(struct net_device)); + + dev->priv = (void *) scc; + strcpy(dev->name, name); + dev->init = scc_net_init; + + if ((addev? register_netdevice(dev) : register_netdev(dev)) != 0) + { + kfree(dev); + return -EIO; + } + + return 0; +} + + + +/* ******************************************************************** */ +/* * Network driver methods * */ +/* ******************************************************************** */ + +/* ----> Initialize device <----- */ + +static int scc_net_init(struct net_device *dev) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; + struct ax25_dev *ax25dev; + dev_init_buffers(dev); + + dev->tx_queue_len = 16; /* should be enough... */ + + dev->open = scc_net_open; + dev->stop = scc_net_close; + + dev->hard_start_xmit = scc_net_tx; + dev->set_mac_address = scc_net_set_mac_address; + dev->get_stats = scc_net_get_stats; + dev->do_ioctl = scc_net_ioctl; + dev->tx_timeout = scc_net_timeout; + dev->watchdog_timeo = SCC_WATCHDOG_TIMEOUT; + + dev->type = ARPHRD_AX25; + dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN; + dev->mtu = AX25_DEF_PACLEN; + dev->addr_len = AX25_ADDR_LEN; + + AX25_PTR(dev) = ax25dev = &scc->ax25dev; + memset(ax25dev, 0, sizeof(struct ax25_dev)); + ax25dev->hw.ptt = scc_ddi_report_ptt; + ax25dev->hw.dcd = scc_ddi_report_dcd; +#ifndef SCC_SIMPLE_MAC + ax25dev->hw.cts = scc_ddi_report_cts; + ax25dev->hw.rts = scc_ddi_set_rts; +#endif + ax25dev->hw.parameter_change_notify = scc_ddi_param_notify; + ax25dev->hw.fast = 0; + + return 0; +} + +/* ----> open network device <---- */ + +static int scc_net_open(struct net_device *dev) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; + + if (!scc->init) return -EINVAL; + + MOD_INC_USE_COUNT; + + scc->tx_buff = NULL; + + init_channel(scc); + + scc_ddi_param_update(dev); + netif_start_queue(dev); + + return 0; +} + +/* ----> close network device <---- */ + +static int scc_net_close(struct net_device *dev) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; + unsigned long flags; + + netif_stop_queue(dev); + spin_lock_irqsave(&scc->spinlocks.hwaccess, flags); + + Outb(scc->ctrl,0); /* Make sure pointer is written */ + wr(scc,R1,0); /* disable interrupts */ + wr(scc,R3,0); + + del_timer(&scc->tx_timer); + spin_unlock_irqrestore(&scc->spinlocks.hwaccess, flags); + + if (scc->tx_buff) + kfree_skb(scc->tx_buff); + if (scc->tx_new) + kfree_skb(scc->tx_new); + + MOD_DEC_USE_COUNT; + return 0; +} + +/* ----> receive frame, called from scc_rxint() <---- */ + +static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb) +{ + if (skb->len == 0) + { + kfree_skb(skb); + return; + } + + scc->dev_stat.rx_packets++; + + skb->dev = scc->dev; + skb->protocol = htons(ETH_P_AX25); + skb->mac.raw = skb->data; + skb->pkt_type = PACKET_HOST; + + netif_rx(skb); + return; +} + +/* ----> transmit frame <---- */ + +static int scc_net_tx(struct sk_buff *skb, struct net_device *dev) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; + + if (skb->len > scc->stat.bufsize || skb->len < 2) + { + scc->dev_stat.tx_dropped++; /* bogus frame */ + dev_kfree_skb(skb); + return 0; + } + + netif_stop_queue(dev); + + scc->dev_stat.tx_packets++; + scc->stat.txframes++; + +#ifdef notdef + /**** The following "fix" is bogus. Fix the protocol, dammit! ****/ + + /* avoid race condition when skb is a cloned broadcast */ + skb_cp = skb_copy(skb, GFP_ATOMIC); + dev_kfree_skb(skb); + if (skb_cp == NULL) { + scc->dev_stat.tx_dropped++; /* out of memory */ + return 0; + } +#endif + + /* transmit frame */ + + dev->trans_start = jiffies; + scc_tx_start(scc, skb); + + return 0; +} + + +/* -----> Watchdog <----- */ + +static void scc_net_timeout(struct net_device *dev) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; + unsigned long flags; + + del_timer(&scc->tx_timer); + + spin_lock_irqsave(&scc->spinlocks.hwaccess, flags); + cl(scc, R1, TxINT_ENAB); + cl(scc, R15, TxUIE); + OutReg(scc->ctrl, R0, RES_Tx_P); + spin_unlock_irqrestore(&scc->spinlocks.hwaccess, flags); + + scc_start_tx_timer(scc, init_channel, 100); +} + + + +/* ----> ioctl functions <---- */ + +/* + * SIOCSCCCFG - configure driver arg: (struct scc_hw_config *) arg + * SIOCSCCINI - initialize driver arg: --- + * SIOCSCCCHANINI - initialize channel arg: (struct scc_modem *) arg + * SIOCSCCSMEM - set memory arg: (struct scc_mem_config *) arg + * SIOCSCCGMODEM - get level 1 parameter arg: (struct scc_modem *) arg + * SIOCSCCSMODEM - set level 1 parameter arg: (struct scc_modem *) arg + * SIOCSCCGSTAT - get driver status arg: (struct scc_stat *) arg + */ + +static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) +{ + struct scc_modem modem; + struct scc_mem_config memcfg; + struct scc_hw_config hwcfg; + unsigned long flags; + int chan; + unsigned char device_name[10]; + void *arg; + struct scc_channel *scc; + unsigned int ret; + + scc = (struct scc_channel *) dev->priv; + arg = (void *) ifr->ifr_data; + + if (!Driver_Initialized) + { + if (cmd == SIOCSCCCFG) + { + int found = 1; + + if (!capable(CAP_SYS_RAWIO)) return -EPERM; + if (!arg) return -EFAULT; + + if (Nchips >= SCC_MAXCHIPS) + return -EINVAL; + + if (copy_from_user(&hwcfg, arg, sizeof(hwcfg))) + return -EFAULT; + + IO_Spinlock = SPIN_LOCK_UNLOCKED; + IO_Delay = hwcfg.delay; + + if (hwcfg.irq == 2) hwcfg.irq = 9; + if (!Ivec[hwcfg.irq].used && hwcfg.irq) + { + if (request_irq(hwcfg.irq, scc_isr, SA_INTERRUPT, "AX.25 SCC", NULL)) + printk(KERN_WARNING "z8530drv: warning, cannot get IRQ %d\n", hwcfg.irq); + else + Ivec[hwcfg.irq].used = 1; + } + + if (hwcfg.vector_latch) + Vector_Latch = hwcfg.vector_latch; + + if (hwcfg.clock == 0) + hwcfg.clock = SCC_DEFAULT_CLOCK; + + +#ifndef SCC_DONT_CHECK + save_flags(flags); + cli(); + + check_region(scc->ctrl, 1); + Outb(hwcfg.ctrl_a, 0); + OutReg(hwcfg.ctrl_a, R9, FHWRES); + udelay(100); + OutReg(hwcfg.ctrl_a, R13, 0x55); + udelay(5); + if (InReg(hwcfg.ctrl_a, R13) != 0x55) + found = 0; + + restore_flags(flags); +#endif + + if (found) + { + SCC_ctrl[Nchips].chan_A = hwcfg.ctrl_a; + SCC_ctrl[Nchips].chan_B = hwcfg.ctrl_b; + SCC_ctrl[Nchips].irq = hwcfg.irq; + } + + + for (chan = 0; chan < 2; chan++) + { + sprintf(device_name, "%s%i", SCC_DriverName, 2*Nchips+chan); + + SCC_Info[2*Nchips+chan].ctrl = chan? hwcfg.ctrl_b:hwcfg.ctrl_a; + SCC_Info[2*Nchips+chan].data = chan? hwcfg.data_b:hwcfg.data_a; + SCC_Info[2*Nchips+chan].irq = hwcfg.irq; + SCC_Info[2*Nchips+chan].special = hwcfg.special; + SCC_Info[2*Nchips+chan].clock = hwcfg.clock; + SCC_Info[2*Nchips+chan].brand = hwcfg.brand; + SCC_Info[2*Nchips+chan].option = hwcfg.option; + SCC_Info[2*Nchips+chan].enhanced= hwcfg.escc; + +#ifdef SCC_DONT_CHECK + printk(KERN_INFO "%s: data port = 0x%3.3x control port = 0x%3.3x\n", + device_name, + SCC_Info[2*Nchips+chan].data, + SCC_Info[2*Nchips+chan].ctrl); + +#else + printk(KERN_INFO "%s: data port = 0x%3.3lx control port = 0x%3.3lx -- %s\n", + device_name, + chan? hwcfg.data_b : hwcfg.data_a, + chan? hwcfg.ctrl_b : hwcfg.ctrl_a, + found? "found" : "missing"); +#endif + + if (found) + { + request_region(SCC_Info[2*Nchips+chan].ctrl, 1, "scc ctrl"); + request_region(SCC_Info[2*Nchips+chan].data, 1, "scc data"); + if (Nchips+chan != 0) + scc_net_setup(&SCC_Info[2*Nchips+chan], device_name, 1); + } + } + + if (found) Nchips++; + + return 0; + } + + if (cmd == SIOCSCCINI) + { + if (!capable(CAP_SYS_RAWIO)) + return -EPERM; + + if (Nchips == 0) + return -EINVAL; + + z8530_init(); + scc_ddi_param_update(dev); + return 0; + } + + return -EINVAL; /* confuse the user */ + } + + if (!scc->init) + { + if (cmd == SIOCSCCCHANINI) + { + if (!capable(CAP_NET_ADMIN)) return -EPERM; + if (!arg) return -EINVAL; + + scc->stat.bufsize = SCC_BUFSIZE; + + if (copy_from_user(&scc->modem, arg, sizeof(struct scc_modem))) + return -EINVAL; + + scc->tx_buff = NULL; + scc->tx_new = NULL; + scc->init = 1; + + scc_ddi_param_update(dev); + return 0; + } + + return -EINVAL; + } + + switch(cmd) + { + case SIOCSCCRESERVED: + return -ENOIOCTLCMD; + + case SIOCSCCSMEM: + if (!capable(CAP_SYS_RAWIO)) return -EPERM; + if (!arg || copy_from_user(&memcfg, arg, sizeof(memcfg))) + return -EINVAL; + scc->stat.bufsize = memcfg.bufsize; + return 0; + + case SIOCSCCGSTAT: + if (!arg || copy_to_user(arg, &scc->stat, sizeof(scc->stat))) + return -EINVAL; + return 0; + + case SIOCSCCGMODEM: + if (!arg || copy_to_user(arg, &scc->modem, sizeof(struct scc_modem))) + return -EINVAL; + return 0; + + case SIOCSCCSMODEM: + if (!capable(CAP_NET_ADMIN)) return -EPERM; + if (!arg || copy_from_user(&modem, arg, sizeof(struct scc_modem))) + return -EINVAL; + ret = scc_set_param(scc, &modem); + scc_ddi_param_update(dev); + return ret; + + default: + return -ENOIOCTLCMD; + + } + + return -EINVAL; +} + +/* ----> set interface callsign <---- */ + +static int scc_net_set_mac_address(struct net_device *dev, void *addr) +{ + struct sockaddr *sa = (struct sockaddr *) addr; + memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); + return 0; +} + +/* ----> get statistics <---- */ + +static struct net_device_stats *scc_net_get_stats(struct net_device *dev) +{ + struct scc_channel *scc = (struct scc_channel *) dev->priv; + + scc->dev_stat.rx_errors = scc->stat.rxerrs + scc->stat.rx_over; + scc->dev_stat.tx_errors = scc->stat.txerrs + scc->stat.tx_under; + scc->dev_stat.rx_fifo_errors = scc->stat.rx_over; + scc->dev_stat.tx_fifo_errors = scc->stat.tx_under; + + return &scc->dev_stat; +} + +/* ******************************************************************** */ +/* * dump statistics to /proc/net/z8530drv * */ +/* ******************************************************************** */ + + +static int scc_net_get_info(char *buffer, char **start, off_t offset, int length) +{ + struct scc_channel *scc; + struct scc_stat *stat; + int len = 0; + off_t pos = 0; + off_t begin = 0; + int k; + + len += sprintf(buffer, "z8530drv-"VERSION"\n"); + + if (!Driver_Initialized) + { + len += sprintf(buffer+len, "not initialized\n"); + goto done; + } + + if (!Nchips) + { + len += sprintf(buffer+len, "chips missing\n"); + goto done; + } + + for (k = 0; k < Nchips*2; k++) + { + scc = &SCC_Info[k]; + stat = &scc->stat; + + if (!scc->init) + continue; + + /* dev data ctrl irq clock brand enh vector special option + * baud nrz clksrc fulldplx txoff softdcd txd tail bufsize + * rxints txints exints spints + * rcvd rxerrs over / xmit txerrs under / nospace bufsize + * W ## ## ## ## ## ## ## ## ## ## ## ## ## ## ## ## + * R ## ## XX ## ## ## ## ## XX ## ## ## ## ## ## ## + */ + + len += sprintf(buffer+len, "%s\t%3.3lx %3.3lx %d %lu %2.2x %d %3.3lx %3.3lx %d\n", + scc->dev->name, + scc->data, scc->ctrl, scc->irq, scc->clock, scc->brand, + scc->enhanced, Vector_Latch, scc->special, + scc->option); + len += sprintf(buffer+len, "\t%lu %d %d %d %d %d %d %d %d\n", + scc->modem.speed, scc->modem.nrz, + scc->modem.clocksrc, scc->modem.fullduplex, + scc->modem.tx_inhibit, scc->modem.softdcd, + scc->modem.txdelay, scc->modem.tailtime, + stat->bufsize); + len += sprintf(buffer+len, "\t%lu %lu %lu %lu\n", + stat->rxints, stat->txints, stat->exints, stat->spints); + len += sprintf(buffer+len, "\t%lu %lu %d / %lu %lu %d / %d %d\n", + stat->rxframes, stat->rxerrs, stat->rx_over, + stat->txframes, stat->txerrs, stat->tx_under, + stat->nospace, stat->tx_state); + +#ifdef SCC_DEBUG + { + int reg; + + len += sprintf(buffer+len, "\tW "); + for (reg = 0; reg < 16; reg++) + len += sprintf(buffer+len, "%2.2x ", scc->wreg[reg]); + len += sprintf(buffer+len, "\n"); + + len += sprintf(buffer+len, "\tR %2.2x %2.2x XX ", InReg(scc->ctrl,R0), InReg(scc->ctrl,R1)); + for (reg = 3; reg < 8; reg++) + len += sprintf(buffer+len, "%2.2x ", InReg(scc->ctrl, reg)); + len += sprintf(buffer+len, "XX "); + for (reg = 9; reg < 16; reg++) + len += sprintf(buffer+len, "%2.2x ", InReg(scc->ctrl, reg)); + len += sprintf(buffer+len, "\n"); + } +#endif + len += sprintf(buffer+len, "\n"); + + pos = begin + len; + + if (pos < offset) { + len = 0; + begin = pos; + } + + if (pos > offset + length) + break; + } + +done: + + *start = buffer + (offset - begin); + len -= (offset - begin); + + if (len > length) len = length; + + return len; +} + + + +/* ******************************************************************** */ +/* * Init SCC driver * */ +/* ******************************************************************** */ + +int __init scc_init_driver(void) +{ + int chip, chan, k, result; + char devname[10]; + + printk(KERN_INFO BANNER); + + memset(&SCC_ctrl, 0, sizeof(SCC_ctrl)); + + /* pre-init channel information */ + + for (chip = 0; chip < SCC_MAXCHIPS; chip++) + { + for (chan = 0; chan < 2; chan++) + { + struct scc_channel *scc = &SCC_Info[2*chip+chan]; + memset((char *) scc, 0, sizeof(struct scc_channel)); + + scc->spinlocks.hwaccess = SPIN_LOCK_UNLOCKED; + scc->spinlocks.timer = SPIN_LOCK_UNLOCKED; + scc->spinlocks.kick_tx = SPIN_LOCK_UNLOCKED; + } + } + + for (k = 0; k < 16; k++) Ivec[k].used = 0; + + sprintf(devname,"%s0", SCC_DriverName); + + result = scc_net_setup(SCC_Info, devname, 0); + if (result) + { + printk(KERN_ERR "z8530drv: cannot initialize module\n"); + return result; + } + +#ifdef CONFIG_PROC_FS + proc_net_create("z8530drv", 0, scc_net_get_info); +#endif + + return 0; +} + +/* ******************************************************************** */ +/* * Module support * */ +/* ******************************************************************** */ + + +void __exit scc_cleanup_driver(void) +{ + long flags; + io_port ctrl; + int k; + struct scc_channel *scc = NULL; + + spin_lock_irqsave(&scc->spinlocks.hwaccess, flags); + + if (Nchips == 0) + unregister_netdev(SCC_Info[0].dev); + + for (k = 0; k < Nchips; k++) + if ( (ctrl = SCC_ctrl[k].chan_A) ) + { + Outb(ctrl,0); + OutReg(ctrl,R9,FHWRES); /* force hardware reset */ + udelay(50); + } + + for (k = 0; k < Nchips*2; k++) + { + scc = &SCC_Info[k]; + if (scc) + { + release_region(scc->ctrl, 1); + release_region(scc->data, 1); + if (scc->dev) + { + unregister_netdev(scc->dev); + kfree(scc->dev); + } + } + } + + for (k=0; k < 16 ; k++) + if (Ivec[k].used) free_irq(k, NULL); + + spin_unlock_irqrestore(&scc->spinlocks.hwaccess, flags); + +#ifdef CONFIG_PROC_FS + proc_net_remove("z8530drv"); +#endif +} + +MODULE_AUTHOR("Joerg Reuter <jreuter@yaina.de>"); +MODULE_DESCRIPTION("Network Device Driver for Z8530 based HDLC cards for Amateur Packet Radio"); +MODULE_SUPPORTED_DEVICE("Z8530 based SCC cards without DMA support"); +module_init(scc_init_driver); +module_exit(scc_cleanup_driver); |