diff options
Diffstat (limited to 'include/asm-arm/arch-ebsa285')
| -rw-r--r-- | include/asm-arm/arch-ebsa285/a.out.h | 1 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/dma.h | 9 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/hardware.h | 70 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/ide.h | 39 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/io.h | 73 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/irq.h | 111 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/irqs.h | 15 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/keyboard.h | 41 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/mmu.h | 11 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/processor.h | 5 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/serial.h | 41 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/system.h | 27 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/time.h | 102 | ||||
| -rw-r--r-- | include/asm-arm/arch-ebsa285/uncompress.h | 30 |
14 files changed, 410 insertions, 165 deletions
diff --git a/include/asm-arm/arch-ebsa285/a.out.h b/include/asm-arm/arch-ebsa285/a.out.h index 0123eb29a..2746584c8 100644 --- a/include/asm-arm/arch-ebsa285/a.out.h +++ b/include/asm-arm/arch-ebsa285/a.out.h @@ -9,7 +9,6 @@ #ifdef __KERNEL__ #define STACK_TOP ((current->personality==PER_LINUX_32BIT)? 0xc0000000 : 0x04000000) -#define LIBRARY_START_TEXT (0x00c00000) #endif #endif diff --git a/include/asm-arm/arch-ebsa285/dma.h b/include/asm-arm/arch-ebsa285/dma.h index d3a2aa0c9..28c093aec 100644 --- a/include/asm-arm/arch-ebsa285/dma.h +++ b/include/asm-arm/arch-ebsa285/dma.h @@ -15,20 +15,11 @@ #define MAX_DMA_ADDRESS 0xffffffff /* - * DMA modes - we have two, IN and OUT - */ - -typedef int dmamode_t; -#define DMA_MODE_READ 0x44 -#define DMA_MODE_WRITE 0x48 - -/* * The 21285 has two internal DMA channels; we call these 0 and 1. * On CATS hardware we have an additional eight ISA dma channels * numbered 2..9. */ #define MAX_DMA_CHANNELS 10 - #define DMA_ISA_BASE 2 #define DMA_FLOPPY (DMA_ISA_BASE + 2) diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h index a9bc6f0a4..e08c5b823 100644 --- a/include/asm-arm/arch-ebsa285/hardware.h +++ b/include/asm-arm/arch-ebsa285/hardware.h @@ -19,12 +19,12 @@ * 0xf8000000 0x7b010000 PCI Config type 0 * */ + +#include <asm/dec21285.h> -#define IO_END 0xffffffff #define IO_BASE 0xe0000000 -#define IO_SIZE (IO_END - IO_BASE) - -#define HAS_PCIO +#define PCIO_BASE 0xffe00000 +#define PCI_IACK 0xfc000000 #define XBUS_LEDS ((volatile unsigned char *)0xfff12000) #define XBUS_LED_AMBER (1 << 0) @@ -38,70 +38,10 @@ #define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5)) #define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6)) -#define PCIO_BASE 0xffe00000 - -#define CSR_SA110_CNTL ((volatile unsigned long *)0xfe00013c) -#define CSR_PCIADDR_EXTN ((volatile unsigned long *)0xfe000140) -#define CSR_PREFETCHMEMRANGE ((volatile unsigned long *)0xfe000144) -#define CSR_XBUS_CYCLE ((volatile unsigned long *)0xfe000148) -#define CSR_XBUS_IOSTROBE ((volatile unsigned long *)0xfe00014c) -#define CSR_DOORBELL_PCI ((volatile unsigned long *)0xfe000150) -#define CSR_DOORBELL_SA110 ((volatile unsigned long *)0xfe000154) - - -#define CSR_UARTDR ((volatile unsigned long *)0xfe000160) -#define CSR_RXSTAT ((volatile unsigned long *)0xfe000164) -#define CSR_H_UBRLCR ((volatile unsigned long *)0xfe000168) -#define CSR_M_UBRLCR ((volatile unsigned long *)0xfe00016c) -#define CSR_L_UBRLCR ((volatile unsigned long *)0xfe000170) -#define CSR_UARTCON ((volatile unsigned long *)0xfe000174) -#define CSR_UARTFLG ((volatile unsigned long *)0xfe000178) - -#define CSR_IRQ_STATUS ((volatile unsigned long *)0xfe000180) -#define CSR_IRQ_RAWSTATUS ((volatile unsigned long *)0xfe000184) -#define CSR_IRQ_ENABLE ((volatile unsigned long *)0xfe000188) -#define CSR_IRQ_DISABLE ((volatile unsigned long *)0xfe00018c) -#define CSR_IRQ_SOFT ((volatile unsigned long *)0xfe000190) - -#define CSR_FIQ_STATUS ((volatile unsigned long *)0xfe000280) -#define CSR_FIQ_RAWSTATUS ((volatile unsigned long *)0xfe000284) -#define CSR_FIQ_ENABLE ((volatile unsigned long *)0xfe000288) -#define CSR_FIQ_DISABLE ((volatile unsigned long *)0xfe00028c) -#define CSR_FIQ_SOFT ((volatile unsigned long *)0xfe000290) - -#define CSR_TIMER1_LOAD ((volatile unsigned long *)0xfe000300) -#define CSR_TIMER1_VALUE ((volatile unsigned long *)0xfe000304) -#define CSR_TIMER1_CNTL ((volatile unsigned long *)0xfe000308) -#define CSR_TIMER1_CLR ((volatile unsigned long *)0xfe00030c) - -#define CSR_TIMER2_LOAD ((volatile unsigned long *)0xfe000320) -#define CSR_TIMER2_VALUE ((volatile unsigned long *)0xfe000324) -#define CSR_TIMER2_CNTL ((volatile unsigned long *)0xfe000328) -#define CSR_TIMER2_CLR ((volatile unsigned long *)0xfe00032c) - -#define CSR_TIMER3_LOAD ((volatile unsigned long *)0xfe000340) -#define CSR_TIMER3_VALUE ((volatile unsigned long *)0xfe000344) -#define CSR_TIMER3_CNTL ((volatile unsigned long *)0xfe000348) -#define CSR_TIMER3_CLR ((volatile unsigned long *)0xfe00034c) - -#define CSR_TIMER4_LOAD ((volatile unsigned long *)0xfe000360) -#define CSR_TIMER4_VALUE ((volatile unsigned long *)0xfe000364) -#define CSR_TIMER4_CNTL ((volatile unsigned long *)0xfe000368) -#define CSR_TIMER4_CLR ((volatile unsigned long *)0xfe00036c) - - -#define TIMER_CNTL_ENABLE (1 << 7) -#define TIMER_CNTL_AUTORELOAD (1 << 6) -#define TIMER_CNTL_DIV1 (0) -#define TIMER_CNTL_DIV16 (1 << 2) -#define TIMER_CNTL_DIV256 (2 << 2) -#define TIMER_CNTL_CNTEXT (3 << 2) - - #define KERNTOPHYS(a) ((unsigned long)(&a)) #define PARAMS_OFFSET 0x0100 #define PARAMS_BASE (PAGE_OFFSET + PARAMS_OFFSET) -#define SAFE_ADDR 0x50000000 +#define FLUSH_BASE_PHYS 0x50000000 diff --git a/include/asm-arm/arch-ebsa285/ide.h b/include/asm-arm/arch-ebsa285/ide.h index 35eff5c28..b0071a45b 100644 --- a/include/asm-arm/arch-ebsa285/ide.h +++ b/include/asm-arm/arch-ebsa285/ide.h @@ -1 +1,38 @@ -/* no ide */ +/* + * linux/include/asm-arm/arch-ebsa285/ide.h + * + * Copyright (c) 1998 Russell King + * + * Modifications: + * 29-07-1998 RMK Major re-work of IDE architecture specific code + */ +#include <asm/irq.h> + +/* + * Set up a hw structure for a specified data port, control port and IRQ. + * This should follow whatever the default interface uses. + */ +static __inline__ void +ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int irq) +{ + ide_ioreg_t reg = (ide_ioreg_t) data_port; + int i; + + memset(hw, 0, sizeof(*hw)); + + for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { + hw->io_ports[i] = reg; + reg += 1; + } + hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port; + hw->irq = irq; +} + +/* + * This registers the standard ports for this architecture with the IDE + * driver. + */ +static __inline__ void +ide_init_default_hwifs(void) +{ +} diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h index f42717350..1be73879d 100644 --- a/include/asm-arm/arch-ebsa285/io.h +++ b/include/asm-arm/arch-ebsa285/io.h @@ -1,5 +1,5 @@ /* - * linux/include/asm-arm/arch-ebsa110/io.h + * linux/include/asm-arm/arch-ebsa285/io.h * * Copyright (C) 1997,1998 Russell King * @@ -9,6 +9,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/dec21285.h> + /* * This architecture does not require any delayed IO, and * has the constant-optimised IO @@ -23,7 +25,7 @@ extern __inline__ void __out##fnsuffix (unsigned int value, unsigned int port) \ { \ __asm__ __volatile__( \ - "str" ##instr## " %0, [%1, %2]" \ + "str%?" ##instr## " %0, [%1, %2] @ out"###fnsuffix \ : \ : "r" (value), "r" (PCIO_BASE), typ (port)); \ } @@ -33,7 +35,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ { \ unsigned long value; \ __asm__ __volatile__( \ - "ldr" ##instr## " %0, [%1, %2]" \ + "ldr%?" ##instr## " %0, [%1, %2] @ in"###fnsuffix \ : "=&r" (value) \ : "r" (PCIO_BASE), typ (port)); \ return (unsigned sz)value; \ @@ -65,7 +67,7 @@ DECLARE_IO(long,l,"","Jr") #define __outbc(value,port) \ ({ \ __asm__ __volatile__( \ - "strb %0, [%1, %2]" \ + "str%?b %0, [%1, %2] @ outbc" \ : \ : "r" (value), "r" (PCIO_BASE), "Jr" (port)); \ }) @@ -74,7 +76,7 @@ DECLARE_IO(long,l,"","Jr") ({ \ unsigned char result; \ __asm__ __volatile__( \ - "ldrb %0, [%1, %2]" \ + "ldr%?b %0, [%1, %2] @ inbc" \ : "=r" (result) \ : "r" (PCIO_BASE), "Jr" (port)); \ result; \ @@ -83,7 +85,7 @@ DECLARE_IO(long,l,"","Jr") #define __outwc(value,port) \ ({ \ __asm__ __volatile__( \ - "strh %0, [%1, %2]" \ + "str%?h %0, [%1, %2] @ outwc" \ : \ : "r" (value), "r" (PCIO_BASE), "r" (port)); \ }) @@ -92,7 +94,7 @@ DECLARE_IO(long,l,"","Jr") ({ \ unsigned short result; \ __asm__ __volatile__( \ - "ldrh %0, [%1, %2]" \ + "ldr%?h %0, [%1, %2] @ inwc" \ : "=r" (result) \ : "r" (PCIO_BASE), "r" (port)); \ result & 0xffff; \ @@ -101,7 +103,7 @@ DECLARE_IO(long,l,"","Jr") #define __outlc(value,port) \ ({ \ __asm__ __volatile__( \ - "str %0, [%1, %2]" \ + "str%? %0, [%1, %2] @ outlc" \ : \ : "r" (value), "r" (PCIO_BASE), "Jr" (port)); \ }) @@ -110,7 +112,7 @@ DECLARE_IO(long,l,"","Jr") ({ \ unsigned long result; \ __asm__ __volatile__( \ - "ldr %0, [%1, %2]" \ + "ldr%? %0, [%1, %2] @ inlc" \ : "=r" (result) \ : "r" (PCIO_BASE), "Jr" (port)); \ result; \ @@ -141,25 +143,68 @@ DECLARE_IO(long,l,"","Jr") (*(volatile unsigned long *)(p)) /* - * This is not sufficient... (and it's a hack anyway) + * ioremap support + */ +#define valid_ioaddr(iomem,size) ((iomem) < 0x80000000 && (iomem) + (size) <= 0x80000000) +#define io_to_phys(iomem) ((iomem) + DC21285_PCI_MEM) + +/* + * Fudge up IO addresses by this much. Once we're confident that nobody + * is using read*() and so on with addresses they didn't get from ioremap + * this can go away. + */ +#define IO_FUDGE_FACTOR 0xe0000000 + +extern inline void *ioremap(unsigned long iomem_addr, unsigned long size) +{ + unsigned long phys_addr; + + if (!valid_ioaddr(iomem_addr, size)) + return NULL; + + phys_addr = io_to_phys(iomem_addr & PAGE_MASK); + + return (void *)((unsigned long)__ioremap(phys_addr, size, 0) + - IO_FUDGE_FACTOR); +} + +#define ioremap_nocache(iomem_addr,size) ioremap((iomem_addr),(size)) + +extern void iounmap(void *addr); + +/* + * We'd probably be better off with these as macros rather than functions. + * Firstly that would be more efficient and secondly we could do with the + * ability to stop GCC whinging about type conversions. --philb */ static inline void writeb(unsigned char b, unsigned int addr) { - *(volatile unsigned char *)(0xe0000000 + (addr)) = b; + *(volatile unsigned char *)(IO_FUDGE_FACTOR + (addr)) = b; } static inline unsigned char readb(unsigned int addr) { - return *(volatile unsigned char *)(0xe0000000 + (addr)); + return *(volatile unsigned char *)(IO_FUDGE_FACTOR + (addr)); } static inline void writew(unsigned short b, unsigned int addr) { - *(volatile unsigned short *)(0xe0000000 + (addr)) = b; + *(volatile unsigned short *)(IO_FUDGE_FACTOR + (addr)) = b; } static inline unsigned short readw(unsigned int addr) { - return *(volatile unsigned short *)(0xe0000000 + (addr)); + return *(volatile unsigned short *)(IO_FUDGE_FACTOR + (addr)); } + +static inline void writel(unsigned long b, unsigned int addr) +{ + *(volatile unsigned long *)(IO_FUDGE_FACTOR + (addr)) = b; +} + +static inline unsigned short readl(unsigned int addr) +{ + return *(volatile unsigned long *)(IO_FUDGE_FACTOR + (addr)); +} + #endif diff --git a/include/asm-arm/arch-ebsa285/irq.h b/include/asm-arm/arch-ebsa285/irq.h index 029b1b1a6..74bc33c58 100644 --- a/include/asm-arm/arch-ebsa285/irq.h +++ b/include/asm-arm/arch-ebsa285/irq.h @@ -5,7 +5,9 @@ * * Changelog: * 22-08-1998 RMK Restructured IRQ routines + * 03-09-1998 PJB Merged CATS support */ +#include <linux/config.h> static void ebsa285_mask_irq(unsigned int irq) { @@ -16,7 +18,73 @@ static void ebsa285_unmask_irq(unsigned int irq) { *CSR_IRQ_ENABLE = 1 << irq; } + +#ifdef CONFIG_CATS + +/* + * This contains the irq mask for both 8259A irq controllers, + */ +static unsigned int isa_irq_mask = 0xffff; + +#define cached_21 (isa_irq_mask & 0xff) +#define cached_A1 ((isa_irq_mask >> 8) & 0xff) + +#define update_8259(_irq) \ + if ((_irq) & 8) \ + outb(cached_A1, 0xa1); \ + else \ + outb(cached_21, 0x21); + +static void isa_interrupt(int irq, void *h, struct pt_regs *regs) +{ + asmlinkage void do_IRQ(int irq, struct pt_regs * regs); + unsigned int irqbits = inb(0x20) | (inb(0xa0) << 8), irqnr = 0; + irqbits &= ~(1<<2); /* don't try to service the cascade */ + while (irqbits) { + if (irqbits & 1) + do_IRQ(32 + irqnr, regs); + irqbits >>= 1; + irqnr++; + } +} + +static void no_action(int cpl, void *dev_id, struct pt_regs *regs) { } + +static struct irqaction irq_isa = + { isa_interrupt, SA_INTERRUPT, 0, "ISA PIC", NULL, NULL }; +static struct irqaction irq_cascade = + { no_action, 0, 0, "cascade", NULL, NULL }; + +static void cats_mask_and_ack_isa_irq(unsigned int irq) +{ + isa_irq_mask |= (1 << (irq - 32)); + update_8259(irq); + if (irq & 8) { + inb(0xA1); /* DUMMY */ + outb(cached_A1,0xA1); + outb(0x62,0x20); /* Specific EOI to cascade */ + outb(0x20,0xA0); + } else { + inb(0x21); /* DUMMY */ + outb(cached_21,0x21); + outb(0x20,0x20); + } +} + +static void cats_mask_isa_irq(unsigned int irq) +{ + isa_irq_mask |= (1 << (irq - 32)); + update_8259(irq); +} + +static void cats_unmask_isa_irq(unsigned int irq) +{ + isa_irq_mask &= ~(1 << (irq - 32)); + update_8259(irq); +} +#endif + static __inline__ void irq_init_irq(void) { int irq; @@ -27,8 +95,45 @@ static __inline__ void irq_init_irq(void) for (irq = 0; irq < NR_IRQS; irq++) { irq_desc[irq].valid = 1; irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = ebsa285_mask_irq; - irq_desc[irq].mask = ebsa285_mask_irq; - irq_desc[irq].unmask = ebsa285_unmask_irq; +#ifdef CONFIG_CATS + if (machine_is_cats() && IRQ_IS_ISA(irq)) { + irq_desc[irq].mask_ack = cats_mask_and_ack_isa_irq; + irq_desc[irq].mask = cats_mask_isa_irq; + irq_desc[irq].unmask = cats_unmask_isa_irq; + } else +#endif + { + irq_desc[irq].mask_ack = ebsa285_mask_irq; + irq_desc[irq].mask = ebsa285_mask_irq; + irq_desc[irq].unmask = ebsa285_unmask_irq; + } + } + +#ifdef CONFIG_CATS + if (machine_is_cats()) { + request_region(0x20, 2, "pic1"); + request_region(0xa0, 2, "pic2"); + + /* set up master 8259 */ + outb(0x11, 0x20); + outb(0, 0x21); + outb(1<<2, 0x21); + outb(0x1, 0x21); + outb(0xff, 0x21); + outb(0x68, 0x20); + outb(0xa, 0x20); + + /* set up slave 8259 */ + outb(0x11, 0xa0); + outb(0, 0xa1); + outb(2, 0xa1); + outb(0x1, 0xa1); + outb(0xff, 0xa1); + outb(0x68, 0xa0); + outb(0xa, 0xa0); + + setup_arm_irq(IRQ_ISA_PIC, &irq_isa); + setup_arm_irq(IRQ_ISA_CASCADE, &irq_cascade); } +#endif } diff --git a/include/asm-arm/arch-ebsa285/irqs.h b/include/asm-arm/arch-ebsa285/irqs.h index f2ef06c9d..6021bee6e 100644 --- a/include/asm-arm/arch-ebsa285/irqs.h +++ b/include/asm-arm/arch-ebsa285/irqs.h @@ -2,9 +2,10 @@ * linux/include/asm-arm/arch-ebsa285/irqs.h * * Copyright (C) 1998 Russell King + * Copyright (C) 1998 Phil Blundell */ -#define NR_IRQS 32 +#define NR_IRQS 48 /* * This is a list of all interrupts that the 21285 @@ -39,10 +40,18 @@ #define IRQ_PCITARGETABORT 30 #define IRQ_PCIPARITY 31 +/* IRQs 32-47 are the 16 ISA interrupts on a CATS board. */ +#define IRQ_ISA_PIC IRQ_IN2 +#define IRQ_IS_ISA(_x) (((_x) >= 32) && ((_x) <= 47)) +#define IRQ_ISA(_x) ((_x) + 0x20) +#define IRQ_ISA_CASCADE IRQ_ISA(2) + /* * Now map them to the Linux interrupts */ #define IRQ_TIMER IRQ_TIMER1 +#define IRQ_FLOPPYDISK IRQ_ISA(6) +#define IRQ_HARDDISK IRQ_ISA(14) +#define IRQ_HARDDISK_SECONDARY IRQ_ISA(15) -#define irq_cannonicalize(i) (i) - +#define irq_cannonicalize(_i) (((_i) == IRQ_ISA_CASCADE) ? IRQ_ISA(9) : _i) diff --git a/include/asm-arm/arch-ebsa285/keyboard.h b/include/asm-arm/arch-ebsa285/keyboard.h index 4620ff165..ad6eb0e5a 100644 --- a/include/asm-arm/arch-ebsa285/keyboard.h +++ b/include/asm-arm/arch-ebsa285/keyboard.h @@ -4,16 +4,48 @@ * Keyboard driver definitions for EBSA285 architecture * * (C) 1998 Russell King + * (C) 1998 Phil Blundell */ #include <linux/config.h> #include <asm/irq.h> +#include <asm/system.h> #define NR_SCANCODES 128 -#ifdef CONFIG_MAGIC_SYSRQ -static unsigned char kbd_sysrq_xlate[NR_SCANCODES]; -#endif +#ifdef CONFIG_CATS + +#define KEYBOARD_IRQ IRQ_ISA(1) + +extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode); +extern int pckbd_getkeycode(unsigned int scancode); +extern int pckbd_pretranslate(unsigned char scancode, char raw_mode); +extern int pckbd_translate(unsigned char scancode, unsigned char *keycode, + char raw_mode); +extern char pckbd_unexpected_up(unsigned char keycode); +extern void pckbd_leds(unsigned char leds); +extern void pckbd_init_hw(void); +extern unsigned char pckbd_sysrq_xlate[128]; + +#define kbd_setkeycode pckbd_setkeycode +#define kbd_getkeycode pckbd_getkeycode +#define kbd_pretranslate pckbd_pretranslate +#define kbd_translate(sc, kcp, ufp, rm) ({ *ufp = sc & 0200; \ + pckbd_translate(sc & 0x7f, kcp, rm);}) + +#define kbd_unexpected_up pckbd_unexpected_up +#define kbd_leds pckbd_leds +#define kbd_init_hw() \ + do { if (machine_is_cats()) pckbd_init_hw(); } while (0) +#define kbd_sysrq_xlate pckbd_sysrq_xlate +#define kbd_disable_irq() +#define kbd_enable_irq() + +#define SYSRQ_KEY 0x54 + +#else + +/* Dummy keyboard definitions */ #define kbd_setkeycode(sc,kc) (-EINVAL) #define kbd_getkeycode(sc) (-EINVAL) @@ -35,3 +67,6 @@ static unsigned char kbd_sysrq_xlate[NR_SCANCODES]; #define kbd_disable_irq() #define kbd_enable_irq() +#define SYSRQ_KEY 13 + +#endif diff --git a/include/asm-arm/arch-ebsa285/mmu.h b/include/asm-arm/arch-ebsa285/mmu.h index 8e2e98ef6..b26aa8f66 100644 --- a/include/asm-arm/arch-ebsa285/mmu.h +++ b/include/asm-arm/arch-ebsa285/mmu.h @@ -7,6 +7,7 @@ * 20-10-1996 RMK Created * 31-12-1997 RMK Fixed definitions to reduce warnings * 17-05-1998 DAG Added __virt_to_bus and __bus_to_virt functions. + * 21-11-1998 RMK Changed __virt_to_bus and __bus_to_virt to macros. */ #ifndef __ASM_ARCH_MMU_H #define __ASM_ARCH_MMU_H @@ -15,11 +16,13 @@ * On ebsa285, the dram is contiguous */ #define __virt_to_phys__is_a_macro -#define __virt_to_phys(vpage) ((vpage) - PAGE_OFFSET) +#define __virt_to_phys(vpage) ((unsigned long)(vpage) - PAGE_OFFSET) #define __phys_to_virt__is_a_macro -#define __phys_to_virt(ppage) ((ppage) + PAGE_OFFSET) +#define __phys_to_virt(ppage) ((unsigned long)(ppage) + PAGE_OFFSET) -extern unsigned long __virt_to_bus(unsigned long); -extern unsigned long __bus_to_virt(unsigned long); +#define __virt_to_bus__is_a_macro +#define __virt_to_bus(x) ((x) - 0xe0000000) +#define __bus_to_virt__is_a_macro +#define __bus_to_virt(x) ((x) + 0xe0000000) #endif diff --git a/include/asm-arm/arch-ebsa285/processor.h b/include/asm-arm/arch-ebsa285/processor.h index bf1f6d384..e98d1ff33 100644 --- a/include/asm-arm/arch-ebsa285/processor.h +++ b/include/asm-arm/arch-ebsa285/processor.h @@ -23,12 +23,7 @@ /* This decides where the kernel will search for a free chunk of vm * space during mmap's. */ -#if 0 -#define TASK_UNMAPPED_BASE(off) (TASK_SIZE / 3) -#else #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) -#endif -#define TASK_UNMAPPED_ALIGN(addr, off) PAGE_ALIGN(addr) #define INIT_MMAP \ { &init_mm, 0, 0, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, NULL, &init_mm.mmap } diff --git a/include/asm-arm/arch-ebsa285/serial.h b/include/asm-arm/arch-ebsa285/serial.h index 0e8479ff8..c874f9dfa 100644 --- a/include/asm-arm/arch-ebsa285/serial.h +++ b/include/asm-arm/arch-ebsa285/serial.h @@ -5,10 +5,15 @@ * * Changelog: * 15-10-1996 RMK Created + * 25-05-1998 PJB CATS support */ #ifndef __ASM_ARCH_SERIAL_H #define __ASM_ARCH_SERIAL_H +#include <linux/config.h> + +#include <asm/irq.h> + /* * This assumes you have a 1.8432 MHz clock for your UART. * @@ -18,23 +23,31 @@ */ #define BASE_BAUD (1843200 / 16) +#ifdef CONFIG_CATS +#define _SER_IRQ0 IRQ_ISA(4) +#define _SER_IRQ1 IRQ_ISA(3) +#else +#define _SER_IRQ0 0 +#define _SER_IRQ1 0 +#endif + #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) /* UART CLK PORT IRQ FLAGS */ #define SERIAL_PORT_DFNS \ - { 0, BASE_BAUD, 0x3F8, 0, STD_COM_FLAGS }, /* ttyS0 */ \ - { 0, BASE_BAUD, 0x2F8, 0, STD_COM_FLAGS }, /* ttyS1 */ \ - { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS2 */ \ - { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS3 */ \ - { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS4 */ \ - { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS5 */ \ - { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS6 */ \ - { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS7 */ \ - { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS8 */ \ - { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS9 */ \ - { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS10 */ \ - { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS11 */ \ - { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS12 */ \ - { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS13 */ + { 0, BASE_BAUD, 0x3F8, _SER_IRQ0, STD_COM_FLAGS }, /* ttyS0 */ \ + { 0, BASE_BAUD, 0x2F8, _SER_IRQ1, STD_COM_FLAGS }, /* ttyS1 */ \ + { 0, BASE_BAUD, 0 , 0 , STD_COM_FLAGS }, /* ttyS2 */ \ + { 0, BASE_BAUD, 0 , 0 , STD_COM_FLAGS }, /* ttyS3 */ \ + { 0, BASE_BAUD, 0 , 0 , STD_COM_FLAGS }, /* ttyS4 */ \ + { 0, BASE_BAUD, 0 , 0 , STD_COM_FLAGS }, /* ttyS5 */ \ + { 0, BASE_BAUD, 0 , 0 , STD_COM_FLAGS }, /* ttyS6 */ \ + { 0, BASE_BAUD, 0 , 0 , STD_COM_FLAGS }, /* ttyS7 */ \ + { 0, BASE_BAUD, 0 , 0 , STD_COM_FLAGS }, /* ttyS8 */ \ + { 0, BASE_BAUD, 0 , 0 , STD_COM_FLAGS }, /* ttyS9 */ \ + { 0, BASE_BAUD, 0 , 0 , STD_COM_FLAGS }, /* ttyS10 */ \ + { 0, BASE_BAUD, 0 , 0 , STD_COM_FLAGS }, /* ttyS11 */ \ + { 0, BASE_BAUD, 0 , 0 , STD_COM_FLAGS }, /* ttyS12 */ \ + { 0, BASE_BAUD, 0 , 0 , STD_COM_FLAGS }, /* ttyS13 */ #endif diff --git a/include/asm-arm/arch-ebsa285/system.h b/include/asm-arm/arch-ebsa285/system.h index a3fed312c..40d540dba 100644 --- a/include/asm-arm/arch-ebsa285/system.h +++ b/include/asm-arm/arch-ebsa285/system.h @@ -6,19 +6,26 @@ #include <asm/hardware.h> #include <asm/leds.h> -/* To reboot, we set up the 21285 watchdog and enable it. - * We then wait for it to timeout. - */ -extern __inline__ void arch_hard_reset (void) +extern __inline__ void arch_reset(char mode) { cli(); - *CSR_TIMER4_LOAD = 0x8000; - *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16; - *CSR_SA110_CNTL |= 1 << 13; - while(1); -} -#define ARCH_IDLE_OK + if (mode == 's') { + __asm__ volatile ( + "mov lr, #0x41000000 @ prepare to jump to ROM + mov r0, #0x130 + mcr p15, 0, r0, c1, c0 @ MMU off + mcr p15, 0, ip, c7, c7 @ flush caches + mov pc, lr"); + } else { + /* To reboot, we set up the 21285 watchdog and enable it. + * We then wait for it to timeout. + */ + *CSR_TIMER4_LOAD = 0x8000; + *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16; + *CSR_SA110_CNTL |= 1 << 13; + } +} #define arch_start_idle() leds_event(led_idle_start) #define arch_end_idle() leds_event(led_idle_end) diff --git a/include/asm-arm/arch-ebsa285/time.h b/include/asm-arm/arch-ebsa285/time.h index cbc53293a..342e9528f 100644 --- a/include/asm-arm/arch-ebsa285/time.h +++ b/include/asm-arm/arch-ebsa285/time.h @@ -2,40 +2,58 @@ * linux/include/asm-arm/arch-ebsa285/time.h * * Copyright (c) 1998 Russell King. + * Copyright (c) 1998 Phil Blundell * - * No real time clock on the evalulation board! + * CATS has a real-time clock, though the evaluation board doesn't. * * Changelog: * 21-Mar-1998 RMK Created + * 27-Aug-1998 PJB CATS support + * 28-Dec-1998 APH Made leds optional */ +#define RTC_PORT(x) (0x72+(x)) +#define RTC_ALWAYS_BCD 1 + +#include <linux/config.h> #include <asm/leds.h> +#include <asm/system.h> +#include <linux/mc146818rtc.h> extern __inline__ unsigned long gettimeoffset (void) { - return 0; + unsigned long value = LATCH - *CSR_TIMER1_VALUE; + + return (tick * value) / LATCH; } extern __inline__ int reset_timer (void) { - static unsigned int count = 50; - static int last_pid; - *CSR_TIMER1_CLR = 0; - if (current->pid != last_pid) { - last_pid = current->pid; - if (last_pid) - leds_event(led_idle_end); - else - leds_event(led_idle_start); - } +#ifdef CONFIG_LEDS + /* + * Do the LEDs thing on EBSA-285 hardware. + */ + if (!machine_is_cats()) { + static unsigned int count = 50; + static int last_pid; - if (--count == 0) { - count = 50; - leds_event(led_timer); + if (current->pid != last_pid) { + last_pid = current->pid; + if (last_pid) + leds_event(led_idle_end); + else + leds_event(led_idle_start); + } + + if (--count == 0) { + count = 50; + leds_event(led_timer); + } } - +#endif + return 1; } @@ -49,9 +67,59 @@ extern __inline__ int reset_timer (void) */ extern __inline__ unsigned long setup_timer (void) { + int year, mon, day, hour, min, sec; + + /* + * Default the date to 1 Jan 1970 0:0:0 + */ + year = 1970; mon = 1; day = 1; + hour = 0; min = 0; sec = 0; + *CSR_TIMER1_CLR = 0; *CSR_TIMER1_LOAD = LATCH; *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16; - return mktime(1970, 1, 1, 0, 0, 0); + if (machine_is_cats()) + { + int i; + /* + * Read the real time from the Dallas chip. (Code borrowed + * from arch/i386/kernel/time.c). + */ + + /* The Linux interpretation of the CMOS clock register contents: + * When the Update-In-Progress (UIP) flag goes from 1 to 0, the + * RTC registers show the second which has precisely just started. + * Let's hope other operating systems interpret the RTC the same way. + */ + + /* read RTC exactly on falling edge of update flag */ + for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */ + if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) + break; + for (i = 0 ; i < 1000000 ; i++) /* must try at least 2.228 ms */ + if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)) + break; + do { /* Isn't this overkill ? UIP above should guarantee consistency */ + sec = CMOS_READ(RTC_SECONDS); + min = CMOS_READ(RTC_MINUTES); + hour = CMOS_READ(RTC_HOURS); + day = CMOS_READ(RTC_DAY_OF_MONTH); + mon = CMOS_READ(RTC_MONTH); + year = CMOS_READ(RTC_YEAR); + } while (sec != CMOS_READ(RTC_SECONDS)); + if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) + { + BCD_TO_BIN(sec); + BCD_TO_BIN(min); + BCD_TO_BIN(hour); + BCD_TO_BIN(day); + BCD_TO_BIN(mon); + BCD_TO_BIN(year); + } + if ((year += 1900) < 1970) + year += 100; + } + + return mktime(year, mon, day, hour, min, sec); } diff --git a/include/asm-arm/arch-ebsa285/uncompress.h b/include/asm-arm/arch-ebsa285/uncompress.h index d6097d43f..7f655745f 100644 --- a/include/asm-arm/arch-ebsa285/uncompress.h +++ b/include/asm-arm/arch-ebsa285/uncompress.h @@ -4,27 +4,25 @@ * Copyright (C) 1996,1997,1998 Russell King */ +#define BASE 0x42000160 + +static __inline__ void putc(char c) +{ + while (*((volatile unsigned int *)(BASE + 0x18)) & 8); + *((volatile unsigned int *)(BASE)) = c; +} + /* * This does not append a newline */ static void puts(const char *s) { - __asm__ __volatile__(" - ldrb %0, [%2], #1 - teq %0, #0 - beq 3f -1: strb %0, [%3] -2: ldrb %1, [%3, #0x14] - and %1, %1, #0x60 - teq %1, #0x60 - bne 2b - teq %0, #'\n' - moveq %0, #'\r' - beq 1b - ldrb %0, [%2], #1 - teq %0, #0 - bne 1b -3: " : : "r" (0), "r" (0), "r" (s), "r" (0xf0000be0) : "cc"); + while (*s) { + putc(*s); + if (*s == '\n') + putc('\r'); + s++; + } } /* |