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-rw-r--r--include/asm-arm/proc-armv/io.h38
-rw-r--r--include/asm-arm/proc-armv/param.h4
-rw-r--r--include/asm-arm/proc-armv/pgtable.h3
-rw-r--r--include/asm-arm/proc-armv/ptrace.h6
4 files changed, 47 insertions, 4 deletions
diff --git a/include/asm-arm/proc-armv/io.h b/include/asm-arm/proc-armv/io.h
new file mode 100644
index 000000000..949d41010
--- /dev/null
+++ b/include/asm-arm/proc-armv/io.h
@@ -0,0 +1,38 @@
+/*
+ * linux/include/asm-arm/proc-armv/io.h
+ */
+
+/*
+ * The caches on some architectures aren't dma-coherent and have need to
+ * handle this in software. There are two types of operations that
+ * can be applied to dma buffers.
+ *
+ * - dma_cache_wback_inv(start, size) makes caches and RAM coherent by
+ * writing the content of the caches back to memory, if necessary.
+ * The function also invalidates the affected part of the caches as
+ * necessary before DMA transfers from outside to memory.
+ * - dma_cache_inv(start, size) invalidates the affected parts of the
+ * caches. Dirty lines of the caches may be written back or simply
+ * be discarded. This operation is necessary before dma operations
+ * to the memory.
+ * - dma_cache_wback(start, size) writes back any dirty lines but does
+ * not invalidate the cache. This can be used before DMA reads from
+ * memory,
+ */
+
+#include <asm/proc-fns.h>
+
+#define dma_cache_inv(_start,_size) \
+ do { \
+ processor.u.armv3v4._cache_purge_area(_start,(_start+_size)); \
+ } while (0)
+
+#define dma_cache_wback(_start,_size) \
+ do { \
+ processor.u.armv3v4._cache_wback_area(_start,(_start+_size)); \
+ } while (0)
+
+#define dma_cache_wback_inv(_start,_size) \
+ do { \
+ processor.u.armv3v4._flush_cache_area(_start,(_start+_size),0); \
+ } while (0)
diff --git a/include/asm-arm/proc-armv/param.h b/include/asm-arm/proc-armv/param.h
index fa22ce2d3..45bb5662d 100644
--- a/include/asm-arm/proc-armv/param.h
+++ b/include/asm-arm/proc-armv/param.h
@@ -7,9 +7,7 @@
#ifndef __ASM_PROC_PARAM_H
#define __ASM_PROC_PARAM_H
-#ifndef HZ
-#define HZ 100
-#endif
+#include <asm/arch/param.h> /* for HZ */
#define EXEC_PAGESIZE 4096
diff --git a/include/asm-arm/proc-armv/pgtable.h b/include/asm-arm/proc-armv/pgtable.h
index 60b670fc2..f3f740373 100644
--- a/include/asm-arm/proc-armv/pgtable.h
+++ b/include/asm-arm/proc-armv/pgtable.h
@@ -145,6 +145,7 @@
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_VMADDR(x) ((unsigned long)(x))
+#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
/* PMD types (actually level 1 descriptor) */
#define PMD_TYPE_MASK 0x0003
@@ -199,7 +200,7 @@
#define PAGE_SHARED __pgprot(PTE_TYPE_SMALL | _PTE_YOUNG | _PTE_READ | _PTE_WRITE)
#define PAGE_COPY __pgprot(PTE_TYPE_SMALL | _PTE_YOUNG | _PTE_READ)
#define PAGE_READONLY __pgprot(PTE_TYPE_SMALL | _PTE_YOUNG | _PTE_READ)
-#define PAGE_KERNEL __pgprot(PTE_TYPE_SMALL | _PTE_YOUNG | _PTE_DIRTY | _PTE_WRITE)
+#define PAGE_KERNEL __pgprot(PTE_TYPE_SMALL | _PTE_READ | _PTE_DIRTY | _PTE_WRITE)
#define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_DOMAIN(DOMAIN_USER))
#define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_DOMAIN(DOMAIN_KERNEL))
diff --git a/include/asm-arm/proc-armv/ptrace.h b/include/asm-arm/proc-armv/ptrace.h
index 42a56433f..213c17ce7 100644
--- a/include/asm-arm/proc-armv/ptrace.h
+++ b/include/asm-arm/proc-armv/ptrace.h
@@ -71,5 +71,11 @@ struct pt_regs {
#define instruction_pointer(regs) ((regs)->ARM_pc)
#define pc_pointer(v) (v)
+/* Are the current registers suitable for user mode?
+ * (used to maintain security in signal handlers)
+ */
+#define valid_user_regs(regs) \
+ (user_mode(regs) && ((regs)->ARM_sp & 3) == 0)
+
#endif