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-rw-r--r--include/asm-arm/proc-armv/elf.h21
-rw-r--r--include/asm-arm/proc-armv/io.h24
-rw-r--r--include/asm-arm/proc-armv/mm-init.h2
-rw-r--r--include/asm-arm/proc-armv/page.h5
-rw-r--r--include/asm-arm/proc-armv/processor.h7
-rw-r--r--include/asm-arm/proc-armv/semaphore.h92
-rw-r--r--include/asm-arm/proc-armv/system.h124
-rw-r--r--include/asm-arm/proc-armv/uaccess.h11
8 files changed, 159 insertions, 127 deletions
diff --git a/include/asm-arm/proc-armv/elf.h b/include/asm-arm/proc-armv/elf.h
new file mode 100644
index 000000000..f82a786db
--- /dev/null
+++ b/include/asm-arm/proc-armv/elf.h
@@ -0,0 +1,21 @@
+/*
+ * ELF definitions for 32-bit CPUs
+ */
+
+#define ELF_EXEC_PAGESIZE 4096
+
+/* We can execute both 32-bit and 26-bit code. */
+#define ELF_PROC_OK(x) (1)
+
+#ifdef __KERNEL__
+
+#if 0 /* not yet */
+#define SET_PERSONALITY(ex,ibcs2) \
+ current_personality = (ex->e_flags & EF_ARM_APCS26) ? \
+ PER_LINUX : PER_LINUX_32BIT
+#else
+#define SET_PERSONALITY(ex,ibcs2) \
+ current->personality = PER_LINUX_32BIT
+#endif
+
+#endif
diff --git a/include/asm-arm/proc-armv/io.h b/include/asm-arm/proc-armv/io.h
index 949d41010..461da303f 100644
--- a/include/asm-arm/proc-armv/io.h
+++ b/include/asm-arm/proc-armv/io.h
@@ -22,17 +22,17 @@
#include <asm/proc-fns.h>
-#define dma_cache_inv(_start,_size) \
- do { \
- processor.u.armv3v4._cache_purge_area(_start,(_start+_size)); \
- } while (0)
+extern inline void dma_cache_inv(unsigned long start, unsigned long size)
+{
+ processor.u.armv3v4._cache_purge_area(start, start + size);
+}
-#define dma_cache_wback(_start,_size) \
- do { \
- processor.u.armv3v4._cache_wback_area(_start,(_start+_size)); \
- } while (0)
+extern inline void dma_cache_wback(unsigned long start, unsigned long size)
+{
+ processor.u.armv3v4._cache_wback_area(start, start + size);
+}
-#define dma_cache_wback_inv(_start,_size) \
- do { \
- processor.u.armv3v4._flush_cache_area(_start,(_start+_size),0); \
- } while (0)
+extern inline void dma_cache_wback_inv(unsigned long start, unsigned long size)
+{
+ processor.u.armv3v4._flush_cache_area(start, start + size, 0);
+}
diff --git a/include/asm-arm/proc-armv/mm-init.h b/include/asm-arm/proc-armv/mm-init.h
index 2e861b213..a3f5c327f 100644
--- a/include/asm-arm/proc-armv/mm-init.h
+++ b/include/asm-arm/proc-armv/mm-init.h
@@ -136,7 +136,7 @@ setup_pagetables(unsigned long start_mem, unsigned long end_mem)
/*
* An area to invalidate the cache
*/
- alloc_init_section(&start_mem, 0xdf000000, SAFE_ADDR, DOMAIN_KERNEL,
+ alloc_init_section(&start_mem, FLUSH_BASE, FLUSH_BASE_PHYS, DOMAIN_KERNEL,
PMD_SECT_CACHEABLE | PMD_SECT_AP_READ);
/*
diff --git a/include/asm-arm/proc-armv/page.h b/include/asm-arm/proc-armv/page.h
index fd8768939..8acec4c75 100644
--- a/include/asm-arm/proc-armv/page.h
+++ b/include/asm-arm/proc-armv/page.h
@@ -7,6 +7,8 @@
#ifndef __ASM_PROC_PAGE_H
#define __ASM_PROC_PAGE_H
+#include <asm/hardware.h>
+
/* PAGE_SHIFT determines the page size */
#define PAGE_SHIFT 12
#define PAGE_SIZE (1UL << PAGE_SHIFT)
@@ -60,7 +62,10 @@ typedef unsigned long pgprot_t;
#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
/* This handles the memory map.. */
+#ifndef PAGE_OFFSET
#define PAGE_OFFSET 0xc0000000
+#endif
+
#define MAP_NR(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT)
#endif /* __KERNEL__ */
diff --git a/include/asm-arm/proc-armv/processor.h b/include/asm-arm/proc-armv/processor.h
index 294dead68..88b277ea7 100644
--- a/include/asm-arm/proc-armv/processor.h
+++ b/include/asm-arm/proc-armv/processor.h
@@ -7,6 +7,7 @@
* 20-09-1996 RMK Created
* 26-09-1996 RMK Added 'EXTRA_THREAD_STRUCT*'
* 28-09-1996 RMK Moved start_thread into the processor dependencies
+ * 09-09-1998 PJB Delete redundant `wp_works_ok'
*/
#ifndef __ASM_PROC_PROCESSOR_H
#define __ASM_PROC_PROCESSOR_H
@@ -15,12 +16,6 @@
#define KERNEL_STACK_SIZE PAGE_SIZE
-/*
- * on arm2,3 wp does not work
- */
-#define wp_works_ok 0
-#define wp_works_ok__is_a_macro /* for versions in ksyms.c */
-
struct context_save_struct {
unsigned long cpsr;
unsigned long r4;
diff --git a/include/asm-arm/proc-armv/semaphore.h b/include/asm-arm/proc-armv/semaphore.h
index fb1ad746f..3da31f536 100644
--- a/include/asm-arm/proc-armv/semaphore.h
+++ b/include/asm-arm/proc-armv/semaphore.h
@@ -10,20 +10,24 @@
*/
extern inline void down(struct semaphore * sem)
{
+ unsigned int cpsr, temp;
+
__asm__ __volatile__ ("
@ atomic down operation
- mrs r0, cpsr
- orr r1, r0, #128 @ disable IRQs
- bic r0, r0, #0x80000000 @ clear N
- msr cpsr, r1
- ldr r1, [%0]
- subs r1, r1, #1
- str r1, [%0]
- orrmi r0, r0, #0x80000000 @ set N
- msr cpsr, r0
- movmi r0, %0
- blmi " SYMBOL_NAME_STR(__down)
- : : "r" (sem) : "r0", "r1", "r2", "r3", "ip", "lr", "cc");
+ mrs %0, cpsr
+ orr %1, %0, #128 @ disable IRQs
+ bic %0, %0, #0x80000000 @ clear N
+ msr cpsr, %1
+ ldr %1, [%2]
+ subs %1, %1, #1
+ orrmi %0, %0, #0x80000000 @ set N
+ str %1, [%2]
+ msr cpsr, %0
+ movmi r0, %2
+ blmi " SYMBOL_NAME_STR(__down_failed)
+ : "=&r" (cpsr), "=&r" (temp)
+ : "r" (sem)
+ : "r0", "lr", "cc");
}
/*
@@ -32,26 +36,28 @@ extern inline void down(struct semaphore * sem)
*/
extern inline int down_interruptible (struct semaphore * sem)
{
- int result;
+ unsigned int cpsr, temp;
+
__asm__ __volatile__ ("
- @ atomic down operation
- mrs r0, cpsr
- orr r1, r0, #128 @ disable IRQs
- bic r0, r0, #0x80000000 @ clear N
- msr cpsr, r1
- ldr r1, [%1]
- subs r1, r1, #1
- str r1, [%1]
- orrmi r0, r0, #0x80000000 @ set N
- msr cpsr, r0
- movmi r0, %1
+ @ atomic down interruptible operation
+ mrs %0, cpsr
+ orr %1, %0, #128 @ disable IRQs
+ bic %0, %0, #0x80000000 @ clear N
+ msr cpsr, %1
+ ldr %1, [%2]
+ subs %1, %1, #1
+ orrmi %0, %0, #0x80000000 @ set N
+ str %1, [%2]
+ msr cpsr, %0
+ movmi r0, %2
movpl r0, #0
- blmi " SYMBOL_NAME_STR(__down_interruptible) "
- mov %0, r0"
- : "=r" (result)
+ blmi " SYMBOL_NAME_STR(__down_interruptible_failed) "
+ mov %1, r0"
+ : "=&r" (cpsr), "=&r" (temp)
: "r" (sem)
- : "r0", "r1", "r2", "r3", "ip", "lr", "cc");
- return result;
+ : "r0", "lr", "cc");
+
+ return temp;
}
/*
@@ -62,20 +68,24 @@ extern inline int down_interruptible (struct semaphore * sem)
*/
extern inline void up(struct semaphore * sem)
{
+ unsigned int cpsr, temp;
+
__asm__ __volatile__ ("
@ atomic up operation
- mrs r0, cpsr
- orr r1, r0, #128 @ disable IRQs
- bic r0, r0, #0x80000000 @ clear N
- msr cpsr, r1
- ldr r1, [%0]
- adds r1, r1, #1
- str r1, [%0]
- orrls r0, r0, #0x80000000 @ set N
- msr cpsr, r0
- movmi r0, %0
- blmi " SYMBOL_NAME_STR(__up)
- : : "r" (sem) : "r0", "r1", "r2", "r3", "ip", "lr", "cc");
+ mrs %0, cpsr
+ orr %1, %0, #128 @ disable IRQs
+ bic %0, %0, #0x80000000 @ clear N
+ msr cpsr, %1
+ ldr %1, [%2]
+ adds %1, %1, #1
+ orrls %0, %0, #0x80000000 @ set N
+ str %1, [%2]
+ msr cpsr, %0
+ movmi r0, %2
+ blmi " SYMBOL_NAME_STR(__up_wakeup)
+ : "=&r" (cpsr), "=&r" (temp)
+ : "r" (sem)
+ : "r0", "lr", "cc");
}
#endif
diff --git a/include/asm-arm/proc-armv/system.h b/include/asm-arm/proc-armv/system.h
index 0ef12de11..9de0fccc5 100644
--- a/include/asm-arm/proc-armv/system.h
+++ b/include/asm-arm/proc-armv/system.h
@@ -22,22 +22,24 @@ extern __inline__ unsigned long __xchg(unsigned long x, volatile void *ptr, int
return x;
}
-/*
- * This processor does not need anything special before reset,
- * but RPC may do...
- */
-extern __inline__ void proc_hard_reset(void)
-{
-}
+#define set_cr(x) \
+ do { \
+ __asm__ __volatile__( \
+ "mcr p15, 0, %0, c1, c0 @ set CR" \
+ : : "r" (x)); \
+ } while (0)
+
+extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
+extern unsigned long cr_alignment; /* defined in entry-armv.S */
/*
* We can wait for an interrupt...
*/
-#define proc_idle() \
- do { \
- __asm__ __volatile__( \
-" mcr p15, 0, %0, c15, c8, 2" \
- : : "r" (0)); \
+#define proc_idle() \
+ do { \
+ __asm__ __volatile__( \
+" mcr p15, 0, %0, c15, c8, 2 @ proc_idle" \
+ : : "r" (0)); \
} while (0)
/*
@@ -47,75 +49,75 @@ extern __inline__ void proc_hard_reset(void)
/*
* Save the current interrupt enable state & disable IRQs
*/
-#define __save_flags_cli(x) \
- do { \
- unsigned long temp; \
- __asm__ __volatile__( \
- "mrs %1, cpsr\n" \
-" and %0, %1, #192\n" \
-" orr %1, %1, #128\n" \
-" msr cpsr, %1" \
- : "=r" (x), "=r" (temp) \
- : \
- : "memory"); \
+#define __save_flags_cli(x) \
+ do { \
+ unsigned long temp; \
+ __asm__ __volatile__( \
+ "mrs %1, cpsr @ save_flags_cli\n" \
+" and %0, %1, #192\n" \
+" orr %1, %1, #128\n" \
+" msr cpsr, %1" \
+ : "=r" (x), "=r" (temp) \
+ : \
+ : "memory"); \
} while (0)
/*
* Enable IRQs
*/
-#define __sti() \
- do { \
- unsigned long temp; \
- __asm__ __volatile__( \
- "mrs %0, cpsr\n" \
-" bic %0, %0, #128\n" \
-" msr cpsr, %0" \
- : "=r" (temp) \
- : \
- : "memory"); \
+#define __sti() \
+ do { \
+ unsigned long temp; \
+ __asm__ __volatile__( \
+ "mrs %0, cpsr @ sti\n" \
+" bic %0, %0, #128\n" \
+" msr cpsr, %0" \
+ : "=r" (temp) \
+ : \
+ : "memory"); \
} while(0)
/*
* Disable IRQs
*/
-#define __cli() \
- do { \
- unsigned long temp; \
- __asm__ __volatile__( \
- "mrs %0, cpsr\n" \
-" orr %0, %0, #128\n" \
-" msr cpsr, %0" \
- : "=r" (temp) \
- : \
- : "memory"); \
+#define __cli() \
+ do { \
+ unsigned long temp; \
+ __asm__ __volatile__( \
+ "mrs %0, cpsr @ cli\n" \
+" orr %0, %0, #128\n" \
+" msr cpsr, %0" \
+ : "=r" (temp) \
+ : \
+ : "memory"); \
} while(0)
/*
* save current IRQ & FIQ state
*/
-#define __save_flags(x) \
- do { \
- __asm__ __volatile__( \
- "mrs %0, cpsr\n" \
-" and %0, %0, #192" \
- : "=r" (x) \
- : \
- : "memory"); \
+#define __save_flags(x) \
+ do { \
+ __asm__ __volatile__( \
+ "mrs %0, cpsr @ save_flags\n" \
+" and %0, %0, #192" \
+ : "=r" (x) \
+ : \
+ : "memory"); \
} while (0)
/*
* restore saved IRQ & FIQ state
*/
-#define __restore_flags(x) \
- do { \
- unsigned long temp; \
- __asm__ __volatile__( \
- "mrs %0, cpsr\n" \
-" bic %0, %0, #192\n" \
-" orr %0, %0, %1\n" \
-" msr cpsr, %0" \
- : "=r" (temp) \
- : "r" (x) \
+#define __restore_flags(x) \
+ do { \
+ unsigned long temp; \
+ __asm__ __volatile__( \
+ "mrs %0, cpsr @ restore_flags\n" \
+" bic %0, %0, #192\n" \
+" orr %0, %0, %1\n" \
+" msr cpsr, %0" \
+ : "=r" (temp) \
+ : "r" (x) \
: "memory"); \
} while (0)
diff --git a/include/asm-arm/proc-armv/uaccess.h b/include/asm-arm/proc-armv/uaccess.h
index acadb35a3..a8dce6739 100644
--- a/include/asm-arm/proc-armv/uaccess.h
+++ b/include/asm-arm/proc-armv/uaccess.h
@@ -11,6 +11,8 @@
* DOMAIN_USER - domain 0 includes all user memory only
*/
+#include <asm/hardware.h>
+
#define DOMAIN_CLIENT 1
#define DOMAIN_MANAGER 3
@@ -35,7 +37,7 @@
* Note that this is actually 0x1,0000,0000
*/
#define KERNEL_DS 0x00000000
-#define USER_DS 0xc0000000
+#define USER_DS PAGE_OFFSET
#define get_ds() (KERNEL_DS)
#define get_fs() (current->addr_limit)
@@ -50,13 +52,10 @@ extern __inline__ void set_fs (mm_segment_t fs)
: "r" (fs ? USER_DOMAIN : KERNEL_DOMAIN));
}
-/*
- * a + s <= 2^32 -> C = 0 || Z = 0 (LS)
- * (a + s) <= l -> C = 0 || Z = 0 (LS)
- */
+/* We use 33-bit arithmetic here... */
#define __range_ok(addr,size) ({ \
unsigned long flag, sum; \
- __asm__ __volatile__("adds %1, %2, %3; cmpls %1, %0; movls %0, #0" \
+ __asm__ __volatile__("adds %1, %2, %3; sbcccs %1, %1, %0; movcc %0, #0" \
: "=&r" (flag), "=&r" (sum) \
: "r" (addr), "Ir" (size), "0" (current->addr_limit) \
: "cc"); \
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-20 05:26:33 +0000