diff options
Diffstat (limited to 'include/asm-arm')
38 files changed, 1087 insertions, 117 deletions
diff --git a/include/asm-arm/arch-arc/system.h b/include/asm-arm/arch-arc/system.h index 7f204b1f5..31db5f390 100644 --- a/include/asm-arm/arch-arc/system.h +++ b/include/asm-arm/arch-arc/system.h @@ -20,7 +20,11 @@ #endif -#define arch_do_idle() do { } while (0) +extern __inline__ void arch_idle(void) +{ + while (!current->need_resched && !hlt_counter); +} + #define arch_power_off() do { } while (0) extern __inline__ void arch_reset(char mode) diff --git a/include/asm-arm/arch-cl7500/system.h b/include/asm-arm/arch-cl7500/system.h index a8a0ee518..a44cc9373 100644 --- a/include/asm-arm/arch-cl7500/system.h +++ b/include/asm-arm/arch-cl7500/system.h @@ -8,8 +8,11 @@ #include <asm/iomd.h> -#define arch_do_idle() \ - outb(0, IOMD_SUSMODE) +extern __inline__ void arch_idle(void) +{ + while (!current->need_resched && !hlt_counter) + outb(0, IOMD_SUSMODE); +} #define arch_reset(mode) \ do { \ diff --git a/include/asm-arm/arch-cl7500/vmalloc.h b/include/asm-arm/arch-cl7500/vmalloc.h new file mode 100644 index 000000000..98f3604dd --- /dev/null +++ b/include/asm-arm/arch-cl7500/vmalloc.h @@ -0,0 +1,16 @@ +/* + * linux/include/asm-arm/arch-cl7500/vmalloc.h + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-ebsa110/hardware.h b/include/asm-arm/arch-ebsa110/hardware.h index 0de487421..c8ebe67c3 100644 --- a/include/asm-arm/arch-ebsa110/hardware.h +++ b/include/asm-arm/arch-ebsa110/hardware.h @@ -27,6 +27,7 @@ * RAM definitions */ #define FLUSH_BASE_PHYS 0x40000000 +#define UNCACHEABLE_ADDR 0xf3000000 #else /* __ASSEMBLY__ */ diff --git a/include/asm-arm/arch-ebsa110/system.h b/include/asm-arm/arch-ebsa110/system.h index 2ec712d06..767623096 100644 --- a/include/asm-arm/arch-ebsa110/system.h +++ b/include/asm-arm/arch-ebsa110/system.h @@ -6,7 +6,31 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#define arch_do_idle() cpu_do_idle() +/* + * This machine must never stop it MCLK. However, if we are + * idle for a long time, slow the processor clock to MCLK. + */ +extern __inline__ void arch_idle(void) +{ + unsigned long start_idle; + + start_idle = jiffies; + + do { + if (current->need_resched || hlt_counter) + goto slow_out; + } while (time_before(start_idle, jiffies + HZ/3)); + + cpu_do_idle(IDLE_CLOCK_SLOW); + + while (!current->need_resched && !hlt_counter) { + /* do nothing slowly */ + } + + cpu_do_idle(IDLE_CLOCK_FAST); +slow_out: +} + #define arch_power_off() do { } while (0) #define arch_reset(mode) cpu_reset(0x80000000) diff --git a/include/asm-arm/arch-ebsa110/vmalloc.h b/include/asm-arm/arch-ebsa110/vmalloc.h new file mode 100644 index 000000000..d9d09f03c --- /dev/null +++ b/include/asm-arm/arch-ebsa110/vmalloc.h @@ -0,0 +1,16 @@ +/* + * linux/include/asm-arm/arch-ebsa110/vmalloc.h + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h index 9aeaf6712..b3c1f2931 100644 --- a/include/asm-arm/arch-ebsa285/hardware.h +++ b/include/asm-arm/arch-ebsa285/hardware.h @@ -58,7 +58,7 @@ #define FLASH_BASE 0xf8000000 #define PCIMEM_SIZE 0x01000000 -#define PCIMEM_BASE 0xe0000000 +#define PCIMEM_BASE 0xf0000000 #elif defined(CONFIG_ARCH_CO285) @@ -105,6 +105,7 @@ #define PARAMS_BASE (PAGE_OFFSET + PARAMS_OFFSET) #define FLUSH_BASE_PHYS 0x50000000 +#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108) /* PIC irq control */ diff --git a/include/asm-arm/arch-ebsa285/system.h b/include/asm-arm/arch-ebsa285/system.h index 46e60a084..0e37477b2 100644 --- a/include/asm-arm/arch-ebsa285/system.h +++ b/include/asm-arm/arch-ebsa285/system.h @@ -8,7 +8,28 @@ #include <asm/hardware.h> #include <asm/leds.h> -#define arch_do_idle() cpu_do_idle() +extern __inline__ void arch_idle(void) +{ + unsigned long start_idle; + + start_idle = jiffies; + + do { + if (current->need_resched || hlt_counter) + goto slow_out; + cpu_do_idle(IDLE_WAIT_FAST); + } while (time_before(start_idle, jiffies + HZ/3)); + + cpu_do_idle(IDLE_CLOCK_SLOW); + + while (!current->need_resched && !hlt_counter) { + cpu_do_idle(IDLE_WAIT_SLOW); + } + + cpu_do_idle(IDLE_CLOCK_FAST); +slow_out: +} + #define arch_power_off() do { } while (0) extern __inline__ void arch_reset(char mode) diff --git a/include/asm-arm/arch-ebsa285/vmalloc.h b/include/asm-arm/arch-ebsa285/vmalloc.h new file mode 100644 index 000000000..63dbeb9af --- /dev/null +++ b/include/asm-arm/arch-ebsa285/vmalloc.h @@ -0,0 +1,16 @@ +/* + * linux/include/asm-arm/arch-ebsa285/vmalloc.h + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END (PAGE_OFFSET + 0x20000000) diff --git a/include/asm-arm/arch-nexuspci/system.h b/include/asm-arm/arch-nexuspci/system.h index 3ef541df3..0726698e7 100644 --- a/include/asm-arm/arch-nexuspci/system.h +++ b/include/asm-arm/arch-nexuspci/system.h @@ -6,7 +6,12 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#define arch_do_idle() cpu_do_idle() +extern __inline__ void arch_idle(void) +{ + while (!current->need_resched && !hlt_counter) + cpu_do_idle(IDLE_WAIT_SLOW); +} + #define arch_reset(mode) do { } while (0) #define arch_power_off() do { } while (0) diff --git a/include/asm-arm/arch-nexuspci/vmalloc.h b/include/asm-arm/arch-nexuspci/vmalloc.h new file mode 100644 index 000000000..5c8d17dd7 --- /dev/null +++ b/include/asm-arm/arch-nexuspci/vmalloc.h @@ -0,0 +1,16 @@ +/* + * linux/include/asm-arm/arch-nexuspci/vmalloc.h + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END (PAGE_OFFSET + 0x20000000) diff --git a/include/asm-arm/arch-rpc/hardware.h b/include/asm-arm/arch-rpc/hardware.h index 0ae320b86..80cca92e7 100644 --- a/include/asm-arm/arch-rpc/hardware.h +++ b/include/asm-arm/arch-rpc/hardware.h @@ -39,6 +39,7 @@ #define SCREEN1_BASE 0xd0000000 #define FLUSH_BASE 0xdf000000 +#define UNCACHEABLE_ADDR 0xdf010000 #ifndef __ASSEMBLY__ diff --git a/include/asm-arm/arch-rpc/system.h b/include/asm-arm/arch-rpc/system.h index 1282c9505..135f3892d 100644 --- a/include/asm-arm/arch-rpc/system.h +++ b/include/asm-arm/arch-rpc/system.h @@ -7,7 +7,28 @@ #include <asm/iomd.h> #include <asm/io.h> -#define arch_do_idle() cpu_do_idle() +extern __inline__ void arch_idle(void) +{ + unsigned long start_idle; + + start_idle = jiffies; + + do { + if (current->need_resched || hlt_counter) + goto slow_out; + cpu_do_idle(IDLE_WAIT_FAST); + } while (time_before(start_idle, jiffies + HZ/3)); + + cpu_do_idle(IDLE_CLOCK_SLOW); + + while (!current->need_resched && !hlt_counter) { + cpu_do_idle(IDLE_WAIT_SLOW); + } + + cpu_do_idle(IDLE_CLOCK_FAST); +slow_out: +} + #define arch_power_off() do { } while (0) extern __inline__ void arch_reset(char mode) diff --git a/include/asm-arm/arch-rpc/vmalloc.h b/include/asm-arm/arch-rpc/vmalloc.h new file mode 100644 index 000000000..828869fc7 --- /dev/null +++ b/include/asm-arm/arch-rpc/vmalloc.h @@ -0,0 +1,16 @@ +/* + * linux/include/asm-arm/arch-rpc/vmalloc.h + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index 86358d96b..e93cbe7d9 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -13,6 +13,7 @@ #define FLUSH_BASE_PHYS 0xe0000000 /* SA1100 zero bank */ #define FLUSH_BASE 0xdf000000 #define FLUSH_BASE_MINICACHE 0xdf800000 +#define UNCACHEABLE_ADDR 0xfa050000 /* * PCMCIA IO is mapped to 0xe0000000. We are likely to use in*()/out*() diff --git a/include/asm-arm/arch-sa1100/keyboard.h b/include/asm-arm/arch-sa1100/keyboard.h index c03526bf5..da214d3ed 100644 --- a/include/asm-arm/arch-sa1100/keyboard.h +++ b/include/asm-arm/arch-sa1100/keyboard.h @@ -1,27 +1,51 @@ /* - * linux/include/asm-arm/arch-sa1100/keyboard.h - * - * Keyboard driver definitions for SA1100 architecture - * - * This really has to be cleaned up somehow... - * + * linux/include/asm-arm/arch-sa1100/keyboard.h + * Created 16 Dec 1999 by Nicolas Pitre <nico@cam.org> + * This file contains the SA1100 architecture specific keyboard definitions */ -#define KEYBOARD_IRQ +#ifndef _SA1100_KEYBOARD_H +#define _SA1100_KEYBOARD_H -#define NR_SCANCODES 128 +#include <linux/config.h> -#define kbd_setkeycode(sc,kc) (-EINVAL) -#define kbd_getkeycode(sc) (-EINVAL) -#define kbd_pretranslate(sc,kc) 1 -#define kbd_translate(sc, kcp, raw) kbd_drv_translate(sc, kcp, raw) -#define kbd_init_hw() kbd_drv_init() -#define kbd_unexpected_up -#define kbd_leds(leds) +#ifdef CONFIG_SA1100_BRUTUS -#define kbd_sysrq_xlate -#define kbd_disable_irq() -#define kbd_enable_irq() +extern int Brutus_kbd_translate(unsigned char scancode, unsigned char *keycode, + char raw_mode); +extern void Brutus_kbd_leds(unsigned char leds); +extern void Brutus_kbd_init_hw(void); +extern void Brutus_kbd_enable_irq(void); +extern void Brutus_kbd_disable_irq(void); +extern unsigned char Brutus_kbd_sysrq_xlate[128]; + +#define kbd_setkeycode(x...) (-ENOSYS) +#define kbd_getkeycode(x...) (-ENOSYS) +#define kbd_translate Brutus_kbd_translate +#define kbd_unexpected_up(x...) (1) +#define kbd_leds Brutus_kbd_leds +#define kbd_init_hw Brutus_kbd_init_hw +#define kbd_enable_irq Brutus_kbd_enable_irq +#define kbd_disable_irq Brutus_kbd_disable_irq +#define kbd_sysrq_xlate Brutus_kbd_sysrq_xlate + +#define SYSRQ_KEY 0x54 + +#else + +/* dummy i.e. no real keyboard */ +#define kbd_setkeycode(x...) (-ENOSYS) +#define kbd_getkeycode(x...) (-ENOSYS) +#define kbd_translate(x...) (0) +#define kbd_unexpected_up(x...) (1) +#define kbd_leds(x...) (0) +#define kbd_init_hw(x...) (0) +#define kbd_enable_irq(x...) (0) +#define kbd_disable_irq(x...) (0) + +#endif + + +#endif /* _SA1100_KEYBOARD_H */ -#define SYSRQ_KEY 0x54 diff --git a/include/asm-arm/arch-sa1100/system.h b/include/asm-arm/arch-sa1100/system.h index 4e883ee6a..3b56a4220 100644 --- a/include/asm-arm/arch-sa1100/system.h +++ b/include/asm-arm/arch-sa1100/system.h @@ -5,43 +5,43 @@ */ #include <linux/config.h> -#ifdef CONFIG_SA1100_VICTOR - -#define arch_reset( x ) { \ - /* switch off power supply */ \ - mdelay(2000); \ - GPCR = GPIO_GPIO23; \ - while(1); \ +extern __inline__ void arch_idle(void) +{ + while (!current->need_resched && !hlt_counter) { + cpu_do_idle(IDLE_CLOCK_SLOW); + cpu_do_idle(IDLE_WAIT_FAST); + cpu_do_idle(IDLE_CLOCK_FAST); } +} -#else - -#define arch_reset(x) cpu_reset(0) +#ifdef CONFIG_SA1100_VICTOR -#endif +extern inline void arch_power_off(void) +{ + /* switch off power supply */ + mdelay(2000); + GPCR = GPIO_GPIO23; + while(1); +} +/* power off unconditionally */ +#define arch_reset(x) arch_power_off() -#if 0 -#define arch_do_idle() cpu_do_idle() #else -/* Enter SA1100 idle mode (see data sheet sec 9.5). - * It seems that the wait-on-interrupt just hang the CPU forever if it's - * on the end of a cache line. Workaround: we force an explicit alignment - * before it. - */ -#define arch_do_idle() \ - do { \ - __asm__ __volatile__( \ -" mcr p15, 0, %0, c15, c2, 2 @ Disable clock switching \n" \ -" ldr %0, [%0] @ Must perform a non-cached access \n" \ -" b 1f @ Seems we must align the next \n" \ -" .align 5 @ instruction on a cache line \n" \ -"1: mcr p15, 0, %0, c15, c8, 2 @ Wait for interrupts \n" \ -" mov r0, r0 @ insert NOP to ensure SA1100 re-awakes\n" \ -" mcr p15, 0, %0, c15, c1, 2 @ Reenable clock switching \n" \ - : : "r" (&ICIP) : "cc" ); \ - } while (0) -#endif + +extern inline void arch_reset(char mode) +{ + if (mode == 's') { + /* Jump into ROM at address 0 */ + cpu_reset(0); + } else { + /* Activate SA1100 watchdog and wait for the trigger... */ + OSMR3 = OSCR + 3686400/2; /* in 1/2 sec */ + OWER |= OWER_WME; + OIER |= OIER_E3; + } +} #define arch_power_off() do { } while (0) +#endif diff --git a/include/asm-arm/arch-sa1100/vmalloc.h b/include/asm-arm/arch-sa1100/vmalloc.h new file mode 100644 index 000000000..42affe414 --- /dev/null +++ b/include/asm-arm/arch-sa1100/vmalloc.h @@ -0,0 +1,16 @@ +/* + * linux/include/asm-arm/arch-sa1100/vmalloc.h + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-shark/dma.h b/include/asm-arm/arch-shark/dma.h new file mode 100644 index 000000000..bf62c8ff8 --- /dev/null +++ b/include/asm-arm/arch-shark/dma.h @@ -0,0 +1,18 @@ +/* + * linux/include/asm-arm/arch-shark/dma.h + * + * by Alexander.Schulz@stud.uni-karlsruhe.de + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +/* Use only the lowest 4MB, nothing else works. + * The rest is not DMAable. See dev / .properties + * in OpenFirmware. + */ +#define MAX_DMA_ADDRESS 0xC0400000 +#define MAX_DMA_CHANNELS 8 +#define DMA_ISA_CASCADE 4 + +#endif /* _ASM_ARCH_DMA_H */ + diff --git a/include/asm-arm/arch-shark/hardware.h b/include/asm-arm/arch-shark/hardware.h new file mode 100644 index 000000000..1fb25abd1 --- /dev/null +++ b/include/asm-arm/arch-shark/hardware.h @@ -0,0 +1,49 @@ +/* + * linux/include/asm-arm/arch-shark/hardware.h + * + * by Alexander.Schulz@stud.uni-karlsruhe.de + * + * derived from: + * linux/include/asm-arm/arch-ebsa110/hardware.h + * Copyright (C) 1996-1999 Russell King. + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#ifndef __ASSEMBLER__ + +/* + * Mapping areas + */ +#define IO_BASE 0xe0000000 + +/* + * RAM definitions + */ +#define FLUSH_BASE_PHYS 0x60000000 + +#else + +#define IO_BASE 0 + +#endif + +#define IO_SIZE 0x10000000 +#define IO_START 0x40000000 + +#define FLUSH_BASE 0xdf000000 +#define PCIO_BASE 0xe0000000 + + +/* defines for the Framebuffer */ +#define FB_BASE 0xd0000000 +#define FB_START 0x06000000 +#define FB_SIZE 0x00200000 + +/* Registers for Framebuffer */ +#define FBREG_BASE (FB_BASE + FB_SIZE) +#define FBREG_START 0x06800000 +#define FBREG_SIZE 0x000c0000 + +#endif + diff --git a/include/asm-arm/arch-shark/ide.h b/include/asm-arm/arch-shark/ide.h new file mode 100644 index 000000000..a9e373e98 --- /dev/null +++ b/include/asm-arm/arch-shark/ide.h @@ -0,0 +1,45 @@ +/* + * linux/include/asm-arm/arch-shark/ide.h + * + * by Alexander.Schulz@stud.uni-karlsruhe.de + * + * derived from: + * linux/include/asm-arm/arch-ebsa285/ide.h + * Copyright (c) 1998 Russell King + */ + +#include <asm/irq.h> + +/* + * Set up a hw structure for a specified data port, control port and IRQ. + * This should follow whatever the default interface uses. + */ +static __inline__ void +ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int irq) +{ + ide_ioreg_t reg = (ide_ioreg_t) data_port; + int i; + + memset(hw, 0, sizeof(*hw)); + + for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { + hw->io_ports[i] = reg; + reg += 1; + } + hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port; + hw->irq = irq; +} + +/* + * This registers the standard ports for this architecture with the IDE + * driver. + */ +static __inline__ void +ide_init_default_hwifs(void) +{ + hw_regs_t hw; + + ide_init_hwif_ports(&hw, 0x1f0, 0x3f6, 14); + ide_register_hw(&hw, NULL); +} + diff --git a/include/asm-arm/arch-shark/io.h b/include/asm-arm/arch-shark/io.h new file mode 100644 index 000000000..ff0def03a --- /dev/null +++ b/include/asm-arm/arch-shark/io.h @@ -0,0 +1,207 @@ +/* + * linux/include/asm-arm/arch-shark/io.h + * + * by Alexander.Schulz@stud.uni-karlsruhe.de + * + * derived from: + * linux/include/asm-arm/arch-ebsa110/io.h + * Copyright (C) 1997,1998 Russell King + */ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffffffff + +/* + * We use two different types of addressing - PC style addresses, and ARM + * addresses. PC style accesses the PC hardware with the normal PC IO + * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ + * and are translated to the start of IO. + */ +#define __PORT_PCIO(x) (!((x) & 0x80000000)) + +/* + * Dynamic IO functions - let the compiler + * optimize the expressions + */ +#define DECLARE_DYN_OUT(fnsuffix,instr) \ +extern __inline__ void __out##fnsuffix (unsigned int value, unsigned int port) \ +{ \ + unsigned long temp; \ + __asm__ __volatile__( \ + "tst %2, #0x80000000\n\t" \ + "mov %0, %4\n\t" \ + "addeq %0, %0, %3\n\t" \ + "str" ##instr## " %1, [%0, %2] @ out"###fnsuffix \ + : "=&r" (temp) \ + : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ + : "cc"); \ +} + +#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ +extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ +{ \ + unsigned long temp, value; \ + __asm__ __volatile__( \ + "tst %2, #0x80000000\n\t" \ + "mov %0, %4\n\t" \ + "addeq %0, %0, %3\n\t" \ + "ldr" ##instr## " %1, [%0, %2] @ in"###fnsuffix \ + : "=&r" (temp), "=r" (value) \ + : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ + : "cc"); \ + return (unsigned sz)value; \ +} + +extern __inline__ unsigned int __ioaddr (unsigned int port) \ +{ \ + if (__PORT_PCIO(port)) \ + return (unsigned int)(PCIO_BASE + (port)); \ + else \ + return (unsigned int)(IO_BASE + (port)); \ +} + +#define DECLARE_IO(sz,fnsuffix,instr) \ + DECLARE_DYN_OUT(fnsuffix,instr) \ + DECLARE_DYN_IN(sz,fnsuffix,instr) + +DECLARE_IO(char,b,"b") +DECLARE_IO(short,w,"h") +DECLARE_IO(long,l,"") + +#undef DECLARE_IO +#undef DECLARE_DYN_OUT +#undef DECLARE_DYN_IN + +/* + * Constant address IO functions + * + * These have to be macros for the 'J' constraint to work - + * +/-4096 immediate operand. + */ +#define __outbc(value,port) \ +({ \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "strb %0, [%1, %2] @ outbc" \ + : : "r" (value), "r" (PCIO_BASE), "Jr" (port)); \ + else \ + __asm__ __volatile__( \ + "strb %0, [%1, %2] @ outbc" \ + : : "r" (value), "r" (IO_BASE), "r" (port)); \ +}) + +#define __inbc(port) \ +({ \ + unsigned char result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2] @ inbc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" (port)); \ + else \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2] @ inbc" \ + : "=r" (result) : "r" (IO_BASE), "r" (port)); \ + result; \ +}) + +#define __outwc(value,port) \ +({ \ + unsigned long v = value; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "strh %0, [%1, %2] @ outwc" \ + : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" (port)); \ + else \ + __asm__ __volatile__( \ + "strh %0, [%1, %2] @ outwc" \ + : : "r" (v|v<<16), "r" (IO_BASE), "r" (port)); \ +}) + +#define __inwc(port) \ +({ \ + unsigned short result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldrh %0, [%1, %2] @ inwc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" (port)); \ + else \ + __asm__ __volatile__( \ + "ldrh %0, [%1, %2] @ inwc" \ + : "=r" (result) : "r" (IO_BASE), "r" (port)); \ + result & 0xffff; \ +}) + +#define __outlc(value,port) \ +({ \ + unsigned long v = value; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outlc" \ + : : "r" (v), "r" (PCIO_BASE), "Jr" (port)); \ + else \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outlc" \ + : : "r" (v), "r" (IO_BASE), "r" (port)); \ +}) + +#define __inlc(port) \ +({ \ + unsigned long result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inlc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" (port)); \ + else \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inlc" \ + : "=r" (result) : "r" (IO_BASE), "r" (port)); \ + result; \ +}) + +#define __ioaddrc(port) \ +({ \ + unsigned long addr; \ + if (__PORT_PCIO((port))) \ + addr = PCIO_BASE + (port); \ + else \ + addr = IO_BASE + (port); \ + addr; \ +}) + +#define __mem_pci(addr) addr + +#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) +#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) +#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) +#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) +#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) +#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) + +#define __arch_getb(addr) (*(volatile unsigned char *)(addr)) +#define __arch_getw(addr) (*(volatile unsigned short *)(addr)) +#define __arch_getl(addr) (*(volatile unsigned long *)(addr)) + +#define __arch_putb(b,addr) (*(volatile unsigned char *)(addr) = (b)) +#define __arch_putw(b,addr) (*(volatile unsigned short *)(addr) = (b)) +#define __arch_putl(b,addr) (*(volatile unsigned long *)(addr) = (b)) + +/* + * Translated address IO functions + * + * IO address has already been translated to a virtual address + */ +#define outb_t(v,p) \ + (*(volatile unsigned char *)(p) = (v)) + +#define inb_t(p) \ + (*(volatile unsigned char *)(p)) + +#define outl_t(v,p) \ + (*(volatile unsigned long *)(p) = (v)) + +#define inl_t(p) \ + (*(volatile unsigned long *)(p)) + +#endif diff --git a/include/asm-arm/arch-shark/irq.h b/include/asm-arm/arch-shark/irq.h new file mode 100644 index 000000000..7dae77e02 --- /dev/null +++ b/include/asm-arm/arch-shark/irq.h @@ -0,0 +1,123 @@ +/* + * linux/include/asm-arm/arch-shark/irq.h + * + * by Alexander.Schulz@stud.uni-karlsruhe.de + * + * derived from linux/arch/ppc/kernel/i8259.c and: + * include/asm-arm/arch-ebsa110/irq.h + * Copyright (C) 1996-1998 Russell King + */ + +#define fixup_irq(x) (x) + +/* + * 8259A PIC functions to handle ISA devices: + */ + +/* + * This contains the irq mask for both 8259A irq controllers, + * Let through the cascade-interrupt no. 2 (ff-(1<<2)==fb) + */ +static unsigned char cached_irq_mask[2] = { 0xfb, 0xff }; + +/* + * These have to be protected by the irq controller spinlock + * before being called. + */ +static void shark_disable_8259A_irq(unsigned int irq) +{ + unsigned int mask; + if (irq<8) { + mask = 1 << irq; + cached_irq_mask[0] |= mask; + } else { + mask = 1 << (irq-8); + cached_irq_mask[1] |= mask; + } + outb(cached_irq_mask[1],0xA1); + outb(cached_irq_mask[0],0x21); +} + +static void shark_enable_8259A_irq(unsigned int irq) +{ + unsigned int mask; + if (irq<8) { + mask = ~(1 << irq); + cached_irq_mask[0] &= mask; + } else { + mask = ~(1 << (irq-8)); + cached_irq_mask[1] &= mask; + } + outb(cached_irq_mask[1],0xA1); + outb(cached_irq_mask[0],0x21); +} + +/* + * Careful! The 8259A is a fragile beast, it pretty + * much _has_ to be done exactly like this (mask it + * first, _then_ send the EOI, and the order of EOI + * to the two 8259s is important! + */ +static void shark_mask_and_ack_8259A_irq(unsigned int irq) +{ + if (irq & 8) { + cached_irq_mask[1] |= 1 << (irq-8); + inb(0xA1); /* DUMMY */ + outb(cached_irq_mask[1],0xA1); + } else { + cached_irq_mask[0] |= 1 << irq; + outb(cached_irq_mask[0],0x21); + } +} + +static void bogus_int(int irq, void *dev_id, struct pt_regs *regs) +{ + printk("Got interrupt %i!\n",irq); +} + +static struct irqaction cascade; + +static __inline__ void irq_init_irq(void) +{ + int irq; + + for (irq = 0; irq < NR_IRQS; irq++) { + irq_desc[irq].valid = 1; + irq_desc[irq].probe_ok = 1; + irq_desc[irq].mask_ack = shark_mask_and_ack_8259A_irq; + irq_desc[irq].mask = shark_disable_8259A_irq; + irq_desc[irq].unmask = shark_enable_8259A_irq; + } + + /* The PICs are initialized to level triggered and auto eoi! + * If they are set to edge triggered they lose some IRQs, + * if they are set to manual eoi they get locked up after + * a short time + */ + + /* init master interrupt controller */ + outb(0x19, 0x20); /* Start init sequence, level triggered */ + outb(0x00, 0x21); /* Vector base */ + outb(0x04, 0x21); /* Cascade (slave) on IRQ2 */ + outb(0x03, 0x21); /* Select 8086 mode , auto eoi*/ + outb(0x0A, 0x20); + /* init slave interrupt controller */ + outb(0x19, 0xA0); /* Start init sequence, level triggered */ + outb(0x08, 0xA1); /* Vector base */ + outb(0x02, 0xA1); /* Cascade (slave) on IRQ2 */ + outb(0x03, 0xA1); /* Select 8086 mode, auto eoi */ + outb(0x0A, 0xA0); + outb(cached_irq_mask[1],0xA1); + outb(cached_irq_mask[0],0x21); + //request_region(0x20,0x2,"pic1"); + //request_region(0xA0,0x2,"pic2"); + + cascade.handler = bogus_int; + cascade.flags = 0; + cascade.mask = 0; + cascade.name = "cascade"; + cascade.next = NULL; + cascade.dev_id = NULL; + setup_arm_irq(2,&cascade); + +} diff --git a/include/asm-arm/arch-shark/irqs.h b/include/asm-arm/arch-shark/irqs.h new file mode 100644 index 000000000..eabfb4b70 --- /dev/null +++ b/include/asm-arm/arch-shark/irqs.h @@ -0,0 +1,11 @@ +/* + * linux/include/asm-arm/arch-shark/irqs.h + * + * by Alexander.Schulz@stud.uni-karlsruhe.de + */ + +#define NR_IRQS 16 + +#define IRQ_ISA_KEYBOARD 1 +#define AUX_IRQ 12 +#define IRQ_HARDDISK 14 diff --git a/include/asm-arm/arch-shark/keyboard.h b/include/asm-arm/arch-shark/keyboard.h new file mode 100644 index 000000000..523bd065f --- /dev/null +++ b/include/asm-arm/arch-shark/keyboard.h @@ -0,0 +1,95 @@ +/* + * linux/include/asm-arm/arch-ebsa285/keyboard.h + * + * Keyboard driver definitions for EBSA285 architecture + * + * (C) 1998 Russell King + * (C) 1998 Phil Blundell + */ +#include <linux/ioport.h> +#include <asm/irq.h> +#include <asm/io.h> +#include <asm/system.h> + +extern int have_isa_bridge; + +extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode); +extern int pckbd_getkeycode(unsigned int scancode); +extern int pckbd_translate(unsigned char scancode, unsigned char *keycode, + char raw_mode); +extern char pckbd_unexpected_up(unsigned char keycode); +extern void pckbd_leds(unsigned char leds); +extern void pckbd_init_hw(void); +extern unsigned char pckbd_sysrq_xlate[128]; + +#define KEYBOARD_IRQ IRQ_ISA_KEYBOARD + +#define NR_SCANCODES 128 + +#define kbd_setkeycode(sc,kc) \ + ({ \ + int __ret; \ + if (have_isa_bridge) \ + __ret = pckbd_setkeycode(sc,kc);\ + else \ + __ret = -EINVAL; \ + __ret; \ + }) + +#define kbd_getkeycode(sc) \ + ({ \ + int __ret; \ + if (have_isa_bridge) \ + __ret = pckbd_getkeycode(sc); \ + else \ + __ret = -EINVAL; \ + __ret; \ + }) + +#define kbd_translate(sc, kcp, rm) \ + ({ \ + pckbd_translate(sc, kcp, rm); \ + }) + +#define kbd_unexpected_up pckbd_unexpected_up + +#define kbd_leds(leds) \ + do { \ + if (have_isa_bridge) \ + pckbd_leds(leds); \ + } while (0) + +#define kbd_init_hw() \ + do { \ + if (have_isa_bridge) \ + pckbd_init_hw(); \ + } while (0) + +#define kbd_sysrq_xlate pckbd_sysrq_xlate + +#define kbd_disable_irq() +#define kbd_enable_irq() + +#define SYSRQ_KEY 0x54 + +/* resource allocation */ +#define kbd_request_region() request_region(0x60, 16, "keyboard") +#define kbd_request_irq(handler) request_irq(KEYBOARD_IRQ, handler, 0, \ + "keyboard", NULL) + +/* How to access the keyboard macros on this platform. */ +#define kbd_read_input() inb(KBD_DATA_REG) +#define kbd_read_status() inb(KBD_STATUS_REG) +#define kbd_write_output(val) outb(val, KBD_DATA_REG) +#define kbd_write_command(val) outb(val, KBD_CNTL_REG) + +/* Some stoneage hardware needs delays after some operations. */ +#define kbd_pause() do { } while(0) + +/* + * Machine specific bits for the PS/2 driver + */ +#define aux_request_irq(hand, dev_id) \ + request_irq(AUX_IRQ, hand, SA_SHIRQ, "PS/2 Mouse", dev_id) + +#define aux_free_irq(dev_id) free_irq(AUX_IRQ, dev_id) diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h new file mode 100644 index 000000000..d3ede01ec --- /dev/null +++ b/include/asm-arm/arch-shark/memory.h @@ -0,0 +1,35 @@ +/* + * linux/include/asm-arm/arch-shark/memory.h + * + * by Alexander.Schulz@stud.uni-karlsruhe.de + * + * derived from: + * linux/include/asm-arm/arch-ebsa110/memory.h + * Copyright (c) 1996-1999 Russell King. + */ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +/* + * Task size: 3GB + */ +#define TASK_SIZE (0xc0000000UL) +#define TASK_SIZE_26 (0x04000000UL) + +/* + * Page offset: = 3GB + */ +#define PAGE_OFFSET (0xC0000000UL) +#define PHYS_OFFSET (0x08000000UL) + +#define __virt_to_phys__is_a_macro +#define __phys_to_virt__is_a_macro +#define __virt_to_phys(vpage) (vpage - PAGE_OFFSET + PHYS_OFFSET) +#define __phys_to_virt(ppage) (ppage - PHYS_OFFSET + PAGE_OFFSET) + +#define __virt_to_bus__is_a_macro +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt__is_a_macro +#define __bus_to_virt(x) __phys_to_virt(x) + +#endif diff --git a/include/asm-arm/arch-shark/param.h b/include/asm-arm/arch-shark/param.h new file mode 100644 index 000000000..f6b5f9e71 --- /dev/null +++ b/include/asm-arm/arch-shark/param.h @@ -0,0 +1,10 @@ +/* + * linux/include/asm-arm/arch-shark/param.h + * + * by Alexander.Schulz@stud.uni-karlsruhe.de + */ + +/* This must be a power of 2 because the RTC + * can't use anything else. + */ +#define HZ 64 diff --git a/include/asm-arm/arch-shark/processor.h b/include/asm-arm/arch-shark/processor.h new file mode 100644 index 000000000..bd99869af --- /dev/null +++ b/include/asm-arm/arch-shark/processor.h @@ -0,0 +1,28 @@ +/* + * linux/include/asm-arm/arch-ebsa110/processor.h + * + * Copyright (C) 1996-1999 Russell King + * + * Changelog: + * 21-Mar-1999 RMK Added asm/arch/memory.h + */ + +#ifndef __ASM_ARCH_PROCESSOR_H +#define __ASM_ARCH_PROCESSOR_H + +#include <asm/arch/memory.h> + +/* + * Bus types + */ +#define EISA_bus 0 +#define EISA_bus__is_a_macro /* for versions in ksyms.c */ +#define MCA_bus 0 +#define MCA_bus__is_a_macro /* for versions in ksyms.c */ + +/* This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) + +#endif diff --git a/include/asm-arm/arch-shark/serial.h b/include/asm-arm/arch-shark/serial.h new file mode 100644 index 000000000..7b23d4fb5 --- /dev/null +++ b/include/asm-arm/arch-shark/serial.h @@ -0,0 +1,33 @@ +/* + * linux/include/asm-arm/arch-ebsa110/serial.h + * + * Copyright (c) 1996,1997,1998 Russell King. + * + * Changelog: + * 15-10-1996 RMK Created + */ +#ifndef __ASM_ARCH_SERIAL_H +#define __ASM_ARCH_SERIAL_H + +/* + * This assumes you have a 1.8432 MHz clock for your UART. + * + * It'd be nice if someone built a serial card with a 24.576 MHz + * clock, since the 16550A is capable of handling a top speed of 1.5 + * megabits/second; but this requires the faster clock. + */ +#define BASE_BAUD (1843200 / 16) + +#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) + +#define RS_TABLE_SIZE 2 + + /* UART CLK PORT IRQ FLAGS */ +#define STD_SERIAL_PORT_DEFNS \ + { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ + { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ + +#define EXTRA_SERIAL_PORT_DEFNS + +#endif + diff --git a/include/asm-arm/arch-shark/system.h b/include/asm-arm/arch-shark/system.h new file mode 100644 index 000000000..b0d34e811 --- /dev/null +++ b/include/asm-arm/arch-shark/system.h @@ -0,0 +1,21 @@ +/* + * linux/include/asm-arm/arch-ebsa110/system.h + * + * Copyright (c) 1996-1998 Russell King. + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +extern __inline__ void arch_reset(char mode) +{ + /* + * loop endlessly + */ + cli(); +} + +#define arch_power_off() do { } while (0) +#define arch_do_idle() do {} while (0) +/*cpu_do_idle()*/ + +#endif diff --git a/include/asm-arm/arch-shark/time.h b/include/asm-arm/arch-shark/time.h new file mode 100644 index 000000000..32f9d7593 --- /dev/null +++ b/include/asm-arm/arch-shark/time.h @@ -0,0 +1,101 @@ +/* + * linux/include/asm-arm/arch-shark/time.h + * + * by Alexander.Schulz@stud.uni-karlsruhe.de + * + * Uses the real time clock because you can't run + * the timer with level triggered interrupts and + * you can't run the shark with edge triggered + * inetrrupts (loses ints and hangs). + * + * derived from linux/drivers/char/rtc.c and: + * linux/include/asm-arm/arch-ebsa110/time.h + * Copyright (c) 1996,1997,1998 Russell King. + */ + +#include <linux/config.h> +#include <asm/leds.h> +#include <linux/mc146818rtc.h> + +#define IRQ_TIMER 8 + +extern void get_rtc_time(struct rtc_time *rtc_tm); +extern void set_rtc_irq_bit(unsigned char bit); +extern unsigned long epoch; + +static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + + CMOS_READ(RTC_INTR_FLAGS); + +#ifdef CONFIG_LEDS + { + static int count = 50; + if (--count == 0) { + count = 50; + leds_event(led_timer); + } + } +#endif + + { +#ifdef DIVISOR + static unsigned int divisor; + + if (divisor-- == 0) { + divisor = DIVISOR - 1; +#else + { +#endif + do_timer(regs); + } + } +} + +static struct irqaction timerirq = { + timer_interrupt, + SA_INTERRUPT, + 0, + "timer", + NULL, + NULL +}; + +/* + * Set up timer interrupt, and return the current time in seconds. + */ +extern __inline__ void setup_timer(void) +{ + struct rtc_time r_time; + unsigned long flags; + int tmp = 0; + unsigned char val; + + /* + * Set the clock to 128 Hz, we already have a valid + * vector now: + */ + + while (HZ > (1<<tmp)) + tmp++; + + /* + * Check that the input was really a power of 2. + */ + if (HZ != (1<<tmp)) + panic("Please set HZ to a power of 2!"); + + save_flags(flags); + cli(); + val = CMOS_READ(RTC_FREQ_SELECT) & 0xf0; + val |= (16 - tmp); + CMOS_WRITE(val, RTC_FREQ_SELECT); + restore_flags(flags); + set_rtc_irq_bit(RTC_PIE); + + get_rtc_time(&r_time); + xtime.tv_sec = mktime(r_time.tm_year+epoch, r_time.tm_mon+1, r_time.tm_mday, + r_time.tm_hour, r_time.tm_min, r_time.tm_sec); + + setup_arm_irq(IRQ_TIMER, &timerirq); +} diff --git a/include/asm-arm/arch-shark/timex.h b/include/asm-arm/arch-shark/timex.h new file mode 100644 index 000000000..9588719c2 --- /dev/null +++ b/include/asm-arm/arch-shark/timex.h @@ -0,0 +1,5 @@ +/* + * linux/include/asm-arm/arch-shark/timex.h + * + * by Alexander.Schulz@stud.uni-karlsruhe.de + */ diff --git a/include/asm-arm/arch-shark/uncompress.h b/include/asm-arm/arch-shark/uncompress.h new file mode 100644 index 000000000..d6097d43f --- /dev/null +++ b/include/asm-arm/arch-shark/uncompress.h @@ -0,0 +1,34 @@ +/* + * linux/include/asm-arm/arch-ebsa110/uncompress.h + * + * Copyright (C) 1996,1997,1998 Russell King + */ + +/* + * This does not append a newline + */ +static void puts(const char *s) +{ + __asm__ __volatile__(" + ldrb %0, [%2], #1 + teq %0, #0 + beq 3f +1: strb %0, [%3] +2: ldrb %1, [%3, #0x14] + and %1, %1, #0x60 + teq %1, #0x60 + bne 2b + teq %0, #'\n' + moveq %0, #'\r' + beq 1b + ldrb %0, [%2], #1 + teq %0, #0 + bne 1b +3: " : : "r" (0), "r" (0), "r" (s), "r" (0xf0000be0) : "cc"); +} + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/include/asm-arm/checksum.h b/include/asm-arm/checksum.h index 9d048a3ba..b91f5e7f4 100644 --- a/include/asm-arm/checksum.h +++ b/include/asm-arm/checksum.h @@ -123,12 +123,14 @@ csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, adcs %0, %0, %3 adcs %0, %0, %4 adcs %0, %0, %5 + adc %0, %0, #0 adds %0, %0, %0, lsl #16 - addcs %0, %0, #0x10000" + addcs %0, %0, #0x10000 + mvn %0, %0" : "=&r"(sum) - : "r" (sum), "r" (daddr), "r" (saddr), "r" (ntohs(len) << 16), "Ir" (proto << 8) + : "r" (sum), "r" (daddr), "r" (saddr), "r" (ntohs(len)), "Ir" (proto << 8) : "cc"); - return (~sum) >> 16; + return sum >> 16; } diff --git a/include/asm-arm/cpu-multi32.h b/include/asm-arm/cpu-multi32.h index b959f4994..b8a5b58f8 100644 --- a/include/asm-arm/cpu-multi32.h +++ b/include/asm-arm/cpu-multi32.h @@ -95,7 +95,7 @@ extern struct processor { /* * Idle the processor */ - int (*_do_idle)(void); + int (*_do_idle)(int mode); /* * flush I cache for a page */ @@ -110,7 +110,7 @@ extern const struct processor sa110_processor_functions; #define cpu_check_bugs() processor._check_bugs() #define cpu_proc_init() processor._proc_init() #define cpu_proc_fin() processor._proc_fin() -#define cpu_do_idle() processor._do_idle() +#define cpu_do_idle(mode) processor._do_idle(mode) #define cpu_flush_cache_all() processor._flush_cache_all() #define cpu_flush_cache_area(start,end,flags) processor._flush_cache_area(start,end,flags) diff --git a/include/asm-arm/cpu-single.h b/include/asm-arm/cpu-single.h index 74cffcdb5..6a4c256f2 100644 --- a/include/asm-arm/cpu-single.h +++ b/include/asm-arm/cpu-single.h @@ -49,7 +49,7 @@ extern void cpu_data_abort(unsigned long pc); extern void cpu_check_bugs(void); extern void cpu_proc_init(void); extern void cpu_proc_fin(void); -extern int cpu_do_idle(void); +extern int cpu_do_idle(int mode); extern void cpu_flush_cache_all(void); extern void cpu_flush_cache_area(unsigned long address, unsigned long end, int flags); diff --git a/include/asm-arm/namei.h b/include/asm-arm/namei.h index 082f2c910..a402d3b9d 100644 --- a/include/asm-arm/namei.h +++ b/include/asm-arm/namei.h @@ -12,51 +12,14 @@ #define ARM_BSD_EMUL "usr/gnemul/bsd/" -static inline struct dentry * -__arm_lookup_dentry(const char *name, int lookup_flags) +static inline char *__emul_prefix(void) { - struct dentry *base; - char *emul; - switch (current->personality) { case PER_BSD: - emul = ARM_BSD_EMUL; break; + return ARM_BSD_EMUL; default: return NULL; } - - base = lookup_dentry (emul, dget (current->fs->root), - (LOOKUP_FOLLOW | LOOKUP_DIRECTORY | LOOKUP_SLASHOK)); - - if (IS_ERR (base)) return NULL; - - base = lookup_dentry (name, base, lookup_flags); - - if (IS_ERR (base)) return NULL; - - if (!base->d_inode) { - struct dentry *fromroot; - - fromroot = lookup_dentry (name, dget (current->fs->root), - lookup_flags); - - if (IS_ERR (fromroot)) return base; - - if (fromroot->d_inode) { - dput(base); - return fromroot; - } - - dput(fromroot); - } - - return base; } -#define __prefix_lookup_dentry(name, lookup_flags) \ - if (current->personality) { \ - dentry = __arm_lookup_dentry (name, lookup_flags); \ - if (dentry) return dentry; \ - } - #endif /* __ASMARM_NAMEI_H */ diff --git a/include/asm-arm/proc-armv/pgtable.h b/include/asm-arm/proc-armv/pgtable.h index e9260057f..d4a57d8a2 100644 --- a/include/asm-arm/proc-armv/pgtable.h +++ b/include/asm-arm/proc-armv/pgtable.h @@ -12,6 +12,7 @@ #define __ASM_PROC_PGTABLE_H #include <asm/proc/domain.h> +#include <asm/arch/vmalloc.h> /* * entries per page directory level: they are two-level, so @@ -21,19 +22,6 @@ #define PTRS_PER_PMD 1 #define PTRS_PER_PGD 4096 -/* - * Just any arbitrary offset to the start of the vmalloc VM area: the - * current 8MB value just means that there will be a 8MB "hole" after the - * physical memory until the kernel virtual memory starts. That means that - * any out-of-bounds memory accesses will hopefully be caught. - * The vmalloc() routines leaves a hole of 4kB between each vmalloced - * area for the same reason. ;) - */ -#define VMALLOC_OFFSET (8*1024*1024) -#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) -#define VMALLOC_VMADDR(x) ((unsigned long)(x)) -#define VMALLOC_END (PAGE_OFFSET + 0x10000000) - /**************** * PMD functions * ****************/ @@ -139,7 +127,7 @@ extern __inline__ unsigned long pmd_page(pmd_t pmd) #define PAGE_NONE __pgprot(_L_PTE_DEFAULT) #define PAGE_COPY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_BUFFERABLE) #define PAGE_SHARED __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_BUFFERABLE | L_PTE_WRITE) -#define PAGE_READONLY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ) +#define PAGE_READONLY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_BUFFERABLE) #define PAGE_KERNEL __pgprot(_L_PTE_DEFAULT | L_PTE_CACHEABLE | L_PTE_BUFFERABLE | L_PTE_DIRTY | L_PTE_WRITE) #define _PAGE_CHG_MASK (PAGE_MASK | L_PTE_DIRTY | L_PTE_YOUNG) |