diff options
Diffstat (limited to 'include/asm-arm')
29 files changed, 1735 insertions, 73 deletions
diff --git a/include/asm-arm/arch-integrator/bits.h b/include/asm-arm/arch-integrator/bits.h new file mode 100644 index 000000000..b43a80e79 --- /dev/null +++ b/include/asm-arm/arch-integrator/bits.h @@ -0,0 +1,61 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +/* DO NOT EDIT!! - this file automatically generated + * from .s file by awk -f s2h.awk + */ +/* Bit field defintions + * Copyright (C) ARM Limited 1998. All rights reserved. + */ + +#ifndef __bits_h +#define __bits_h 1 + +#define BIT0 0x00000001 +#define BIT1 0x00000002 +#define BIT2 0x00000004 +#define BIT3 0x00000008 +#define BIT4 0x00000010 +#define BIT5 0x00000020 +#define BIT6 0x00000040 +#define BIT7 0x00000080 +#define BIT8 0x00000100 +#define BIT9 0x00000200 +#define BIT10 0x00000400 +#define BIT11 0x00000800 +#define BIT12 0x00001000 +#define BIT13 0x00002000 +#define BIT14 0x00004000 +#define BIT15 0x00008000 +#define BIT16 0x00010000 +#define BIT17 0x00020000 +#define BIT18 0x00040000 +#define BIT19 0x00080000 +#define BIT20 0x00100000 +#define BIT21 0x00200000 +#define BIT22 0x00400000 +#define BIT23 0x00800000 +#define BIT24 0x01000000 +#define BIT25 0x02000000 +#define BIT26 0x04000000 +#define BIT27 0x08000000 +#define BIT28 0x10000000 +#define BIT29 0x20000000 +#define BIT30 0x40000000 +#define BIT31 0x80000000 + +#endif + +/* END */ diff --git a/include/asm-arm/arch-integrator/dma.h b/include/asm-arm/arch-integrator/dma.h new file mode 100644 index 000000000..717179229 --- /dev/null +++ b/include/asm-arm/arch-integrator/dma.h @@ -0,0 +1,28 @@ +/* + * linux/include/asm-arm/arch-integrator/dma.h + * + * Copyright (C) 1997,1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#define MAX_DMA_ADDRESS 0xffffffff + +#define MAX_DMA_CHANNELS 0 + +#endif /* _ASM_ARCH_DMA_H */ + diff --git a/include/asm-arm/arch-integrator/hardware.h b/include/asm-arm/arch-integrator/hardware.h new file mode 100644 index 000000000..d10bbfe6a --- /dev/null +++ b/include/asm-arm/arch-integrator/hardware.h @@ -0,0 +1,57 @@ +/* + * linux/include/asm-arm/arch-integrator/hardware.h + * + * This file contains the hardware definitions of the Integrator. + * + * Copyright (C) 1999 ARM Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include <asm/arch/sizes.h> +#include <asm/arch/platform.h> + +/* + * Where in virtual memory the IO devices (timers, system controllers + * and so on) + */ +#define IO_BASE 0xF0000000 // VA of IO +#define IO_SIZE 0x0B000000 // How much? +#define IO_START INTEGRATOR_HDR_BASE // PA of IO + +/* + * Similar to above, but for PCI addresses (memory, IO, Config and the + * V3 chip itself). WARNING: this has to mirror definitions in platform.h + */ +#define PCI_MEMORY_VADDR 0xe8000000 +#define PCI_CONFIG_VADDR 0xec000000 +#define PCI_V3_VADDR 0xed000000 +#define PCI_IO_VADDR 0xee000000 + +#define PCIO_BASE PCI_IO_VADDR +#define PCIMEM_BASE PCI_MEMORY_VADDR + +/* macro to get at IO space when running virtually */ +#define IO_ADDRESS(x) (((x) >> 4) + IO_BASE) + +#define pcibios_assign_all_busses() 1 + +#define PCIBIOS_MIN_IO 0x6000 +#define PCIBIOS_MIN_MEM 0x00100000 + +#endif + diff --git a/include/asm-arm/arch-integrator/io.h b/include/asm-arm/arch-integrator/io.h new file mode 100644 index 000000000..bad7b07ea --- /dev/null +++ b/include/asm-arm/arch-integrator/io.h @@ -0,0 +1,46 @@ +/* + * linux/include/asm-arm/arch-integrator/io.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffff + +#define __io(a) (PCI_IO_VADDR + (a)) +#define __mem_pci(a) ((unsigned long)(a)) +#define __mem_isa(a) (PCI_MEMORY_VADDR + (unsigned long)(a)) + +/* + * Generic virtual read/write + */ +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) + +/* + * Validate the pci memory address for ioremap. + */ +#define iomem_valid_addr(iomem,size) \ + ((iomem) > 0 && (iomem) + (size) <= 0x20000000) + +/* + * Convert PCI memory space to a CPU physical address + */ +#define iomem_to_phys(iomem) ((iomem) + PHYS_PCI_MEM_BASE) + +#endif diff --git a/include/asm-arm/arch-integrator/irq.h b/include/asm-arm/arch-integrator/irq.h new file mode 100644 index 000000000..c07c83cf8 --- /dev/null +++ b/include/asm-arm/arch-integrator/irq.h @@ -0,0 +1,20 @@ +/* + * linux/include/asm-arm/arch-integrator/irq.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#define fixup_irq(i) (i) diff --git a/include/asm-arm/arch-integrator/irqs.h b/include/asm-arm/arch-integrator/irqs.h new file mode 100644 index 000000000..da64d1f85 --- /dev/null +++ b/include/asm-arm/arch-integrator/irqs.h @@ -0,0 +1,134 @@ +/* + * linux/include/asm-arm/arch-integrator/irqs.h + * + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* Use the integrator definitions */ +#include <asm/arch/platform.h> + +/* + * IRQ interrupts definitions are the same the INT definitions + * held within platform.h + */ +#define IRQ_SOFTINT INT_SOFTINT +#define IRQ_UARTINT0 INT_UARTINT0 +#define IRQ_UARTINT1 INT_UARTINT1 +#define IRQ_KMIINT0 INT_KMIINT0 +#define IRQ_KMIINT1 INT_KMIINT1 +#define IRQ_TIMERINT0 INT_TIMERINT0 +#define IRQ_TIMERINT1 INT_TIMERINT1 +#define IRQ_TIMERINT2 INT_TIMERINT2 +#define IRQ_RTCINT INT_RTCINT +#define IRQ_EXPINT0 INT_EXPINT0 +#define IRQ_EXPINT1 INT_EXPINT1 +#define IRQ_EXPINT2 INT_EXPINT2 +#define IRQ_EXPINT3 INT_EXPINT3 +#define IRQ_PCIINT0 INT_PCIINT0 +#define IRQ_PCIINT1 INT_PCIINT1 +#define IRQ_PCIINT2 INT_PCIINT2 +#define IRQ_PCIINT3 INT_PCIINT3 +#define IRQ_V3INT INT_V3INT +#define IRQ_CPINT0 INT_CPINT0 +#define IRQ_CPINT1 INT_CPINT1 +#define IRQ_LBUSTIMEOUT INT_LBUSTIMEOUT +#define IRQ_APCINT INT_APCINT + +#define IRQMASK_SOFTINT INTMASK_SOFTINT +#define IRQMASK_UARTINT0 INTMASK_UARTINT0 +#define IRQMASK_UARTINT1 INTMASK_UARTINT1 +#define IRQMASK_KMIINT0 INTMASK_KMIINT0 +#define IRQMASK_KMIINT1 INTMASK_KMIINT1 +#define IRQMASK_TIMERINT0 INTMASK_TIMERINT0 +#define IRQMASK_TIMERINT1 INTMASK_TIMERINT1 +#define IRQMASK_TIMERINT2 INTMASK_TIMERINT2 +#define IRQMASK_RTCINT INTMASK_RTCINT +#define IRQMASK_EXPINT0 INTMASK_EXPINT0 +#define IRQMASK_EXPINT1 INTMASK_EXPINT1 +#define IRQMASK_EXPINT2 INTMASK_EXPINT2 +#define IRQMASK_EXPINT3 INTMASK_EXPINT3 +#define IRQMASK_PCIINT0 INTMASK_PCIINT0 +#define IRQMASK_PCIINT1 INTMASK_PCIINT1 +#define IRQMASK_PCIINT2 INTMASK_PCIINT2 +#define IRQMASK_PCIINT3 INTMASK_PCIINT3 +#define IRQMASK_V3INT INTMASK_V3INT +#define IRQMASK_CPINT0 INTMASK_CPINT0 +#define IRQMASK_CPINT1 INTMASK_CPINT1 +#define IRQMASK_LBUSTIMEOUT INTMASK_LBUSTIMEOUT +#define IRQMASK_APCINT INTMASK_APCINT + +/* + * FIQ interrupts definitions are the same the INT definitions. + */ +#define FIQ_SOFTINT INT_SOFTINT +#define FIQ_UARTINT0 INT_UARTINT0 +#define FIQ_UARTINT1 INT_UARTINT1 +#define FIQ_KMIINT0 INT_KMIINT0 +#define FIQ_KMIINT1 INT_KMIINT1 +#define FIQ_TIMERINT0 INT_TIMERINT0 +#define FIQ_TIMERINT1 INT_TIMERINT1 +#define FIQ_TIMERINT2 INT_TIMERINT2 +#define FIQ_RTCINT INT_RTCINT +#define FIQ_EXPINT0 INT_EXPINT0 +#define FIQ_EXPINT1 INT_EXPINT1 +#define FIQ_EXPINT2 INT_EXPINT2 +#define FIQ_EXPINT3 INT_EXPINT3 +#define FIQ_PCIINT0 INT_PCIINT0 +#define FIQ_PCIINT1 INT_PCIINT1 +#define FIQ_PCIINT2 INT_PCIINT2 +#define FIQ_PCIINT3 INT_PCIINT3 +#define FIQ_V3INT INT_V3INT +#define FIQ_CPINT0 INT_CPINT0 +#define FIQ_CPINT1 INT_CPINT1 +#define FIQ_LBUSTIMEOUT INT_LBUSTIMEOUT +#define FIQ_APCINT INT_APCINT + +#define FIQMASK_SOFTINT INTMASK_SOFTINT +#define FIQMASK_UARTINT0 INTMASK_UARTINT0 +#define FIQMASK_UARTINT1 INTMASK_UARTINT1 +#define FIQMASK_KMIINT0 INTMASK_KMIINT0 +#define FIQMASK_KMIINT1 INTMASK_KMIINT1 +#define FIQMASK_TIMERINT0 INTMASK_TIMERINT0 +#define FIQMASK_TIMERINT1 INTMASK_TIMERINT1 +#define FIQMASK_TIMERINT2 INTMASK_TIMERINT2 +#define FIQMASK_RTCINT INTMASK_RTCINT +#define FIQMASK_EXPINT0 INTMASK_EXPINT0 +#define FIQMASK_EXPINT1 INTMASK_EXPINT1 +#define FIQMASK_EXPINT2 INTMASK_EXPINT2 +#define FIQMASK_EXPINT3 INTMASK_EXPINT3 +#define FIQMASK_PCIINT0 INTMASK_PCIINT0 +#define FIQMASK_PCIINT1 INTMASK_PCIINT1 +#define FIQMASK_PCIINT2 INTMASK_PCIINT2 +#define FIQMASK_PCIINT3 INTMASK_PCIINT3 +#define FIQMASK_V3INT INTMASK_V3INT +#define FIQMASK_CPINT0 INTMASK_CPINT0 +#define FIQMASK_CPINT1 INTMASK_CPINT1 +#define FIQMASK_LBUSTIMEOUT INTMASK_LBUSTIMEOUT +#define FIQMASK_APCINT INTMASK_APCINT + +/* + * Misc. interrupt definitions + */ +#define IRQ_KEYBDINT INT_KMIINT0 +#define IRQ_MOUSEINT INT_KMIINT1 + +#define IRQMASK_KEYBDINT INTMASK_KMIINT0 +#define IRQMASK_MOUSEINT INTMASK_KMIINT1 + +#define NR_IRQS (MAXIRQNUM + 1) + diff --git a/include/asm-arm/arch-integrator/keyboard.h b/include/asm-arm/arch-integrator/keyboard.h new file mode 100644 index 000000000..a0d6770f6 --- /dev/null +++ b/include/asm-arm/arch-integrator/keyboard.h @@ -0,0 +1,45 @@ +/* + * linux/include/asm-arm/arch-integrator/keyboard.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Keyboard driver definitions for the Integrator architecture + */ +#include <asm/irq.h> + +#define NR_SCANCODES 128 + +extern unsigned char kmi_kbd_sysrq_xlate[NR_SCANCODES]; + +extern int kmi_kbd_setkeycode(u_int scancode, u_int keycode); +extern int kmi_kbd_getkeycode(u_int scancode); +extern int kmi_kbd_translate(u_char scancode, u_char *keycode, char raw_mode); +extern char kmi_kbd_unexpected_up(u_char keycode); +extern void kmi_kbd_leds(u_char leds); +extern int kmi_kbd_init(void); + +#define kbd_setkeycode(sc,kc) kmi_kbd_setkeycode(sc,kc) +#define kbd_getkeycode(sc) kmi_kbd_getkeycode(sc) + +#define kbd_translate(sc, kcp, rm) kmi_kbd_translate(sc,kcp,rm) +#define kbd_unexpected_up(kc) kmi_kbd_unexpected_up(kc) +#define kbd_leds(leds) kmi_kbd_leds(leds) +#define kbd_init_hw() kmi_kbd_init() +#define kbd_sysrq_xlate kmi_kbd_sysrq_xlate +#define kbd_disable_irq() disable_irq(IRQ_KMIINT0) +#define kbd_enable_irq() enable_irq(IRQ_KMIINT0) + +#define SYSRQ_KEY 0x54 diff --git a/include/asm-arm/arch-integrator/memory.h b/include/asm-arm/arch-integrator/memory.h new file mode 100644 index 000000000..456050111 --- /dev/null +++ b/include/asm-arm/arch-integrator/memory.h @@ -0,0 +1,61 @@ +/* + * linux/include/asm-arm/arch-integrator/mmu.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_MMU_H +#define __ASM_ARCH_MMU_H + +/* + * Task size: 3GB + */ +#define TASK_SIZE (0xc0000000UL) +#define TASK_SIZE_26 (0x04000000UL) + +/* + * This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) + +/* + * Page offset: 3GB + */ +#define PAGE_OFFSET (0xc0000000UL) +#define PHYS_OFFSET (0x00000000UL) + +/* + * On integrator, the dram is contiguous + */ +#define __virt_to_phys__is_a_macro +#define __virt_to_phys(vpage) ((vpage) - PAGE_OFFSET) +#define __phys_to_virt__is_a_macro +#define __phys_to_virt(ppage) ((ppage) + PAGE_OFFSET) + +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus__is_a_macro +#define __virt_to_bus(x) (x - PAGE_OFFSET + INTEGRATOR_HDR0_SDRAM_BASE) +#define __bus_to_virt__is_a_macro +#define __bus_to_virt(x) (x - INTEGRATOR_HDR0_SDRAM_BASE + PAGE_OFFSET) + +#endif diff --git a/include/asm-arm/arch-integrator/param.h b/include/asm-arm/arch-integrator/param.h new file mode 100644 index 000000000..b6f105d5e --- /dev/null +++ b/include/asm-arm/arch-integrator/param.h @@ -0,0 +1,21 @@ +/* + * linux/include/asm-arm/arch-integrator/param.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define HZ 100 diff --git a/include/asm-arm/arch-integrator/platform.h b/include/asm-arm/arch-integrator/platform.h new file mode 100644 index 000000000..0ce214ada --- /dev/null +++ b/include/asm-arm/arch-integrator/platform.h @@ -0,0 +1,544 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +/* DO NOT EDIT!! - this file automatically generated + * from .s file by awk -f s2h.awk + */ +/************************************************************************** + * * Copyright © ARM Limited 1998. All rights reserved. + * ***********************************************************************/ +/* ************************************************************************ + * + * Integrator address map + * + * NOTE: This is a multi-hosted header file for use with uHAL and + * supported debuggers. + * + * $Id: platform.s,v 1.32 2000/02/18 10:51:39 asims Exp $ + * + * ***********************************************************************/ + +#ifndef __address_h +#define __address_h 1 + +/* ======================================================================== + * Integrator definitions + * ======================================================================== + * ------------------------------------------------------------------------ + * Memory definitions + * ------------------------------------------------------------------------ + * Integrator memory map + * + */ +#define INTEGRATOR_BOOT_ROM_LO 0x00000000 +#define INTEGRATOR_BOOT_ROM_HI 0x20000000 +#define INTEGRATOR_BOOT_ROM_BASE INTEGRATOR_BOOT_ROM_HI /* Normal position */ +#define INTEGRATOR_BOOT_ROM_SIZE SZ_512K + +/* + * New Core Modules have different amounts of SSRAM, the amount of SSRAM + * fitted can be found in HDR_STAT. + * + * The symbol INTEGRATOR_SSRAM_SIZE is kept, however this now refers to + * the minimum amount of SSRAM fitted on any core module. + * + * New Core Modules also alias the SSRAM. + * + */ +#define INTEGRATOR_SSRAM_BASE 0x00000000 +#define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000 +#define INTEGRATOR_SSRAM_SIZE SZ_256K + +#define INTEGRATOR_FLASH_BASE 0x24000000 +#define INTEGRATOR_FLASH_SIZE SZ_32M + +#define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000 +#define INTEGRATOR_MBRD_SSRAM_SIZE SZ_512K + +/* + * SDRAM is a SIMM therefore the size is not known. + * + */ +#define INTEGRATOR_SDRAM_BASE 0x00040000 + +#define INTEGRATOR_SDRAM_ALIAS_BASE 0x80000000 +#define INTEGRATOR_HDR0_SDRAM_BASE 0x80000000 +#define INTEGRATOR_HDR1_SDRAM_BASE 0x90000000 +#define INTEGRATOR_HDR2_SDRAM_BASE 0xA0000000 +#define INTEGRATOR_HDR3_SDRAM_BASE 0xB0000000 + +/* + * Logic expansion modules + * + */ +#define INTEGRATOR_LOGIC_MODULES_BASE 0xC0000000 +#define INTEGRATOR_LOGIC_MODULE0_BASE 0xC0000000 +#define INTEGRATOR_LOGIC_MODULE1_BASE 0xD0000000 +#define INTEGRATOR_LOGIC_MODULE2_BASE 0xE0000000 +#define INTEGRATOR_LOGIC_MODULE3_BASE 0xF0000000 + +/* ------------------------------------------------------------------------ + * Integrator header card registers + * ------------------------------------------------------------------------ + * + */ +#define INTEGRATOR_HDR_ID_OFFSET 0x00 +#define INTEGRATOR_HDR_PROC_OFFSET 0x04 +#define INTEGRATOR_HDR_OSC_OFFSET 0x08 +#define INTEGRATOR_HDR_CTRL_OFFSET 0x0C +#define INTEGRATOR_HDR_STAT_OFFSET 0x10 +#define INTEGRATOR_HDR_LOCK_OFFSET 0x14 +#define INTEGRATOR_HDR_SDRAM_OFFSET 0x20 +#define INTEGRATOR_HDR_INIT_OFFSET 0x24 /* CM9x6 */ +#define INTEGRATOR_HDR_IC_OFFSET 0x40 +#define INTEGRATOR_HDR_SPDBASE_OFFSET 0x100 +#define INTEGRATOR_HDR_SPDTOP_OFFSET 0x200 + +#define INTEGRATOR_HDR_BASE 0x10000000 +#define INTEGRATOR_HDR_ID (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_ID_OFFSET) +#define INTEGRATOR_HDR_PROC (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_PROC_OFFSET) +#define INTEGRATOR_HDR_OSC (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_OSC_OFFSET) +#define INTEGRATOR_HDR_CTRL (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_CTRL_OFFSET) +#define INTEGRATOR_HDR_STAT (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_STAT_OFFSET) +#define INTEGRATOR_HDR_LOCK (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_LOCK_OFFSET) +#define INTEGRATOR_HDR_SDRAM (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SDRAM_OFFSET) +#define INTEGRATOR_HDR_INIT (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_INIT_OFFSET) +#define INTEGRATOR_HDR_IC (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_IC_OFFSET) +#define INTEGRATOR_HDR_SPDBASE (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SPDBASE_OFFSET) +#define INTEGRATOR_HDR_SPDTOP (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SPDTOP_OFFSET) + +#define INTEGRATOR_HDR_CTRL_LED 0x01 +#define INTEGRATOR_HDR_CTRL_MBRD_DETECH 0x02 +#define INTEGRATOR_HDR_CTRL_REMAP 0x04 +#define INTEGRATOR_HDR_CTRL_RESET 0x08 +#define INTEGRATOR_HDR_CTRL_HIGHVECTORS 0x10 +#define INTEGRATOR_HDR_CTRL_BIG_ENDIAN 0x20 +#define INTEGRATOR_HDR_CTRL_FASTBUS 0x40 +#define INTEGRATOR_HDR_CTRL_SYNC 0x80 + +#define INTEGRATOR_HDR_OSC_CORE_10MHz 0x102 +#define INTEGRATOR_HDR_OSC_CORE_15MHz 0x107 +#define INTEGRATOR_HDR_OSC_CORE_20MHz 0x10C +#define INTEGRATOR_HDR_OSC_CORE_25MHz 0x111 +#define INTEGRATOR_HDR_OSC_CORE_30MHz 0x116 +#define INTEGRATOR_HDR_OSC_CORE_35MHz 0x11B +#define INTEGRATOR_HDR_OSC_CORE_40MHz 0x120 +#define INTEGRATOR_HDR_OSC_CORE_45MHz 0x125 +#define INTEGRATOR_HDR_OSC_CORE_50MHz 0x12A +#define INTEGRATOR_HDR_OSC_CORE_55MHz 0x12F +#define INTEGRATOR_HDR_OSC_CORE_60MHz 0x134 +#define INTEGRATOR_HDR_OSC_CORE_65MHz 0x139 +#define INTEGRATOR_HDR_OSC_CORE_70MHz 0x13E +#define INTEGRATOR_HDR_OSC_CORE_75MHz 0x143 +#define INTEGRATOR_HDR_OSC_CORE_80MHz 0x148 +#define INTEGRATOR_HDR_OSC_CORE_85MHz 0x14D +#define INTEGRATOR_HDR_OSC_CORE_90MHz 0x152 +#define INTEGRATOR_HDR_OSC_CORE_95MHz 0x157 +#define INTEGRATOR_HDR_OSC_CORE_100MHz 0x15C +#define INTEGRATOR_HDR_OSC_CORE_105MHz 0x161 +#define INTEGRATOR_HDR_OSC_CORE_110MHz 0x166 +#define INTEGRATOR_HDR_OSC_CORE_115MHz 0x16B +#define INTEGRATOR_HDR_OSC_CORE_120MHz 0x170 +#define INTEGRATOR_HDR_OSC_CORE_125MHz 0x175 +#define INTEGRATOR_HDR_OSC_CORE_130MHz 0x17A +#define INTEGRATOR_HDR_OSC_CORE_135MHz 0x17F +#define INTEGRATOR_HDR_OSC_CORE_140MHz 0x184 +#define INTEGRATOR_HDR_OSC_CORE_145MHz 0x189 +#define INTEGRATOR_HDR_OSC_CORE_150MHz 0x18E +#define INTEGRATOR_HDR_OSC_CORE_155MHz 0x193 +#define INTEGRATOR_HDR_OSC_CORE_160MHz 0x198 +#define INTEGRATOR_HDR_OSC_CORE_MASK 0x7FF + +#define INTEGRATOR_HDR_OSC_MEM_10MHz 0x10C000 +#define INTEGRATOR_HDR_OSC_MEM_15MHz 0x116000 +#define INTEGRATOR_HDR_OSC_MEM_20MHz 0x120000 +#define INTEGRATOR_HDR_OSC_MEM_25MHz 0x12A000 +#define INTEGRATOR_HDR_OSC_MEM_30MHz 0x134000 +#define INTEGRATOR_HDR_OSC_MEM_33MHz 0x13A000 +#define INTEGRATOR_HDR_OSC_MEM_40MHz 0x148000 +#define INTEGRATOR_HDR_OSC_MEM_50MHz 0x15C000 +#define INTEGRATOR_HDR_OSC_MEM_60MHz 0x170000 +#define INTEGRATOR_HDR_OSC_MEM_66MHz 0x17C000 +#define INTEGRATOR_HDR_OSC_MEM_MASK 0x7FF000 + +#define INTEGRATOR_HDR_OSC_BUS_MODE_CM7x0 0x0 +#define INTEGRATOR_HDR_OSC_BUS_MODE_CM9x0 0x0800000 +#define INTEGRATOR_HDR_OSC_BUS_MODE_CM9x6 0x1000000 +#define INTEGRATOR_HDR_OSC_BUS_MODE_CM10x00 0x1800000 +#define INTEGRATOR_HDR_OSC_BUS_MODE_MASK 0x1800000 + +#define INTEGRATOR_HDR_SDRAM_SPD_OK (1 << 5) + + +/* ------------------------------------------------------------------------ + * Integrator system registers + * ------------------------------------------------------------------------ + * + */ + +/* + * System Controller + * + */ +#define INTEGRATOR_SC_ID_OFFSET 0x00 +#define INTEGRATOR_SC_OSC_OFFSET 0x04 +#define INTEGRATOR_SC_CTRLS_OFFSET 0x08 +#define INTEGRATOR_SC_CTRLC_OFFSET 0x0C +#define INTEGRATOR_SC_DEC_OFFSET 0x10 +#define INTEGRATOR_SC_ARB_OFFSET 0x14 +#define INTEGRATOR_SC_PCIENABLE_OFFSET 0x18 +#define INTEGRATOR_SC_LOCK_OFFSET 0x1C + +#define INTEGRATOR_SC_BASE 0x11000000 +#define INTEGRATOR_SC_ID (INTEGRATOR_SC_BASE + INTEGRATOR_SC_ID_OFFSET) +#define INTEGRATOR_SC_OSC (INTEGRATOR_SC_BASE + INTEGRATOR_SC_OSC_OFFSET) +#define INTEGRATOR_SC_CTRLS (INTEGRATOR_SC_BASE + INTEGRATOR_SC_CTRLS_OFFSET) +#define INTEGRATOR_SC_CTRLC (INTEGRATOR_SC_BASE + INTEGRATOR_SC_CTRLC_OFFSET) +#define INTEGRATOR_SC_DEC (INTEGRATOR_SC_BASE + INTEGRATOR_SC_DEC_OFFSET) +#define INTEGRATOR_SC_ARB (INTEGRATOR_SC_BASE + INTEGRATOR_SC_ARB_OFFSET) +#define INTEGRATOR_SC_PCIENABLE (INTEGRATOR_SC_BASE + INTEGRATOR_SC_PCIENABLE_OFFSET) +#define INTEGRATOR_SC_LOCK (INTEGRATOR_SC_BASE + INTEGRATOR_SC_LOCK_OFFSET) + +#define INTEGRATOR_SC_OSC_SYS_10MHz 0x20 +#define INTEGRATOR_SC_OSC_SYS_15MHz 0x34 +#define INTEGRATOR_SC_OSC_SYS_20MHz 0x48 +#define INTEGRATOR_SC_OSC_SYS_25MHz 0x5C +#define INTEGRATOR_SC_OSC_SYS_33MHz 0x7C +#define INTEGRATOR_SC_OSC_SYS_MASK 0xFF + +#define INTEGRATOR_SC_OSC_PCI_25MHz 0x100 +#define INTEGRATOR_SC_OSC_PCI_33MHz 0x0 +#define INTEGRATOR_SC_OSC_PCI_MASK 0x100 + +#define INTEGRATOR_SC_CTRL_SOFTRST (1 << 0) +#define INTEGRATOR_SC_CTRL_nFLVPPEN (1 << 1) +#define INTEGRATOR_SC_CTRL_nFLWP (1 << 2) +#define INTEGRATOR_SC_CTRL_URTS0 (1 << 4) +#define INTEGRATOR_SC_CTRL_UDTR0 (1 << 5) +#define INTEGRATOR_SC_CTRL_URTS1 (1 << 6) +#define INTEGRATOR_SC_CTRL_UDTR1 (1 << 7) + +/* + * External Bus Interface + * + */ +#define INTEGRATOR_EBI_BASE 0x12000000 + +#define INTEGRATOR_EBI_CSR0_OFFSET 0x00 +#define INTEGRATOR_EBI_CSR1_OFFSET 0x04 +#define INTEGRATOR_EBI_CSR2_OFFSET 0x08 +#define INTEGRATOR_EBI_CSR3_OFFSET 0x0C +#define INTEGRATOR_EBI_LOCK_OFFSET 0x20 + +#define INTEGRATOR_EBI_CSR0 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR0_OFFSET) +#define INTEGRATOR_EBI_CSR1 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET) +#define INTEGRATOR_EBI_CSR2 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR2_OFFSET) +#define INTEGRATOR_EBI_CSR3 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR3_OFFSET) +#define INTEGRATOR_EBI_LOCK (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET) + +#define INTEGRATOR_EBI_8_BIT 0x00 +#define INTEGRATOR_EBI_16_BIT 0x01 +#define INTEGRATOR_EBI_32_BIT 0x02 +#define INTEGRATOR_EBI_WRITE_ENABLE 0x04 +#define INTEGRATOR_EBI_SYNC 0x08 +#define INTEGRATOR_EBI_WS_2 0x00 +#define INTEGRATOR_EBI_WS_3 0x10 +#define INTEGRATOR_EBI_WS_4 0x20 +#define INTEGRATOR_EBI_WS_5 0x30 +#define INTEGRATOR_EBI_WS_6 0x40 +#define INTEGRATOR_EBI_WS_7 0x50 +#define INTEGRATOR_EBI_WS_8 0x60 +#define INTEGRATOR_EBI_WS_9 0x70 +#define INTEGRATOR_EBI_WS_10 0x80 +#define INTEGRATOR_EBI_WS_11 0x90 +#define INTEGRATOR_EBI_WS_12 0xA0 +#define INTEGRATOR_EBI_WS_13 0xB0 +#define INTEGRATOR_EBI_WS_14 0xC0 +#define INTEGRATOR_EBI_WS_15 0xD0 +#define INTEGRATOR_EBI_WS_16 0xE0 +#define INTEGRATOR_EBI_WS_17 0xF0 + + +#define INTEGRATOR_CT_BASE 0x13000000 /* Counter/Timers */ +#define INTEGRATOR_IC_BASE 0x14000000 /* Interrupt Controller */ +#define INTEGRATOR_RTC_BASE 0x15000000 /* Real Time Clock */ +#define INTEGRATOR_UART0_BASE 0x16000000 /* UART 0 */ +#define INTEGRATOR_UART1_BASE 0x17000000 /* UART 1 */ +#define INTEGRATOR_KBD_BASE 0x18000000 /* Keyboard */ +#define INTEGRATOR_MOUSE_BASE 0x19000000 /* Mouse */ + +/* + * LED's & Switches + * + */ +#define INTEGRATOR_DBG_ALPHA_OFFSET 0x00 +#define INTEGRATOR_DBG_LEDS_OFFSET 0x04 +#define INTEGRATOR_DBG_SWITCH_OFFSET 0x08 + +#define INTEGRATOR_DBG_BASE 0x1A000000 +#define INTEGRATOR_DBG_ALPHA (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_ALPHA_OFFSET) +#define INTEGRATOR_DBG_LEDS (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_LEDS_OFFSET) +#define INTEGRATOR_DBG_SWITCH (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_SWITCH_OFFSET) + + +#define INTEGRATOR_GPIO_BASE 0x1B000000 /* GPIO */ + +/* ------------------------------------------------------------------------ + * KMI keyboard/mouse definitions + * ------------------------------------------------------------------------ + */ +/* PS2 Keyboard interface */ +#define KMI0_BASE INTEGRATOR_KBD_BASE + +/* PS2 Mouse interface */ +#define KMI1_BASE INTEGRATOR_MOUSE_BASE + +/* KMI definitions are now in include/asm-arm/hardware/amba_kmi.h -- rmk */ + +/* ------------------------------------------------------------------------ + * Where in the memory map does PCI live? + * ------------------------------------------------------------------------ + * This represents a fairly liberal usage of address space. Even though + * the V3 only has two windows (therefore we need to map stuff on the fly), + * we maintain the same addresses, even if they're not mapped. + * + */ +#define PHYS_PCI_MEM_BASE 0x40000000 /* 512M to xxx */ +/* unused 256M from A0000000-AFFFFFFF might be used for I2O ??? + */ +#define PHYS_PCI_IO_BASE 0x60000000 /* 16M to xxx */ +/* unused (128-16)M from B1000000-B7FFFFFF + */ +#define PHYS_PCI_CONFIG_BASE 0x61000000 /* 16M to xxx */ +/* unused ((128-16)M - 64K) from XXX + */ +#define PHYS_PCI_V3_BASE 0x62000000 + +#define PCI_DRAMSIZE INTEGRATOR_SSRAM_SIZE + +/* 'export' these to UHAL */ +#define UHAL_PCI_IO PCI_IO_BASE +#define UHAL_PCI_MEM PCI_MEM_BASE +#define UHAL_PCI_ALLOC_IO_BASE 0x00004000 +#define UHAL_PCI_ALLOC_MEM_BASE PCI_MEM_BASE +#define UHAL_PCI_MAX_SLOT 20 + +/* ======================================================================== + * Start of uHAL definitions + * ======================================================================== + */ + +/* ------------------------------------------------------------------------ + * Integrator Interrupt Controllers + * ------------------------------------------------------------------------ + * + * Offsets from interrupt controller base + * + * System Controller interrupt controller base is + * + * INTEGRATOR_IC_BASE + (header_number << 6) + * + * Core Module interrupt controller base is + * + * INTEGRATOR_HDR_IC + * + */ +#define IRQ_STATUS 0 +#define IRQ_RAW_STATUS 0x04 +#define IRQ_ENABLE 0x08 +#define IRQ_ENABLE_SET 0x08 +#define IRQ_ENABLE_CLEAR 0x0C + +#define INT_SOFT_SET 0x10 +#define INT_SOFT_CLEAR 0x14 + +#define FIQ_STATUS 0x20 +#define FIQ_RAW_STATUS 0x24 +#define FIQ_ENABLE 0x28 +#define FIQ_ENABLE_SET 0x28 +#define FIQ_ENABLE_CLEAR 0x2C + + +/* ------------------------------------------------------------------------ + * Interrupts + * ------------------------------------------------------------------------ + * + * + * Each Core Module has two interrupts controllers, one on the core module + * itself and one in the system controller on the motherboard. The + * READ_INT macro in target.s reads both interrupt controllers and returns + * a 32 bit bitmask, bits 0 to 23 are interrupts from the system controller + * and bits 24 to 31 are from the core module. + * + * The following definitions relate to the bitmask returned by READ_INT. + * + */ + +/* + * As the interrupt bit definitions for FIQ/IRQ there is a common + * set of definitions prefixed INT/INTMASK. The FIQ/IRQ definitions + * have been left to maintain backwards compatible. + * + */ + +/* + * Interrupt numbers + * + */ +#define INT_SOFTINT 0 +#define INT_UARTINT0 1 +#define INT_UARTINT1 2 +#define INT_KMIINT0 3 +#define INT_KMIINT1 4 +#define INT_TIMERINT0 5 +#define INT_TIMERINT1 6 +#define INT_TIMERINT2 7 +#define INT_RTCINT 8 +#define INT_EXPINT0 9 +#define INT_EXPINT1 10 +#define INT_EXPINT2 11 +#define INT_EXPINT3 12 +#define INT_PCIINT0 13 +#define INT_PCIINT1 14 +#define INT_PCIINT2 15 +#define INT_PCIINT3 16 +#define INT_V3INT 17 +#define INT_CPINT0 18 +#define INT_CPINT1 19 +#define INT_LBUSTIMEOUT 20 +#define INT_APCINT 21 +#define INT_CM_SOFTINT 24 +#define INT_CM_COMMRX 25 +#define INT_CM_COMMTX 26 + +/* + * Interrupt bit positions + * + */ +#define INTMASK_SOFTINT (1 << INT_SOFTINT) +#define INTMASK_UARTINT0 (1 << INT_UARTINT0) +#define INTMASK_UARTINT1 (1 << INT_UARTINT1) +#define INTMASK_KMIINT0 (1 << INT_KMIINT0) +#define INTMASK_KMIINT1 (1 << INT_KMIINT1) +#define INTMASK_TIMERINT0 (1 << INT_TIMERINT0) +#define INTMASK_TIMERINT1 (1 << INT_TIMERINT1) +#define INTMASK_TIMERINT2 (1 << INT_TIMERINT2) +#define INTMASK_RTCINT (1 << INT_RTCINT) +#define INTMASK_EXPINT0 (1 << INT_EXPINT0) +#define INTMASK_EXPINT1 (1 << INT_EXPINT1) +#define INTMASK_EXPINT2 (1 << INT_EXPINT2) +#define INTMASK_EXPINT3 (1 << INT_EXPINT3) +#define INTMASK_PCIINT0 (1 << INT_PCIINT0) +#define INTMASK_PCIINT1 (1 << INT_PCIINT1) +#define INTMASK_PCIINT2 (1 << INT_PCIINT2) +#define INTMASK_PCIINT3 (1 << INT_PCIINT3) +#define INTMASK_V3INT (1 << INT_V3INT) +#define INTMASK_CPINT0 (1 << INT_CPINT0) +#define INTMASK_CPINT1 (1 << INT_CPINT1) +#define INTMASK_LBUSTIMEOUT (1 << INT_LBUSTIMEOUT) +#define INTMASK_APCINT (1 << INT_APCINT) +#define INTMASK_CM_SOFTINT (1 << INT_CM_SOFTINT) +#define INTMASK_CM_COMMRX (1 << INT_CM_COMMRX) +#define INTMASK_CM_COMMTX (1 << INT_CM_COMMTX) + +/* + * INTEGRATOR_CM_INT0 - Interrupt number of first CM interrupt + * INTEGRATOR_SC_VALID_INT - Mask of valid system controller interrupts + * + */ +#define INTEGRATOR_CM_INT0 INT_CM_SOFTINT +#define INTEGRATOR_SC_VALID_INT 0x003FFFFF + +#define MAXIRQNUM 31 +#define MAXFIQNUM 31 +#define MAXSWINUM 31 + +/* ------------------------------------------------------------------------ + * LED's - The header LED is not accessable via the uHAL API + * ------------------------------------------------------------------------ + * + */ +#define GREEN_LED 0x01 +#define YELLOW_LED 0x02 +#define RED_LED 0x04 +#define GREEN_LED_2 0x08 +#define ALL_LEDS 0x0F + +#define LED_BANK INTEGRATOR_DBG_LEDS + +/* + * Memory definitions - run uHAL out of SSRAM. + * + */ +#define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE + +/* + * Application Flash + * + */ +#define FLASH_BASE INTEGRATOR_FLASH_BASE +#define FLASH_SIZE INTEGRATOR_FLASH_SIZE +#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1) +#define FLASH_BLOCK_SIZE SZ_128K + +/* + * Boot Flash + * + */ +#define EPROM_BASE INTEGRATOR_BOOT_ROM_HI +#define EPROM_SIZE INTEGRATOR_BOOT_ROM_SIZE +#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1) + +/* + * Clean base - dummy + * + */ +#define CLEAN_BASE EPROM_BASE + +/* + * Timer definitions + * + * Only use timer 1 & 2 + * (both run at 24MHz and will need the clock divider set to 16). + * + * Timer 0 runs at bus frequency and therefore could vary and currently + * uHAL can't handle that. + * + */ + +#define INTEGRATOR_TIMER0_BASE INTEGRATOR_CT_BASE +#define INTEGRATOR_TIMER1_BASE (INTEGRATOR_CT_BASE + 0x100) +#define INTEGRATOR_TIMER2_BASE (INTEGRATOR_CT_BASE + 0x200) + +#define MAX_TIMER 2 +#define MAX_PERIOD 699050 +#define TICKS_PER_uSEC 24 + +/* + * These are useconds NOT ticks. + * + */ +#define mSEC_1 1000 +#define mSEC_5 (mSEC_1 * 5) +#define mSEC_10 (mSEC_1 * 10) +#define mSEC_25 (mSEC_1 * 25) +#define SEC_1 (mSEC_1 * 1000) + +#define INTEGRATOR_CSR_BASE 0x10000000 +#define INTEGRATOR_CSR_SIZE 0x10000000 + +#endif + +/* END */ diff --git a/include/asm-arm/arch-integrator/serial.h b/include/asm-arm/arch-integrator/serial.h new file mode 100644 index 000000000..06ab7379b --- /dev/null +++ b/include/asm-arm/arch-integrator/serial.h @@ -0,0 +1,49 @@ +/* + * linux/include/asm-arm/arch-integrator/serial.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SERIAL_H +#define __ASM_ARCH_SERIAL_H + +#include <asm/arch/platform.h> +#include <asm/irq.h> + +/* + * This assumes you have a 1.8432 MHz clock for your UART. + * + * It'd be nice if someone built a serial card with a 24.576 MHz + * clock, since the 16550A is capable of handling a top speed of 1.5 + * megabits/second; but this requires the faster clock. + */ +#define BASE_BAUD (1843200 / 16) + +#define _SER_IRQ0 IRQ_UARTINT0 +#define _SER_IRQ1 IRQ_UARTINT1 + +#define RS_TABLE_SIZE 2 + +#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) + + /* UART CLK PORT IRQ FLAGS */ +#define STD_SERIAL_PORT_DEFNS \ + { 0, BASE_BAUD, 0x3F8, _SER_IRQ0, STD_COM_FLAGS }, /* ttyS0 */ \ + { 0, BASE_BAUD, 0x2F8, _SER_IRQ1, STD_COM_FLAGS }, /* ttyS1 */ + +#define EXTRA_SERIAL_PORT_DEFNS + +#endif diff --git a/include/asm-arm/arch-integrator/sizes.h b/include/asm-arm/arch-integrator/sizes.h new file mode 100644 index 000000000..f8d92ca12 --- /dev/null +++ b/include/asm-arm/arch-integrator/sizes.h @@ -0,0 +1,52 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +/* DO NOT EDIT!! - this file automatically generated + * from .s file by awk -f s2h.awk + */ +/* Size defintions + * Copyright (C) ARM Limited 1998. All rights reserved. + */ + +#ifndef __sizes_h +#define __sizes_h 1 + +/* handy sizes */ +#define SZ_1K 0x00000400 +#define SZ_4K 0x00001000 +#define SZ_8K 0x00002000 +#define SZ_16K 0x00004000 +#define SZ_64K 0x00010000 +#define SZ_128K 0x00020000 +#define SZ_256K 0x00040000 +#define SZ_512K 0x00080000 + +#define SZ_1M 0x00100000 +#define SZ_2M 0x00200000 +#define SZ_4M 0x00400000 +#define SZ_8M 0x00800000 +#define SZ_16M 0x01000000 +#define SZ_32M 0x02000000 +#define SZ_64M 0x04000000 +#define SZ_128M 0x08000000 +#define SZ_256M 0x10000000 +#define SZ_512M 0x20000000 + +#define SZ_1G 0x40000000 +#define SZ_2G 0x80000000 + +#endif + +/* END */ diff --git a/include/asm-arm/arch-integrator/system.h b/include/asm-arm/arch-integrator/system.h new file mode 100644 index 000000000..a330cadc7 --- /dev/null +++ b/include/asm-arm/arch-integrator/system.h @@ -0,0 +1,49 @@ +/* + * linux/include/asm-arm/arch-integrator/system.h + * + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include <asm/arch/platform.h> + +static void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(0); +} + +extern __inline__ void arch_reset(char mode) +{ + unsigned int hdr_ctrl = (IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET); + unsigned int val; + + /* + * To reset, we hit the on-board reset register + * in the system FPGA + */ + val = __raw_readl(hdr_ctrl); + val |= INTEGRATOR_HDR_CTRL_RESET; + __raw_writel(val, hdr_ctrl); +} + +#endif diff --git a/include/asm-arm/arch-integrator/time.h b/include/asm-arm/arch-integrator/time.h new file mode 100644 index 000000000..1dfb5fd68 --- /dev/null +++ b/include/asm-arm/arch-integrator/time.h @@ -0,0 +1,140 @@ +/* + * linux/include/asm-arm/arch-integrator/time.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <asm/system.h> +#include <asm/leds.h> + +/* + * Where is the timer (VA)? + */ +#define TIMER0_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000000) +#define TIMER1_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000100) +#define TIMER2_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000200) +#define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) + +/* + * How long is the timer interval? + */ +#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10) +#if TIMER_INTERVAL >= 0x100000 +#define TIMER_RELOAD (TIMER_INTERVAL >> 8) /* Divide by 256 */ +#define TIMER_CTRL 0x88 /* Enable, Clock / 256 */ +#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC) +#elif TIMER_INTERVAL >= 0x10000 +#define TIMER_RELOAD (TIMER_INTERVAL >> 4) /* Divide by 16 */ +#define TIMER_CTRL 0x84 /* Enable, Clock / 16 */ +#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC) +#else +#define TIMER_RELOAD (TIMER_INTERVAL) +#define TIMER_CTRL 0x80 /* Enable */ +#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC) +#endif + +/* + * What does it look like? + */ +typedef struct TimerStruct { + unsigned long TimerLoad; + unsigned long TimerValue; + unsigned long TimerControl; + unsigned long TimerClear; +} TimerStruct_t; + +extern unsigned long (*gettimeoffset)(void); + +/* + * Returns number of ms since last clock interrupt. Note that interrupts + * will have been disabled by do_gettimeoffset() + */ +static unsigned long integrator_gettimeoffset(void) +{ + volatile TimerStruct_t *timer1 = (TimerStruct_t *)TIMER1_VA_BASE; + unsigned long ticks1, ticks2, status; + + /* + * Get the current number of ticks. Note that there is a race + * condition between us reading the timer and checking for + * an interrupt. We get around this by ensuring that the + * counter has not reloaded between our two reads. + */ + ticks2 = timer1->TimerValue & 0xffff; + do { + ticks1 = ticks2; + status = __raw_readl(VA_IC_BASE + IRQ_RAW_STATUS); + ticks2 = timer1->TimerValue & 0xffff; + } while (ticks2 > ticks1); + + /* + * Number of ticks since last interrupt. + */ + ticks1 = TIMER_RELOAD - ticks2; + + /* + * Interrupt pending? If so, we've reloaded once already. + */ + if (status & IRQMASK_TIMERINT1) + ticks1 += TIMER_RELOAD; + + /* + * Convert the ticks to usecs + */ + return TICKS2USECS(ticks1); +} + +/* + * IRQ handler for the timer + */ +static void integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE; + + // ...clear the interrupt + timer1->TimerClear = 1; + + do_leds(); + do_timer(regs); + do_profile(regs); +} + +/* + * Set up timer interrupt, and return the current time in seconds. + */ +extern __inline__ void setup_timer(void) +{ + volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE; + volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE; + volatile TimerStruct_t *timer2 = (volatile TimerStruct_t *)TIMER2_VA_BASE; + + timer_irq.handler = integrator_timer_interrupt; + + /* + * Initialise to a known state (all timers off) + */ + timer0->TimerControl = 0; + timer1->TimerControl = 0; + timer2->TimerControl = 0; + + timer1->TimerLoad = TIMER_RELOAD; + timer1->TimerValue = TIMER_RELOAD; + timer1->TimerControl = TIMER_CTRL | 0x40; /* periodic */ + + /* + * Make irqs happen for the system timer + */ + setup_arm_irq(IRQ_TIMERINT1, &timer_irq); + gettimeoffset = integrator_gettimeoffset; +} diff --git a/include/asm-arm/arch-integrator/timex.h b/include/asm-arm/arch-integrator/timex.h new file mode 100644 index 000000000..87a762818 --- /dev/null +++ b/include/asm-arm/arch-integrator/timex.h @@ -0,0 +1,26 @@ +/* + * linux/include/asm-arm/arch-integrator/timex.h + * + * Integrator architecture timex specifications + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * ?? + */ +#define CLOCK_TICK_RATE (50000000 / 16) diff --git a/include/asm-arm/arch-integrator/uncompress.h b/include/asm-arm/arch-integrator/uncompress.h new file mode 100644 index 000000000..284a4aeb6 --- /dev/null +++ b/include/asm-arm/arch-integrator/uncompress.h @@ -0,0 +1,53 @@ +/* + * linux/include/asm-arm/arch-integrator/uncompress.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define AMBA_UART_DR (*(volatile unsigned char *)0x16000000) +#define AMBA_UART_LCRH (*(volatile unsigned char *)0x16000008) +#define AMBA_UART_LCRM (*(volatile unsigned char *)0x1600000c) +#define AMBA_UART_LCRL (*(volatile unsigned char *)0x16000010) +#define AMBA_UART_CR (*(volatile unsigned char *)0x16000014) +#define AMBA_UART_FR (*(volatile unsigned char *)0x16000018) + +/* + * This does not append a newline + */ +static void puts(const char *s) +{ + while (*s) { + while (AMBA_UART_FR & (1 << 5)); + + AMBA_UART_DR = *s; + + if (*s == '\n') { + while (AMBA_UART_FR & (1 << 5)); + + AMBA_UART_DR = '\r'; + } + s++; + } + while (AMBA_UART_FR & (1 << 3)); +} + +/* + * nothing to do + */ +#define arch_decomp_setup() + +#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-integrator/vmalloc.h b/include/asm-arm/arch-integrator/vmalloc.h new file mode 100644 index 000000000..ec8f98d3f --- /dev/null +++ b/include/asm-arm/arch-integrator/vmalloc.h @@ -0,0 +1,32 @@ +/* + * linux/include/asm-arm/arch-integrator/vmalloc.h + * + * Copyright (C) 2000 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-sa1100/irq.h b/include/asm-arm/arch-sa1100/irq.h index 91bca91d8..8c3105066 100644 --- a/include/asm-arm/arch-sa1100/irq.h +++ b/include/asm-arm/arch-sa1100/irq.h @@ -134,7 +134,7 @@ static void sa1100_unmask_GPIO11_27_irq(unsigned int irq) int mask = (1 << GPIO_11_27_IRQ(irq)); if (GPIO_11_27_spurious & mask) { /* - * We don't want to miss an interrupt that would have occured + * We don't want to miss an interrupt that would have occurred * while it was masked. Simulate it if it is the case. */ int state = GPLR; diff --git a/include/asm-arm/hardware/amba_kmi.h b/include/asm-arm/hardware/amba_kmi.h new file mode 100644 index 000000000..a39e5be75 --- /dev/null +++ b/include/asm-arm/hardware/amba_kmi.h @@ -0,0 +1,92 @@ +/* + * linux/include/asm-arm/hardware/amba_kmi.h + * + * Internal header file for AMBA KMI ports + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * + * --------------------------------------------------------------------------- + * From ARM PrimeCell(tm) PS2 Keyboard/Mouse Interface (PL050) Technical + * Reference Manual - ARM DDI 0143B - see http://www.arm.com/ + * --------------------------------------------------------------------------- + */ +#ifndef ASM_ARM_HARDWARE_AMBA_KMI_H +#define ASM_ARM_HARDWARE_AMBA_KMI_H + +/* + * KMI control register: + * KMICR_TYPE 0 = PS2/AT mode, 1 = No line control bit mode + * KMICR_RXINTREN 1 = enable RX interrupts + * KMICR_TXINTREN 1 = enable TX interrupts + * KMICR_EN 1 = enable KMI + * KMICR_FD 1 = force KMI data low + * KMICR_FC 1 = force KMI clock low + */ +#define KMICR (KMI_BASE + 0x00) +#define KMICR_TYPE (1 << 5) +#define KMICR_RXINTREN (1 << 4) +#define KMICR_TXINTREN (1 << 3) +#define KMICR_EN (1 << 2) +#define KMICR_FD (1 << 1) +#define KMICR_FC (1 << 0) + +/* + * KMI status register: + * KMISTAT_TXEMPTY 1 = transmitter register empty + * KMISTAT_TXBUSY 1 = currently sending data + * KMISTAT_RXFULL 1 = receiver register ready to be read + * KMISTAT_RXBUSY 1 = currently receiving data + * KMISTAT_RXPARITY parity of last databyte received + * KMISTAT_IC current level of KMI clock input + * KMISTAT_ID current level of KMI data input + */ +#define KMISTAT (KMI_BASE + 0x04) +#define KMISTAT_TXEMPTY (1 << 6) +#define KMISTAT_TXBUSY (1 << 5) +#define KMISTAT_RXFULL (1 << 4) +#define KMISTAT_RXBUSY (1 << 3) +#define KMISTAT_RXPARITY (1 << 2) +#define KMISTAT_IC (1 << 1) +#define KMISTAT_ID (1 << 0) + +/* + * KMI data register + */ +#define KMIDATA (KMI_BASE + 0x08) + +/* + * KMI clock divisor: to generate 8MHz internal clock + * div = (ref / 8MHz) - 1; 0 <= div <= 15 + */ +#define KMICLKDIV (KMI_BASE + 0x0c) + +/* + * KMI interrupt register: + * KMIIR_TXINTR 1 = transmit interrupt asserted + * KMIIR_RXINTR 1 = receive interrupt asserted + */ +#define KMIIR (KMI_BASE + 0x10) +#define KMIIR_TXINTR (1 << 1) +#define KMIIR_RXINTR (1 << 0) + +/* + * The size of the KMI primecell + */ +#define KMI_SIZE (0x100) + +#endif diff --git a/include/asm-arm/hardware/pci_v3.h b/include/asm-arm/hardware/pci_v3.h index e64cebdd9..28b8e6d7b 100644 --- a/include/asm-arm/hardware/pci_v3.h +++ b/include/asm-arm/hardware/pci_v3.h @@ -88,41 +88,41 @@ /* PCI COMMAND REGISTER bits */ -#define V3_COMMAND_M_FBB_EN BIT9 -#define V3_COMMAND_M_SERR_EN BIT8 -#define V3_COMMAND_M_PAR_EN BIT6 -#define V3_COMMAND_M_MASTER_EN BIT2 -#define V3_COMMAND_M_MEM_EN BIT1 -#define V3_COMMAND_M_IO_EN BIT0 +#define V3_COMMAND_M_FBB_EN (1 << 9) +#define V3_COMMAND_M_SERR_EN (1 << 8) +#define V3_COMMAND_M_PAR_EN (1 << 6) +#define V3_COMMAND_M_MASTER_EN (1 << 2) +#define V3_COMMAND_M_MEM_EN (1 << 1) +#define V3_COMMAND_M_IO_EN (1 << 0) /* SYSTEM REGISTER bits */ -#define V3_SYSTEM_M_RST_OUT BIT15 -#define V3_SYSTEM_M_LOCK BIT14 +#define V3_SYSTEM_M_RST_OUT (1 << 15) +#define V3_SYSTEM_M_LOCK (1 << 14) /* PCI_CFG bits */ -#define V3_PCI_CFG_M_RETRY_EN BIT10 -#define V3_PCI_CFG_M_AD_LOW1 BIT9 -#define V3_PCI_CFG_M_AD_LOW0 BIT8 +#define V3_PCI_CFG_M_RETRY_EN (1 << 10) +#define V3_PCI_CFG_M_AD_LOW1 (1 << 9) +#define V3_PCI_CFG_M_AD_LOW0 (1 << 8) /* PCI_BASE register bits (PCI -> Local Bus) */ #define V3_PCI_BASE_M_ADR_BASE 0xFFF00000 #define V3_PCI_BASE_M_ADR_BASEL 0x000FFF00 -#define V3_PCI_BASE_M_PREFETCH BIT3 -#define V3_PCI_BASE_M_TYPE BIT2+BIT1 -#define V3_PCI_BASE_M_IO BIT0 +#define V3_PCI_BASE_M_PREFETCH (1 << 3) +#define V3_PCI_BASE_M_TYPE (3 << 1) +#define V3_PCI_BASE_M_IO (1 << 0) /* PCI MAP register bits (PCI -> Local bus) */ #define V3_PCI_MAP_M_MAP_ADR 0xFFF00000 -#define V3_PCI_MAP_M_RD_POST_INH BIT15 -#define V3_PCI_MAP_M_ROM_SIZE BIT11+BIT10 -#define V3_PCI_MAP_M_SWAP BIT9+BIT8 +#define V3_PCI_MAP_M_RD_POST_INH (1 << 15) +#define V3_PCI_MAP_M_ROM_SIZE (3 << 10) +#define V3_PCI_MAP_M_SWAP (3 << 8) #define V3_PCI_MAP_M_ADR_SIZE 0x000000F0 -#define V3_PCI_MAP_M_REG_EN BIT1 -#define V3_PCI_MAP_M_ENABLE BIT0 +#define V3_PCI_MAP_M_REG_EN (1 << 1) +#define V3_PCI_MAP_M_ENABLE (1 << 0) /* 9 => 512M window size */ @@ -134,15 +134,15 @@ /* LB_BASE register bits (Local bus -> PCI) */ #define V3_LB_BASE_M_MAP_ADR 0xFFF00000 -#define V3_LB_BASE_M_SWAP BIT9+BIT8 +#define V3_LB_BASE_M_SWAP (3 << 8) #define V3_LB_BASE_M_ADR_SIZE 0x000000F0 -#define V3_LB_BASE_M_PREFETCH BIT3 -#define V3_LB_BASE_M_ENABLE BIT0 +#define V3_LB_BASE_M_PREFETCH (1 << 3) +#define V3_LB_BASE_M_ENABLE (1 << 0) /* LB_MAP register bits (Local bus -> PCI) */ #define V3_LB_MAP_M_MAP_ADR 0xFFF0 #define V3_LB_MAP_M_TYPE 0x000E -#define V3_LB_MAP_M_AD_LOW_EN BIT0 +#define V3_LB_MAP_M_AD_LOW_EN (1 << 0) #endif diff --git a/include/asm-arm/hardware/serial_amba.h b/include/asm-arm/hardware/serial_amba.h index 15bfbb98d..41248a8f9 100644 --- a/include/asm-arm/hardware/serial_amba.h +++ b/include/asm-arm/hardware/serial_amba.h @@ -88,4 +88,7 @@ #define ARM_BAUD_2400 383 #define ARM_BAUD_1200 767 +#define AMBA_UARTRSR_ANY (AMBA_UARTRSR_OE|AMBA_UARTRSR_BE|AMBA_UARTRSR_PE|AMBA_UARTRSR_FE) +#define AMBA_UARTFR_MODEM_ANY (AMBA_UARTFR_DCD|AMBA_UARTFR_DSR|AMBA_UARTFR_CTS) + #endif diff --git a/include/asm-arm/mach/amba_kmi.h b/include/asm-arm/mach/amba_kmi.h new file mode 100644 index 000000000..bb679ec1f --- /dev/null +++ b/include/asm-arm/mach/amba_kmi.h @@ -0,0 +1,39 @@ +/* + * linux/include/asm-arm/mach/amba_kmi.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +struct kmi_info { + u_int base; + u_int irq; + u_char divisor; + u_char type; + u_char state; + u_char prev_rx; + u_char last_tx; + u_char resend_count; + u_short res; + wait_queue_head_t wait_q; + void (*rx)(struct kmi_info *, u_int val, + struct pt_regs *regs); + char name[8]; +}; + +#define KMI_KEYBOARD 0 +#define KMI_MOUSE 1 + +int register_kmi(struct kmi_info *kmi); diff --git a/include/asm-arm/param.h b/include/asm-arm/param.h index 992a9d6a5..67af57ce2 100644 --- a/include/asm-arm/param.h +++ b/include/asm-arm/param.h @@ -31,5 +31,9 @@ /* max length of hostname */ #define MAXHOSTNAMELEN 64 +#ifdef __KERNEL__ +# define CLOCKS_PER_SEC HZ +#endif + #endif diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h index 008fdde99..16d869626 100644 --- a/include/asm-arm/pgtable.h +++ b/include/asm-arm/pgtable.h @@ -180,8 +180,6 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* FIXME: this is not correct */ #define kern_addr_valid(addr) (1) -#define io_remap_page_range remap_page_range - #include <asm-generic/pgtable.h> #endif /* !__ASSEMBLY__ */ diff --git a/include/asm-arm/proc-armv/uaccess.h b/include/asm-arm/proc-armv/uaccess.h index 4baee9ce7..9f86fc617 100644 --- a/include/asm-arm/proc-armv/uaccess.h +++ b/include/asm-arm/proc-armv/uaccess.h @@ -24,7 +24,7 @@ extern __inline__ void set_fs (mm_segment_t fs) /* We use 33-bit arithmetic here... */ #define __range_ok(addr,size) ({ \ unsigned long flag, sum; \ - __asm__ __volatile__("adds %1, %2, %3; sbcccs %1, %1, %0; movcc %0, #0" \ + __asm__("adds %1, %2, %3; sbcccs %1, %1, %0; movcc %0, #0" \ : "=&r" (flag), "=&r" (sum) \ : "r" (addr), "Ir" (size), "0" (current->addr_limit) \ : "cc"); \ @@ -32,7 +32,7 @@ extern __inline__ void set_fs (mm_segment_t fs) #define __addr_ok(addr) ({ \ unsigned long flag; \ - __asm__ __volatile__("cmp %2, %0; movlo %0, #0" \ + __asm__("cmp %2, %0; movlo %0, #0" \ : "=&r" (flag) \ : "0" (current->addr_limit), "r" (addr) \ : "cc"); \ @@ -57,24 +57,8 @@ extern __inline__ void set_fs (mm_segment_t fs) #define __put_user_asm_half(x,addr,err) \ ({ \ unsigned long __temp = (unsigned long)(x); \ - __asm__ __volatile__( \ - "1: strbt %1,[%3],#0\n" \ - "2: strbt %2,[%4],#0\n" \ - "3:\n" \ - " .section .fixup,\"ax\"\n" \ - " .align 2\n" \ - "4: mov %0, %5\n" \ - " b 3b\n" \ - " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .align 3\n" \ - " .long 1b, 4b\n" \ - " .long 2b, 4b\n" \ - " .previous" \ - : "=r" (err) \ - : "r" (__temp), "r" (__temp >> 8), \ - "r" (addr), "r" ((int)(addr) + 1), \ - "i" (-EFAULT), "0" (err)); \ + __put_user_asm_byte(__temp, addr, err); \ + __put_user_asm_byte(__temp >> 8, (int)(addr) + 1, err); \ }) #define __put_user_asm_word(x,addr,err) \ @@ -112,26 +96,10 @@ extern __inline__ void set_fs (mm_segment_t fs) #define __get_user_asm_half(x,addr,err) \ ({ \ - unsigned long __temp; \ - __asm__ __volatile__( \ - "1: ldrbt %1,[%3],#0\n" \ - "2: ldrbt %2,[%4],#0\n" \ - " orr %1, %1, %2, lsl #8\n" \ - "3:\n" \ - " .section .fixup,\"ax\"\n" \ - " .align 2\n" \ - "4: mov %0, %5\n" \ - " mov %1, #0\n" \ - " b 3b\n" \ - " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .align 3\n" \ - " .long 1b, 4b\n" \ - " .long 2b, 4b\n" \ - " .previous" \ - : "=r" (err), "=r" (x), "=&r" (__temp) \ - : "r" (addr), "r" ((int)(addr) + 1), \ - "i" (-EFAULT), "0" (err)); \ + unsigned long __b1, __b2; \ + __get_user_asm_byte(__b1, addr, err); \ + __get_user_asm_byte(__b2, (int)(addr) + 1, err); \ + (x) = __b1 | (__b2 << 8); \ }) diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h index 18008c510..904001d64 100644 --- a/include/asm-arm/proc-fns.h +++ b/include/asm-arm/proc-fns.h @@ -28,7 +28,7 @@ #ifdef CONFIG_CPU_32 # define CPU_INCLUDE_NAME "asm/cpu-multi32.h" -# ifdef CONFIG_CPU_ARM6 +# ifdef CONFIG_CPU_ARM610 # ifdef CPU_NAME # undef MULTI_CPU # define MULTI_CPU @@ -36,7 +36,7 @@ # define CPU_NAME arm6 # endif # endif -# ifdef CONFIG_CPU_ARM7 +# ifdef CONFIG_CPU_ARM710 # ifdef CPU_NAME # undef MULTI_CPU # define MULTI_CPU @@ -44,7 +44,7 @@ # define CPU_NAME arm7 # endif # endif -# ifdef CONFIG_CPU_ARM720 +# ifdef CONFIG_CPU_ARM720T # ifdef CPU_NAME # undef MULTI_CPU # define MULTI_CPU @@ -52,7 +52,7 @@ # define CPU_NAME arm720 # endif # endif -# ifdef CONFIG_CPU_ARM920 +# ifdef CONFIG_CPU_ARM920T # ifdef CPU_NAME # undef MULTI_CPU # define MULTI_CPU diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h index 7e8040d73..f7aea9b38 100644 --- a/include/asm-arm/uaccess.h +++ b/include/asm-arm/uaccess.h @@ -182,7 +182,8 @@ extern __inline__ long strnlen_user(const char *s, long n) #define __put_user_nocheck(x,ptr,size) \ ({ \ long __pu_err = 0; \ - __put_user_size((x),(ptr),(size),__pu_err); \ + __typeof__(*(ptr)) *__pu_addr = (ptr); \ + __put_user_size((x),__pu_addr,(size),__pu_err); \ __pu_err; \ }) diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index 9dcd00962..208a17af2 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -400,7 +400,6 @@ static inline long _exit(int exitcode) static inline pid_t waitpid(pid_t pid, int *wait_stat, int options) { - extern long sys_wait4(int, int *, int, struct rusage *); return sys_wait4((int)pid, wait_stat, options, NULL); } @@ -412,7 +411,6 @@ static inline long delete_module(const char *name) static inline pid_t wait(int * wait_stat) { - extern long sys_wait4(int, int *, int, struct rusage *); return sys_wait4(-1, wait_stat, 0, NULL); } diff --git a/include/asm-arm/xor.h b/include/asm-arm/xor.h index c82eb12a5..a222bbd81 100644 --- a/include/asm-arm/xor.h +++ b/include/asm-arm/xor.h @@ -1 +1,142 @@ +/* + * linux/include/asm-arm/xor.h + * + * Copyright (C) 2001 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + #include <asm-generic/xor.h> + +#define __XOR(a1, a2) a1 ^= a2 + +#define GET_BLOCK_2(dst) \ + __asm__("ldmia %0, {%1, %2}" \ + : "=r" (dst), "=r" (a1), "=r" (a2) \ + : "0" (dst)) + +#define GET_BLOCK_4(dst) \ + __asm__("ldmia %0, {%1, %2, %3, %4}" \ + : "=r" (dst), "=r" (a1), "=r" (a2), "=r" (a3), "=r" (a4) \ + : "0" (dst)) + +#define XOR_BLOCK_2(src) \ + __asm__("ldmia %0!, {%1, %2}" \ + : "=r" (src), "=r" (b1), "=r" (b2) \ + : "0" (src)); \ + __XOR(a1, b1); __XOR(a2, b2); + +#define XOR_BLOCK_4(src) \ + __asm__("ldmia %0!, {%1, %2, %3, %4}" \ + : "=r" (src), "=r" (b1), "=r" (b2), "=r" (b3), "=r" (b4) \ + : "0" (src)); \ + __XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4) + +#define PUT_BLOCK_2(dst) \ + __asm__ __volatile__("stmia %0!, {%2, %3}" \ + : "=r" (dst) \ + : "0" (dst), "r" (a1), "r" (a2)) + +#define PUT_BLOCK_4(dst) \ + __asm__ __volatile__("stmia %0!, {%2, %3, %4, %5}" \ + : "=r" (dst) \ + : "0" (dst), "r" (a1), "r" (a2), "r" (a3), "r" (a4)) + +static void +xor_arm4regs_2(unsigned long bytes, unsigned long *p1, unsigned long *p2) +{ + unsigned int lines = bytes / sizeof(unsigned long) / 4; + register unsigned int a1 __asm__("r4"); + register unsigned int a2 __asm__("r5"); + register unsigned int a3 __asm__("r6"); + register unsigned int a4 __asm__("r7"); + register unsigned int b1 __asm__("r8"); + register unsigned int b2 __asm__("r9"); + register unsigned int b3 __asm__("ip"); + register unsigned int b4 __asm__("lr"); + + do { + GET_BLOCK_4(p1); + XOR_BLOCK_4(p2); + PUT_BLOCK_4(p1); + } while (--lines); +} + +static void +xor_arm4regs_3(unsigned long bytes, unsigned long *p1, unsigned long *p2, + unsigned long *p3) +{ + unsigned int lines = bytes / sizeof(unsigned long) / 4; + register unsigned int a1 __asm__("r4"); + register unsigned int a2 __asm__("r5"); + register unsigned int a3 __asm__("r6"); + register unsigned int a4 __asm__("r7"); + register unsigned int b1 __asm__("r8"); + register unsigned int b2 __asm__("r9"); + register unsigned int b3 __asm__("ip"); + register unsigned int b4 __asm__("lr"); + + do { + GET_BLOCK_4(p1); + XOR_BLOCK_4(p2); + XOR_BLOCK_4(p3); + PUT_BLOCK_4(p1); + } while (--lines); +} + +static void +xor_arm4regs_4(unsigned long bytes, unsigned long *p1, unsigned long *p2, + unsigned long *p3, unsigned long *p4) +{ + unsigned int lines = bytes / sizeof(unsigned long) / 2; + register unsigned int a1 __asm__("r8"); + register unsigned int a2 __asm__("r9"); + register unsigned int b1 __asm__("ip"); + register unsigned int b2 __asm__("lr"); + + do { + GET_BLOCK_2(p1); + XOR_BLOCK_2(p2); + XOR_BLOCK_2(p3); + XOR_BLOCK_2(p4); + PUT_BLOCK_2(p1); + } while (--lines); +} + +static void +xor_arm4regs_5(unsigned long bytes, unsigned long *p1, unsigned long *p2, + unsigned long *p3, unsigned long *p4, unsigned long *p5) +{ + unsigned int lines = bytes / sizeof(unsigned long) / 2; + register unsigned int a1 __asm__("r8"); + register unsigned int a2 __asm__("r9"); + register unsigned int b1 __asm__("ip"); + register unsigned int b2 __asm__("lr"); + + do { + GET_BLOCK_2(p1); + XOR_BLOCK_2(p2); + XOR_BLOCK_2(p3); + XOR_BLOCK_2(p4); + XOR_BLOCK_2(p5); + PUT_BLOCK_2(p1); + } while (--lines); +} + +static struct xor_block_template xor_block_arm4regs = { + name: "arm4regs", + do_2: xor_arm4regs_2, + do_3: xor_arm4regs_3, + do_4: xor_arm4regs_4, + do_5: xor_arm4regs_5, +}; + +#undef XOR_TRY_TEMPLATES +#define XOR_TRY_TEMPLATES \ + do { \ + xor_speed(&xor_block_arm4regs); \ + xor_speed(&xor_block_8regs); \ + xor_speed(&xor_block_32regs); \ + } while (0) |