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-rw-r--r--include/asm-ppc/pgtable.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index 2c481490e..10f1f0efc 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -20,6 +20,11 @@ extern void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
#define flush_tlb_page local_flush_tlb_page
#define flush_tlb_range local_flush_tlb_range
+extern __inline__ void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end)
+{
+ /* PPC has hw page tables. */
+}
+
/*
* No cache flushing is required when address mappings are
* changed, because the caches on PowerPCs are physically