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path: root/arch/mips64/mm/andes.c
Commit message (Expand)AuthorAgeFilesLines
* Optimized cache flushing on r10k/o200s, assuming processor handlesKanoj Sarcar2000-07-271-103/+20
* Optimize andes_clear_page() and andes_copy_page() with prefetchRalf Baechle2000-07-261-16/+23
* When a debugger faults in a page for a debugee, we do not need to updateKanoj Sarcar2000-07-251-0/+6
* Name change: the generic call flush_cache_all() does not do anythingKanoj Sarcar2000-07-241-4/+4
* Introduce a new cpu specific routine to flush the L2 cache. This helpsKanoj Sarcar2000-07-241-0/+22
* The tlbwired register is now set up in the head.S code.Kanoj Sarcar2000-06-061-1/+0
* SMP debugging enhancements.Kanoj Sarcar2000-05-011-0/+1
* Fix the init_new_context code not to zap the percpu tlbpid array whenKanoj Sarcar2000-04-241-2/+2
* scall_64.S: Move to kernel mode and enable intrs properly.Kanoj Sarcar2000-04-231-7/+7
* First cut at intercpu tlb flushing.Kanoj Sarcar2000-04-221-1/+1
* Per cpu tlbpid (asid) management for SMP. The asid cache is now perKanoj Sarcar2000-04-221-14/+16
* save_and_cli and restore_flags ... not save_and_cli and __restore_flags ...Kanoj Sarcar2000-03-311-1/+1
* Simplify the get_new_mmu_context() interface that allocated TLB pids.Kanoj Sarcar2000-03-141-3/+3
* TLB pid allocation fix. Still not sure about the complete algorithm.Kanoj Sarcar2000-03-131-3/+1
* Merge with 2.3.47. Guys, this is buggy as shit. You've been warned.Ralf Baechle2000-02-241-15/+15
* Merge with Linux 2.3.23. The new bootmem stuff has broken variousRalf Baechle2000-01-271-13/+13
* - IOC3 driver now will panic when encountering a RX/TX PCI DMA error.Ralf Baechle2000-01-171-24/+381
* Merge with Linux 2.3.21.Ralf Baechle1999-12-041-7/+1
* Look ma - a tank has hit the MIPS sources ...Ralf Baechle1999-08-211-11/+1
* - Drop support for 32/32 fp register modelRalf Baechle1999-08-181-0/+134
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