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* Tlb miss handling updates: need to fill in the processor id only onceKanoj Sarcar2000-06-291-0/+1
* Explain pgd/pmd allocation failure strategies. Create a global bad-pmd-table,Kanoj Sarcar2000-06-271-1/+3
* Delete pmd_present/pgd_present. Explain pgd/pmd/pte allocation andKanoj Sarcar2000-06-261-1/+1
* Merge with 2.4.0-test1-ac21 + pile of MIPS cleanups to make mergingRalf Baechle2000-06-191-4/+1
* Fix a possible race in the initialization code.Kanoj Sarcar2000-06-131-8/+5
* Support to put the lowlevel exception handlers in node local memory.Kanoj Sarcar2000-06-131-0/+25
* When doing kernel text replication, make sure we do not scribble onKanoj Sarcar2000-06-132-21/+27
* Add in a build/config option for kernel text replication.Kanoj Sarcar2000-06-121-0/+3
* Have the slave bootstrap code actually look at the text and data serverKanoj Sarcar2000-06-091-11/+7
* Add in the hooks to do kernel text replication. Now start debugging thisKanoj Sarcar2000-06-093-1/+124
* Need to have the nasid of the boot/master node for future uses.Kanoj Sarcar2000-06-091-0/+2
* SMP Mapped kernel fixes to go along with the new layout. Use properlyKanoj Sarcar2000-06-081-1/+1
* Mapped kernel changes: create elf sections as close as possible toKanoj Sarcar2000-06-081-1/+1
* Reboot was doing halt and halt was crashing the machine, fixed.Ralf Baechle2000-06-071-6/+13
* Get the mapped kernel working for SMP kernels. While launching slaves,Kanoj Sarcar2000-06-061-3/+4
* Get some type definitions into their rightful places for wider usage.Kanoj Sarcar2000-06-061-4/+5
* Launch the CPUs one by one until we can make sure that weUlf Carlsson2000-06-061-7/+11
* Further cleanups to the ld script files not to do more than needed.Kanoj Sarcar2000-06-051-2/+2
* The master processor now waits for all enabled cpus to come into theKanoj Sarcar2000-06-021-1/+1
* Most of the kernel arrays/data structures and low level proceduresKanoj Sarcar2000-06-023-27/+28
* Set smp_num_cpus in the IP27 specific code. Getting ready to handleKanoj Sarcar2000-06-021-1/+1
* Fix some type definitions, add a new field in the per-processor dataKanoj Sarcar2000-06-021-1/+1
* Add the node offset to the IOC3 to the PCI resourceUlf Carlsson2000-06-011-0/+4
* Only enter do_timer from the first CPU.Ulf Carlsson2000-05-311-16/+16
* Remove all IOC3 hacks. IOC3 now allocates it's resources the same wayRalf Baechle2000-05-302-71/+79
* Work around something I haven't looked into.Ulf Carlsson2000-05-241-0/+4
* Parallel initialization: each hub now tries to discover the xbowKanoj Sarcar2000-05-203-54/+74
* Implement a more dynamic method of associating IRQs with PCI devices.Kanoj Sarcar2000-05-192-54/+78
* ip27-timer.c: Use the realtime clock for do_gettimeofday and do_settimeofdayUlf Carlsson2000-05-191-1/+33
* irq.h: With the current scheme of encoding the bus number into theKanoj Sarcar2000-05-181-0/+1
* Misc fixes.Kanoj Sarcar2000-05-171-8/+7
* Modify the SMP bootup sequence slightly, so that the master waitsKanoj Sarcar2000-05-171-5/+7
* The device initialization code can not assume it is being invoked onKanoj Sarcar2000-05-171-1/+2
* Fix the bridge register programming to indicate a 1:1 mapping betweenKanoj Sarcar2000-05-161-2/+3
* Move the intercpu intr irq numbers to the lowest possible. AssignKanoj Sarcar2000-05-152-61/+52
* Fix races in the low level intr handling code to prevent intr lossKanoj Sarcar2000-05-131-14/+28
* Rudimentary nmi support to be able to do simple debugging on SMPKanoj Sarcar2000-05-123-1/+169
* Enable "reboot"ing the system.Kanoj Sarcar2000-05-111-1/+20
* Some infrastructure for supporting multiple pci busses on origin200/2000.Leo Dagum2000-05-113-195/+377
* SMP bootup and slave processor wakeup needs to be improved, but forKanoj Sarcar2000-05-031-1/+1
* Multicpu boot fixes: 1. make sure each cpu only picks up the interruptsKanoj Sarcar2000-05-021-6/+31
* Initialize the slave cpu tlb registers during bootup.Kanoj Sarcar2000-04-261-0/+2
* Enalbe interrupts on slave cpus.Kanoj Sarcar2000-04-261-0/+1
* Pick a name for the idle process on each cpu - easier for debugging.Kanoj Sarcar2000-04-241-0/+1
* scall_64.S: Move to kernel mode and enable intrs properly.Kanoj Sarcar2000-04-231-1/+5
* First cut at intercpu tlb flushing.Kanoj Sarcar2000-04-221-1/+1
* Per cpu tlbpid (asid) management for SMP. The asid cache is now perKanoj Sarcar2000-04-221-0/+2
* Merge with Linux 2.3.99-pre4.Ralf Baechle2000-04-191-1/+1
* Obligatory UP compile fixes after SMP code changes ...Kanoj Sarcar2000-04-171-4/+2
* Intercpu interrupt changes: add in dedicated intr levels for rescheduleKanoj Sarcar2000-04-171-8/+25
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