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* UP FPU state handling fixes: make sure to save the fpu state of theKanoj Sarcar2000-05-102-1/+5
* *** empty log message ***Ulf Carlsson2000-05-101-2/+0
* Add sys32_nanosleep to get syslogd working.Ulf Carlsson2000-05-102-3/+56
* Bomb little endian compiles for select32, so that the little endian guysKanoj Sarcar2000-05-081-0/+4
* Forkdrop IA64 version of sys32_select. Forklift the sparc64 version.Kanoj Sarcar2000-05-071-18/+79
* Forklift sys32_select from IA64 code.Kanoj Sarcar2000-05-042-1/+103
* More low level debugging stuff that can be turned on with DEBUG_MIPS64.Kanoj Sarcar2000-05-033-0/+29
* SMP bootup and slave processor wakeup needs to be improved, but forKanoj Sarcar2000-05-031-1/+1
* Change the output format of /proc/cpuinfo slightly to report the numberKanoj Sarcar2000-05-021-0/+2
* Multicpu boot fixes: 1. make sure each cpu only picks up the interruptsKanoj Sarcar2000-05-021-6/+31
* SMP debugging enhancements.Kanoj Sarcar2000-05-013-3/+4
* Print out cpu number in debug statements for SMP debugging.Kanoj Sarcar2000-04-281-4/+4
* Update defconfig files. Nastyness: 2.3.99 builds only with sysctlsRalf Baechle2000-04-283-6/+6
* Merge with 2.3.99-pre6.Ralf Baechle2000-04-283-1/+3
* Have the slave cpus go into the reschedule loop to pick up tasks andKanoj Sarcar2000-04-271-1/+1
* sigprocmask needs to be 32-bitized.Kanoj Sarcar2000-04-272-1/+20
* Initialize the slave cpu tlb registers during bootup.Kanoj Sarcar2000-04-261-0/+2
* Fix the sysentry debugging code: can never do a SAVE_SOME with intrsKanoj Sarcar2000-04-261-2/+5
* Enalbe interrupts on slave cpus.Kanoj Sarcar2000-04-261-0/+1
* Make the sysentry debugging code a little more versatile.Kanoj Sarcar2000-04-252-2/+8
* We use the ST0_CU0 bit to determine whether we are coming intoKanoj Sarcar2000-04-252-1/+13
* Pick a name for the idle process on each cpu - easier for debugging.Kanoj Sarcar2000-04-241-0/+1
* Fix the init_new_context code not to zap the percpu tlbpid array whenKanoj Sarcar2000-04-242-4/+4
* scall_64.S: Move to kernel mode and enable intrs properly.Kanoj Sarcar2000-04-235-23/+36
* Change all instances of __SMP__ to CONFIG_SMP and includeRalf Baechle2000-04-231-1/+3
* First cut at intercpu tlb flushing.Kanoj Sarcar2000-04-224-7/+66
* Per cpu tlbpid (asid) management for SMP. The asid cache is now perKanoj Sarcar2000-04-225-69/+91
* Delete unused junk "current_pgd".Kanoj Sarcar2000-04-212-2/+0
* Merge with Linux 2.3.99-pre4.Ralf Baechle2000-04-195-36/+104
* Pause fix for mips64.Ralf Baechle2000-04-193-2/+9
* Obligatory UP compile fixes after SMP code changes ...Kanoj Sarcar2000-04-171-4/+2
* Intercpu interrupt changes: add in dedicated intr levels for rescheduleKanoj Sarcar2000-04-172-24/+106
* More intercpu interrupt work: we now have a low level inter cpu intrKanoj Sarcar2000-04-172-26/+42
* Revert to the older irq - pendlevel mapping.Kanoj Sarcar2000-04-121-2/+2
* Move the irq to swlevel mappings a little bit to make space for theKanoj Sarcar2000-04-121-3/+4
* The state of the two interrupt mask registers for the 128 intr levelsKanoj Sarcar2000-04-121-4/+15
* Allow the low level ISR to be able to handle intrs on cpu A or B.Kanoj Sarcar2000-04-121-4/+6
* Moved set_cp0_status(SRB_DEV0 | SRB_DEV1, SRB_DEV0 | SRB_DEV1)Leo Dagum2000-04-101-1/+1
* Fixed bridge_init() so it sets registers for theLeo Dagum2000-04-101-2/+5
* New code to install and enable interrupt handlers for intercpu intrs.Kanoj Sarcar2000-04-082-8/+70
* For slave nodes, make sure not to touch the lower part of their localKanoj Sarcar2000-04-081-6/+1
* Fix this UP/MP microoptimization business with cpu_data[] andKanoj Sarcar2000-04-082-3/+3
* Take notes before I forget ...Kanoj Sarcar2000-04-081-0/+3
* Make it so that clock interrupts can be received on all cpus on the node.Kanoj Sarcar2000-04-081-2/+3
* Fix semaphores in modules.Ralf Baechle2000-04-071-0/+8
* Minor cleanup - do not invent new synonyms. Use ST0_IE instead of new nameKanoj Sarcar2000-04-071-4/+2
* Last tweak before enabling intrs on slave cpus ... set their intr maskKanoj Sarcar2000-04-071-0/+2
* Clear the TS bit from the master's status register (don't know whyKanoj Sarcar2000-04-074-6/+22
* Initial attempt at seperating out per-cpu and per-hub code that needs toKanoj Sarcar2000-04-074-26/+94
* Make the initial status register setting code for slaves similar to theKanoj Sarcar2000-04-061-16/+19
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