blob: 0938a1c6e8ae1f79b4d068f93ba446a763585aff (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
|
/* $Id: dcr.h,v 1.4 2001/03/09 17:56:37 davem Exp $ */
#ifndef _SPARC64_DCR_H
#define _SPARC64_DCR_H
/* UltraSparc-III Dispatch Control Register, ASR 0x12 */
#define DCR_OBS 0x0000000000000fc0 /* Observability Bus Controls */
#define DCR_BPE 0x0000000000000020 /* Branch Predict Enable */
#define DCR_RPE 0x0000000000000010 /* Return Address Prediction Enable */
#define DCR_SI 0x0000000000000008 /* Single Instruction Disable */
#define DCR_IFPOE 0x0000000000000002 /* IRQ FP Operation Enable */
#define DCR_MS 0x0000000000000001 /* Multi-Scalar dispatch */
#endif /* _SPARC64_DCR_H */
|
