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authorKanoj Sarcar <kanoj@engr.sgi.com>2000-07-24 22:51:11 +0000
committerKanoj Sarcar <kanoj@engr.sgi.com>2000-07-24 22:51:11 +0000
commit5c61649a624af1ba36e12a2dd5a8a5f45b26f898 (patch)
tree3c4ce513d0a6b886c5056855c702ffe5ceb67249 /arch/mips64/mm/r4xx0.c
parentfa338bfb88ff74c82d0e5d30a5265943c081dc53 (diff)
Introduce a new cpu specific routine to flush the L2 cache. This helps
the stability of DISCONTIGMEM kernels. The L2 flushing is needed during bootup. With this, the initialization hacks of scanning the node memories at boot up time is not needed any more.
Diffstat (limited to 'arch/mips64/mm/r4xx0.c')
-rw-r--r--arch/mips64/mm/r4xx0.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips64/mm/r4xx0.c b/arch/mips64/mm/r4xx0.c
index 2b3ca03a4..84078b824 100644
--- a/arch/mips64/mm/r4xx0.c
+++ b/arch/mips64/mm/r4xx0.c
@@ -2146,6 +2146,11 @@ static void r4k_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
}
}
+static void
+r4k_flush_cache_l2(void)
+{
+}
+
#ifdef DEBUG_TLBUPDATE
static unsigned long ehi_debug[NTLB_ENTRIES];
static unsigned long el0_debug[NTLB_ENTRIES];
@@ -2538,6 +2543,7 @@ void __init ld_mmu_r4xx0(void)
_flush_tlb_mm = r4k_flush_tlb_mm;
_flush_tlb_range = r4k_flush_tlb_range;
_flush_tlb_page = r4k_flush_tlb_page;
+ _flush_cache_l2 = r4k_flush_cache_l2;
update_mmu_cache = r4k_update_mmu_cache;