diff options
| author | Kanoj Sarcar <kanoj@engr.sgi.com> | 2000-09-13 19:24:13 +0000 |
|---|---|---|
| committer | Kanoj Sarcar <kanoj@engr.sgi.com> | 2000-09-13 19:24:13 +0000 |
| commit | 44990ac744d55caf3033500f7b131e85548e5bb7 (patch) | |
| tree | 733220df1f35a047385e789ffe5bc4fb2a932d62 /arch/mips64 | |
| parent | 53d4e2341c4d397cc49d7284c3bed4fb4592fa7b (diff) | |
virt_to_bus and bus_to_virt are gone! Implement true pci-dma api that
routes all dma's via the containing xbow's master hub.
Diffstat (limited to 'arch/mips64')
| -rw-r--r-- | arch/mips64/sgi-ip27/ip27-pci-dma.c | 2 | ||||
| -rw-r--r-- | arch/mips64/sgi-ip27/ip27-setup.c | 9 |
2 files changed, 9 insertions, 2 deletions
diff --git a/arch/mips64/sgi-ip27/ip27-pci-dma.c b/arch/mips64/sgi-ip27/ip27-pci-dma.c index 81e3e5c6f..b8d5f8776 100644 --- a/arch/mips64/sgi-ip27/ip27-pci-dma.c +++ b/arch/mips64/sgi-ip27/ip27-pci-dma.c @@ -42,7 +42,7 @@ void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, if (ret != NULL) { memset(ret, 0, size); - *dma_handle = virt_to_bus(ret); + *dma_handle = (bus_to_baddr[hwdev->bus->number] | __pa(ret)); } return ret; diff --git a/arch/mips64/sgi-ip27/ip27-setup.c b/arch/mips64/sgi-ip27/ip27-setup.c index f1f835939..141f29c2e 100644 --- a/arch/mips64/sgi-ip27/ip27-setup.c +++ b/arch/mips64/sgi-ip27/ip27-setup.c @@ -104,10 +104,12 @@ static void __init verify_mode(void) #define BASE_XBOW_PORT 8 /* Lowest external port */ unsigned int bus_to_cpu[256]; +unsigned long bus_to_baddr[256]; void __init pcibr_setup(cnodeid_t nid) { - int i, start, num, masterwid; + int i, start, num; + unsigned long masterwid; bridge_t *bridge; volatile u64 hubreg; nasid_t nasid, masternasid; @@ -149,6 +151,7 @@ void __init pcibr_setup(cnodeid_t nid) bus_to_wid[0] = 0x8; bus_to_nid[0] = 0; masterwid = 0xa; + bus_to_baddr[0] = 0xa100000000000000UL; } else if (partnum == XBOW_WIDGET_PART_NUM) { lboard_t *brd; klxbow_t *xbow_p; @@ -200,6 +203,7 @@ void __init pcibr_setup(cnodeid_t nid) printk("widget 0x%x is a bridge\n", i); bus_to_wid[num_bridges] = i; bus_to_nid[num_bridges] = nasid; + bus_to_baddr[num_bridges] = ((masterwid << 60) | (1UL << 56)); /* Barrier set */ num_bridges++; } } @@ -218,6 +222,9 @@ void __init pcibr_setup(cnodeid_t nid) bus_to_nid[1] = 0; bus_to_nid[2] = 0; + bus_to_baddr[0] = 0xa100000000000000UL; + bus_to_baddr[1] = 0xa100000000000000UL; + bus_to_baddr[2] = 0xa100000000000000UL; masterwid = 0xa; num_bridges = 3; } |