diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2001-03-09 20:33:35 +0000 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2001-03-09 20:33:35 +0000 |
commit | 116674acc97ba75a720329996877077d988443a2 (patch) | |
tree | 6a3f2ff0b612ae2ee8a3f3509370c9e6333a53b3 /include/asm-arm | |
parent | 71118c319fcae4a138f16e35b4f7e0a6d53ce2ca (diff) |
Merge with Linux 2.4.2.
Diffstat (limited to 'include/asm-arm')
39 files changed, 943 insertions, 543 deletions
diff --git a/include/asm-arm/arch-arc/io.h b/include/asm-arm/arch-arc/io.h index 22a30f583..dd80763d9 100644 --- a/include/asm-arm/arch-arc/io.h +++ b/include/asm-arm/arch-arc/io.h @@ -16,6 +16,49 @@ #define IO_SPACE_LIMIT 0xffffffff /* + * GCC is totally crap at loading/storing data. We try to persuade it + * to do the right thing by using these whereever possible instead of + * the above. + */ +#define __arch_base_getb(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_getl(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_putb(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "strb %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +#define __arch_base_putl(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "str %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +/* * We use two different types of addressing - PC style addresses, and ARM * addresses. PC style accesses the PC hardware with the normal PC IO * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ @@ -75,7 +118,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ "tst %2, #0x80000000\n\t" \ "mov %0, %4\n\t" \ "addeq %0, %0, %3\n\t" \ - "ldr" ##instr## " %1, [%0, %2, lsl #2] @ in"###fnsuffix \ + "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \ : "=&r" (temp), "=r" (value) \ : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ : "cc"); \ @@ -203,22 +246,7 @@ DECLARE_IO(int,l,"") #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) #define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) - -/* - * Translated address IO functions - * - * IO address has already been translated to a virtual address - */ -#define outb_t(v,p) \ - (*(volatile unsigned char *)(p) = (v)) - -#define inb_t(p) \ - (*(volatile unsigned char *)(p)) - -#define outl_t(v,p) \ - (*(volatile unsigned long *)(p) = (v)) - -#define inl_t(p) \ - (*(volatile unsigned long *)(p)) +/* the following macro is depreciated */ +#define ioaddr(port) __ioaddr((port)) #endif diff --git a/include/asm-arm/arch-arc/irqs.h b/include/asm-arm/arch-arc/irqs.h index 2cb34d39f..5a15c794f 100644 --- a/include/asm-arm/arch-arc/irqs.h +++ b/include/asm-arm/arch-arc/irqs.h @@ -52,4 +52,9 @@ #define IRQ_TIMER IRQ_TIMER0 +/* + * This is the offset of the FIQ "IRQ" numbers + */ +#define FIQ_START 64 + #define irq_cannonicalize(i) (i) diff --git a/include/asm-arm/arch-cl7500/io.h b/include/asm-arm/arch-cl7500/io.h index 37f44316c..20f2275f5 100644 --- a/include/asm-arm/arch-cl7500/io.h +++ b/include/asm-arm/arch-cl7500/io.h @@ -13,6 +13,49 @@ #define IO_SPACE_LIMIT 0xffffffff /* + * GCC is totally crap at loading/storing data. We try to persuade it + * to do the right thing by using these whereever possible instead of + * the above. + */ +#define __arch_base_getb(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_getl(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_putb(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "strb %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +#define __arch_base_putl(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "str %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +/* * We use two different types of addressing - PC style addresses, and ARM * addresses. PC style accesses the PC hardware with the normal PC IO * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ @@ -72,7 +115,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ "tst %2, #0x80000000\n\t" \ "mov %0, %4\n\t" \ "addeq %0, %0, %3\n\t" \ - "ldr" ##instr## " %1, [%0, %2, lsl #2] @ in"###fnsuffix \ + "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \ : "=&r" (temp), "=r" (value) \ : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ : "cc"); \ @@ -193,22 +236,7 @@ DECLARE_IO(int,l,"") #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) #define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) - -/* - * Translated address IO functions - * - * IO address has already been translated to a virtual address - */ -#define outb_t(v,p) \ - (*(volatile unsigned char *)(p) = (v)) - -#define inb_t(p) \ - (*(volatile unsigned char *)(p)) - -#define outl_t(v,p) \ - (*(volatile unsigned long *)(p) = (v)) - -#define inl_t(p) \ - (*(volatile unsigned long *)(p)) +/* the following macro is depreciated */ +#define ioaddr(port) __ioaddr((port)) #endif diff --git a/include/asm-arm/arch-cl7500/irqs.h b/include/asm-arm/arch-cl7500/irqs.h index 22c9ab23a..bca7b35d5 100644 --- a/include/asm-arm/arch-cl7500/irqs.h +++ b/include/asm-arm/arch-cl7500/irqs.h @@ -56,4 +56,9 @@ #define FIQ_INT8 6 #define FIQ_FORCE 7 +/* + * This is the offset of the FIQ "IRQ" numbers + */ +#define FIQ_START 64 + #define IRQ_TIMER IRQ_TIMER0 diff --git a/include/asm-arm/arch-ebsa110/io.h b/include/asm-arm/arch-ebsa110/io.h index 73172dcd7..3e186be71 100644 --- a/include/asm-arm/arch-ebsa110/io.h +++ b/include/asm-arm/arch-ebsa110/io.h @@ -16,186 +16,11 @@ #define IO_SPACE_LIMIT 0xffffffff /* - * We use two different types of addressing - PC style addresses, and ARM - * addresses. PC style accesses the PC hardware with the normal PC IO - * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ - * and are translated to the start of IO. Note that all addresses are - * shifted left! + * Generic virtual read/write */ -#define __PORT_PCIO(x) (!((x) & 0x80000000)) +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) -/* - * Dynamic IO functions - let the compiler - * optimize the expressions - */ -#define DECLARE_DYN_OUT(fnsuffix,instr) \ -extern __inline__ void __out##fnsuffix (unsigned int value, unsigned int port) \ -{ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "tst %2, #0x80000000\n\t" \ - "mov %0, %4\n\t" \ - "addeq %0, %0, %3\n\t" \ - "str" ##instr## " %1, [%0, %2, lsl #2] @ out"###fnsuffix \ - : "=&r" (temp) \ - : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ - : "cc"); \ -} - -#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ -{ \ - unsigned long temp, value; \ - __asm__ __volatile__( \ - "tst %2, #0x80000000\n\t" \ - "mov %0, %4\n\t" \ - "addeq %0, %0, %3\n\t" \ - "ldr" ##instr## " %1, [%0, %2, lsl #2] @ in"###fnsuffix \ - : "=&r" (temp), "=r" (value) \ - : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ - : "cc"); \ - return (unsigned sz)value; \ -} - -extern __inline__ unsigned int __ioaddr (unsigned int port) \ -{ \ - if (__PORT_PCIO(port)) \ - return (unsigned int)(PCIO_BASE + (port << 2)); \ - else \ - return (unsigned int)(IO_BASE + (port << 2)); \ -} - -#define DECLARE_IO(sz,fnsuffix,instr) \ - DECLARE_DYN_OUT(fnsuffix,instr) \ - DECLARE_DYN_IN(sz,fnsuffix,instr) - -DECLARE_IO(char,b,"b") -DECLARE_IO(short,w,"") -DECLARE_IO(int,l,"") - -#undef DECLARE_IO -#undef DECLARE_DYN_OUT -#undef DECLARE_DYN_IN - -/* - * Constant address IO functions - * - * These have to be macros for the 'J' constraint to work - - * +/-4096 immediate operand. - */ -#define __outbc(value,port) \ -({ \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inbc(port) \ -({ \ - unsigned char result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result; \ -}) - -#define __outwc(value,port) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outwc" \ - : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outwc" \ - : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inwc(port) \ -({ \ - unsigned short result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result & 0xffff; \ -}) - -#define __outlc(v,p) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inlc(port) \ -({ \ - unsigned long result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result; \ -}) - -#define __ioaddrc(port) \ -({ \ - unsigned long addr; \ - if (__PORT_PCIO((port))) \ - addr = PCIO_BASE + ((port) << 2); \ - else \ - addr = IO_BASE + ((port) << 2); \ - addr; \ -}) - -#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) -#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) -#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) -#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) -#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) -#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) -#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) - -/* - * Translated address IO functions - * - * IO address has already been translated to a virtual address - */ -#define outb_t(v,p) \ - (*(volatile unsigned char *)(p) = (v)) - -#define inb_t(p) \ - (*(volatile unsigned char *)(p)) - -#define outl_t(v,p) \ - (*(volatile unsigned long *)(p) = (v)) - -#define inl_t(p) \ - (*(volatile unsigned long *)(p)) +#define __io(p) (ISAIO_BASE + ((p) << 2)) #endif diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h index 96d7e3354..e46fda443 100644 --- a/include/asm-arm/arch-ebsa110/memory.h +++ b/include/asm-arm/arch-ebsa110/memory.h @@ -23,6 +23,12 @@ #define TASK_SIZE_26 (0x04000000UL) /* + * This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) + +/* * Page offset: 3GB */ #define PAGE_OFFSET (0xc0000000UL) diff --git a/include/asm-arm/arch-ebsa110/processor.h b/include/asm-arm/arch-ebsa110/processor.h deleted file mode 100644 index 1c0561018..000000000 --- a/include/asm-arm/arch-ebsa110/processor.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa110/processor.h - * - * Copyright (C) 1996-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 21-Mar-1999 RMK Added asm/arch/memory.h - */ - -#ifndef __ASM_ARCH_PROCESSOR_H -#define __ASM_ARCH_PROCESSOR_H - -/* - * Bus types - */ -#define EISA_bus 0 -#define EISA_bus__is_a_macro /* for versions in ksyms.c */ -#define MCA_bus 0 -#define MCA_bus__is_a_macro /* for versions in ksyms.c */ - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) - -#endif diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h index e06ed893a..a65ec3fe6 100644 --- a/include/asm-arm/arch-ebsa285/io.h +++ b/include/asm-arm/arch-ebsa285/io.h @@ -19,7 +19,7 @@ /* * Translation of various region addresses to virtual addresses */ -#define __io_pci(a) (PCIO_BASE + (a)) +#define __io(a) (PCIO_BASE + (a)) #if 1 #define __mem_pci(a) ((unsigned long)(a)) #define __mem_isa(a) (PCIMEM_BASE + (unsigned long)(a)) @@ -42,41 +42,11 @@ extern __inline__ unsigned long ___mem_isa(unsigned long a) #define __mem_isa(a) ___mem_isa((unsigned long)(a)) #endif -/* the following macro is depreciated */ -#define __ioaddr(p) __io_pci(p) - /* * Generic virtual read/write */ -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getl(a) (*(volatile unsigned int *)(a)) - -extern __inline__ unsigned int __arch_getw(unsigned long a) -{ - unsigned int value; - __asm__ __volatile__("ldr%?h %0, [%1, #0] @ getw" - : "=&r" (value) - : "r" (a)); - return value; -} - - -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) - -extern __inline__ void __arch_putw(unsigned int value, unsigned long a) -{ - __asm__ __volatile__("str%?h %0, [%1, #0] @ putw" - : : "r" (value), "r" (a)); -} - -#define inb(p) __arch_getb(__io_pci(p)) -#define inw(p) __arch_getw(__io_pci(p)) -#define inl(p) __arch_getl(__io_pci(p)) - -#define outb(v,p) __arch_putb(v,__io_pci(p)) -#define outw(v,p) __arch_putw(v,__io_pci(p)) -#define outl(v,p) __arch_putl(v,__io_pci(p)) +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) #include <asm/hardware/dec21285.h> @@ -85,20 +55,9 @@ extern __inline__ void __arch_putw(unsigned int value, unsigned long a) * and convert a PCI memory address to a physical * address for the page tables. */ -#define valid_ioaddr(off,sz) ((off) < 0x80000000 && (off) + (sz) <= 0x80000000) -#define io_to_phys(off) ((off) + DC21285_PCI_MEM) +#define iomem_valid_addr(iomem,sz) \ + ((iomem) < 0x80000000 && (iomem) + (sz) <= 0x80000000) -/* - * ioremap takes a PCI memory address, as specified in - * linux/Documentation/IO-mapping.txt - */ -#define __arch_ioremap(off,size,nocache) \ -({ \ - unsigned long _off = (off), _size = (size); \ - void *_ret = (void *)0; \ - if (valid_ioaddr(_off, _size)) \ - _ret = __ioremap(io_to_phys(_off), _size, 0); \ - _ret; \ -}) +#define iomem_to_phys(iomem) ((iomem) + DC21285_PCI_MEM) #endif diff --git a/include/asm-arm/arch-nexuspci/io.h b/include/asm-arm/arch-nexuspci/io.h index 81033afa2..91de8ff9b 100644 --- a/include/asm-arm/arch-nexuspci/io.h +++ b/include/asm-arm/arch-nexuspci/io.h @@ -12,7 +12,7 @@ /* * Translation of various region addresses to virtual addresses */ -#define __io_pci(a) (PCIO_BASE + (a)) +#define __io(a) (PCIO_BASE + (a)) #if 1 #define __mem_pci(a) ((unsigned long)(a)) #define __mem_isa(a) (PCIMEM_BASE + (unsigned long)(a)) @@ -36,61 +36,19 @@ extern __inline__ unsigned long ___mem_isa(unsigned long a) #define __mem_isa(a) ___mem_isa((unsigned long)(a)) #endif -/* the following macro is depreciated */ -#define __ioaddr(p) __io_pci(p) - /* * Generic virtual read/write */ -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getl(a) (*(volatile unsigned int *)(a)) - -extern __inline__ unsigned int __arch_getw(unsigned long a) -{ - unsigned int value; - __asm__ __volatile__("ldr%?h %0, [%1, #0] @ getw" - : "=&r" (value) - : "r" (a)); - return value; -} - - -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) - -extern __inline__ void __arch_putw(unsigned int value, unsigned long a) -{ - __asm__ __volatile__("str%?h %0, [%1, #0] @ putw" - : : "r" (value), "r" (a)); -} - -#define inb(p) __arch_getb(__io_pci(p)) -#define inw(p) __arch_getw(__io_pci(p)) -#define inl(p) __arch_getl(__io_pci(p)) - -#define outb(v,p) __arch_putb(v,__io_pci(p)) -#define outw(v,p) __arch_putw(v,__io_pci(p)) -#define outl(v,p) __arch_putl(v,__io_pci(p)) +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) /* * ioremap support - validate a PCI memory address, * and convert a PCI memory address to a physical * address for the page tables. */ -#define valid_ioaddr(off,sz) ((off) < 0x80000000 && (off) + (sz) <= 0x80000000) -#define io_to_phys(off) ((off) + PLX_MEM_START) - -/* - * ioremap takes a PCI memory address, as specified in - * linux/Documentation/IO-mapping.txt - */ -#define __arch_ioremap(off,size,nocache) \ -({ \ - unsigned long _off = (off), _size = (size); \ - void *_ret = (void *)0; \ - if (valid_ioaddr(_off, _size)) \ - _ret = __ioremap(io_to_phys(_off), _size, 0); \ - _ret; \ -}) +#define iomem_valid_addr(iomem,sz) \ + ((iomem) < 0x80000000 && (iomem) + (sz) <= 0x80000000) +#define iomem_to_phys(iomem) ((iomem) + PLX_MEM_START) #endif diff --git a/include/asm-arm/arch-rpc/io.h b/include/asm-arm/arch-rpc/io.h index 81f201aae..86f124807 100644 --- a/include/asm-arm/arch-rpc/io.h +++ b/include/asm-arm/arch-rpc/io.h @@ -16,6 +16,49 @@ #define IO_SPACE_LIMIT 0xffffffff /* + * GCC is totally crap at loading/storing data. We try to persuade it + * to do the right thing by using these whereever possible instead of + * the above. + */ +#define __arch_base_getb(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_getl(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_putb(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "strb %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +#define __arch_base_putl(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "str %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +/* * We use two different types of addressing - PC style addresses, and ARM * addresses. PC style accesses the PC hardware with the normal PC IO * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ @@ -74,7 +117,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ "tst %2, #0x80000000\n\t" \ "mov %0, %4\n\t" \ "addeq %0, %0, %3\n\t" \ - "ldr" ##instr## " %1, [%0, %2, lsl #2] @ in"###fnsuffix \ + "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \ : "=&r" (temp), "=r" (value) \ : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ : "cc"); \ @@ -195,22 +238,7 @@ DECLARE_IO(int,l,"") #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) #define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) - -/* - * Translated address IO functions - * - * IO address has already been translated to a virtual address - */ -#define outb_t(v,p) \ - (*(volatile unsigned char *)(p) = (v)) - -#define inb_t(p) \ - (*(volatile unsigned char *)(p)) - -#define outl_t(v,p) \ - (*(volatile unsigned long *)(p) = (v)) - -#define inl_t(p) \ - (*(volatile unsigned long *)(p)) +/* the following macro is depreciated */ +#define ioaddr(port) __ioaddr((port)) #endif diff --git a/include/asm-arm/arch-rpc/irqs.h b/include/asm-arm/arch-rpc/irqs.h index 72ee47185..27c35b05b 100644 --- a/include/asm-arm/arch-rpc/irqs.h +++ b/include/asm-arm/arch-rpc/irqs.h @@ -37,5 +37,10 @@ #define FIQ_EXPANSIONCARD 6 #define FIQ_FORCE 7 +/* + * This is the offset of the FIQ "IRQ" numbers + */ +#define FIQ_START 64 + #define IRQ_TIMER IRQ_TIMER0 diff --git a/include/asm-arm/arch-sa1100/SA-1101.h b/include/asm-arm/arch-sa1100/SA-1101.h index 854a6d292..a2e194a67 100644 --- a/include/asm-arm/arch-sa1100/SA-1101.h +++ b/include/asm-arm/arch-sa1100/SA-1101.h @@ -230,7 +230,7 @@ * IEEE_Addr Forward transfer address register * IEEE_Status Port IO signal status register * IEEE_IntStatus Port interrupts status register - * IEEE_FifoLevels Rx and Tx FIFO interupt generation levels + * IEEE_FifoLevels Rx and Tx FIFO interrupt generation levels * IEEE_InitTime Forward timeout counter initial value * IEEE_TimerStatus Forward timeout counter current value * IEEE_FifoReset Reset forward transfer FIFO diff --git a/include/asm-arm/arch-sa1100/SA-1111.h b/include/asm-arm/arch-sa1100/SA-1111.h index 34c303261..00e85126d 100644 --- a/include/asm-arm/arch-sa1100/SA-1111.h +++ b/include/asm-arm/arch-sa1100/SA-1111.h @@ -11,6 +11,8 @@ #ifndef _ASM_ARCH_SA1111 #define _ASM_ARCH_SA1111 +#include <asm/arch/bitfield.h> + /* * Macro that calculates real address for registers in the SA-1111 */ @@ -18,7 +20,21 @@ #define _SA1111( x ) ((x) + SA1111_BASE) /* - * System Bus Interface (SBI) + * 26 bits of the SA-1110 address bus are available to the SA-1111. + * Use these when feeding target addresses to the DMA engines. + */ + +#define SA1111_ADDR_WIDTH (26) +#define SA1111_ADDR_MASK ((1<<SA1111_ADDR_WIDTH)-1) +#define SA1111_DMA_ADDR(x) ((x)&SA1111_ADDR_MASK) + +/* + * Don't ask the (SAC) DMA engines to move less than this amount. + */ + +#define SA1111_SAC_DMA_MIN_XFER (0x800) + +/* System Bus Interface (SBI) * * Registers * SKCR Control Register @@ -57,6 +73,7 @@ #define SMCR_DRAC_0 (1<<2) #define SMCR_DRAC_1 (1<<3) #define SMCR_DRAC_2 (1<<4) +#define SMCR_DRAC Fld(3, 2) #define SMCR_CLAT (1<<5) #define SKID_SIREV_MASK (0x000000f0) @@ -103,6 +120,186 @@ #endif /* LANGUAGE == C */ +#define SKPCR_UCLKEN (1<<0) +#define SKPCR_ACCLKEN (1<<1) +#define SKPCR_I2SCLKEN (1<<2) +#define SKPCR_L3CLKEN (1<<3) +#define SKPCR_SCLKEN (1<<4) +#define SKPCR_PMCLKEN (1<<5) +#define SKPCR_PTCLKEN (1<<6) +#define SKPCR_DCLKEN (1<<7) +#define SKPCR_PWMCLKEN (1<<8) + +/* + * Serial Audio Controller + * + * Registers + * SACR0 Serial Audio Common Control Register + * SACR1 Serial Audio Alternate Mode (I2C/MSB) Control Register + * SACR2 Serial Audio AC-link Control Register + * SASR0 Serial Audio I2S/MSB Interface & FIFO Status Register + * SASR1 Serial Audio AC-link Interface & FIFO Status Register + * SASCR Serial Audio Status Clear Register + * L3_CAR L3 Control Bus Address Register + * L3_CDR L3 Control Bus Data Register + * ACCAR AC-link Command Address Register + * ACCDR AC-link Command Data Register + * ACSAR AC-link Status Address Register + * ACSDR AC-link Status Data Register + * SADTCS Serial Audio DMA Transmit Control/Status Register + * SADTSA Serial Audio DMA Transmit Buffer Start Address A + * SADTCA Serial Audio DMA Transmit Buffer Count Register A + * SADTSB Serial Audio DMA Transmit Buffer Start Address B + * SADTCB Serial Audio DMA Transmit Buffer Count Register B + * SADRCS Serial Audio DMA Receive Control/Status Register + * SADRSA Serial Audio DMA Receive Buffer Start Address A + * SADRCA Serial Audio DMA Receive Buffer Count Register A + * SADRSB Serial Audio DMA Receive Buffer Start Address B + * SADRCB Serial Audio DMA Receive Buffer Count Register B + * SAITR Serial Audio Interrupt Test Register + * SADR Serial Audio Data Register (16 x 32-bit) + */ + +#define _SACR0 _SA1111( 0x0600 ) +#define _SACR1 _SA1111( 0x0604 ) +#define _SACR2 _SA1111( 0x0608 ) +#define _SASR0 _SA1111( 0x060c ) +#define _SASR1 _SA1111( 0x0610 ) +#define _SASCR _SA1111( 0x0618 ) +#define _L3_CAR _SA1111( 0x061c ) +#define _L3_CDR _SA1111( 0x0620 ) +#define _ACCAR _SA1111( 0x0624 ) +#define _ACCDR _SA1111( 0x0628 ) +#define _ACSAR _SA1111( 0x062c ) +#define _ACSDR _SA1111( 0x0630 ) +#define _SADTCS _SA1111( 0x0634 ) +#define _SADTSA _SA1111( 0x0638 ) +#define _SADTCA _SA1111( 0x063c ) +#define _SADTSB _SA1111( 0x0640 ) +#define _SADTCB _SA1111( 0x0644 ) +#define _SADRCS _SA1111( 0x0648 ) +#define _SADRSA _SA1111( 0x064c ) +#define _SADRCA _SA1111( 0x0650 ) +#define _SADRSB _SA1111( 0x0654 ) +#define _SADRCB _SA1111( 0x0658 ) +#define _SAITR _SA1111( 0x065c ) +#define _SADR _SA1111( 0x0680 ) + +#if LANGUAGE == C + +#define SACR0 (*((volatile Word *) SA1111_p2v (_SACR0))) +#define SACR1 (*((volatile Word *) SA1111_p2v (_SACR1))) +#define SACR2 (*((volatile Word *) SA1111_p2v (_SACR2))) +#define SASR0 (*((volatile Word *) SA1111_p2v (_SASR0))) +#define SASR1 (*((volatile Word *) SA1111_p2v (_SASR1))) +#define SASCR (*((volatile Word *) SA1111_p2v (_SASCR))) +#define L3_CAR (*((volatile Word *) SA1111_p2v (_L3_CAR))) +#define L3_CDR (*((volatile Word *) SA1111_p2v (_L3_CDR))) +#define ACCAR (*((volatile Word *) SA1111_p2v (_ACCAR))) +#define ACCDR (*((volatile Word *) SA1111_p2v (_ACCDR))) +#define ACSAR (*((volatile Word *) SA1111_p2v (_ACSAR))) +#define ACSDR (*((volatile Word *) SA1111_p2v (_ACSDR))) +#define SADTCS (*((volatile Word *) SA1111_p2v (_SADTCS))) +#define SADTSA (*((volatile Word *) SA1111_p2v (_SADTSA))) +#define SADTCA (*((volatile Word *) SA1111_p2v (_SADTCA))) +#define SADTSB (*((volatile Word *) SA1111_p2v (_SADTSB))) +#define SADTCB (*((volatile Word *) SA1111_p2v (_SADTCB))) +#define SADRCS (*((volatile Word *) SA1111_p2v (_SADRCS))) +#define SADRSA (*((volatile Word *) SA1111_p2v (_SADRSA))) +#define SADRCA (*((volatile Word *) SA1111_p2v (_SADRCA))) +#define SADRSB (*((volatile Word *) SA1111_p2v (_SADRSB))) +#define SADRCB (*((volatile Word *) SA1111_p2v (_SADRCB))) +#define SAITR (*((volatile Word *) SA1111_p2v (_SAITR))) +#define SADR (*((volatile Word *) SA1111_p2v (_SADR))) + +#endif /* LANGUAGE == C */ + +#define SACR0_ENB (1<<0) +#define SACR0_BCKD (1<<2) +#define SACR0_RST (1<<3) + +#define SACR1_AMSL (1<<0) +#define SACR1_L3EN (1<<1) +#define SACR1_L3MB (1<<2) +#define SACR1_DREC (1<<3) +#define SACR1_DRPL (1<<4) +#define SACR1_ENLBF (1<<5) + +#define SACR2_TS3V (1<<0) +#define SACR2_TS4V (1<<1) +#define SACR2_WKUP (1<<2) +#define SACR2_DREC (1<<3) +#define SACR2_DRPL (1<<4) +#define SACR2_ENLBF (1<<5) +#define SACR2_RESET (1<<5) + +#define SASR0_TNF (1<<0) +#define SASR0_RNE (1<<1) +#define SASR0_BSY (1<<2) +#define SASR0_TFS (1<<3) +#define SASR0_RFS (1<<4) +#define SASR0_TUR (1<<5) +#define SASR0_ROR (1<<6) +#define SASR0_L3WD (1<<16) +#define SASR0_L3RD (1<<17) + +#define SASR1_TNF (1<<0) +#define SASR1_RNE (1<<1) +#define SASR1_BSY (1<<2) +#define SASR1_TFS (1<<3) +#define SASR1_RFS (1<<4) +#define SASR1_TUR (1<<5) +#define SASR1_ROR (1<<6) +#define SASR1_CADT (1<<16) +#define SASR1_SADR (1<<17) +#define SASR1_RSTO (1<<18) +#define SASR1_CLPM (1<<19) +#define SASR1_CRDY (1<<20) +#define SASR1_RS3V (1<<21) +#define SASR1_RS4V (1<<22) + +#define SASCR_TUR (1<<5) +#define SASCR_ROR (1<<6) +#define SASCR_DTS (1<<16) +#define SASCR_RDD (1<<17) +#define SASCR_STO (1<<18) + +#define SADTCS_TDEN (1<<0) +#define SADTCS_TDIE (1<<1) +#define SADTCS_TDBDA (1<<3) +#define SADTCS_TDSTA (1<<4) +#define SADTCS_TDBDB (1<<5) +#define SADTCS_TDSTB (1<<6) +#define SADTCS_TBIU (1<<7) + +#define SADRCS_RDEN (1<<0) +#define SADRCS_RDIE (1<<1) +#define SADRCS_RDBDA (1<<3) +#define SADRCS_RDSTA (1<<4) +#define SADRCS_RDBDB (1<<5) +#define SADRCS_RDSTB (1<<6) +#define SADRCS_RBIU (1<<7) + +#define SAD_CS_DEN (1<<0) +#define SAD_CS_DIE (1<<1) /* Not functional on metal 1 */ +#define SAD_CS_DBDA (1<<3) /* Not functional on metal 1 */ +#define SAD_CS_DSTA (1<<4) +#define SAD_CS_DBDB (1<<5) /* Not functional on metal 1 */ +#define SAD_CS_DSTB (1<<6) +#define SAD_CS_BIU (1<<7) /* Not functional on metal 1 */ + +#define SAITR_TFS (1<<0) +#define SAITR_RFS (1<<1) +#define SAITR_TUR (1<<2) +#define SAITR_ROR (1<<3) +#define SAITR_CADT (1<<4) +#define SAITR_SADR (1<<5) +#define SAITR_RSTO (1<<6) +#define SAITR_TDBDA (1<<8) +#define SAITR_TDBDB (1<<9) +#define SAITR_RDBDA (1<<10) +#define SAITR_RDBDB (1<<11) + /* * General-Purpose I/O Interface * @@ -215,6 +412,154 @@ #endif /* LANGUAGE == C */ /* + * PS/2 Trackpad and Mouse Interfaces + * + * Registers (prefix kbd applies to trackpad interface, mse to mouse) + * KBDCR Control Register + * KBDSTAT Status Register + * KBDDATA Transmit/Receive Data register + * KBDCLKDIV Clock Division Register + * KBDPRECNT Clock Precount Register + * KBDTEST1 Test register 1 + * KBDTEST2 Test register 2 + * KBDTEST3 Test register 3 + * KBDTEST4 Test register 4 + * MSECR + * MSESTAT + * MSEDATA + * MSECLKDIV + * MSEPRECNT + * MSETEST1 + * MSETEST2 + * MSETEST3 + * MSETEST4 + * + */ + +#define _KBD( x ) _SA1111( 0x0A00 ) +#define _MSE( x ) _SA1111( 0x0C00 ) + +#define _KBDCR _SA1111( 0x0A00 ) +#define _KBDSTAT _SA1111( 0x0A04 ) +#define _KBDDATA _SA1111( 0x0A08 ) +#define _KBDCLKDIV _SA1111( 0x0A0C ) +#define _KBDPRECNT _SA1111( 0x0A10 ) +#define _MSECR _SA1111( 0x0C00 ) +#define _MSESTAT _SA1111( 0x0C04 ) +#define _MSEDATA _SA1111( 0x0C08 ) +#define _MSECLKDIV _SA1111( 0x0C10 ) +#define _MSEPRECNT _SA1111( 0x0C14 ) + +#if ( LANGUAGE == C ) + +#define KBDCR (*((volatile Word *) SA1111_p2v (_KBDCR))) +#define KBDSTAT (*((volatile Word *) SA1111_p2v (_KBDSTAT))) +#define KBDDATA (*((volatile Word *) SA1111_p2v (_KBDDATA))) +#define KBDCLKDIV (*((volatile Word *) SA1111_p2v (_KBDCLKDIV))) +#define KBDPRECNT (*((volatile Word *) SA1111_p2v (_KBDPRECNT))) +#define KBDTEST1 (*((volatile Word *) SA1111_p2v (_KBDTEST1))) +#define KBDTEST2 (*((volatile Word *) SA1111_p2v (_KBDTEST2))) +#define KBDTEST3 (*((volatile Word *) SA1111_p2v (_KBDTEST3))) +#define KBDTEST4 (*((volatile Word *) SA1111_p2v (_KBDTEST4))) +#define MSECR (*((volatile Word *) SA1111_p2v (_MSECR))) +#define MSESTAT (*((volatile Word *) SA1111_p2v (_MSESTAT))) +#define MSEDATA (*((volatile Word *) SA1111_p2v (_MSEDATA))) +#define MSECLKDIV (*((volatile Word *) SA1111_p2v (_MSECLKDIV))) +#define MSEPRECNT (*((volatile Word *) SA1111_p2v (_MSEPRECNT))) +#define MSETEST1 (*((volatile Word *) SA1111_p2v (_MSETEST1))) +#define MSETEST2 (*((volatile Word *) SA1111_p2v (_MSETEST2))) +#define MSETEST3 (*((volatile Word *) SA1111_p2v (_MSETEST3))) +#define MSETEST4 (*((volatile Word *) SA1111_p2v (_MSETEST4))) + +#define KBDCR_ENA 0x08 +#define KBDCR_FKD 0x02 +#define KBDCR_FKC 0x01 + +#define KBDSTAT_TXE 0x80 +#define KBDSTAT_TXB 0x40 +#define KBDSTAT_RXF 0x20 +#define KBDSTAT_RXB 0x10 +#define KBDSTAT_ENA 0x08 +#define KBDSTAT_RXP 0x04 +#define KBDSTAT_KBD 0x02 +#define KBDSTAT_KBC 0x01 + +#define KBDCLKDIV_DivVal Fld(4,0) + +#define MSECR_ENA 0x08 +#define MSECR_FKD 0x02 +#define MSECR_FKC 0x01 + +#define MSESTAT_TXE 0x80 +#define MSESTAT_TXB 0x40 +#define MSESTAT_RXF 0x20 +#define MSESTAT_RXB 0x10 +#define MSESTAT_ENA 0x08 +#define MSESTAT_RXP 0x04 +#define MSESTAT_MSD 0x02 +#define MSESTAT_MSC 0x01 + +#define MSECLKDIV_DivVal Fld(4,0) + +#define KBDTEST1_CD 0x80 +#define KBDTEST1_RC1 0x40 +#define KBDTEST1_MC 0x20 +#define KBDTEST1_C Fld(2,3) +#define KBDTEST1_T2 0x40 +#define KBDTEST1_T1 0x20 +#define KBDTEST1_T0 0x10 +#define KBDTEST2_TICBnRES 0x08 +#define KBDTEST2_RKC 0x04 +#define KBDTEST2_RKD 0x02 +#define KBDTEST2_SEL 0x01 +#define KBDTEST3_ms_16 0x80 +#define KBDTEST3_us_64 0x40 +#define KBDTEST3_us_16 0x20 +#define KBDTEST3_DIV8 0x10 +#define KBDTEST3_DIn 0x08 +#define KBDTEST3_CIn 0x04 +#define KBDTEST3_KD 0x02 +#define KBDTEST3_KC 0x01 +#define KBDTEST4_BC12 0x80 +#define KBDTEST4_BC11 0x40 +#define KBDTEST4_TRES 0x20 +#define KBDTEST4_CLKOE 0x10 +#define KBDTEST4_CRES 0x08 +#define KBDTEST4_RXB 0x04 +#define KBDTEST4_TXB 0x02 +#define KBDTEST4_SRX 0x01 + +#define MSETEST1_CD 0x80 +#define MSETEST1_RC1 0x40 +#define MSETEST1_MC 0x20 +#define MSETEST1_C Fld(2,3) +#define MSETEST1_T2 0x40 +#define MSETEST1_T1 0x20 +#define MSETEST1_T0 0x10 +#define MSETEST2_TICBnRES 0x08 +#define MSETEST2_RKC 0x04 +#define MSETEST2_RKD 0x02 +#define MSETEST2_SEL 0x01 +#define MSETEST3_ms_16 0x80 +#define MSETEST3_us_64 0x40 +#define MSETEST3_us_16 0x20 +#define MSETEST3_DIV8 0x10 +#define MSETEST3_DIn 0x08 +#define MSETEST3_CIn 0x04 +#define MSETEST3_KD 0x02 +#define MSETEST3_KC 0x01 +#define MSETEST4_BC12 0x80 +#define MSETEST4_BC11 0x40 +#define MSETEST4_TRES 0x20 +#define MSETEST4_CLKOE 0x10 +#define MSETEST4_CRES 0x08 +#define MSETEST4_RXB 0x04 +#define MSETEST4_TXB 0x02 +#define MSETEST4_SRX 0x01 + +#endif /* LANGUAGE == C */ + +/* * PCMCIA Interface * * Registers diff --git a/include/asm-arm/arch-sa1100/thinclient.h b/include/asm-arm/arch-sa1100/graphicsclient.h index 830152117..eb1789bac 100644 --- a/include/asm-arm/arch-sa1100/thinclient.h +++ b/include/asm-arm/arch-sa1100/graphicsclient.h @@ -1,10 +1,11 @@ /* - * linux/include/asm-arm/arch-sa1100/thinclient.h + * linux/include/asm-arm/arch-sa1100/graphicsclient.h * * Created 2000/06/11 by Nicolas Pitre <nico@cam.org> + * Modified 7/27/00 by Woojung <whuh@applieddata.net> * - * This file contains the hardware specific definitions for the ADS - * ThinClient/GraphicsClient boards. + * This file contains the hardware specific definitions for the + * ADS GraphicsClient/ThinClient boards. */ #ifndef __ASM_ARCH_HARDWARE_H @@ -27,19 +28,14 @@ #define _ADS_CS_STATUS 0x10040000 /* PCMCIA status reg */ #define ADS_CS_ST_A_READY (1 << 0) /* Socket A Card Ready */ -#define ADS_CS_ST_B_READY (1 << 1) /* Socket B Card Ready */ #define ADS_CS_ST_A_CD (1 << 2) /* Socket A Card Detect */ -#define ADS_CS_ST_B_CD (1 << 3) /* Socket B Card Detect */ #define ADS_CS_ST_A_BUSY (1 << 4) /* Socket A Card Busy */ -#define ADS_CS_ST_B_BUSY (1 << 5) /* Socket B Card Busy */ #define ADS_CS_ST_A_STS (1 << 6) /* Socket A Card STS */ -#define ADS_CS_ST_B_STS (1 << 7) /* Socket B Card STS */ #define _ADS_CS_PR 0x10040004 /* PCMCIA Power/Reset */ -#define ADS_CS_PR_A_POWER (1 << 0) /* Socket A Enable Power */ -#define ADS_CS_PR_B_POWER (1 << 1) /* Socket B Enable Power */ -#define ADS_CS_PR_A_RESET (1 << 2) /* Socket A Reset */ -#define ADS_CS_PR_B_RESET (1 << 3) /* Socket B Reset */ +#define ADS_CS_PR_A_5V_POWER (1 << 0) /* Socket A Enable 5V Power */ +#define ADS_CS_PR_A_3V_POWER (1 << 0) /* Socket A Enable 3.3V Power */ +#define ADS_CS_PR_A_RESET (1 << 2) /* Socket A Reset */ #define _ADS_SW_SWITCHES 0x10060000 /* Software Switches */ @@ -52,6 +48,8 @@ #define _ADS_INT_EN1 0x10080008 /* IRQ Enable #1 */ #define _ADS_INT_EN2 0x1008000c /* IRQ Enable #2 */ +/* Discrete Controller (AVR:Atmel AT90LS8535) */ +#define _ADS_AVR_REG 0x10080018 /* On-Board Ethernet */ @@ -86,4 +84,5 @@ #define ADS_INT_EN1 (*((volatile u_char *) ADS_p2v(_ADS_INT_EN1))) #define ADS_INT_EN2 (*((volatile u_char *) ADS_p2v(_ADS_INT_EN2))) #define ADS_ETHERNET ((int) ADS_p2v(_ADS_ETHERNET)) +#define ADS_AVR_REG (*((volatile u_char *) ADS_p2v(_ADS_AVR_REG))) #endif diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index e60c4ec68..9e9e45686 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -80,6 +80,10 @@ extern void set_GPIO_IRQ_edge( int gpio_mask, int edge_mask ); * Implementation specifics */ +#ifdef CONFIG_SA1100_PANGOLIN +#include "pangolin.h" +#endif + #ifdef CONFIG_SA1100_ASSABET #include "assabet.h" #else @@ -98,10 +102,6 @@ extern void set_GPIO_IRQ_edge( int gpio_mask, int edge_mask ); #include "bitsy.h" #endif -#if defined(CONFIG_SA1100_THINCLIENT) -#include "thinclient.h" -#endif - #if defined(CONFIG_SA1100_GRAPHICSCLIENT) #include "graphicsclient.h" #endif diff --git a/include/asm-arm/arch-sa1100/ide.h b/include/asm-arm/arch-sa1100/ide.h index 22aae0157..b893e0dfd 100644 --- a/include/asm-arm/arch-sa1100/ide.h +++ b/include/asm-arm/arch-sa1100/ide.h @@ -15,10 +15,6 @@ #include <asm/mach-types.h> -#define PCMCIA_IO_0_BASE 0xe0000000 -#define PCMCIA_IO_1_BASE 0xe4000000 - - /* * Set up a hw structure for a specified data port, control port and IRQ. * This should follow whatever the default interface uses. diff --git a/include/asm-arm/arch-sa1100/io.h b/include/asm-arm/arch-sa1100/io.h index 9a955de6c..6b57f9e20 100644 --- a/include/asm-arm/arch-sa1100/io.h +++ b/include/asm-arm/arch-sa1100/io.h @@ -16,45 +16,17 @@ * We don't actually have real ISA nor PCI buses, but there is so many * drivers out there that might just work if we fake them... */ -#define __io_pci(a) (PCIO_BASE + (a)) +#define __io(a) (PCIO_BASE + (a)) #define __mem_pci(a) ((unsigned long)(a)) #define __mem_isa(a) ((unsigned long)(a)) -#define __ioaddr(p) __io_pci(p) - /* * Generic virtual read/write */ -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getl(a) (*(volatile unsigned int *)(a)) - -extern __inline__ unsigned int __arch_getw(unsigned long a) -{ - unsigned int value; - __asm__ __volatile__("ldr%?h %0, [%1, #0] @ getw" - : "=&r" (value) - : "r" (a)); - return value; -} - - -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) - -extern __inline__ void __arch_putw(unsigned int value, unsigned long a) -{ - __asm__ __volatile__("str%?h %0, [%1, #0] @ putw" - : : "r" (value), "r" (a)); -} - -#define inb(p) __arch_getb(__io_pci(p)) -#define inw(p) __arch_getw(__io_pci(p)) -#define inl(p) __arch_getl(__io_pci(p)) - -#define outb(v,p) __arch_putb(v,__io_pci(p)) -#define outw(v,p) __arch_putw(v,__io_pci(p)) -#define outl(v,p) __arch_putl(v,__io_pci(p)) +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) -#define __arch_ioremap __ioremap +#define iomem_valid_addr(iomem,sz) (1) +#define iomem_to_phys(iomem) (iomem) #endif diff --git a/include/asm-arm/arch-sa1100/irq.h b/include/asm-arm/arch-sa1100/irq.h index 8c6b0e821..91bca91d8 100644 --- a/include/asm-arm/arch-sa1100/irq.h +++ b/include/asm-arm/arch-sa1100/irq.h @@ -11,11 +11,14 @@ * 17-02-1999 NP empeg henry ugly hacks now in a separate file ;) * 11-08-1999 PD SA1101 support added * 25-09-1999 RMK Merged into main ARM tree, cleaned up - * 12-05-2000 NP IRQ dispatcher handler for GPIO 11 to 27. + * 12-05-2000 NP IRQ dispatcher handler for GPIOs 11 to 27. * 26-05-2000 JD SA-1111 support added + * 01-06-2000 NP GraphicsClient external IRQ dispatcher + * 09-10-2000 NP Fixed lost interrupts on GPIOs 11 to 27. */ #include <linux/config.h> #include <asm/irq.h> +#include <asm/hardware.h> #include <asm/mach-types.h> #define fixup_irq(x) (x) @@ -85,7 +88,7 @@ static void sa1100_GPIO11_27_demux(int irq, void *dev_id, * unmasked. However, such situation should happen only * during the loop below. Thus all IRQs which aren't * enabled at this point are considered spurious. Those - * are cleared but only de-activated if they happened twice. + * are cleared but only de-activated if they happen twice. */ spurious = irq & ~GPIO_11_27_enabled; if (spurious) { @@ -114,20 +117,35 @@ static struct irqaction GPIO11_27_irq = { static void sa1100_mask_and_ack_GPIO11_27_irq(unsigned int irq) { int mask = (1 << GPIO_11_27_IRQ(irq)); + GPIO_11_27_spurious &= ~mask; GPIO_11_27_enabled &= ~mask; GEDR = mask; } static void sa1100_mask_GPIO11_27_irq(unsigned int irq) { - GPIO_11_27_enabled &= ~(1 << GPIO_11_27_IRQ(irq)); + int mask = (1 << GPIO_11_27_IRQ(irq)); + GPIO_11_27_spurious &= ~mask; + GPIO_11_27_enabled &= ~mask; } static void sa1100_unmask_GPIO11_27_irq(unsigned int irq) { int mask = (1 << GPIO_11_27_IRQ(irq)); + if (GPIO_11_27_spurious & mask) { + /* + * We don't want to miss an interrupt that would have occured + * while it was masked. Simulate it if it is the case. + */ + int state = GPLR; + if (((state & GPIO_IRQ_rising_edge) | + (~state & GPIO_IRQ_falling_edge)) & mask) { + do_IRQ(irq, NULL); + /* we are being called again from do_IRQ() so ... */ + return; + } + } GPIO_11_27_enabled |= mask; - GPIO_11_27_spurious &= ~mask; GRER = (GRER & ~mask) | (GPIO_IRQ_rising_edge & mask); GFER = (GFER & ~mask) | (GPIO_IRQ_falling_edge & mask); } @@ -245,7 +263,7 @@ static struct irqaction neponset_irq = { #endif -#if defined(CONFIG_SA1100_GRAPHICSCLIENT) || defined(CONFIG_SA1100_THINCLIENT) +#if defined(CONFIG_SA1100_GRAPHICSCLIENT) /* * IRQ handler for the ThinClient/GraphicsClient external IRQ controller @@ -399,8 +417,8 @@ static __inline__ void irq_init_irq(void) } #endif -#if defined(CONFIG_SA1100_GRAPHICSCLIENT) || defined(CONFIG_SA1100_THINCLIENT) - if( machine_is_graphicsclient() || machine_is_thinclient() ){ +#if defined(CONFIG_SA1100_GRAPHICSCLIENT) + if( machine_is_graphicsclient() ){ /* disable all IRQs */ ADS_INT_EN1 = 0; ADS_INT_EN2 = 0; diff --git a/include/asm-arm/arch-sa1100/irqs.h b/include/asm-arm/arch-sa1100/irqs.h index 909247f72..f83cddd3c 100644 --- a/include/asm-arm/arch-sa1100/irqs.h +++ b/include/asm-arm/arch-sa1100/irqs.h @@ -72,7 +72,7 @@ #define NR_IRQS (IRQ_GPIO27 + 1) -#if defined(CONFIG_SA1100_GRAPHICSCLIENT) || defined(CONFIG_SA1100_THINCLIENT) +#if defined(CONFIG_SA1100_GRAPHICSCLIENT) #define ADS_EXT_IRQ(x) (IRQ_GPIO27 + 1 + (x)) #undef NR_IRQS #define NR_IRQS (ADS_EXT_IRQ(15) + 1) diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h index 28c4015c5..9aa94003d 100644 --- a/include/asm-arm/arch-sa1100/memory.h +++ b/include/asm-arm/arch-sa1100/memory.h @@ -15,6 +15,12 @@ #define TASK_SIZE_26 (0x04000000UL) /* + * This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) + +/* * Page offset: 3GB */ #define PAGE_OFFSET (0xc0000000UL) diff --git a/include/asm-arm/arch-sa1100/mmzone.h b/include/asm-arm/arch-sa1100/mmzone.h index 09e90be62..c35fdfcee 100644 --- a/include/asm-arm/arch-sa1100/mmzone.h +++ b/include/asm-arm/arch-sa1100/mmzone.h @@ -41,11 +41,11 @@ extern pg_data_t sa1100_node_data[]; * Given a kernel address, find the home node of the underlying memory. */ #define KVADDR_TO_NID(addr) \ - (((unsigned long)(addr) & 0x18000000) >> 27) + (((unsigned long)(addr) - 0xc0000000) >> 27) /* * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory - * and returns the the mem_map of that node. + * and returns the mem_map of that node. */ #define ADDR_TO_MAPBASE(kaddr) \ NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr))) @@ -66,7 +66,12 @@ extern pg_data_t sa1100_node_data[]; (ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr)) /* - * Didn't find the best way to validate a page pointer yet... + * VALID_PAGE returns a non-zero value if given page pointer is valid. + * This assumes all node's mem_maps are stored within the node they refer to. */ +#define VALID_PAGE(page) \ +({ unsigned int node = KVADDR_TO_NID(page); \ + ( (node < 4) && \ + ((unsigned)((page) - NODE_MEM_MAP(node)) < NODE_DATA(node)->node_size) ); \ +}) -#define VALID_PAGE(page) (1) diff --git a/include/asm-arm/arch-sa1100/pangolin.h b/include/asm-arm/arch-sa1100/pangolin.h new file mode 100644 index 000000000..4f7d0b7bf --- /dev/null +++ b/include/asm-arm/arch-sa1100/pangolin.h @@ -0,0 +1,22 @@ +/* + * linux/include/asm-arm/arch-sa1100/pangolin.h + * + * Created 2000/08/25 by Murphy Chen <murphy@mail.dialogue.com.tw> + * + * This file contains the hardware specific definitions for Pangolin + * + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#error "include <asm/hardware.h> instead" +#endif + + +/* GPIOs for which the generic definition doesn't say much */ +#define GPIO_CF_BUS_ON GPIO_GPIO (3) +#define GPIO_CF_RESET GPIO_GPIO (2) +#define GPIO_CF_CD GPIO_GPIO (22) +#define GPIO_CF_IRQ GPIO_GPIO (21) + +#define IRQ_GPIO_CF_IRQ IRQ_GPIO21 +#define IRQ_GPIO_CF_CD IRQ_GPIO22 diff --git a/include/asm-arm/arch-sa1100/processor.h b/include/asm-arm/arch-sa1100/processor.h deleted file mode 100644 index 1d0c5a6c3..000000000 --- a/include/asm-arm/arch-sa1100/processor.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/processor.h - * - * Copyright (c) 1996 Russell King. - * - * Changelog: - * 10-09-1996 RMK Created - * 05-01-1999 HBF Mods for SA1100 - * 21-09-1999 NP SWAPPER_PG_DIR readjusted for SA1100 - */ - -#ifndef __ASM_ARCH_PROCESSOR_H -#define __ASM_ARCH_PROCESSOR_H - -/* - * Bus types - */ -#define EISA_bus 0 -#define EISA_bus__is_a_macro /* for versions in ksyms.c */ -#define MCA_bus 0 -#define MCA_bus__is_a_macro /* for versions in ksyms.c */ - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) - -#endif diff --git a/include/asm-arm/arch-sa1100/system.h b/include/asm-arm/arch-sa1100/system.h index ca8e6330a..984a5dc0f 100644 --- a/include/asm-arm/arch-sa1100/system.h +++ b/include/asm-arm/arch-sa1100/system.h @@ -24,13 +24,9 @@ extern inline void arch_reset(char mode) /* Jump into ROM at address 0 */ cpu_reset(0); } else { - /* Activate SA1100 watchdog and wait for the trigger... */ - OSMR3 = OSCR + 3686400/2; /* in 1/2 sec */ - OWER |= OWER_WME; - OIER |= OIER_E3; + /* Use on-chip reset capability */ + RSRR = RSRR_SWR; } } -#define arch_power_off() do { } while (0) - #endif diff --git a/include/asm-arm/arch-sa1100/uncompress.h b/include/asm-arm/arch-sa1100/uncompress.h index 5f4648ee6..f2a46c0d8 100644 --- a/include/asm-arm/arch-sa1100/uncompress.h +++ b/include/asm-arm/arch-sa1100/uncompress.h @@ -31,10 +31,12 @@ static void puts( const char *s ) serial_port = (unsigned long *)_Ser3UTCR0; else serial_port = (unsigned long *)_Ser1UTCR0; - } else if (machine_is_brutus()||machine_is_nanoengine()) + } else if (machine_is_brutus()||machine_is_nanoengine() || + machine_is_pangolin()) serial_port = (unsigned long *)_Ser1UTCR0; else if (machine_is_empeg() || machine_is_bitsy() || - machine_is_victor() || machine_is_lart()) + machine_is_victor() || machine_is_lart() || + machine_is_sherman() ) serial_port = (unsigned long *)_Ser3UTCR0; else return; diff --git a/include/asm-arm/arch-shark/io.h b/include/asm-arm/arch-shark/io.h index ef14f7169..ab8efb1fc 100644 --- a/include/asm-arm/arch-shark/io.h +++ b/include/asm-arm/arch-shark/io.h @@ -35,7 +35,7 @@ extern __inline__ void __out##fnsuffix (unsigned int value, unsigned int port) \ "tst %2, #0x80000000\n\t" \ "mov %0, %4\n\t" \ "addeq %0, %0, %3\n\t" \ - "str" ##instr## " %1, [%0, %2] @ out"###fnsuffix \ + "str" instr " %1, [%0, %2] @ out" #fnsuffix \ : "=&r" (temp) \ : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ : "cc"); \ @@ -49,7 +49,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ "tst %2, #0x80000000\n\t" \ "mov %0, %4\n\t" \ "addeq %0, %0, %3\n\t" \ - "ldr" ##instr## " %1, [%0, %2] @ in"###fnsuffix \ + "ldr" instr " %1, [%0, %2] @ in" #fnsuffix \ : "=&r" (temp), "=r" (value) \ : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ : "cc"); \ @@ -181,13 +181,8 @@ DECLARE_IO(long,l,"") #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) -#define __arch_getb(addr) (*(volatile unsigned char *)(addr)) #define __arch_getw(addr) (*(volatile unsigned short *)(addr)) -#define __arch_getl(addr) (*(volatile unsigned long *)(addr)) - -#define __arch_putb(b,addr) (*(volatile unsigned char *)(addr) = (b)) #define __arch_putw(b,addr) (*(volatile unsigned short *)(addr) = (b)) -#define __arch_putl(b,addr) (*(volatile unsigned long *)(addr) = (b)) /* * Translated address IO functions diff --git a/include/asm-arm/arch-tbox/io.h b/include/asm-arm/arch-tbox/io.h index 322941657..5fd9aa0a3 100644 --- a/include/asm-arm/arch-tbox/io.h +++ b/include/asm-arm/arch-tbox/io.h @@ -10,14 +10,11 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io_pc(_x) ((_x) << 2) +#define __io(_x) ((_x) << 2) /* * Generic virtual read/write */ -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getl(a) (*(volatile unsigned long *)(a)) - extern __inline__ unsigned int __arch_getw(unsigned long a) { unsigned int value; @@ -27,24 +24,12 @@ extern __inline__ unsigned int __arch_getw(unsigned long a) return value; } - -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned long *)(a) = (v)) - extern __inline__ void __arch_putw(unsigned int value, unsigned long a) { __asm__ __volatile__("str%?h %0, [%1, #0] @ putw" : : "r" (value), "r" (a)); } -#define inb(p) __arch_getb(__io_pc(p)) -#define inw(p) __arch_getw(__io_pc(p)) -#define inl(p) __arch_getl(__io_pc(p)) - -#define outb(v,p) __arch_putb(v,__io_pc(p)) -#define outw(v,p) __arch_putw(v,__io_pc(p)) -#define outl(v,p) __arch_putl(v,__io_pc(p)) - /* Idem, for devices on the upper byte lanes */ #define inb_u(p) __arch_getb(__io_pc(p) + 2) #define inw_u(p) __arch_getw(__io_pc(p) + 2) diff --git a/include/asm-arm/ecard.h b/include/asm-arm/ecard.h index 56ae7ab35..fa0adbaeb 100644 --- a/include/asm-arm/ecard.h +++ b/include/asm-arm/ecard.h @@ -41,8 +41,8 @@ #define PROD_MORLEY_SCSI_UNCACHED 0x0067 #define MANU_CUMANA 0x003a -#define PROD_CUMANA_SCSI_1 0x00a0 #define PROD_CUMANA_SCSI_2 0x003a +#define PROD_CUMANA_SCSI_1 0x00a0 #define MANU_ICS 0x003c #define PROD_ICS_IDE 0x00ae @@ -59,6 +59,7 @@ #define PROD_I3_ETHERLAN600A 0x011e #define MANU_ANT 0x0053 +#define PROD_ANT_ETHERM 0x00d8 #define PROD_ANT_ETHERB 0x00e4 #define MANU_ALSYSTEMS 0x005b diff --git a/include/asm-arm/fiq.h b/include/asm-arm/fiq.h index 0e00841df..a3bad09e8 100644 --- a/include/asm-arm/fiq.h +++ b/include/asm-arm/fiq.h @@ -31,5 +31,7 @@ extern void release_fiq(struct fiq_handler *f); extern void set_fiq_handler(void *start, unsigned int length); extern void set_fiq_regs(struct pt_regs *regs); extern void get_fiq_regs(struct pt_regs *regs); +extern void enable_fiq(int fiq); +extern void disable_fiq(int fiq); #endif diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index 707aa9788..1e1d838b7 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -20,10 +20,43 @@ #ifndef __ASM_ARM_IO_H #define __ASM_ARM_IO_H +#ifdef __KERNEL__ + #include <linux/types.h> +#include <asm/memory.h> #include <asm/arch/hardware.h> + +/* + * Generic virtual read/write. Note that we don't support half-word + * read/writes. We define __arch_*[bl] here, and leave __arch_*w + * to the architecture specific code. + */ +#define __arch_getb(a) (*(volatile unsigned char *)(a)) +#define __arch_getl(a) (*(volatile unsigned int *)(a)) + +#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) + +/* + * Now, pick up the machine-defined IO definitions + */ #include <asm/arch/io.h> +/* + * IO definitions. We define {out,in}[bwl] if __io is defined by + * the machine. Otherwise, these definitions are left for the + * machine specific header files to pick up. + */ +#ifdef __io +#define outb(v,p) __arch_putb(v,__io(p)) +#define outw(v,p) __arch_putw(v,__io(p)) +#define outl(v,p) __arch_putl(v,__io(p)) + +#define inb(p) __arch_getb(__io(p)) +#define inw(p) __arch_getw(__io(p)) +#define inl(p) __arch_getl(__io(p)) +#endif + #define outb_p(val,port) outb((val),(port)) #define outw_p(val,port) outw((val),(port)) #define outl_p(val,port) outl((val),(port)) @@ -45,19 +78,34 @@ extern void insl(unsigned int port, void *from, int len); #define insw_p(port,to,len) insw(port,to,len) #define insl_p(port,to,len) insl(port,to,len) -#ifdef __KERNEL__ - -#include <asm/memory.h> - -/* the following macro is depreciated */ -#define ioaddr(port) __ioaddr((port)) - /* - * ioremap and friends + * ioremap and friends. + * + * ioremap takes a PCI memory address, as specified in + * linux/Documentation/IO-mapping.txt. If you want a + * physical address, use __ioremap instead. */ extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags); extern void __iounmap(void *addr); +/* + * Generic ioremap support. + * + * Define: + * iomem_valid_addr(off,size) + * iomem_to_phys(off) + */ +#ifdef iomem_valid_addr +#define __arch_ioremap(off,sz,nocache) \ + ({ \ + unsigned long _off = (off), _size = (sz); \ + void *_ret = (void *)0; \ + if (iomem_valid_addr(_off, _size)) \ + _ret = __ioremap(iomem_to_phys(_off),_size,0); \ + _ret; \ + }) +#endif + #define ioremap(off,sz) __arch_ioremap((off),(sz),0) #define ioremap_nocache(off,sz) __arch_ioremap((off),(sz),1) #define iounmap(_addr) __iounmap(_addr) @@ -72,7 +120,26 @@ extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); extern void consistent_free(void *vaddr); extern void consistent_sync(void *vaddr, size_t size, int rw); -extern void __readwrite_bug(const char *fn); +#define __raw_writeb(v,a) __arch_putb(v,a) +#define __raw_writew(v,a) __arch_putw(v,a) +#define __raw_writel(v,a) __arch_putl(v,a) + +#define __raw_readb(a) __arch_getb(a) +#define __raw_readw(a) __arch_getw(a) +#define __raw_readl(a) __arch_getl(a) + +/* + * The compiler seems to be incapable of optimising constants + * properly. Spell it out to the compiler in some cases. + * These are only valid for small values of "off" (< 1<<12) + */ +#define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off) +#define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off) +#define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off) + +#define __raw_base_readb(base,off) __arch_base_getb(base,off) +#define __raw_base_readw(base,off) __arch_base_getw(base,off) +#define __raw_base_readl(base,off) __arch_base_getl(base,off) /* * String version of IO memory access ops: @@ -81,26 +148,21 @@ extern void _memcpy_fromio(void *, unsigned long, size_t); extern void _memcpy_toio(unsigned long, const void *, size_t); extern void _memset_io(unsigned long, int, size_t); -#define __raw_writeb(val,addr) __arch_putb(val,addr) -#define __raw_writew(val,addr) __arch_putw(val,addr) -#define __raw_writel(val,addr) __arch_putl(val,addr) - -#define __raw_readb(addr) __arch_getb(addr) -#define __raw_readw(addr) __arch_getw(addr) -#define __raw_readl(addr) __arch_getl(addr) +extern void __readwrite_bug(const char *fn); /* * If this architecture has PCI memory IO, then define the read/write - * macros. + * macros. These should only be used with the cookie passed from + * ioremap. */ #ifdef __mem_pci -#define readb(addr) __arch_getb(__mem_pci(addr)) -#define readw(addr) __arch_getw(__mem_pci(addr)) -#define readl(addr) __arch_getl(__mem_pci(addr)) -#define writeb(val,addr) __arch_putb(val,__mem_pci(addr)) -#define writew(val,addr) __arch_putw(val,__mem_pci(addr)) -#define writel(val,addr) __arch_putl(val,__mem_pci(addr)) +#define readb(addr) __raw_readb(__mem_pci(addr)) +#define readw(addr) __raw_readw(__mem_pci(addr)) +#define readl(addr) __raw_readl(__mem_pci(addr)) +#define writeb(val,addr) __raw_writeb(val,__mem_pci(addr)) +#define writew(val,addr) __raw_writew(val,__mem_pci(addr)) +#define writel(val,addr) __raw_writel(val,__mem_pci(addr)) #define memset_io(a,b,c) _memset_io(__mem_pci(a),(b),(c)) #define memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_pci(b),(c)) @@ -142,17 +204,25 @@ out: #endif /* __mem_pci */ /* + * remap a physical address `phys' of size `size' with page protection `prot' + * into virtual address `from' + */ +#define io_remap_page_range(from,phys,size,prot) \ + remap_page_range(from,phys,size,prot) + + +/* * If this architecture has ISA IO, then define the isa_read/isa_write * macros. */ #ifdef __mem_isa -#define isa_readb(addr) __arch_getb(__mem_isa(addr)) -#define isa_readw(addr) __arch_getw(__mem_isa(addr)) -#define isa_readl(addr) __arch_getl(__mem_isa(addr)) -#define isa_writeb(val,addr) __arch_putb(val,__mem_isa(addr)) -#define isa_writew(val,addr) __arch_putw(val,__mem_isa(addr)) -#define isa_writel(val,addr) __arch_putl(val,__mem_isa(addr)) +#define isa_readb(addr) __raw_readb(__mem_isa(addr)) +#define isa_readw(addr) __raw_readw(__mem_isa(addr)) +#define isa_readl(addr) __raw_readl(__mem_isa(addr)) +#define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr)) +#define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr)) +#define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr)) #define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c)) #define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c)) #define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c)) diff --git a/include/asm-arm/ioctls.h b/include/asm-arm/ioctls.h index 87f998fae..ba9c7d81d 100644 --- a/include/asm-arm/ioctls.h +++ b/include/asm-arm/ioctls.h @@ -65,6 +65,7 @@ #define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ #define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ +#define FIOQSIZE 0x545E /* Used for packet mode */ #define TIOCPKT_DATA 0 diff --git a/include/asm-arm/linux_logo.h b/include/asm-arm/linux_logo.h index ba0bc304d..5bdf5fbb3 100644 --- a/include/asm-arm/linux_logo.h +++ b/include/asm-arm/linux_logo.h @@ -32,9 +32,6 @@ extern unsigned char linux_logo_green[]; extern unsigned char linux_logo_blue[]; extern unsigned char linux_logo[]; extern unsigned char linux_logo_bw[]; -extern unsigned char linux_logo16_red[]; -extern unsigned char linux_logo16_green[]; -extern unsigned char linux_logo16_blue[]; extern unsigned char linux_logo16[]; extern unsigned char *linux_serial_image; diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h index f5297ecf1..d6e6c4daf 100644 --- a/include/asm-arm/mach/arch.h +++ b/include/asm-arm/mach/arch.h @@ -12,35 +12,42 @@ * The size of struct machine_desc * (for assembler code) */ -#define SIZEOF_MACHINE_DESC 44 +#define SIZEOF_MACHINE_DESC 56 #ifndef __ASSEMBLY__ +extern void setup_initrd(unsigned int start, unsigned int size); +extern void setup_ramdisk(int doload, int prompt, int start, unsigned int rd_sz); + +struct tagtable; + struct machine_desc { /* * Note! The first four elements are used * by assembler code in head-armv.S */ - unsigned int nr; /* architecture number */ - unsigned int phys_ram; /* start of physical ram */ - unsigned int phys_io; /* start of physical io */ - unsigned int virt_io; /* start of virtual io */ - - const char *name; /* architecture name */ - unsigned int param_offset; /* parameter page */ - - unsigned int video_start; /* start of video RAM */ - unsigned int video_end; /* end of video RAM */ - - unsigned int reserve_lp0 :1; /* never has lp0 */ - unsigned int reserve_lp1 :1; /* never has lp1 */ - unsigned int reserve_lp2 :1; /* never has lp2 */ - unsigned int broken_hlt :1; /* hlt is broken */ - unsigned int soft_reboot :1; /* soft reboot */ - void (*fixup)(struct machine_desc *, - struct param_struct *, char **, - struct meminfo *); - void (*map_io)(void);/* IO mapping function */ + unsigned int nr; /* architecture number */ + unsigned int phys_ram; /* start of physical ram */ + unsigned int phys_io; /* start of physical io */ + unsigned int virt_io; /* start of virtual io */ + + const char *name; /* architecture name */ + unsigned int param_offset; /* parameter page */ + + unsigned int video_start; /* start of video RAM */ + unsigned int video_end; /* end of video RAM */ + + unsigned int reserve_lp0 :1; /* never has lp0 */ + unsigned int reserve_lp1 :1; /* never has lp1 */ + unsigned int reserve_lp2 :1; /* never has lp2 */ + unsigned int soft_reboot :1; /* soft reboot */ + const struct tagtable * tagtable; /* tag table */ + int tagsize; /* tag table size */ + void (*fixup)(struct machine_desc *, + struct param_struct *, char **, + struct meminfo *); + void (*map_io)(void);/* IO mapping function */ + void (*init_irq)(void); }; /* @@ -50,7 +57,7 @@ struct machine_desc { #define MACHINE_START(_type,_name) \ const struct machine_desc __mach_desc_##_type \ __attribute__((__section__(".arch.info"))) = { \ - nr: MACH_TYPE_##_type##, \ + nr: MACH_TYPE_##_type, \ name: _name, #define MAINTAINER(n) @@ -68,10 +75,9 @@ const struct machine_desc __mach_desc_##_type \ video_end: _end, #define DISABLE_PARPORT(_n) \ - reserve_lp##_n##: 1, + reserve_lp##_n: 1, -#define BROKEN_HLT \ - broken_hlt: 1, +#define BROKEN_HLT /* unused */ #define SOFT_REBOOT \ soft_reboot: 1, @@ -82,6 +88,9 @@ const struct machine_desc __mach_desc_##_type \ #define MAPIO(_func) \ map_io: _func, +#define INITIRQ(_func) \ + init_irq: _func, + #define MACHINE_END \ }; diff --git a/include/asm-arm/mach/irq.h b/include/asm-arm/mach/irq.h new file mode 100644 index 000000000..1270097b2 --- /dev/null +++ b/include/asm-arm/mach/irq.h @@ -0,0 +1,41 @@ +/* + * linux/include/asm-arm/mach/irq.h + * + * Copyright (C) 1995-2000 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_ARM_MACH_IRQ_H +#define __ASM_ARM_MACH_IRQ_H + +struct irqdesc { + unsigned int nomask : 1; /* IRQ does not mask in IRQ */ + unsigned int enabled : 1; /* IRQ is currently enabled */ + unsigned int triggered: 1; /* IRQ has occurred */ + unsigned int probing : 1; /* IRQ in use for a probe */ + unsigned int probe_ok : 1; /* IRQ can be used for probe */ + unsigned int valid : 1; /* IRQ claimable */ + unsigned int noautoenable : 1; /* don't automatically enable IRQ */ + unsigned int unused :25; + void (*mask_ack)(unsigned int irq); /* Mask and acknowledge IRQ */ + void (*mask)(unsigned int irq); /* Mask IRQ */ + void (*unmask)(unsigned int irq); /* Unmask IRQ */ + struct irqaction *action; + /* + * IRQ lock detection + */ + unsigned int lck_cnt; + unsigned int lck_pc; + unsigned int lck_jif; +}; + +extern struct irqdesc irq_desc[]; + +extern void (*init_arch_irq)(void); +extern int setup_arm_irq(int, struct irqaction *); +extern int get_fiq_list(char *); +extern void init_FIQ(void); + +#endif diff --git a/include/asm-arm/proc-armo/pgtable.h b/include/asm-arm/proc-armo/pgtable.h index 12dc2cee0..b16bf61c6 100644 --- a/include/asm-arm/proc-armo/pgtable.h +++ b/include/asm-arm/proc-armo/pgtable.h @@ -96,4 +96,9 @@ extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) &= ~_PAGE_OLD; #define pte_alloc_kernel pte_alloc +/* + * We don't store cache state bits in the page table here. + */ +#define pgprot_noncached(prot) (prot) + #endif /* __ASM_PROC_PGTABLE_H */ diff --git a/include/asm-arm/proc-armv/pgtable.h b/include/asm-arm/proc-armv/pgtable.h index 2de66aabe..5bb0f41d1 100644 --- a/include/asm-arm/proc-armv/pgtable.h +++ b/include/asm-arm/proc-armv/pgtable.h @@ -149,7 +149,7 @@ extern __inline__ unsigned long pmd_page(pmd_t pmd) #define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG) #define PTE_BIT_FUNC(fn,op) \ -extern inline pte_t pte_##fn##(pte_t pte) { pte_val(pte) op##; return pte; } +extern inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; } /*PTE_BIT_FUNC(rdprotect, &= ~L_PTE_USER);*/ /*PTE_BIT_FUNC(mkread, |= L_PTE_USER);*/ @@ -163,4 +163,9 @@ PTE_BIT_FUNC(mkold, &= ~L_PTE_YOUNG); PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG); PTE_BIT_FUNC(nocache, &= ~L_PTE_CACHEABLE); +/* + * Mark the prot value as uncacheable and unbufferable. + */ +#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) & ~(L_PTE_CACHEABLE | L_PTE_BUFFERABLE)) + #endif /* __ASM_PROC_PGTABLE_H */ diff --git a/include/asm-arm/setup.h b/include/asm-arm/setup.h index c067c9618..29cfe814c 100644 --- a/include/asm-arm/setup.h +++ b/include/asm-arm/setup.h @@ -68,6 +68,143 @@ struct param_struct { }; /* + * New idea - a list of tagged entries + */ +#define ATAG_NONE 0x00000000 + +struct tag_header { + u32 size; + u32 tag; +}; + +#define ATAG_CORE 0x54410001 + +struct tag_core { + u32 flags; /* bit 0 = read-only */ + u32 pagesize; + u32 rootdev; +}; + +#define ATAG_MEM 0x54410002 + +struct tag_mem32 { + u32 size; + u32 start; +}; + +#define ATAG_VIDEOTEXT 0x54410003 + +struct tag_videotext { + u8 x; + u8 y; + u16 video_page; + u8 video_mode; + u8 video_cols; + u16 video_ega_bx; + u8 video_lines; + u8 video_isvga; + u16 video_points; +}; + +#define ATAG_RAMDISK 0x54410004 + +struct tag_ramdisk { + u32 flags; /* b0 = load, b1 = prompt */ + u32 size; + u32 start; +}; + +#define ATAG_INITRD 0x54410005 + +struct tag_initrd { + u32 start; + u32 size; +}; + +#define ATAG_SERIAL 0x54410006 + +struct tag_serialnr { + u32 low; + u32 high; +}; + +#define ATAG_REVISION 0x54410007 + +struct tag_revision { + u32 rev; +}; + +#define ATAG_VIDEOLFB 0x54410008 + +struct tag_videolfb { + u16 lfb_width; + u16 lfb_height; + u16 lfb_depth; + u16 lfb_linelength; + u32 lfb_base; + u32 lfb_size; + u8 red_size; + u8 red_pos; + u8 green_size; + u8 green_pos; + u8 blue_size; + u8 blue_pos; + u8 rsvd_size; + u8 rsvd_pos; +}; + +#define ATAG_CMDLINE 0x54410009 + +struct tag_cmdline { + char cmdline[1]; +}; + +#define ATAG_ACORN 0x41000101 + +struct tag_acorn { + u32 memc_control_reg; + u32 vram_pages; + u8 sounddefault; + u8 adfsdrives; +}; + +#define ATAG_MEMCLK 0x41000402 + +struct tag_memclk { + u32 fmemclk; +}; + +struct tag { + struct tag_header hdr; + union { + struct tag_core core; + struct tag_mem32 mem; + struct tag_videotext videotext; + struct tag_ramdisk ramdisk; + struct tag_initrd initrd; + struct tag_serialnr serialnr; + struct tag_revision revision; + struct tag_videolfb videolfb; + struct tag_cmdline cmdline; + + /* + * Acorn specific + */ + struct tag_acorn acorn; + + /* + * DC21285 specific + */ + struct tag_memclk memclk; + } u; +}; + +struct tagtable { + u32 tag; + int (*parse)(const struct tag *); +}; + +/* * Memory map description */ #define NR_BANKS 4 diff --git a/include/asm-arm/socket.h b/include/asm-arm/socket.h index a421e6dc3..37ec7b03c 100644 --- a/include/asm-arm/socket.h +++ b/include/asm-arm/socket.h @@ -43,6 +43,8 @@ #define SO_TIMESTAMP 29 #define SCM_TIMESTAMP SO_TIMESTAMP +#define SO_ACCEPTCONN 30 + /* Nast libc5 fixup - bletch */ #if defined(__KERNEL__) /* Socket types. */ diff --git a/include/asm-arm/termios.h b/include/asm-arm/termios.h index 6d589dd1d..3da727e71 100644 --- a/include/asm-arm/termios.h +++ b/include/asm-arm/termios.h @@ -61,7 +61,7 @@ struct termio { #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ #define N_R3964 9 /* Reserved for Simatic R3964 module */ #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ -#define N_IRDA 11 /* Linux IrDa - http://www.cs.uit.no/~dagb/irda/irda.html */ +#define N_IRDA 11 /* Linux IrDa - http://irda.sourceforge.net/ */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ #define N_SYNC_PPP 14 |