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authorHarald Koerfgen <hkoerfg@web.de>1999-04-11 17:06:16 +0000
committerHarald Koerfgen <hkoerfg@web.de>1999-04-11 17:06:16 +0000
commit67134debfe2833bc2cfb4c42f754560c795baa71 (patch)
tree6e1aec3ac67d13f11dd4faded5471d2e2a2d36b6 /include/asm-mips/dec
parentcf32452ae9bc67a48c2f0fb3719b31a78512ed82 (diff)
DECstation updates
Diffstat (limited to 'include/asm-mips/dec')
-rw-r--r--include/asm-mips/dec/interrupts.h21
-rw-r--r--include/asm-mips/dec/ioasic_addrs.h17
-rw-r--r--include/asm-mips/dec/ioasic_ints.h5
3 files changed, 30 insertions, 13 deletions
diff --git a/include/asm-mips/dec/interrupts.h b/include/asm-mips/dec/interrupts.h
index 5f99727cc..524e94b68 100644
--- a/include/asm-mips/dec/interrupts.h
+++ b/include/asm-mips/dec/interrupts.h
@@ -23,17 +23,18 @@
* Interrupts before the TC Interrupts.
*/
#define CLOCK 0
-#define SCSI_INT 1
-#define ETHER 2
-#define SERIAL 3
-#define TC0 4
-#define TC1 5
-#define TC2 6
-#define MEMORY 7
-#define FPU 8
-#define HALT 9
+#define SCSI_DMA_INT 1
+#define SCSI_INT 2
+#define ETHER 3
+#define SERIAL 4
+#define TC0 5
+#define TC1 6
+#define TC2 7
+#define MEMORY 8
+#define FPU 9
+#define HALT 10
-#define NR_INTS 10
+#define NR_INTS 11
#ifndef _LANGUAGE_ASSEMBLY
/*
diff --git a/include/asm-mips/dec/ioasic_addrs.h b/include/asm-mips/dec/ioasic_addrs.h
index a2044782e..6c0b42b3e 100644
--- a/include/asm-mips/dec/ioasic_addrs.h
+++ b/include/asm-mips/dec/ioasic_addrs.h
@@ -58,10 +58,25 @@
#define SIMR 0x120 /* System Interrupt Mask Register */
/*
- * These come from mach, meaning unkown yet
+ * Handle partial word SCSI DMA transfers
*/
#define SCSI_SCR 0x1b0
#define SCSI_SDR0 0x1c0
#define SCSI_SDR1 0x1d0
+/*
+ * DMA defines for the System Support Register
+ */
+#define LANCE_DMA_EN (1UL<<16) /* LANCE DMA enable */
+#define SCSI_DMA_EN (1UL<<17) /* SCSI DMA enable */
+#define SCSI_DMA_DIR (1UL<<18) /* SCSI DMA direction */
+#define ISDN_REC_DMA_EN (1UL<<19) /* ISDN receive DMA enable */
+#define ISDN_TRN_DMA_EN (1UL<<20) /* ISDN transmit DMA enable */
+#define FLOPPY_DMA_EN (1UL<<21) /* Floppy DMA enable */
+#define FLOPPY_DMA_DIR (1UL<<22) /* Floppy DMA direction */
+#define SCC1A_DMA_EN (1UL<<28) /* SCC1 Channel A DMA enable */
+#define SCC1B_DMA_EN (1UL<<29) /* SCC1 Channel B DMA enable */
+#define SCC0A_DMA_EN (1UL<<30) /* SCC0 Channel A DMA enable */
+#define SCC0B_DMA_EN (1UL<<31) /* Scc0 Channel B DMA enable */
+
#endif
diff --git a/include/asm-mips/dec/ioasic_ints.h b/include/asm-mips/dec/ioasic_ints.h
index e1f61f1cb..e28e334b2 100644
--- a/include/asm-mips/dec/ioasic_ints.h
+++ b/include/asm-mips/dec/ioasic_ints.h
@@ -86,8 +86,8 @@
SCC0_RECV_HALFPAGE | SCC0_RECV_PAGOVRRUN | \
SCC0_CHIP)
-#define SCSI_INTS (SCSI_PTR_LOADED | SCSI_PAGOVRRUN | \
- SCSI_DMA_MEMRDERR | SCSI_CHIP)
+#define SCSI_DMA_INTS (/* SCSI_PTR_LOADED | */ SCSI_PAGOVRRUN | \
+ SCSI_DMA_MEMRDERR)
#define KMIN_SCSI_INTS (SCSI_PTR_LOADED | SCSI_PAGOVRRUN | \
SCSI_DMA_MEMRDERR | SCSI_CHIP | KMIN_SCSI_FIFO)
@@ -106,3 +106,4 @@
#define XINE_DTOP_INTS (MAXINE_DTOP_TRANS | DTOP_RECV | \
ISDN_TRANS_PTR_LOADED | ISDN_RECV_PTR_LOADED | \
ISDN_DMA_MEMRDERR)
+