diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2000-01-17 23:32:45 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2000-01-17 23:32:45 +0000 |
| commit | bb382d1cd598a97151a0edf5ac26e36afb0a64ce (patch) | |
| tree | fd9f0ca1b31e5af2faa0d7165e6fd0fbb5524ebf /include/asm-mips64/r4kcacheops.h | |
| parent | af38bda129551834653720f277a920d7d284bd3d (diff) | |
- IOC3 driver now will panic when encountering a RX/TX PCI DMA error.
- IOC3 driver does no longer use GFP_DMA which given the _very_ small
number of available GFP_DMA pages might have deadlocked the system.
- First cut of Origin support. Last minute change: Do no longer use
ARC memory / MD hub memory configuration information but klconfig.h
stuff. Simpler, faster, shorter.
- Zillions of MIPS64 fixes.
Diffstat (limited to 'include/asm-mips64/r4kcacheops.h')
| -rw-r--r-- | include/asm-mips64/r4kcacheops.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/include/asm-mips64/r4kcacheops.h b/include/asm-mips64/r4kcacheops.h new file mode 100644 index 000000000..bc4b924ed --- /dev/null +++ b/include/asm-mips64/r4kcacheops.h @@ -0,0 +1,48 @@ +/* $Id$ + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Cache operations for the cache instruction. + * + * (C) Copyright 1996, 1997, 1999 by Ralf Baechle + */ +#ifndef _ASM_R4kCACHEOPS_H +#define _ASM_R4kCACHEOPS_H + +/* + * Cache Operations + */ +#define Index_Invalidate_I 0x00 +#define Index_Writeback_Inv_D 0x01 +#define Index_Invalidate_SI 0x02 +#define Index_Writeback_Inv_SD 0x03 +#define Index_Load_Tag_I 0x04 +#define Index_Load_Tag_D 0x05 +#define Index_Load_Tag_SI 0x06 +#define Index_Load_Tag_SD 0x07 +#define Index_Store_Tag_I 0x08 +#define Index_Store_Tag_D 0x09 +#define Index_Store_Tag_SI 0x0A +#define Index_Store_Tag_SD 0x0B +#define Create_Dirty_Excl_D 0x0d +#define Create_Dirty_Excl_SD 0x0f +#define Hit_Invalidate_I 0x10 +#define Hit_Invalidate_D 0x11 +#define Hit_Invalidate_SI 0x12 +#define Hit_Invalidate_SD 0x13 +#define Fill 0x14 +#define Hit_Writeback_Inv_D 0x15 + /* 0x16 is unused */ +#define Hit_Writeback_Inv_SD 0x17 +#define Hit_Writeback_I 0x18 +#define Hit_Writeback_D 0x19 + /* 0x1a is unused */ +#define Hit_Writeback_SD 0x1b + /* 0x1c is unused */ + /* 0x1e is unused */ +#define Hit_Set_Virtual_SI 0x1e +#define Hit_Set_Virtual_SD 0x1f + +#endif /* _ASM_R4kCACHEOPS_H */ |