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path: root/arch/mips64/sgi-ip27/ip27-irq.c
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* Merge with Linux 2.4.2.Ralf Baechle2001-03-091-1/+1
* Cleanup the code that handles (bridge) intr path setup. Come up with aKanoj Sarcar2001-03-021-33/+86
* Kill irq_cannonicalize.Ralf Baechle2000-10-101-9/+0
* Merge with Linux 2.4.0-test6-pre4.Ralf Baechle2000-08-081-4/+0
* Thisone also needs config.h ...Ralf Baechle2000-07-121-1/+1
* Merge with 2.4.0-test3-pre4.Ralf Baechle2000-07-081-10/+10
* Most of the kernel arrays/data structures and low level proceduresKanoj Sarcar2000-06-021-6/+6
* Remove all IOC3 hacks. IOC3 now allocates it's resources the same wayRalf Baechle2000-05-301-60/+40
* Parallel initialization: each hub now tries to discover the xbowKanoj Sarcar2000-05-201-35/+13
* Implement a more dynamic method of associating IRQs with PCI devices.Kanoj Sarcar2000-05-191-36/+29
* Misc fixes.Kanoj Sarcar2000-05-171-8/+7
* The device initialization code can not assume it is being invoked onKanoj Sarcar2000-05-171-1/+2
* Fix the bridge register programming to indicate a 1:1 mapping betweenKanoj Sarcar2000-05-161-2/+3
* Move the intercpu intr irq numbers to the lowest possible. AssignKanoj Sarcar2000-05-151-48/+23
* Fix races in the low level intr handling code to prevent intr lossKanoj Sarcar2000-05-131-14/+28
* Some infrastructure for supporting multiple pci busses on origin200/2000.Leo Dagum2000-05-111-102/+140
* Multicpu boot fixes: 1. make sure each cpu only picks up the interruptsKanoj Sarcar2000-05-021-6/+31
* Obligatory UP compile fixes after SMP code changes ...Kanoj Sarcar2000-04-171-4/+2
* Intercpu interrupt changes: add in dedicated intr levels for rescheduleKanoj Sarcar2000-04-171-8/+25
* More intercpu interrupt work: we now have a low level inter cpu intrKanoj Sarcar2000-04-171-25/+39
* Revert to the older irq - pendlevel mapping.Kanoj Sarcar2000-04-121-2/+2
* Move the irq to swlevel mappings a little bit to make space for theKanoj Sarcar2000-04-121-3/+4
* The state of the two interrupt mask registers for the 128 intr levelsKanoj Sarcar2000-04-121-4/+15
* Allow the low level ISR to be able to handle intrs on cpu A or B.Kanoj Sarcar2000-04-121-4/+6
* Fixed bridge_init() so it sets registers for theLeo Dagum2000-04-101-2/+5
* New code to install and enable interrupt handlers for intercpu intrs.Kanoj Sarcar2000-04-081-0/+65
* Minor cleanup - do not invent new synonyms. Use ST0_IE instead of new nameKanoj Sarcar2000-04-071-4/+2
* Interrupts need to start at bit 7 in INT_PEND0 registers because bits [0..6]Leo Dagum2000-03-301-13/+44
* ip27-irq.c, system.h: implement SMP intr on/off primitives similar to i386.Kanoj Sarcar2000-03-261-5/+189
* MIPS64 SMP, compile only edition. Don't use yet ...Ralf Baechle2000-03-141-5/+9
* Merge with Linux 2.3.49.Ralf Baechle2000-03-071-2/+1
* Merge with 2.3.48.Ralf Baechle2000-03-021-2/+20
* Fixed bridge_init() so we can boot either origin200 or origin2000.Leo Dagum2000-02-101-1/+7
* Merge with Linux 2.3.32.Ralf Baechle2000-02-041-3/+3
* Add in bridge byte swapping for the Qlogic scsi controller. Also needKanoj Sarcar2000-01-311-1/+19
* Allow scsi intrs to be serviced.Kanoj Sarcar2000-01-261-9/+30
* 1. Minor changes to start the scsi intrs going (untested).Kanoj Sarcar2000-01-261-2/+6
* - IOC3 driver now will panic when encountering a RX/TX PCI DMA error.Ralf Baechle2000-01-171-0/+321
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